[go: up one dir, main page]

TW201401583A - Package of photoelectric device and photoelectric module - Google Patents

Package of photoelectric device and photoelectric module Download PDF

Info

Publication number
TW201401583A
TW201401583A TW101122228A TW101122228A TW201401583A TW 201401583 A TW201401583 A TW 201401583A TW 101122228 A TW101122228 A TW 101122228A TW 101122228 A TW101122228 A TW 101122228A TW 201401583 A TW201401583 A TW 201401583A
Authority
TW
Taiwan
Prior art keywords
substrate
recess
photovoltaic
disposed
pads
Prior art date
Application number
TW101122228A
Other languages
Chinese (zh)
Other versions
TWI487151B (en
Inventor
Wen-Bin Sun
Guan-Fu Lu
Chun-Chiang Yen
Original Assignee
Ct A Photonics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ct A Photonics Inc filed Critical Ct A Photonics Inc
Priority to TW101122228A priority Critical patent/TWI487151B/en
Publication of TW201401583A publication Critical patent/TW201401583A/en
Application granted granted Critical
Publication of TWI487151B publication Critical patent/TWI487151B/en

Links

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

A package of photoelectric unit including a first substrate, a photoelectric device, a molding compound, a conductor and a redistribution layer is provided. The first substrate has a via hole and a cavity. The photoelectric device disposed in the cavity has a pad. The cavity is filled with the molding compound so as to fix the photoelectric device, and the pad of the photoelectric device is not covered by the molding compound. The conductor is disposed in the via hole. The redistribution layer is disposed on the first substrate and the molding compound, and the redistribution layer extends from the conductor to the pad for electrically connecting the photoelectric device and the conductor.

Description

光電元件封裝體及光電模組 Photoelectric component package and photoelectric module

本發明是有關於一種光電元件封裝體及光電模組。 The invention relates to a photovoltaic element package and a photoelectric module.

在光電產品蓬勃發展的今日,各類光電元件已經普遍地應用成熟的半導體製程技術,並不斷地朝著微型化及多功能化的方向發展,應用半導體製程技術之光電元件可使用於光連結收發器(Active Optical Cable/AOC Transceiver)等需要平行光耦合的光電通訊元件。 In today's booming optoelectronic products, various types of optoelectronic components have been widely applied to mature semiconductor process technology, and continue to develop toward miniaturization and multi-functionality. Photoelectric components using semiconductor process technology can be used for optical connection and transmission. Photoelectric communication elements requiring parallel optical coupling, such as Active Optical Cable/AOC Transceiver.

圖1是習知之一種光電元件封裝體的示意圖。請參閱圖1,習知的光電元件封裝體100包括一基板110、一光電元件120、e驅動晶片130及一印刷電路板140。光電元件120配置於基板110上。驅動晶片130與基板110配置於印刷電路板140上,且驅動晶片130及光電元件120分別透過打線(wire bonding)的方式連接至印刷電路板140而相互電性連接。 1 is a schematic view of a conventional photovoltaic element package. Referring to FIG. 1 , a conventional photovoltaic device package 100 includes a substrate 110 , a photovoltaic element 120 , an e driving chip 130 , and a printed circuit board 140 . The photovoltaic element 120 is disposed on the substrate 110. The driving chip 130 and the substrate 110 are disposed on the printed circuit board 140, and the driving chip 130 and the photovoltaic element 120 are respectively electrically connected to the printed circuit board 140 by wire bonding.

以高頻通訊而言,線路越短越可避免串音(crosstalk)的發生。但由於習知之光電元件封裝體之引線長度(wire length)受到製造設備或是打線弧度之極限而難以進一步降低。此外,在習知技術中,適用於打線製程之印刷電路板在製作上較為複雜。 In the case of high frequency communication, the shorter the line, the more crosstalk can be avoided. However, since the wire length of the conventional photovoltaic device package is limited by the manufacturing equipment or the arc of the wire, it is difficult to further reduce it. In addition, in the prior art, a printed circuit board suitable for a wire bonding process is complicated in production.

本發明提供一種光電元件封裝體,其光電元件與驅動晶片之間具有較短的訊號傳導路徑。 The present invention provides a photovoltaic element package having a short signal conduction path between the photovoltaic element and the drive wafer.

本發明提供一種光電模組,其係使用上述光電元件封裝體。 The present invention provides a photovoltaic module using the above-described photovoltaic device package.

本發明之一實施例提出一種光電元件封裝體,包括一第一基板、一光電元件、一膠體、一導電體以及一線路層。第一基板具有一貫孔及一凹穴。光電元件配置於凹穴內,光電元件具有一接點。膠體填充於凹穴,使光電元件固定於凹穴內,且光電元件之接點未被膠體覆蓋。導電體設置於貫孔中。線路層設置於第一基板及膠體上,線路層從導電體延伸至接點,用以電性連接光電元件與導電體。 One embodiment of the present invention provides a photovoltaic device package including a first substrate, a photovoltaic element, a colloid, an electrical conductor, and a wiring layer. The first substrate has a constant hole and a recess. The photovoltaic element is disposed in the recess, and the photovoltaic element has a contact. The colloid is filled in the recess to fix the photovoltaic element in the recess, and the contacts of the optoelectronic component are not covered by the colloid. The electrical conductor is disposed in the through hole. The circuit layer is disposed on the first substrate and the glue body, and the circuit layer extends from the electrical conductor to the contact for electrically connecting the photoelectric element and the electrical conductor.

在本發明之一實施例中,上述之第一基板具有相對之一第一表面及一第二表面,光電元件具有一主動表面,主動表面用以發出或接收一光訊號,而線路層設置於第一表面及膠體上,且主動表面實質上與第一表面共平面。 In an embodiment of the invention, the first substrate has a first surface and a second surface, and the photoelectric element has an active surface, the active surface is used to emit or receive an optical signal, and the circuit layer is disposed on the circuit board. The first surface and the gel, and the active surface is substantially coplanar with the first surface.

在本發明之一實施例中,上述之凹穴的深度小於第一基板的厚度,且光電元件配置於凹穴之一底面。 In an embodiment of the invention, the depth of the recess is smaller than the thickness of the first substrate, and the photovoltaic element is disposed on a bottom surface of the recess.

在本發明之一實施例中,上述之凹穴的深度實質上等於第一基板的厚度,且凹穴貫通第一基板。 In an embodiment of the invention, the depth of the recess is substantially equal to the thickness of the first substrate, and the recess penetrates the first substrate.

在本發明之一實施例中,更包括一導電凸塊,其中導電體具有相對之一第一端面及一第二端面,第一端面連接於線路層,且第二端面連接於導電凸塊。 In an embodiment of the invention, the method further includes a conductive bump, wherein the electrical conductor has a first end surface and a second end surface, the first end surface is connected to the circuit layer, and the second end surface is connected to the conductive bump.

在本發明之一實施例中,更包括一載具,載具具有相對之一第三表面及一第四表面,載具包括位於第三表面上 的複數接墊及位於第四表面上的複數接墊,部分之位於第三表面上的這些接墊及位於第四表面上之這些接墊分別透過載具的多個導電穿孔電性連接,導電凸塊連接於位在第三表面上之這些接墊的其中之一。 In an embodiment of the invention, the invention further includes a carrier having a third surface and a fourth surface, the carrier comprising the third surface a plurality of pads and a plurality of pads on the fourth surface, the pads on the third surface and the pads on the fourth surface are electrically connected to the plurality of conductive vias of the carrier, respectively The bump is attached to one of the pads on the third surface.

在本發明之一實施例中,更包括一驅動晶片,驅動晶片透過多個焊球連接於部分之位在第三表面上的這些接墊,用以電性連接光電元件。 In an embodiment of the invention, a driving chip is further included, and the driving wafer is connected to the pads on the third surface through a plurality of solder balls for electrically connecting the photovoltaic elements.

本發明之一實施例提出一種光電模組,包括一光電元件封裝體、一第二基板以及至少一導光元件。光電元件封裝體包括一第一基板、一光電元件、一膠體、一導電體以及一線路層。第一基板具有一貫孔及一凹穴。光電元件配置於凹穴內,光電元件具有一接點,且光電元件用以發出或接收一光訊號。膠體填充於凹穴,使光電元件固定於凹穴內,且光電元件之接點未被膠體覆蓋。導電體設置於貫孔中。線路層設置於第一基板及膠體上,線路層從導電體延伸至接點,用以電性連接光電元件與導電體。第二基板配置於第一基板之一側,第二基板具有一反射面,反射面對應於光電元件以反射光訊號。導光元件配置於第一基板及第二基板之間,導光元件用以傳遞光訊號。 An embodiment of the present invention provides a photovoltaic module including a photovoltaic device package, a second substrate, and at least one light guiding device. The photovoltaic device package includes a first substrate, a photovoltaic element, a colloid, an electrical conductor, and a wiring layer. The first substrate has a constant hole and a recess. The optoelectronic component is disposed in the recess, the optoelectronic component has a contact, and the optoelectronic component is used to emit or receive an optical signal. The colloid is filled in the recess to fix the photovoltaic element in the recess, and the contacts of the optoelectronic component are not covered by the colloid. The electrical conductor is disposed in the through hole. The circuit layer is disposed on the first substrate and the glue body, and the circuit layer extends from the electrical conductor to the contact for electrically connecting the photoelectric element and the electrical conductor. The second substrate is disposed on one side of the first substrate, and the second substrate has a reflective surface corresponding to the photoelectric element to reflect the optical signal. The light guiding element is disposed between the first substrate and the second substrate, and the light guiding element is configured to transmit the optical signal.

在本發明之一實施例中,上述之第一基板具有相對之一第一表面及一第二表面,光電元件具有一主動表面,主動表面用以發出或接收光訊號,而線路層設置於第一表面及膠體上,且主動表面實質上與第一表面共平面。 In an embodiment of the invention, the first substrate has a first surface and a second surface, and the photoelectric element has an active surface, the active surface is used to emit or receive optical signals, and the circuit layer is disposed on the first a surface and a colloid, and the active surface is substantially coplanar with the first surface.

在本發明之一實施例中,上述之凹穴的深度小於第一 基板的厚度,且光電元件配置於凹穴之一底面。 In an embodiment of the invention, the depth of the recess is smaller than the first The thickness of the substrate, and the photovoltaic element is disposed on one of the bottom surfaces of the recess.

在本發明之一實施例中,上述之凹穴的深度實質上等於第一基板的厚度,且凹穴貫通第一基板。 In an embodiment of the invention, the depth of the recess is substantially equal to the thickness of the first substrate, and the recess penetrates the first substrate.

在本發明之一實施例中,更包括一導電凸塊,其中導電體具有相對之一第一端面及一第二端面,第一端面連接於線路層,且第二端面連接於導電凸塊。 In an embodiment of the invention, the method further includes a conductive bump, wherein the electrical conductor has a first end surface and a second end surface, the first end surface is connected to the circuit layer, and the second end surface is connected to the conductive bump.

在本發明之一實施例中,其中光電元件封裝體更包括一載具,載具具有相對之一第三表面及一第四表面,載具包括位於第三表面上的複數接墊及位於第四表面上的複數接墊,部分之位於第三表面上的這些接墊及位於第四表面上之這些接墊分別透過載具的多個導電穿孔電性連接,導電凸塊連接於位在第三表面上之這些接墊的其中之一。 In an embodiment of the invention, the photo-electric component package further includes a carrier having a third surface and a fourth surface, the carrier includes a plurality of pads on the third surface and a plurality of pads on the four surfaces, the pads on the third surface and the pads on the fourth surface are respectively electrically connected through the plurality of conductive vias of the carrier, and the conductive bumps are connected in the first One of these pads on the three surfaces.

在本發明之一實施例中,其中光電元件封裝體更包括一驅動晶片,驅動晶片透過多個焊球連接於部分之位在第三表面上的這些接墊,用以電性連接光電元件。 In an embodiment of the invention, the photo-electric device package further includes a driving chip, and the driving wafer is connected to the portions of the pads on the third surface through a plurality of solder balls for electrically connecting the photovoltaic elements.

在本發明之一實施例中,上述之第一基板具有一第一對位部,第二基板具有一第二對位部,第一對位部搭配第二對位部以組合第一基板與第二基板。 In an embodiment of the invention, the first substrate has a first alignment portion, the second substrate has a second alignment portion, and the first alignment portion is coupled with the second alignment portion to combine the first substrate with The second substrate.

基於上述,本發明之實施例透過線路層及導電體有效地縮短驅動晶片與光電元件之間的訊號傳遞路徑,進而提升光電模組之性能。 Based on the above, the embodiment of the present invention effectively shortens the signal transmission path between the driving chip and the photovoltaic element through the circuit layer and the conductor, thereby improving the performance of the photovoltaic module.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the present invention will be more apparent from the following description.

圖2A是依照本發明之一實施例之一種光電元件封裝體的剖面示意圖。請參閱圖2A,本實施例之光電元件封裝體200包括一第一基板210、一光電元件220、一膠體230、一導電體240以及一重配置線路層250(redistribution layer)。第一基板210具有一貫孔212及一凹穴214。光電元件220配置於凹穴214內,光電元件220具有一接點222。膠體230填充於凹穴214,使光電元件220固定於凹穴214內,且光電元件220之接點222未被膠體230覆蓋。導電體240設置於貫孔212中。重配置線路層250設置於第一基板210及膠體230上,且重配置線路層250從導電體240延伸至接點222,用以電性連接光電元件220與導電體240。 2A is a schematic cross-sectional view of a photovoltaic device package in accordance with an embodiment of the present invention. Referring to FIG. 2A, the photovoltaic device package 200 of the present embodiment includes a first substrate 210, a photovoltaic element 220, a colloid 230, a conductive body 240, and a redistribution layer. The first substrate 210 has a uniform hole 212 and a recess 214. The optoelectronic component 220 is disposed within the recess 214, and the optoelectronic component 220 has a contact 222. The colloid 230 is filled in the recess 214 to fix the optoelectronic component 220 within the recess 214, and the contact 222 of the optoelectronic component 220 is not covered by the colloid 230. The electrical conductor 240 is disposed in the through hole 212. The reconfiguration circuit layer 250 is disposed on the first substrate 210 and the colloid 230, and the reconfiguration circuit layer 250 extends from the electrical conductor 240 to the contact 222 for electrically connecting the photovoltaic element 220 and the electrical conductor 240.

第一基板210具有相對之一第一表面216及一第二表面218。光電元件220具有一主動表面224,且主動表面224位於光電元件220之上表面,並用以發出或接收一光訊號;接點222亦位於光電元件220之上表面上,但未與主動表面重疊;而重配置線路層250設置於第一表面216及膠體230上。在本實施例中,凹穴214的深度D小於第一基板210的厚度T,光電元件220配置於凹穴214之一底面214a。光電元件220設置於凹穴214內可使光電元件220之主動表面224實質上與第一表面216共平面,如此一來,不但可降低重配置線路層250在製作上的複雜性,亦可縮短連接於光電元件220之接點222及導電體240之 重配置線路層250的訊號傳導路徑。但在其他實施例中,光電元件220之主動表面224亦可不與第一表面216共平面,而本發明皆不以此為限。 The first substrate 210 has a first surface 216 and a second surface 218 opposite to each other. The optoelectronic component 220 has an active surface 224, and the active surface 224 is located on the upper surface of the optoelectronic component 220 and is used to emit or receive an optical signal; the contact 222 is also located on the upper surface of the optoelectronic component 220, but does not overlap with the active surface; The reconfiguration circuit layer 250 is disposed on the first surface 216 and the colloid 230. In the present embodiment, the depth D of the recess 214 is smaller than the thickness T of the first substrate 210, and the photoelectric element 220 is disposed on one of the bottom surfaces 214a of the recess 214. The optoelectronic component 220 is disposed in the recess 214 to make the active surface 224 of the optoelectronic component 220 substantially coplanar with the first surface 216. Thus, the complexity of the reconfigured wiring layer 250 can be reduced and shortened. Connected to the contact 222 of the photovoltaic element 220 and the conductor 240 The signal conduction path of the circuit layer 250 is reconfigured. In other embodiments, the active surface 224 of the optoelectronic component 220 may not be coplanar with the first surface 216, and the invention is not limited thereto.

此外,導電體240具有相對之一第一端面242及一第二端面244,第一端面242連接於重配置線路層250,且第二端面244連接於一導電凸塊260。 In addition, the electrical conductor 240 has a first end surface 242 and a second end surface 244 . The first end surface 242 is connected to the reconfiguration circuit layer 250 , and the second end surface 244 is connected to a conductive bump 260 .

本實施例之光電元件封裝體200更包括一載具270及一驅動晶片278。載具270具有相對之一第三表面272及一第四表面274,且載具270包括多個接墊272a、274a。接墊272a位於第三表面272上,接墊274a位於第四表面274上,部分接墊272a及接墊274a分別透過載具270的多個導電穿孔276電性連接。光電元件封裝體200之導電凸塊260連接於第三表面272上之接墊272a,且驅動晶片278透過多個焊球279連接於部分接墊272a,用以電性連接光電元件220。此外,載具270之接墊274a亦可透過焊料來連接於一印刷電路板(未繪示)。在本實施例中,光電元件220可透過與導電體240連接之接墊272a電性連接驅動晶片278,舉例來說,導電體240連接之接墊272a可利用位於第三表面272上之一導電線路(未繪示)電性連接與驅動晶片278連接之接墊272a,進而使光電元件220電性連接驅動晶片278,但本發明不以此為限。 The photovoltaic device package 200 of the present embodiment further includes a carrier 270 and a driving wafer 278. The carrier 270 has a first third surface 272 and a fourth surface 274, and the carrier 270 includes a plurality of pads 272a, 274a. The pads 272a are located on the third surface 272. The pads 274a are located on the fourth surface 274. The pads 272a and the pads 274a are electrically connected to the plurality of conductive vias 276 of the carrier 270, respectively. The conductive bumps 260 of the photovoltaic device package 200 are connected to the pads 272a on the third surface 272, and the driving wafers 278 are connected to the partial pads 272a through a plurality of solder balls 279 for electrically connecting the photovoltaic elements 220. In addition, the pads 274a of the carrier 270 can also be connected to a printed circuit board (not shown) through solder. In this embodiment, the photo-electric component 220 can be electrically connected to the driving die 278 through the pad 272a connected to the electrical conductor 240. For example, the pad 272a connected to the electrical conductor 240 can be electrically conductive by using one of the pads 272a on the third surface 272. The circuit (not shown) electrically connects the pads 272a connected to the driving chip 278, thereby electrically connecting the photovoltaic element 220 to the driving chip 278, but the invention is not limited thereto.

本實施例之光電元件封裝體200的光電元件220透過重配置線路層250、導電體240及導電凸塊260連接至載具270進而電性連接於驅動晶片278。本實施例之光電元 件封裝體200相較於習知之光電元件封裝體縮減了驅動晶片278及光電元件220之間的訊號傳導路徑,除了降低了串音發生的機率,亦降低了製程的困難度及成本。此處需注意的是,由於圖2A為光電元件封裝體200的剖面示意圖,在此剖面中,本實施例僅顯示出一個接點222、一個導電體240以及一個貫孔212以示意,而在其他實施例中,接點222、導電體240以及貫孔212亦可為複數個。 The photovoltaic element 220 of the photovoltaic device package 200 of the present embodiment is connected to the carrier 270 through the relocation wiring layer 250, the conductor 240 and the conductive bumps 260, and is electrically connected to the driving wafer 278. Photoelectric element of this embodiment Compared with the conventional photovoltaic device package, the package 200 reduces the signal conduction path between the driving chip 278 and the photovoltaic element 220, and reduces the probability of occurrence of crosstalk, thereby reducing the difficulty and cost of the process. It should be noted that FIG. 2A is a schematic cross-sectional view of the photovoltaic device package 200. In this cross section, the embodiment only shows one contact 222, one electrical conductor 240, and one through hole 212 to indicate In other embodiments, the contacts 222, the conductors 240, and the through holes 212 may also be plural.

為了更清楚地描述本實施例之光電元件封裝體200,此處提供光電元件封裝體200的其中一種製造方式。圖2B至圖2F是圖2A之光電元件封裝體的製造流程剖面示意圖。首先,請參閱圖2B,提供具有貫孔212及凹穴214之第一基板210。第一基板210之種類可為矽基板、陶瓷基板或印刷電路板等,但不以上述為限制。第一基板210可透過兩次蝕刻等方式以形成不同深度的貫孔212及凹穴214。 In order to more clearly describe the photovoltaic device package 200 of the present embodiment, one of the manufacturing methods of the photovoltaic device package 200 is provided herein. 2B to 2F are schematic cross-sectional views showing a manufacturing process of the photovoltaic device package of Fig. 2A. First, referring to FIG. 2B, a first substrate 210 having a through hole 212 and a recess 214 is provided. The type of the first substrate 210 may be a germanium substrate, a ceramic substrate, a printed circuit board, or the like, but is not limited thereto. The first substrate 210 can be etched by two etchings or the like to form the through holes 212 and the recesses 214 of different depths.

接著,請參閱圖2C,將光電元件220配置於凹穴214之底面214a上,且使光電元件220之主動表面224與第一表面216共平面。在本實施例中,光電元件220可為用以接收一光訊號之光偵檢器(photo detector,PD)或是用以發出光訊號之垂直腔面發射激光器(Vertical-Cavity Surface-Emitting Laser,VCSEL),但光電元件220之種類並不以此為限。 Next, referring to FIG. 2C, the photovoltaic element 220 is disposed on the bottom surface 214a of the cavity 214, and the active surface 224 of the photovoltaic element 220 is coplanar with the first surface 216. In this embodiment, the photo-electric component 220 can be a photo detector (PD) for receiving an optical signal or a vertical cavity-emitting laser for emitting an optical signal (Vertical-Cavity Surface-Emitting Laser, VCSEL), but the type of the photovoltaic element 220 is not limited thereto.

再來,請參閱圖2D,將膠體230填充於凹穴214內以將光電元件220固定於凹穴214內。膠體230會略為覆 蓋光電元件220以使其固定,但並未覆蓋住光電元件220之接點222。在本實施例中,膠體230之材質可包括苯環丁烯(benzocyclobutene,BCB)、矽橡膠(silicon rubber)、聚醯亞胺(Polyimide,PI)、環氧樹脂(Epoxy)、聚酯(Polyurethane,PU)或二氧化矽等,但膠體230之材質並不以此為限。在本實施例中,可利用旋轉塗佈(spin coating)之方式填充膠體230於凹穴214,且凹穴214與貫孔212間之第一表面216亦可同時塗佈膠體230(未繪示),增加第一表面216之平坦度,以利後續重配置線路層250之製作。 Referring again to FIG. 2D, the colloid 230 is filled into the pocket 214 to secure the photovoltaic element 220 within the pocket 214. Colloid 230 will be slightly covered The optoelectronic component 220 is covered to secure it, but does not cover the contacts 222 of the optoelectronic component 220. In this embodiment, the material of the colloid 230 may include benzocyclobutene (BCB), silicon rubber, polyimide (PI), epoxy resin (Epoxy), and polyester (Polyurethane). , PU) or cerium oxide, etc., but the material of the colloid 230 is not limited thereto. In this embodiment, the colloid 230 can be filled into the cavity 214 by means of spin coating, and the first surface 216 between the cavity 214 and the through hole 212 can also be coated with the colloid 230 at the same time (not shown). The flatness of the first surface 216 is increased to facilitate subsequent fabrication of the rewiring circuit layer 250.

接著,請參閱圖2E,將導電體240設置於貫孔212中。並且,將重配置線路層250設置於第一基板210以及膠體230上,重配置線路層250從導電體240之第一端面242延伸至接點222。值得一提的是,在其他製造流程中,導電體240亦可在圖2B的步驟中就被設置於貫孔212中,並不以本實施例之步驟為限制。再來,請參閱圖2F,將導電凸塊260連接於導電體240之第二端面244。 Next, referring to FIG. 2E , the electrical conductor 240 is disposed in the through hole 212 . Moreover, the reconfiguration wiring layer 250 is disposed on the first substrate 210 and the colloid 230, and the reconfiguration wiring layer 250 extends from the first end surface 242 of the electrical conductor 240 to the contact 222. It is worth mentioning that in other manufacturing processes, the electrical conductor 240 can also be disposed in the through hole 212 in the step of FIG. 2B, and is not limited by the steps of the embodiment. Referring to FIG. 2F, the conductive bumps 260 are connected to the second end surface 244 of the electrical conductor 240.

最後,請回到圖2A,將導電凸塊260及驅動晶片278連接於載具270之第三表面272上的接墊272a。如此一來,光電元件220即可透過重配置線路層250、導電體240及導電凸塊260連接至載具270而電性連接於驅動晶片278。載具270可為矽基板、陶瓷基板或印刷電路板等。本實施例之光電元件封裝體200相較於習知的光電元件封裝體100,不但在製程上較為簡單,亦可縮短驅動晶片278 與光電元件220之間的訊號傳遞路徑,進而提升光電元件封裝體200之性能。 Finally, returning to FIG. 2A, conductive bumps 260 and drive wafer 278 are attached to pads 272a on third surface 272 of carrier 270. In this manner, the photo-electric component 220 can be electrically connected to the driving wafer 278 through the re-wiring circuit layer 250, the conductive body 240, and the conductive bumps 260 to the carrier 270. The carrier 270 may be a germanium substrate, a ceramic substrate, a printed circuit board, or the like. Compared with the conventional photovoltaic device package 100, the photovoltaic device package 200 of the present embodiment is not only simple in process, but also can shorten the driving chip 278. The signal transmission path with the photovoltaic element 220 further enhances the performance of the photovoltaic device package 200.

圖3A是依照本發明之另一實施例之一種光電元件封裝體的剖面示意圖。圖3A之光電元件封裝體300與圖2A之光電元件封裝體200的主要差異在於,在圖3A之光電元件封裝體300中,凹穴314的深度D實質上等於第一基板310的厚度T;而在圖2A之光電元件封裝體200中,凹穴214的深度D小於第一基板210的厚度T。也就是說,本實施例之光電元件封裝體300之凹穴314與貫孔312均貫通第一基板310。因此,本實施例之第一基板310在製造貫孔312與凹穴314時,利用一次蝕刻的方式即可完成,在製程上較為方便。當然,貫孔312與凹穴314的形成方式並不以上述為限制。 3A is a cross-sectional view of a photovoltaic device package in accordance with another embodiment of the present invention. The main difference between the photovoltaic device package 300 of FIG. 3A and the photovoltaic device package 200 of FIG. 2A is that, in the photovoltaic device package 300 of FIG. 3A, the depth D of the cavity 314 is substantially equal to the thickness T of the first substrate 310; In the photovoltaic device package 200 of FIG. 2A, the depth D of the recess 214 is smaller than the thickness T of the first substrate 210. That is, the recess 314 and the through hole 312 of the photovoltaic device package 300 of the present embodiment both penetrate the first substrate 310. Therefore, when the through hole 312 and the recess 314 are manufactured, the first substrate 310 of the embodiment can be completed by one etching, which is convenient in the process. Of course, the manner in which the through holes 312 and the recesses 314 are formed is not limited to the above.

為了更清楚地描述本實施例之光電元件封裝體300,此處提供光電元件封裝體300的其中一種製造方式。圖3B至圖3E是圖3A之光電元件封裝體的製造流程剖面示意圖。首先,請參閱圖3B,提供第一基板310。第一基板310具有貫孔312、一凹穴314、相對之一第一表面316及一第二表面318。在本實施例中,貫孔312與凹穴314貫通第一基板310。第一基板310可為矽基板(silicon wafer)、陶瓷基板或印刷電路板等。為方便接下來的步驟,可如圖3B所示,先將導電體340設置於貫孔312內。 In order to more clearly describe the photovoltaic device package 300 of the present embodiment, one of the manufacturing methods of the photovoltaic device package 300 is provided herein. 3B to 3E are schematic cross-sectional views showing a manufacturing process of the photovoltaic device package of FIG. 3A. First, referring to FIG. 3B, a first substrate 310 is provided. The first substrate 310 has a through hole 312, a recess 314, a first surface 316 and a second surface 318. In the embodiment, the through hole 312 and the recess 314 penetrate the first substrate 310. The first substrate 310 may be a silicon wafer, a ceramic substrate, a printed circuit board, or the like. To facilitate the next step, as shown in FIG. 3B, the electrical conductor 340 is first placed in the through hole 312.

接著,請參閱圖3C,將具有接點322及一主動表面324之光電元件320配置於凹穴314內。由於凹穴314貫 通第一基板310,為使光電元件320能被固定於凹穴314內且光電元件320之主動表面324與第一基板310的第一表面316實質上共平面。在製作上,可如圖3C所示,將第一基板310翻轉且在第一基板310的第一表面316上配置一治具10以擋住凹穴314。如此一來,光電元件320可被放置於凹穴314中,且光電元件320之主動表面324可位於治具10上以與第一基板310的第一表面316共平面。 Next, referring to FIG. 3C, the photocell 320 having the contact 322 and an active surface 324 is disposed in the recess 314. Due to the pocket 314 The first substrate 310 is passed through to allow the photovoltaic element 320 to be secured within the recess 314 and the active surface 324 of the optoelectronic component 320 is substantially coplanar with the first surface 316 of the first substrate 310. In fabrication, as shown in FIG. 3C, the first substrate 310 is inverted and a jig 10 is disposed on the first surface 316 of the first substrate 310 to block the recess 314. As such, the optoelectronic component 320 can be placed in the pocket 314 and the active surface 324 of the optoelectronic component 320 can be positioned on the fixture 10 to be coplanar with the first surface 316 of the first substrate 310.

再來,將膠體330填充於凹穴314內,以使光電元件320被膠體330固定於凹穴314內。光電元件320之主動表面324與第一基板310的第一表面316共平面,且接點322外露於膠體330。待膠體330固化後,將第一基板310翻轉即如圖3D所示。 Again, the colloid 330 is filled into the pocket 314 such that the optoelectronic component 320 is secured within the pocket 314 by the colloid 330. The active surface 324 of the photovoltaic element 320 is coplanar with the first surface 316 of the first substrate 310, and the contact 322 is exposed to the colloid 330. After the colloid 330 is cured, the first substrate 310 is turned over, as shown in FIG. 3D.

接著,請參閱圖3E,設置重配置線路層350於第一基板310及膠體330上,重配置線路層350從導電體340之第一端面342延伸至接點322。並且,將導電凸塊360連接於導電體340之第二端面344。 Next, referring to FIG. 3E , a reconfiguration wiring layer 350 is disposed on the first substrate 310 and the colloid 330 , and the reconfiguration wiring layer 350 extends from the first end surface 342 of the electrical conductor 340 to the contact 322 . Moreover, the conductive bumps 360 are connected to the second end surface 344 of the conductor 340.

最後,請回到圖3A,將導電凸塊360及驅動晶片378之焊球379連接於載具370之接墊372a。如此一來,光電元件320即可透過重配置線路層350、導電體340及導電凸塊360連接至載具370而電性連接於驅動晶片378。載具370可為矽基板、陶瓷基板或印刷電路板等。本實施例之光電元件封裝體300藉由重配置線路層350、導電體340、導電凸塊360、及載具370替代原本以打線的方式連接。驅動晶片378與光電元件320之間的訊號傳遞路徑可 被縮短,進而提升光電元件封裝體300之效能。 Finally, returning to FIG. 3A, the conductive bumps 360 and the solder balls 379 of the driving wafer 378 are connected to the pads 372a of the carrier 370. In this manner, the photo-electric component 320 can be electrically connected to the driving wafer 378 through the re-distribution wiring layer 350, the electrical conductor 340, and the conductive bumps 360 to the carrier 370. The carrier 370 may be a germanium substrate, a ceramic substrate, a printed circuit board, or the like. The photovoltaic device package 300 of the present embodiment is connected by a re-wiring circuit layer 350, a conductor 340, a conductive bump 360, and a carrier 370 instead of being originally wired. The signal transmission path between the driving chip 378 and the photoelectric element 320 can be It is shortened, thereby improving the performance of the photovoltaic device package 300.

此處需注意的是,由於圖3A至3E為剖面示意圖,在此剖面中,本實施例僅顯示出一個接點322、一個導電體340以及一個貫孔312以示意,而在其他實施例中,接點322、導電體340以及貫孔312亦可為複數個。 It should be noted here that, since FIGS. 3A to 3E are schematic cross-sectional views, in this cross section, the present embodiment only shows one contact 322, one electric conductor 340, and one through hole 312 to illustrate, but in other embodiments. The contacts 322, the conductors 340, and the through holes 312 may also be plural.

本發明之實施例之光電元件封裝體可應用於光電模組,藉由縮短驅動晶片與光電元件之間的訊號傳遞路徑,進而提升光電模組之性能。下面將以圖2A之光電元件封裝體200為例,當然,在其他實施例中,亦可選用圖3A之光電元件封裝體300,光電元件封裝體之種類並不以此為限制。 The photovoltaic device package of the embodiment of the present invention can be applied to a photovoltaic module, thereby improving the performance of the photovoltaic module by shortening the signal transmission path between the driving wafer and the photovoltaic element. The photovoltaic device package 200 of FIG. 2A will be taken as an example. Of course, in other embodiments, the photovoltaic device package 300 of FIG. 3A may also be used. The type of the photovoltaic device package is not limited thereto.

圖4是依照本發明之一實施例之一種光電模組的示意圖。請參閱圖4,本實施例之光電模組400包括光電元件封裝體200、一第二基板480以及至少一導光元件490。第二基板480配置於光電元件封裝體200之第一基板210之第一表面216上。第二基板480具有一反射面482,反射面482對應於光電元件封裝體200之光電元件220,以反射自光電元件220發出或是光電元件220所接收之光訊號。導光元件490配置於第一基板210及第二基板480之間,用以傳遞光訊號。導光元件490可為光纖,但不以此為限制。在本實施例中,載具270之第四表面274上的接墊274a透過焊料來連接於一印刷電路板20,以將驅動晶片278之訊號傳遞於印刷電路板20。 4 is a schematic diagram of a photovoltaic module in accordance with an embodiment of the present invention. Referring to FIG. 4 , the photovoltaic module 400 of the embodiment includes a photovoltaic device package 200 , a second substrate 480 , and at least one light guiding component 490 . The second substrate 480 is disposed on the first surface 216 of the first substrate 210 of the photovoltaic device package 200. The second substrate 480 has a reflective surface 482 corresponding to the optoelectronic component 220 of the optoelectronic component package 200 to reflect the optical signal emitted from the optoelectronic component 220 or received by the optoelectronic component 220. The light guiding element 490 is disposed between the first substrate 210 and the second substrate 480 for transmitting optical signals. The light guiding element 490 can be an optical fiber, but is not limited thereto. In the present embodiment, the pads 274a on the fourth surface 274 of the carrier 270 are soldered to a printed circuit board 20 to transfer signals from the drive wafer 278 to the printed circuit board 20.

在本實施例中,第一基板210具有一第一對位部219, 第二基板480具有一第二對位部484,第一對位部219搭配第二對位部484以組合第一基板210與第二基板480。進而使光電模組400中的導光元件490與光學元件220能夠被精準地對位,以使光訊號高效率地傳遞於其間。在本實施例中,第一對位部219為對位凸塊,而第二對位部484為對位凹槽,但在其他實施例中,第一對位部219亦可為對位凹槽,而第二對位部484可為對位凸塊。 In this embodiment, the first substrate 210 has a first alignment portion 219. The second substrate 480 has a second alignment portion 484, and the first alignment portion 219 is combined with the second alignment portion 484 to combine the first substrate 210 and the second substrate 480. In turn, the light guiding element 490 and the optical element 220 in the photovoltaic module 400 can be accurately aligned to enable the optical signal to be efficiently transmitted therebetween. In this embodiment, the first alignment portion 219 is a registration bump, and the second alignment portion 484 is an alignment groove. However, in other embodiments, the first alignment portion 219 may also be a registration concave. The slot, and the second alignment portion 484 can be a aligning bump.

本實施例之光電模組400透過重配置線路層250、導電體240及導電凸塊260將光電元件220電性連接至載具270,並且使驅動晶片278連接至載具270,以使光電元件220能以較短的訊號傳遞路徑連接至驅動晶片278。此外,本實施例之光電模組400透過第一對位部219搭配第二對位部484以使導光元件490與光學元件220之間被精準地對位,而提昇光訊號之效率。 The optoelectronic module 400 of the present embodiment electrically connects the optoelectronic component 220 to the carrier 270 through the reconfiguration wiring layer 250, the electrical conductor 240 and the conductive bumps 260, and connects the driving wafer 278 to the carrier 270 to make the optoelectronic component. 220 can be coupled to drive die 278 with a shorter signal transfer path. In addition, the optoelectronic module 400 of the present embodiment is coupled to the second alignment portion 484 through the first alignment portion 219 to accurately align the light guiding element 490 and the optical element 220 to improve the efficiency of the optical signal.

綜上所述,本發明之光電元件封裝體與光電模組在第一基板上製造貫孔及凹穴,將光電元件放置於凹穴中,並且將導電體設置於貫孔內,透過重配置線路層連接導電體之第一端面及光電元件之接點,導電體之第二端面連接導電凸塊,以使光學元件導通於導電凸塊。導電凸塊被設置於載具上的接墊以使光電元件電性連接於同樣設置在載具上的驅動晶片,以此替代光電元件及驅動晶片透過打線而連接的方式,使得驅動晶片與光電元件之間的訊號傳遞路徑可被縮短,進而提升效能。 In summary, the photovoltaic device package and the photovoltaic module of the present invention form through holes and recesses on the first substrate, place the photovoltaic elements in the recesses, and place the electrical conductors in the through holes, and through the reconfiguration The circuit layer is connected to the first end surface of the electrical conductor and the contact of the photoelectric element, and the second end surface of the electrical conductor is connected to the conductive bump to electrically connect the optical component to the conductive bump. The conductive bumps are disposed on the pads on the carrier to electrically connect the photovoltaic elements to the driving wafers also disposed on the carrier, thereby replacing the photovoltaic elements and driving the wafers by connecting the wires, so that the driving wafers and the photovoltaics are driven. The signal transmission path between components can be shortened to improve performance.

雖然本發明已以實施例揭露如上,然其並非用以限定 本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the invention has been disclosed above by way of example, it is not intended to be limiting The scope of the present invention is defined by the scope of the appended claims, and the scope of the invention is defined by the scope of the appended claims. Prevail.

D‧‧‧凹穴之深度 D‧‧‧Deep depth

T‧‧‧第一基板之厚度 T‧‧‧The thickness of the first substrate

10‧‧‧治具 10‧‧‧ fixture

20‧‧‧印刷電路板 20‧‧‧Printed circuit board

100‧‧‧習知的光電元件封裝體 100‧‧‧Looking optoelectronic component package

110‧‧‧基板 110‧‧‧Substrate

120‧‧‧光電元件 120‧‧‧Optoelectronic components

130‧‧‧驅動晶片 130‧‧‧Drive chip

140‧‧‧印刷電路板 140‧‧‧Printed circuit board

200、300‧‧‧光電元件封裝體 200, 300‧‧‧Photoelectric component package

210、310‧‧‧第一基板 210, 310‧‧‧ first substrate

212、312‧‧‧貫孔 212, 312‧‧‧through holes

214、314‧‧‧凹穴 214, 314‧‧ ‧ pocket

214a‧‧‧底面 214a‧‧‧ bottom

216、316‧‧‧第一表面 216, 316‧‧‧ first surface

218、318‧‧‧第二表面 218, 318‧‧‧ second surface

219‧‧‧第一對位部 219‧‧‧The first counter

220、320‧‧‧光電元件 220, 320‧‧‧Optoelectronic components

222‧‧‧接點 222‧‧‧Contacts

224、324‧‧‧主動表面 224, 324‧‧‧ active surface

230、330‧‧‧膠體 230, 330‧‧‧ colloid

240、340‧‧‧導電體 240, 340‧‧‧ Electrical conductors

242、342‧‧‧第一端面 242, 342‧‧‧ first end face

244、344‧‧‧第二端面 244, 344‧‧‧ second end face

250、350‧‧‧重配置線路層 250, 350‧‧‧Reconfigured circuit layers

260、360‧‧‧導電凸塊 260, 360‧‧‧ conductive bumps

270、370‧‧‧載具 270, 370‧‧‧ Vehicles

272、372‧‧‧第三表面 272, 372‧‧‧ third surface

272a、372a‧‧‧接墊 272a, 372a‧‧‧ pads

274、374‧‧‧第四表面 274, 374‧‧‧ fourth surface

274a、374a‧‧‧接墊 274a, 374a‧‧‧ pads

276、376‧‧‧導電穿孔 276, 376‧‧‧ conductive perforations

278、378‧‧‧驅動晶片 278, 378‧‧‧ drive wafer

279、379‧‧‧焊球 279, 379‧‧‧ solder balls

400‧‧‧光電模組 400‧‧‧Optoelectronic module

480‧‧‧第二基板 480‧‧‧second substrate

482‧‧‧反射面 482‧‧‧reflecting surface

484‧‧‧第二對位部 484‧‧‧Second Matching Department

490‧‧‧導光元件 490‧‧‧Light guiding elements

圖1是習知之一種光電元件封裝體的示意圖。 1 is a schematic view of a conventional photovoltaic element package.

圖2A是依照本發明之一實施例之一種光電元件封裝體的剖面示意圖。 2A is a schematic cross-sectional view of a photovoltaic device package in accordance with an embodiment of the present invention.

圖2B至圖2F是圖2A之光電元件封裝體的製造流程剖面示意圖。 2B to 2F are schematic cross-sectional views showing a manufacturing process of the photovoltaic device package of Fig. 2A.

圖3A是依照本發明之另一實施例之一種光電元件封裝體的剖面示意圖。 3A is a cross-sectional view of a photovoltaic device package in accordance with another embodiment of the present invention.

圖3B至圖3E是圖3A之光電元件封裝體的製造流程剖面示意圖。 3B to 3E are schematic cross-sectional views showing a manufacturing process of the photovoltaic device package of FIG. 3A.

圖4是依照本發明之一實施例之一種光電模組的示意圖。 4 is a schematic diagram of a photovoltaic module in accordance with an embodiment of the present invention.

D‧‧‧凹穴之深度 D‧‧‧Deep depth

T‧‧‧第一基板之厚度 T‧‧‧The thickness of the first substrate

200‧‧‧光電元件封裝體 200‧‧‧Photoelectric component package

210‧‧‧第一基板 210‧‧‧First substrate

212‧‧‧貫孔 212‧‧‧through holes

214‧‧‧凹穴 214‧‧‧ recess

214a‧‧‧底面 214a‧‧‧ bottom

216‧‧‧第一表面 216‧‧‧ first surface

218‧‧‧第二表面 218‧‧‧ second surface

219‧‧‧第一對位部 219‧‧‧The first counter

220‧‧‧光電元件 220‧‧‧Optoelectronic components

222‧‧‧接點 222‧‧‧Contacts

224‧‧‧主動表面 224‧‧‧Active surface

230‧‧‧膠體 230‧‧‧ colloid

240‧‧‧導電體 240‧‧‧Electrical conductor

242‧‧‧第一端面 242‧‧‧ first end face

244‧‧‧第二端面 244‧‧‧second end face

250‧‧‧重配置線路層 250‧‧‧Reconfigured circuit layer

260‧‧‧導電凸塊 260‧‧‧conductive bumps

270‧‧‧載具 270‧‧‧ Vehicles

272‧‧‧第三表面 272‧‧‧ third surface

272a‧‧‧接墊 272a‧‧‧ pads

274‧‧‧第四表面 274‧‧‧ fourth surface

274a‧‧‧接墊 274a‧‧‧ pads

276‧‧‧導電穿孔 276‧‧‧Electrical perforation

278‧‧‧驅動晶片 278‧‧‧Drive chip

279‧‧‧焊球 279‧‧‧ solder balls

Claims (15)

一種光電元件封裝體,包括:一第一基板,具有一貫孔及一凹穴;一光電元件,配置於該凹穴內,該光電元件具有一接點;一膠體,填充於該凹穴,使該光電元件固定於該凹穴內,且該光電元件之該接點未被該膠體覆蓋;一導電體,設置於該貫孔中;以及一線路層,設置於該第一基板及該膠體上,該線路層從該導電體延伸至該接點,用以電性連接該光電元件與該導電體。 A photovoltaic device package comprising: a first substrate having a uniform aperture and a recess; a photovoltaic element disposed in the recess, the optoelectronic component having a contact; a colloid filling the recess to enable The photo-electric component is fixed in the recess, and the contact of the photo-electric component is not covered by the colloid; an electric conductor is disposed in the through-hole; and a circuit layer is disposed on the first substrate and the colloid The circuit layer extends from the electrical conductor to the contact for electrically connecting the optoelectronic component to the electrical conductor. 如申請專利範圍第1項所述之光電元件封裝體,其中該第一基板具有相對之一第一表面及一第二表面,該光電元件具有一主動表面,該主動表面用以發出或接收一光訊號,而該線路層設置於該第一表面及該膠體上,且該主動表面實質上與該第一表面共平面。 The photovoltaic device package of claim 1, wherein the first substrate has a first surface and a second surface, and the photoelectric element has an active surface for emitting or receiving a An optical signal, and the circuit layer is disposed on the first surface and the colloid, and the active surface is substantially coplanar with the first surface. 如申請專利範圍第1項所述之光電元件封裝體,其中該凹穴的深度小於該第一基板的厚度,且該光電元件配置於該凹穴之一底面。 The photovoltaic device package of claim 1, wherein the recess has a depth smaller than a thickness of the first substrate, and the photovoltaic element is disposed on a bottom surface of the recess. 如申請專利範圍第1項所述之光電元件封裝體,其中該凹穴的深度實質上等於該第一基板的厚度,且該凹穴貫通該第一基板。 The photovoltaic device package of claim 1, wherein the recess has a depth substantially equal to a thickness of the first substrate, and the recess penetrates the first substrate. 如申請專利範圍第1項所述之光電元件封裝體,更包括一導電凸塊,其中該導電體具有相對之一第一端面及一第二端面,該第一端面連接於該線路層,且該第二端面 連接於該導電凸塊。 The photovoltaic device package of claim 1, further comprising a conductive bump, wherein the conductive body has a first end surface and a second end surface, the first end surface is connected to the circuit layer, and The second end face Connected to the conductive bump. 如申請專利範圍第5項所述之光電元件封裝體,更包括一載具,該載具具有相對之一第三表面及一第四表面,該載具包括位於該第三表面上的複數接墊及位於該第四表面上的複數接墊,部分之位於該第三表面上的該些接墊及位於該第四表面上之該些接墊分別透過該載具的多個導電穿孔電性連接,該導電凸塊連接於位在該第三表面上之該些接墊的其中之一。 The photovoltaic device package of claim 5, further comprising a carrier having a third surface and a fourth surface, the carrier comprising a plurality of interfaces on the third surface The pad and the plurality of pads on the fourth surface, the pads on the third surface and the pads on the fourth surface respectively pass through the plurality of conductive perforations of the carrier Connected, the conductive bump is connected to one of the pads on the third surface. 如申請專利範圍第6項所述之光電元件封裝體,更包括一驅動晶片,該驅動晶片透過多個焊球連接於部分之位在該第三表面上的該些接墊,用以電性連接該光電元件。 The photovoltaic device package of claim 6, further comprising a driving chip, wherein the driving chip is connected to the plurality of pads on the third surface through a plurality of solder balls for electrical The photovoltaic element is connected. 一種光電模組,包括:一光電元件封裝體,包括:一第一基板,具有一貫孔及一凹穴;一光電元件,配置於該凹穴內,該光電元件具有一接點,該光電元件用以發出或接收一光訊號;一膠體,填充於該凹穴,使該光電元件固定於該凹穴內,且該光電元件之該接點未被該膠體覆蓋;一導電體,設置於該貫孔中;以及一線路層,設置於該第一基板及該膠體上,該線路層從該導電體延伸至該接點,用以電性連接該光電元件與該導電體;一第二基板,配置於該第一基板之一側,該第二基板具有一反射面,該反射面對應於該光電元件以反射該光訊號;以及 至少一導光元件,配置於該第一基板及該第二基板之間,該導光元件用以傳遞該光訊號。 An optoelectronic module includes: a photo-electric component package comprising: a first substrate having a uniform aperture and a recess; a photovoltaic element disposed in the recess, the optoelectronic component having a contact, the optoelectronic component For emitting or receiving an optical signal; a colloid is filled in the recess to fix the photovoltaic element in the recess, and the contact of the optoelectronic component is not covered by the colloid; an electrical conductor is disposed on the And a circuit layer disposed on the first substrate and the colloid, the circuit layer extending from the electrical conductor to the contact for electrically connecting the optoelectronic component and the electrical conductor; a second substrate And disposed on one side of the first substrate, the second substrate has a reflective surface corresponding to the photoelectric element to reflect the optical signal; The at least one light guiding element is disposed between the first substrate and the second substrate, and the light guiding element is configured to transmit the optical signal. 如申請專利範圍第8項所述之光電模組,其中該第一基板具有相對之一第一表面及一第二表面,該光電元件具有一主動表面,該主動表面用以發出或接收該光訊號,而該線路層設置於該第一表面及該膠體上,且該主動表面實質上與該第一表面共平面。 The photovoltaic module of claim 8, wherein the first substrate has a first surface and a second surface, and the photoelectric element has an active surface for emitting or receiving the light. a signal, and the circuit layer is disposed on the first surface and the colloid, and the active surface is substantially coplanar with the first surface. 如申請專利範圍第8項所述之光電模組,其中該凹穴的深度小於該第一基板的厚度,且該光電元件配置於該凹穴之底面。 The photovoltaic module of claim 8, wherein the recess has a depth smaller than a thickness of the first substrate, and the photoelectric element is disposed on a bottom surface of the recess. 如申請專利範圍第8項所述之光電模組,其中該凹穴的深度實質上等於該第一基板的厚度,且該凹穴貫通該第一基板。 The photovoltaic module of claim 8, wherein the recess has a depth substantially equal to a thickness of the first substrate, and the recess penetrates the first substrate. 如申請專利範圍第8項所述之光電模組,更包括一導電凸塊,其中該導電體具有相對之一第一端面及一第二端面,該第一端面連接於該線路層,且該第二端面連接於該導電凸塊。 The photoelectric module of claim 8, further comprising a conductive bump, wherein the conductive body has a first end surface and a second end surface, the first end surface is connected to the circuit layer, and the The second end surface is connected to the conductive bump. 如申請專利範圍第12項所述之光電模組,其中該光電元件封裝體更包括一載具,該載具具有相對之一第三表面及一第四表面,該載具包括位於該第三表面上的複數接墊及位於該第四表面上的複數接墊,部分之位於該第三表面上的該些接墊及位於該第四表面上之該些接墊分別透過該載具的多個導電穿孔電性連接,該導電凸塊連接於位在該第三表面上之該些接墊的其中之一。 The photovoltaic module of claim 12, wherein the photovoltaic device package further comprises a carrier having a third surface and a fourth surface, the carrier comprising the third a plurality of pads on the surface and a plurality of pads on the fourth surface, wherein the pads on the third surface and the pads on the fourth surface respectively pass through the carrier The conductive vias are electrically connected, and the conductive bumps are connected to one of the pads on the third surface. 如申請專利範圍第13項所述之光電模組,其中該 光電元件封裝體更包括一驅動晶片,該驅動晶片透過多個焊球連接於部分之位在該第三表面上的該些接墊,用以電性連接該光電元件。 The photovoltaic module according to claim 13 of the patent application, wherein the The photo-electric component package further includes a driving chip, and the driving chip is connected to the plurality of pads on the third surface through a plurality of solder balls for electrically connecting the photovoltaic elements. 如申請專利範圍第8項所述之光電模組,其中該第一基板具有一第一對位部,該第二基板具有一第二對位部,該第一對位部搭配該第二對位部以組合該第一基板與該第二基板。 The photoelectric module of claim 8, wherein the first substrate has a first alignment portion, the second substrate has a second alignment portion, and the first alignment portion is associated with the second pair The bit portion combines the first substrate and the second substrate.
TW101122228A 2012-06-21 2012-06-21 Package of photoelectric device and photoelectric module TWI487151B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW101122228A TWI487151B (en) 2012-06-21 2012-06-21 Package of photoelectric device and photoelectric module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW101122228A TWI487151B (en) 2012-06-21 2012-06-21 Package of photoelectric device and photoelectric module

Publications (2)

Publication Number Publication Date
TW201401583A true TW201401583A (en) 2014-01-01
TWI487151B TWI487151B (en) 2015-06-01

Family

ID=50345180

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101122228A TWI487151B (en) 2012-06-21 2012-06-21 Package of photoelectric device and photoelectric module

Country Status (1)

Country Link
TW (1) TWI487151B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9772459B2 (en) 2015-08-19 2017-09-26 Cyntec Co., Ltd. Optoelectronic module and method of producing same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3930710B2 (en) * 2000-09-13 2007-06-13 シチズン電子株式会社 Chip-type light emitting diode and manufacturing method thereof
US7373033B2 (en) * 2006-06-13 2008-05-13 Intel Corporation Chip-to-chip optical interconnect
CN102386318A (en) * 2010-09-03 2012-03-21 台达电子工业股份有限公司 Encapsulation structure and encapsulation method of light-emitting diode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9772459B2 (en) 2015-08-19 2017-09-26 Cyntec Co., Ltd. Optoelectronic module and method of producing same
TWI624957B (en) * 2015-08-19 2018-05-21 乾坤科技股份有限公司 Optoelectronic module and method for producing same

Also Published As

Publication number Publication date
TWI487151B (en) 2015-06-01

Similar Documents

Publication Publication Date Title
US10333623B1 (en) Optical transceiver
TWI781650B (en) Photonic semiconductor device and method of manufacture
JP4425936B2 (en) Optical module
US10162139B1 (en) Semicondcutor package
US20210096310A1 (en) Package assembly and manufacturing method thereof
CN100461371C (en) Semiconductor chip and its manufacturing method, semiconductor device and its manufacturing method
CN115248477B (en) Package and method of forming the same
TW202125789A (en) Semiconductor package and method of forming the same
WO2020237706A1 (en) Method for packaging silicon optical module, and silicon optical module
EP2859394B1 (en) Tsv substrate with mirror and its application in high-speed optoelectronic packaging
KR102486223B1 (en) Packaged device with optical pathway
CN111128990A (en) integrated circuit package
CN112219288B (en) Photonic chip with embedded laser source
US20250279288A1 (en) Package structure including photonic package having embedded optical glue
TW202401678A (en) Electronic package and manufacturing method thereof
JP2020191329A (en) Manufacturing method of semiconductor device mounting structure, optical module, and semiconductor device mounting structure
JP2003046057A (en) Semiconductor device
KR20240032673A (en) Optical interposer structure and method
CN116779692A (en) Semiconductor package and method of forming the same
TWI487151B (en) Package of photoelectric device and photoelectric module
CN114424326A (en) Wire-bondable interposer for flip-chip packaged integrated circuit die
JP4307902B2 (en) Optical element mounting package, opto-electric composite mounting wiring board
US20250147245A1 (en) Package assembly and manufacturing method thereof
KR100725288B1 (en) Optical receiver and improved method for coupling structure between optical waveguide and light receiving element
CN223665446U (en) Semiconductor package