[go: up one dir, main page]

TW201336114A - Semiconductor package and its manufacturing method - Google Patents

Semiconductor package and its manufacturing method Download PDF

Info

Publication number
TW201336114A
TW201336114A TW101105767A TW101105767A TW201336114A TW 201336114 A TW201336114 A TW 201336114A TW 101105767 A TW101105767 A TW 101105767A TW 101105767 A TW101105767 A TW 101105767A TW 201336114 A TW201336114 A TW 201336114A
Authority
TW
Taiwan
Prior art keywords
substrate
semiconductor package
light emitting
light
emitting diode
Prior art date
Application number
TW101105767A
Other languages
Chinese (zh)
Inventor
楊貫榆
李文豪
陳賢文
王日富
盧勝利
Original Assignee
矽品精密工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 矽品精密工業股份有限公司 filed Critical 矽品精密工業股份有限公司
Priority to TW101105767A priority Critical patent/TW201336114A/en
Priority to CN2012100860456A priority patent/CN103296176A/en
Publication of TW201336114A publication Critical patent/TW201336114A/en

Links

Classifications

    • H10W72/07251
    • H10W72/20
    • H10W90/754

Landscapes

  • Led Device Packages (AREA)

Abstract

The invention provides a semiconductor package and the manufacturing method thereof, the method comprising forming a substrate having a groove formed thereon, forming a circuit layer on the substrate and the groove, disposing a LED chip in the groove and electrically connecting the LED chip to the circuit layer, and forming a fluorescent layer on the substrate, thereby separately disposing the fluorescent layer and the LED chip to enhance white light emission.

Description

半導體封裝件及其製法Semiconductor package and its manufacturing method

本發明係關於一種半導體封裝件及其製法,尤指一種具發光元件之半導體封裝件及其製法。The present invention relates to a semiconductor package and a method of fabricating the same, and more particularly to a semiconductor package having a light-emitting element and a method of fabricating the same.

於發光二極體(LED,Light Emitting Diode)的封裝領域中,傳統的螢光層之塗佈技術,如隨機分佈(random-distribution)方式,已無法符合高演色均勻性與高輸出流明等特性,故陸續發展出新的螢光層塗佈技術,如敷型塗佈(conformal-coated)與遠端螢光體(remote phosphor)等兩種方式。其中,敷型塗佈方式較著重於改善白光LED演色的均勻性,而遠端螢光體塗佈方式則著重於增進白光LED的光輸出。In the field of LED (Light Emitting Diode) packaging, the traditional fluorescent layer coating technology, such as random-distribution, has been unable to meet the characteristics of high color rendering uniformity and high output lumens. Therefore, new fluorescent layer coating technologies have been developed, such as conformal-coated and remote phosphor. Among them, the coating type coating method focuses on improving the uniformity of white LED color rendering, while the far-end phosphor coating method focuses on improving the light output of white LEDs.

然而,目前之技術發展中,藉由敷型塗佈與遠端螢光體塗佈方式提升LED的功率之同時,卻影響LED的散熱功能。一般LED封裝件的散熱途徑係可直接傳入空氣中或經電路板傳至大氣環境,而當提高該發光二極體晶片的功率時,該LED封裝件之承載板的散熱功能並未相對提升,導致往往無法將熱能有效地由承載板傳至電路板,造成經電路板之散熱方式的散熱效果不佳。However, in the current technological development, the power of the LED is improved by the coating and the remote phosphor coating, but the heat dissipation function of the LED is affected. Generally, the heat dissipation path of the LED package can be directly transmitted into the air or transmitted to the atmosphere through the circuit board. When the power of the LED chip is increased, the heat dissipation function of the carrier of the LED package is not relatively improved. As a result, it is often impossible to efficiently transfer thermal energy from the carrier board to the circuit board, resulting in poor heat dissipation through the heat dissipation mode of the circuit board.

再者,第I242895號我國專利或第1A及1B圖所示之半導體封裝件1,1’,係以具高耐熱及高導熱性的矽晶片作為承載板10,且形成具有電性連接墊110之線路層11於該承載板10上,並設置發光二極體晶片12,12’於該承載板10上,再以銲線16或導電凸塊16’電性連接該電性連接墊110,又形成螢光封裝體14以包覆該發光二極體晶片12,12’。Furthermore, the semiconductor package No. 1242895 or the semiconductor package 1 , 1 ′ shown in FIGS. 1A and 1B is a carrier wafer 10 having high heat resistance and high thermal conductivity, and is formed with an electrical connection pad 110 . The circuit layer 11 is disposed on the carrier board 10, and the LEDs 12, 12' are disposed on the carrier board 10, and the electrical connection pads 110 are electrically connected by the bonding wires 16 or the conductive bumps 16'. A fluorescent package 14 is further formed to cover the light emitting diode chips 12, 12'.

雖然習知半導體封裝件1,1’藉由矽晶片作為承載板10,以將發光二極體晶片12,12’所產生的熱有效傳至外接之電路板(圖未示),但在螢光粉塗佈技術上僅能使用隨機分佈方式,亦即螢光粉(螢光封裝體14)接觸發光二極體晶片12,12’發光面12a之方式,而無法採取遠端螢光體之塗佈方式,導致無法增進白光的光輸出。Although the conventional semiconductor package 1, 1' uses the germanium wafer as the carrier 10 to efficiently transfer the heat generated by the LED chips 12, 12' to an external circuit board (not shown), In the light powder coating technology, only a random distribution method can be used, that is, the fluorescent powder (the fluorescent package 14) contacts the light-emitting diode 12, 12' light-emitting surface 12a, and the remote phosphor cannot be taken. The coating method causes the light output of white light to not be enhanced.

因此,如何克服上述習知技術中之無法同時提升發光功率與散熱功能之問題,實已成為目前亟欲解決的課題。Therefore, how to overcome the problem that the above-mentioned conventional technology cannot simultaneously improve the luminous power and the heat dissipation function has become a problem to be solved at present.

有鑒於上述習知技術之缺失,本發明提供一種半導體封裝件,係包括:基板,係具有相對之第一表面與第二表面,且於該第一表面上形成有凹槽;線路層,係形成於該基板之第一表面與凹槽槽面上;發光二極體晶片,係設於該基板之凹槽中且電性連接該線路層;以及螢光層,係形成於該基板之第二表面上。In view of the above-mentioned deficiencies of the prior art, the present invention provides a semiconductor package comprising: a substrate having opposite first and second surfaces, and having grooves formed on the first surface; Forming on the first surface of the substrate and the groove groove surface; the light emitting diode chip is disposed in the groove of the substrate and electrically connected to the circuit layer; and the fluorescent layer is formed on the substrate On the surface.

本發明復提供一種半導體封裝件之製法,係包括:提供一具有相對之第一表面與第二表面之基板,且該基板之第一表面上形成有凹槽;形成線路層於該基板之第一表面與凹槽槽面上;形成螢光層於該基板之第二表面上;以及設置發光二極體晶片於該凹槽中,且使該發光二極體晶片電性連接該線路層。The invention provides a method for fabricating a semiconductor package, comprising: providing a substrate having a first surface and a second surface opposite to each other, wherein a first surface of the substrate is formed with a groove; and forming a circuit layer on the substrate a surface and a groove surface; forming a phosphor layer on the second surface of the substrate; and disposing a light-emitting diode chip in the groove, and electrically connecting the light-emitting diode chip to the circuit layer.

前述之半導體封裝件及其製法中,其中,該發光二極體晶片具有相對之第一發光面與第二發光面,而令該發光二極體晶片藉其第一發光面結合於該凹槽之底面上,又該基板可具有鄰接該第一及第二表面之側面,且該螢光層復形成於該基板之側面上,且該基板可為玻璃陶瓷基板。In the above-mentioned semiconductor package and method of manufacturing the same, the light-emitting diode wafer has a first light-emitting surface and a second light-emitting surface, and the light-emitting diode wafer is bonded to the recess by the first light-emitting surface thereof. On the bottom surface, the substrate may have sides adjacent to the first and second surfaces, and the phosphor layer is formed on the side of the substrate, and the substrate may be a glass ceramic substrate.

此外,前述之半導體封裝件及其製法中,該發光二極體晶片可以打線、共晶或覆晶方式電性連接該線路層,並可形成封裝膠體以包覆該發光二極體晶片。其中,該封裝膠體可為矽膠或環氧樹脂。In addition, in the foregoing semiconductor package and the manufacturing method thereof, the LED chip may be electrically connected to the circuit layer by wire bonding, eutectic or flip chip, and an encapsulant may be formed to encapsulate the LED chip. Wherein, the encapsulant can be silicone or epoxy.

由上可知,本發明之半導體封裝件及其製法,藉由於基板之第二表面上(可選擇性於側面上)形成螢光層,亦即採用遠端螢光體之螢光粉塗佈方式,以增加LED白光之光效輸出,且使用基板作為承載板以提升晶片於傳熱路徑上的熱傳導,故可達到同時提升發光功率與散熱功能之目的。As can be seen from the above, the semiconductor package of the present invention and the method of manufacturing the same, by forming a phosphor layer on the second surface of the substrate (optional on the side), that is, using a phosphor coating method of the remote phosphor In order to increase the luminous efficacy output of the LED white light, and using the substrate as a carrier plate to enhance the heat conduction of the wafer on the heat transfer path, the purpose of simultaneously improving the luminous power and the heat dissipation function can be achieved.

以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”、“底”及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "bottom" and "one" are used in the description for the purpose of description, and are not intended to limit the scope of the invention. Adjustments, where there is no material change, are considered to be within the scope of the invention.

請參照第2A至2E圖之製法,以一併詳細說明本發明所揭露之半導體封裝件2之製法。Referring to the manufacturing method of FIGS. 2A to 2E, the manufacturing method of the semiconductor package 2 disclosed in the present invention will be described in detail.

如第2A圖所示,提供一具有相對之第一表面20a與第二表面20b之基板20,且該基板20之第一表面20a上形成有凹槽200。As shown in FIG. 2A, a substrate 20 having a first surface 20a and a second surface 20b opposite thereto is provided, and a groove 200 is formed on the first surface 20a of the substrate 20.

於本實施例中,該基板20係為玻璃陶瓷基板(thermal conductivity<10 w/mk),且該基板20具有鄰接該第一及第二表面20a,20b之側面20c。另外,該凹槽200係利用蝕刻方式形成,但不以此為限。In the present embodiment, the substrate 20 is a glass ceramic substrate (thermal conductivity < 10 w/mk), and the substrate 20 has a side surface 20c adjacent to the first and second surfaces 20a, 20b. In addition, the groove 200 is formed by etching, but is not limited thereto.

如第2B圖所示,形成銅材之線路層21於該基板20之第一表面20a與凹槽200槽面上,該線路層21具有複數電性連接墊210。As shown in FIG. 2B, a copper circuit layer 21 is formed on the first surface 20a of the substrate 20 and the groove surface of the recess 200. The circuit layer 21 has a plurality of electrical connection pads 210.

如第2C圖所示,採用遠端螢光體之螢光粉塗佈方式,形成螢光層23於該基板20之第二表面20b與側面20c上。As shown in FIG. 2C, a phosphor layer 23 is formed on the second surface 20b and the side surface 20c of the substrate 20 by a phosphor coating method of the distal phosphor.

如第2D圖所示,將一具有相對之第一發光面22a與第二發光面22b的發光二極體晶片22以其第一發光面22a結合於該凹槽200之底面200a上,使該發光二極體晶片22位於該凹槽200內。As shown in FIG. 2D, a light-emitting diode wafer 22 having a first light-emitting surface 22a and a second light-emitting surface 22b is bonded to the bottom surface 200a of the recess 200 with its first light-emitting surface 22a. A light emitting diode wafer 22 is located within the recess 200.

於本實施例中,該發光二極體晶片22可用打線、共晶或覆晶等方式電性連接該線路層21之電性連接墊210。如第2D圖所示,該發光二極體晶片22之第二發光面22b藉由銲線26電性連接位於該第一表面20a上之電性連接墊210;或如第2E’圖所示,該發光二極體晶片22’之第一發光面22a可藉由導電凸塊26’電性連接位於該凹槽200底面200a上之電性連接墊210’。In this embodiment, the LED array 22 can be electrically connected to the electrical connection pads 210 of the circuit layer 21 by wire bonding, eutectic or flip chip. As shown in FIG. 2D, the second light emitting surface 22b of the LED chip 22 is electrically connected to the electrical connection pad 210 on the first surface 20a by a bonding wire 26; or as shown in FIG. 2E' The first light emitting surface 22a of the LED chip 22' can be electrically connected to the electrical connection pad 210' located on the bottom surface 200a of the recess 200 by the conductive bumps 26'.

如第2E及2E’圖所示,利用如矽膠或環氧樹脂之封裝膠體24以包覆該發光二極體晶片22,22’、銲線26(或導電凸塊26’)與該線路層21。As shown in FIGS. 2E and 2E', the encapsulant 24 such as silicone or epoxy is used to coat the LED wafer 22, 22', the bonding wire 26 (or the conductive bump 26') and the wiring layer. twenty one.

本發明之製法係藉由使用玻璃陶瓷基板作為承載板,可將發光二極體晶片22所產生的熱快速傳導至外接之電路板(圖未示)上,以提升發光二極體晶片22於傳熱路徑上的熱傳導,且藉由將發光二極體晶片22之第一發光面22a結合於該凹槽200之底面200a上,使該螢光層23可採用遠端螢光體之螢光粉塗佈方式形成於該基板20之第二表面20b上,而增加LED白光之光效輸出。故相較於習知技術,本發明之製法可同時提升發光功率與散熱功能。The method of the present invention can quickly transfer the heat generated by the LED wafer 22 to an external circuit board (not shown) by using a glass ceramic substrate as a carrier plate to enhance the LED array 22 Thermal conduction on the heat transfer path, and by bonding the first light-emitting surface 22a of the light-emitting diode wafer 22 to the bottom surface 200a of the recess 200, the phosphor layer 23 can be illuminated by the remote phosphor. The powder coating method is formed on the second surface 20b of the substrate 20 to increase the light output of the LED white light. Therefore, compared with the prior art, the method of the invention can simultaneously improve the luminous power and the heat dissipation function.

可一併參考第3圖,本發明復提供一種半導體封裝件2,2’,係包括:一基板20、線路層21、發光二極體晶片22、螢光層23以及封裝膠體24。Referring to Figure 3, the present invention further provides a semiconductor package 2, 2' comprising a substrate 20, a wiring layer 21, a light emitting diode wafer 22, a phosphor layer 23, and an encapsulant 24.

所述之基板20係為玻璃陶瓷基板,且具有相對之第一表面20a、第二表面20b及鄰接該第一與第二表面20a,20b之側面20c,並於該第一表面20a上形成有凹槽200。The substrate 20 is a glass ceramic substrate, and has a first surface 20a, a second surface 20b, and a side surface 20c adjacent to the first and second surfaces 20a, 20b, and is formed on the first surface 20a. Groove 200.

所述之線路層21係形成於該基板20之第一表面20a與凹槽200槽面上。The circuit layer 21 is formed on the first surface 20a of the substrate 20 and the groove surface of the recess 200.

所述之發光二極體晶片22,22’係設於該凹槽200中並電性連接該線路層21,該發光二極體晶片22,22’具有相對之第一發光面22a與第二發光面22b,令該發光二極體晶片22,22’藉其第一發光面22a結合於該凹槽200之底面200a上,又該發光二極體晶片22,22’係以打線、共晶或覆晶方式電性連接該線路層21。The LED chips 22, 22' are disposed in the recess 200 and electrically connected to the circuit layer 21. The LED wafers 22, 22' have opposite first light emitting surfaces 22a and 2 The light-emitting surface 22b is such that the light-emitting diode wafers 22, 22' are bonded to the bottom surface 200a of the recess 200 by the first light-emitting surface 22a, and the light-emitting diode wafers 22, 22' are lined and eutectic. The circuit layer 21 is electrically connected to the flip chip.

所述之螢光層23係形成於該基板20之第二表面20b與側面20c上。The phosphor layer 23 is formed on the second surface 20b and the side surface 20c of the substrate 20.

所述之封裝膠體24係為矽膠或環氧樹脂,其包覆該發光二極體晶片22,22’。The encapsulant 24 is a silicone or epoxy resin that encapsulates the LED wafers 22, 22'.

綜上所述,本發明之半導體封裝件及其製法,係因發光二極體晶片不與螢光層接觸,故該發光二極體晶可混光均勻以避免光不均勻之現象,而增進白光的輸出,進而提高光轉換效率,且當發光二極體晶片發光而產生熱能時,可透過基板將熱能傳至電路板上以達到預期之散熱效果。因此,本發明有效達到同時提升發光功率與散熱功能之目的。In summary, the semiconductor package of the present invention and the method for fabricating the same are in that the light-emitting diode chip is not in contact with the phosphor layer, so that the light-emitting diode crystal can be uniformly mixed to avoid uneven light. The output of white light, in turn, improves the light conversion efficiency, and when the light emitting diode wafer emits light to generate thermal energy, heat energy can be transmitted to the circuit board through the substrate to achieve the desired heat dissipation effect. Therefore, the present invention effectively achieves the purpose of simultaneously improving the luminous power and the heat dissipation function.

上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

1、1’、2、2’...半導體封裝件1, 1', 2, 2'. . . Semiconductor package

10...承載板10. . . Carrier board

11、21...線路層11, 21. . . Circuit layer

110、210、210’...電性連接墊110, 210, 210’. . . Electrical connection pad

12、12’、22、22’...發光二極體晶片12, 12', 22, 22'. . . Light-emitting diode chip

12a...發光面12a. . . Luminous surface

14...螢光封裝體14. . . Fluorescent package

16、26...銲線16, 26. . . Welding wire

16’、26’...導電凸塊16’, 26’. . . Conductive bump

20...基板20. . . Substrate

20a...第一表面20a. . . First surface

20b...第二表面20b. . . Second surface

20c...側面20c. . . side

200...凹槽200. . . Groove

200a...底面200a. . . Bottom

22a...第一發光面22a. . . First luminous surface

22b...第二發光面22b. . . Second luminous surface

23...螢光層twenty three. . . Fluorescent layer

24...封裝膠體twenty four. . . Encapsulant

第1A及1B圖係顯示習知半導體封裝件之剖面示意圖;1A and 1B are schematic cross-sectional views showing a conventional semiconductor package;

第2A至2E圖係顯示本發明半導體封裝件之製法之剖面示意圖;其中,第2E’圖係為第2E圖之另一實施例;以及2A to 2E are schematic cross-sectional views showing a method of fabricating a semiconductor package of the present invention; wherein, the second E' is another embodiment of the second embodiment;

第3圖係顯示本發明半導體封裝件之立體局部內視示意圖。Figure 3 is a perspective, partial, side elevational view of a semiconductor package of the present invention.

2...半導體封裝件2. . . Semiconductor package

20...基板20. . . Substrate

20a...第一表面20a. . . First surface

20b...第二表面20b. . . Second surface

200...凹槽200. . . Groove

200a...底面200a. . . Bottom

21...線路層twenty one. . . Circuit layer

210...電性連接墊210. . . Electrical connection pad

22...發光二極體晶片twenty two. . . Light-emitting diode chip

22a...第一發光面22a. . . First luminous surface

22b...第二發光面22b. . . Second luminous surface

23...螢光層twenty three. . . Fluorescent layer

24...封裝膠體twenty four. . . Encapsulant

26...銲線26. . . Welding wire

Claims (14)

一種半導體封裝件,係包括:基板,係具有相對之第一表面與第二表面,且於該第一表面上形成有凹槽;線路層,係形成於該基板之第一表面與凹槽槽面上;發光二極體晶片,係設於該基板之凹槽中且電性連接該線路層;以及螢光層,係形成於該基板之第二表面上。A semiconductor package includes: a substrate having opposite first and second surfaces, and a groove formed on the first surface; and a circuit layer formed on the first surface of the substrate and the groove groove The light emitting diode chip is disposed in the groove of the substrate and electrically connected to the circuit layer; and the fluorescent layer is formed on the second surface of the substrate. 如申請專利範圍第1項所述之半導體封裝件,其中,該發光二極體晶片具有相對之第一發光面與第二發光面,令該發光二極體晶片藉其第一發光面結合於該凹槽之底面上。The semiconductor package of claim 1, wherein the light emitting diode chip has a first light emitting surface and a second light emitting surface, so that the light emitting diode wafer is bonded to the first light emitting surface thereof On the bottom surface of the groove. 如申請專利範圍第1項所述之半導體封裝件,其中,該基板係為玻璃陶瓷基板。The semiconductor package of claim 1, wherein the substrate is a glass ceramic substrate. 如申請專利範圍第1項所述之半導體封裝件,其中,該基板具有鄰接該第一及第二表面之側面,且該螢光層復形成於該基板之側面上。The semiconductor package of claim 1, wherein the substrate has sides adjacent to the first and second surfaces, and the phosphor layer is formed on a side of the substrate. 如申請專利範圍第1項所述之半導體封裝件,其中,該發光二極體晶片係以打線、共晶或覆晶方式電性連接該線路層。The semiconductor package of claim 1, wherein the light emitting diode chip is electrically connected to the circuit layer by wire bonding, eutectic or flip chip. 如申請專利範圍第1項所述之半導體封裝件,復包括包覆該發光二極體晶片之封裝膠體。The semiconductor package of claim 1, further comprising an encapsulant covering the LED chip. 如申請專利範圍第6項所述之半導體封裝件,其中,該封裝膠體係為矽膠或環氧樹脂。The semiconductor package of claim 6, wherein the encapsulant system is silicone or epoxy. 一種半導體封裝件之製法,係包括:提供一具有相對之第一表面與第二表面之基板,且該基板之第一表面上形成有凹槽;形成線路層於該基板之第一表面與凹槽槽面上;形成螢光層於該基板之第二表面上;以及設置發光二極體晶片於該凹槽中,且使該發光二極體晶片電性連接該線路層。A method of fabricating a semiconductor package, comprising: providing a substrate having a first surface and a second surface opposite to each other, wherein a recess is formed on a first surface of the substrate; forming a circuit layer on the first surface of the substrate and recessed a light-emitting layer is formed on the second surface of the substrate; and a light-emitting diode chip is disposed in the recess, and the light-emitting diode chip is electrically connected to the circuit layer. 如申請專利範圍第8項所述之半導體封裝件之製法,其中,該發光二極體晶片具有相對之第一發光面與第二發光面,而該第一發光面係結合於該凹槽之底面上。The method of manufacturing the semiconductor package of claim 8, wherein the light emitting diode chip has a first light emitting surface and a second light emitting surface, and the first light emitting surface is coupled to the groove On the bottom surface. 如申請專利範圍第8項所述之半導體封裝件之製法,其中,該基板係為玻璃陶瓷基板。The method of fabricating a semiconductor package according to claim 8, wherein the substrate is a glass ceramic substrate. 如申請專利範圍第8項所述之半導體封裝件之製法,其中,該基板具有鄰接該第一及第二表面之側面,且該螢光層復形成於該基板之側面上。The method of fabricating a semiconductor package according to claim 8, wherein the substrate has sides adjacent to the first and second surfaces, and the phosphor layer is formed on a side of the substrate. 如申請專利範圍第8項所述之半導體封裝件之製法,其中,該發光二極體晶片以打線、共晶或覆晶方式電性連接該線路層。The method of fabricating a semiconductor package according to claim 8, wherein the light emitting diode chip is electrically connected to the circuit layer by wire bonding, eutectic or flip chip. 如申請專利範圍第8項所述之半導體封裝件之製法,復包括形成封裝膠體以包覆該發光二極體晶片。The method of fabricating the semiconductor package of claim 8, further comprising forming an encapsulant to encapsulate the LED chip. 如申請專利範圍第13項所述之半導體封裝件之製法,其中,該封裝膠體係為矽膠或環氧樹脂。The method of manufacturing a semiconductor package according to claim 13, wherein the encapsulant system is silicone or epoxy.
TW101105767A 2012-02-22 2012-02-22 Semiconductor package and its manufacturing method TW201336114A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW101105767A TW201336114A (en) 2012-02-22 2012-02-22 Semiconductor package and its manufacturing method
CN2012100860456A CN103296176A (en) 2012-02-22 2012-03-28 Semiconductor package and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW101105767A TW201336114A (en) 2012-02-22 2012-02-22 Semiconductor package and its manufacturing method

Publications (1)

Publication Number Publication Date
TW201336114A true TW201336114A (en) 2013-09-01

Family

ID=49096755

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101105767A TW201336114A (en) 2012-02-22 2012-02-22 Semiconductor package and its manufacturing method

Country Status (2)

Country Link
CN (1) CN103296176A (en)
TW (1) TW201336114A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI638962B (en) 2014-03-06 2018-10-21 Epistar Corporation Illuminating device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108615723A (en) * 2018-05-30 2018-10-02 太龙(福建)商业照明股份有限公司 A kind of novel C OB structure lamp plates

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315354B (en) * 2010-06-29 2013-11-06 展晶科技(深圳)有限公司 Packaging structure of light emitting diode
CN102339935B (en) * 2010-07-15 2015-07-08 展晶科技(深圳)有限公司 Flip-chip-type LED (light-emitting diode) package structure
TW201205884A (en) * 2010-07-29 2012-02-01 Advanced Optoelectronic Tech Light emitting diode
TW201208129A (en) * 2010-08-02 2012-02-16 Advanced Optoelectronic Tech LED package and method for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI638962B (en) 2014-03-06 2018-10-21 Epistar Corporation Illuminating device

Also Published As

Publication number Publication date
CN103296176A (en) 2013-09-11

Similar Documents

Publication Publication Date Title
CN102044617B (en) Light emitting diode divice, light emitting appratus and manufacturing method of light emitting diode divice
CN102270725A (en) Light emitting diode packaging structure
CN103456727B (en) Multi-chip package structure
TWI645580B (en) Light-emitting diode flip chip and display
TW201306194A (en) Wafer level package structure and manufacturing method thereof
CN102376845A (en) Packaging structure of light-emitting diode
CN102412212A (en) Heat sink for electronic/photoelectric assembly
CN105576103A (en) Light emitting device
TW201248948A (en) Thermally enhanced light emitting device package
CN103928577A (en) Plate type LED packaging method and LED packaged with method
TW201208108A (en) Chip-type LED package and light emitting apparatus having the same
TWI553791B (en) Chip package module and package substrate
TW200905924A (en) Multi-chip light emitting diode package
JP6210720B2 (en) LED package
TW201336114A (en) Semiconductor package and its manufacturing method
TW201201354A (en) LED chip package structure
CN203631589U (en) Inverted LED packaging structure and LED lamp strip
TW201532316A (en) Package structure and its manufacturing method
CN104465932A (en) Photoelectric semiconductor element and manufacturing method thereof
TWI591860B (en) Light emitting diodes package structure for high-voltage power supply
TWI411145B (en) High heat dissipation stacking / cladding type light emitting diodes
CN108110124A (en) A kind of TOP-LED devices and its manufacturing method
CN100454536C (en) Semiconductor chip packaging structure and application device thereof
TWM458666U (en) Structure of heat dissipation lead frame
TWI756532B (en) Light-emitting device and manufacturing method thereof