201250849 六、發明說明： 【發明所屬之技術領域】 本發明係有關於-種聚光型太陽能晶片、功 =暴效電晶體之晶片低溫接合的方法，尤指-種利用“ 的介面具有擴散反應的物理特性，而可在低溫下 進灯接&形成可耐高溫之擴散合金層的晶片低溫接合 法。 【先前技術】 一般而言，現有技術之聚光型太陽能晶片、功率電晶 體及場效電晶體晶片等’經常有面積較大、不易接合的缺 失，且在晶片運作過程中易產生大量的熱，因此相關產業 領域對於具有高散熱、高耐溫性及易於完全接合等特性的 晶片接合材料有迫切的需求。 目前用來對晶體進行固晶的材質主要以料銲接材料 為主，因此現有技術之聚光型太陽能晶片、功率電晶體晶 片及場效電晶體晶片之晶片接合方法，係先使用含助辉劑 之錫膏銲接材料（例如錫鉛錫膏、錫銀錫膏）將晶片黏著 於基板上，並以260cC至32〇。〇之溫度進行迴銲接合。此 方式雖然較為簡便，但由於在迴銲接合過程中，容易發生 助銲劑揮發不完全的情形，而導致助銲劑殘留於接合層 中，並於接合層中形成孔洞，大幅降低接合層的接合面積 與導熱能力，且因晶片的性能及效率隨操作溫度上升而下 降，故助銲劑殘留導致孔洞的形成，使得接合層導熱不佳， 進而造成晶片散熱不良、溫度升高，以及性能及效率的下 降。另外，在南溫的迴銲環境下，由於晶片的性能及效率 201250849 對溫度相當敏感，易因高迴鲜溫度而導致晶片的損傷。另 外，高溫錫膏大多為含錯錫f，無法滿足未來歐盟r〇hs的 需求，因此尋求無含鉛之晶^接合材料。 【發明内容】 有鑑於現有技術之聚光型太陽能晶片、功率電晶體及場 效電晶體在進行晶片接合製程上所存在的缺失，本發明係提 供-種晶片低溫接合之方法，其係利用不同金屬間擴散反應 之物理特性’來達成低溫接合^使擴散合金層具有耐高溫之 2性，其係使用無鉛接合材料於低溫下即可完成晶片的接 °且使經接合後的晶片具有高接合強度、高散熱性、元件 操作時不易軟（劣）化等優點。 為達上述目的，本發明係提供一種聚光型太陽能晶 片、功率電晶體及場效電晶體之晶片低溫接合的方法，其 包括以下步驟： 將一第一金屬層形成於一晶片之一表面； 將一第二金屬層形成於一基板之一側面，該第二金屬 層之材質係不同於該第一金屬層； 對該晶片相對於該第一金屬層以及該基板施加一壓 力 、加熱或加壓加熱，以使該第一金屬層與該第二金屬層 之間進行預接合而相接；以及 於l〇〇°C至300°C的溫度下，以一擴散反應時間對該 ’’里預接合的晶片及該基板進行加熱，以使該第一金屬層與 μ 一金屬層在二者之間的界面處進行擴散反應，以形成 溶點高於200°C之擴散合金層。 車父佳的’該壓力為10克力至2〇〇克力。 4 201250849 較佳的，該擴散反應時間為30分鐘至3小時。 較佳的’該第一金屬層係為選自於由金、銀及銅所組 成之群組中至少—種材料所構成，該第二金屬層係為選自 於由金、銀及銅所組成之群組中至少一種材料所構成。 較佳的，該擴散合金層係為選自於由金/銀、金/銅及銀 /銅所組成之群組中至少一種材質所構成。 本發明另提供一種聚光型太陽能晶片、功率電晶體及 場效電晶體之晶片接合的方法，其包括以下步驟： 將一第一金屬層形成於一晶片之一表面； 將一第二金屬層形成於一基板之一側面，該第二金屬 層之材質係不同於該第一金屬滑； 以一預接合時間對該晶片以及該基板進行加熱，使得 該第一金屬層與該第二金屬層進行預接合而相接，並使該 第一金屬層與該第二金屬層在二者之間的界面處產生擴散 反應以形成一預擴散介金層；以及 於40°C至300。(：的溫度下，以一擴散反應時間對該經 預接合的晶片及該基板進行加熱，以使該第一金屬層與該 第二金屬層在界面處進行擴散反應，以形成一熔點高於 200°C之擴散介金層。 較佳的’該預擴散反應與該擴散反應為固-固擴散反應 或液·固擴散反應。 較佳的’該固-固擴散反應溫度係低於該第—金屬層之 熔點。 較佳的’該液-固擴散反應溫度係高於該第—金屬層之 熔點。 201250849 較佳的，以該擴散反應溫度加熱經預接合之晶片及該 基板以進行該擴散反應的步驟係包括：以該：散：應溫度 加熱該經預接合之晶片以及基板以進行該擴散反應，直到 該第一金屬層與該第二金層的擴散反應完畢。 較佳的，以-預接合時間對該晶片以及該基板進行加 熱之步驟中’預接合溫度為25%至15〇〇c，以及預接合時 間為0 · 1秒至2.0秒。 較佳的’該擴散反應時間為10分鐘至3小時。 較佳的，該第一金屬層之材料係選自於由祕銦、錢錫、 紐銦錫、㈣錫鋅、㈣鋅及銦錫合金所構成的群組之至 少-種合金材料，該第二金屬層之材料係選自於由金、銀、 銅及鎳所構成的群組之至少一種材料。 較佳的，該預擴散介金層與擴散介金層之材料係選自 於由油鋅介金屬、錦銦鋅介金屬、㈣介金屬、金姻介 金屬、銀銦介金屬、銀鋅介金屬、金料㈣所構成的群 組之至少一種材料。 基於以上所述，本發明係利用金/銀界面具有快速擴 散之物理特性，以及利用低溶點合金材料與金、銀、銅及 錄等金屬間擴散反應後形成耐高溫合金之特性，來達成低 溫晶片接合製程的'擴散合金層可耐高溫及高散熱性的目 標。 【實施方式】 有關於本發明的技術特徵與實際操作方式，兹配合圖 示及實施例說明如下。 首先，請參閱圖1所示，其為依據本發明之聚光型太 201250849201250849 VI. Description of the Invention: [Technical Field] The present invention relates to a method for low-temperature bonding of a concentrating solar wafer and a work-dissipating transistor, and particularly to a diffusion reaction using an interface The physical properties of the wafer can be soldered at low temperatures to form a low temperature bonding method for forming a high temperature resistant diffusion alloy layer. [Prior Art] In general, prior art concentrating solar wafers, power transistors and fields The effector crystal wafers and the like often have large areas, are not easy to be bonded, and are prone to generate a large amount of heat during the operation of the wafer. Therefore, the related industries have wafers with high heat dissipation, high temperature resistance, and easy bonding. There is an urgent need for bonding materials. Currently, materials used for crystallizing crystals are mainly based on material soldering materials, and thus wafer bonding methods of prior art concentrating solar wafers, power transistor wafers, and field effect transistor wafers, The wafer is first adhered to the substrate by using a solder paste containing a flux (such as tin-lead solder paste, tin-silver paste) And the welding is carried out at a temperature of 260 c C to 32 〇. Although this method is relatively simple, since the flux volatilization is incomplete in the process of reflow soldering, the flux remains in the bonding layer. And forming a hole in the bonding layer, which greatly reduces the bonding area and thermal conductivity of the bonding layer, and the performance and efficiency of the wafer decrease as the operating temperature rises, so that the flux residue causes the formation of the hole, so that the bonding layer is not thermally conductive, and further Causes poor heat dissipation, temperature rise, and performance and efficiency degradation of the wafer. In addition, in the reflow environment of South Temperature, due to the performance and efficiency of the wafer 201250849 is very sensitive to temperature, it is easy to damage the wafer due to high refraction temperature. In addition, most of the high-temperature solder pastes contain mis-tin f, which cannot meet the needs of the future EU r〇hs. Therefore, the lead-free crystal bonding material is sought. [Invention] In view of the prior art, the concentrating solar wafer, power The absence of the transistor and the field effect transistor in the wafer bonding process, the present invention provides a low temperature connection of the wafer The method uses a physical property of a diffusion reaction between different metals to achieve a low temperature bonding. The diffusion alloy layer has a high temperature resistance, and the use of a lead-free bonding material can complete the bonding of the wafer at a low temperature. The bonded wafer has the advantages of high bonding strength, high heat dissipation, and softness (inferiority) during component operation. To achieve the above object, the present invention provides a concentrating solar wafer, a power transistor, and a field effect transistor. a method for bonding a wafer to a low temperature, comprising the steps of: forming a first metal layer on a surface of a wafer; forming a second metal layer on a side of a substrate, the material of the second metal layer being different from the a first metal layer; applying a pressure, heating or pressure heating on the wafer relative to the first metal layer and the substrate to pre-bond the first metal layer and the second metal layer to meet; And heating the pre-bonded wafer and the substrate at a temperature of from 10 ° C to 300 ° C for a diffusion reaction time so that the first metal layer and the μ Metal diffusion reaction layer at the interface therebetween, to form a melting point above 200 ° C the diffusion alloy layer. The car's pressure is 10 grams to 2 grams. 4 201250849 Preferably, the diffusion reaction time is from 30 minutes to 3 hours. Preferably, the first metal layer is selected from at least one material selected from the group consisting of gold, silver, and copper, and the second metal layer is selected from the group consisting of gold, silver, and copper. At least one material consisting of the group consisting of. Preferably, the diffusion alloy layer is selected from at least one material selected from the group consisting of gold/silver, gold/copper and silver/copper. The invention further provides a method for wafer bonding of a concentrating solar wafer, a power transistor and a field effect transistor, comprising the steps of: forming a first metal layer on a surface of a wafer; and forming a second metal layer Forming on one side of a substrate, the material of the second metal layer is different from the first metal sliding; heating the wafer and the substrate with a pre-bonding time, so that the first metal layer and the second metal layer Performing pre-bonding to meet, and causing a diffusion reaction between the first metal layer and the second metal layer at the interface therebetween to form a pre-diffusion intercalation layer; and at 40 ° C to 300. The pre-bonded wafer and the substrate are heated by a diffusion reaction time at a temperature of (where: the first metal layer and the second metal layer are subjected to a diffusion reaction at the interface to form a melting point higher than a diffusion gold layer of 200 ° C. Preferably, the pre-diffusion reaction and the diffusion reaction are solid-solid diffusion reaction or liquid-solid diffusion reaction. Preferably, the solid-solid diffusion reaction temperature is lower than the first — the melting point of the metal layer. Preferably, the liquid-solid diffusion reaction temperature is higher than the melting point of the first metal layer. 201250849 Preferably, the pre-bonded wafer and the substrate are heated at the diffusion reaction temperature to perform the The step of diffusing the reaction comprises: heating the pre-bonded wafer and the substrate at a temperature to perform the diffusion reaction until the diffusion reaction of the first metal layer and the second gold layer is completed. Preferably, The pre-bonding temperature is 25% to 15 〇〇c in the step of heating the wafer and the substrate in a pre-bonding time, and the pre-bonding time is from 0.1 to 2.0 seconds. Preferably, the diffusion reaction time is 10 minutes to 3 Preferably, the material of the first metal layer is selected from at least one alloy material consisting of a group consisting of indium, zinc tin, neotin tin, (tetra) tin zinc, (tetra) zinc, and indium tin alloy. The material of the second metal layer is selected from at least one material selected from the group consisting of gold, silver, copper, and nickel. Preferably, the material of the pre-diffusion layer and the diffusion layer is selected from At least one material consisting of a group consisting of a zinc-intermediate metal, a gold-zinc-zinc intermetallic, a (iv) metal, a gold-intermediate metal, a silver-indium intermetallic, a silver-zinc intermetallic, and a gold (4). The invention utilizes the physical properties of the gold/silver interface to have rapid diffusion, and the use of a low-melting-point alloy material to form a high-temperature resistant alloy after diffusion reaction between gold, silver, copper, and recording metals to achieve a low-temperature wafer bonding process. The diffusion alloy layer is capable of withstanding high temperature and high heat dissipation. [Embodiment] The technical features and actual operation modes of the present invention will be described below with reference to the drawings and embodiments. First, referring to FIG. Poly according to the invention Type too 201,250,849
較佳實施例的流程示意圖。A schematic diagram of the flow of the preferred embodiment.
的熔點高達900oC以上， t為金屬鍵，擴散反應形成之合金 且此接合結構將具有高接合強度、 向散熱性及可耐操作高溫等特性。 本發明之另一較佳實施例為利用低熔點的合金材料與 金、銀、銅及鎳等金屬之間產生擴散反應後形成耐高溫之 合金的特性，來達成低溫晶片接合以及擴散合金層可耐高 溫及南散熱性的目標。由於低熔點合金材料與金、銀、銅 及鎳等金屬間會形成耐高溫之擴散合金層，擴散反應形成 之合金的熔點大於230°C，且此接合結構將具有高接合強 度、高散熱性及可耐操作高溫等特性。 在本發明之一具體實施例中’將以Ag/Au材料系統為 例’而不以其為限’來達到晶片低溫接合之效果。請參閱 圖2所示’其係為本發明一具體實施例之横截面示意圖。 首先，以電鍍、蒸鍍、濺鍍或其他金屬形成方式將一銀層 21形成於一晶片22之一表面。在一具體實施例中，銀層 21的厚度約為0.5毫米（μπι)至1.5毫米（μπι)。在一具體實施 例中，s玄晶片22係為一聚光型太陽能晶片、功率電晶體及 場效電晶體晶片等晶片。 同時’以電鍍、蒸鍍、濺鍍或其他金屬形成方式將一 金層23形成於一基板24上。在一具體實施例中，金層23 厚度約0.2毫米至〇.8毫米。該基板24可以是導線架、印 201250849 刷電路板或陶瓷基板。基板24的材質可以是銅（Cu)、鋁 (A1)、鐵（Fe)、鎳（Ni)之純元素或添加少量其它元素之合金。 基板24的材質亦可以是矽（si)、氧化鋁（Al2〇3)、氮化鋁 (A1N) ' 低溫共燒多層陶竞（L〇w_Temperature Cofired Ceramics，LTCC)或覆銅陶免（Direct Bonded Copper, DBC)。 接著’以一預接合壓力及一助銲劑25將該晶片22加 壓固定在該基板24上，以增加預接合之效果。並於加熱後， 該助銲劑得以揮發，利於銀層21與金層24在界面處進行 擴散反應。在一實施例中’施加壓力或加壓加熱於晶片22 與基板24上即可使銀層21與金層23在界面處產生塑性變 形或擴散而預接合在一起，然而，在另一具體實施例中， 可以使用助銲劑25來增加預接合的效果，但助銲劑25並 非一定要使用。在一具體實施例中，預接合方式可為單純 施壓法、熱壓法或超音波輔助熱壓法，其中所施加之預接 合壓力可以是10克力（gf)至200克力（gf)，預接合溫度可以 疋但不限於25。(：至200。(：，施予壓力所需的時間可以是但 不限於0 · 2秒至3秒。 接著，將以一擴散反應溫度及一擴散反應時間加熱預 接合該晶片22與基板24，以使該助銲劑25揮發，而且該 銀層21與該金層23在銀與金接合面處進行固固擴散反應 以形成擴散銀金合金層26,以形成如圖2所示之結構。在 一具體實施例中，加熱方式可為熱風式、紅外線加熱或熱 板加熱’其中擴散反應溫度可以是但不限於1〇〇至 30〇°〇前述擴散反應時間可以依擴散反應溫度而調整。例 如，當擴散反應溫度較高時，擴散反應時間可以較短。合 8 201250849 擴散反應溫度較低時，擴散反應時間可以較長。擴散反應 可以是3 0分鐘至3小時。 在圖2中，原來的銀層21與金層23因為進行擴散反 應作用，而產生擴散銀金合金層26以及殘餘之銀層HA與 金層23A’三者皆具高導熱極高耐溫性的特性滿足晶片操作 時所需，減少晶片因熱所導致性能及效率的衰退。 請參閱圖3所示，係為本發明之晶片低溫接合結構之 方法所形成之擴散銀金合金層26的原子比例圖。從圖令可 得知，本發明之晶片低溫接合結構之方法確實可行。 另外，本實施例中，為增進銀層21與晶片22之間的 黏著效果，可使用一輔助黏著金屬層（圖中未示）包失於 該銀層21與晶片22之間，該辅助黏著金屬層可包含鎳 (Ni)、鉻（C〇、鉑（Pt)、鈦（Ti)或其它可增進黏著之純金屬或 合金。類似地，本實施例中，為增進金層23與基板24之 間的黏著效果，可使用一輔助黏著金屬層（圖中未示）包 夾於該金層23與基板24之間，該辅助黏著金屬層可包含 鎳（Ni)、鉻（C〇、鉑（Pt)、鈦（Ti)或其它可增進黏著之純金屬 或合金。 本實施例雖以上述銀層21與金層23作為說明，但本 發明所屬技術領域中具有通常知識者，當明瞭任何達到等 同功能之變化均屬本發明之範圍。舉例來說，該銀層2 i可 以用金（Au)取代，而該金層23可以用銀取代。或者，該舒 層21可以用金取代，而該金層23可以用銅（(：1；1)取代。或者’ 該銀層21可以用銅取代，而該金層23則不更動。 在本發明之另一具體實施例中’將以鉍銦錫/銀材料系 201250849 統為例…以其為限’來達到晶片低溫接合之效果。圖 四^為本發明—具體實施例之横截面示意圖。㈣中可以 知，晶片42低溫接合方法包含下列步驟：： 首先，以電鍵、蒸鑛、減锻或其他金屬形成方式將一 ㈣錫層41形成於—晶片42之-表面。在-具體實施例 中，鉍銦錫層41的厚度可以是但不限於〇2毫米至5〇毫 米。較佳的厚度為K0毫米至4.0毫米。在一具體實施例中， 該B曰片42係為一聚光型太陽能晶片、功率電晶體及場效電 晶體晶片等晶片。 同時，以電鍍、蒸鍍、濺鍍或其他金屬形成方式將一 銀層43形成於一基板44上。在一具體實施例中，銀層43 厚度可以是但不限於0.2毫米至2.〇毫米。較佳的厚度為〇 5 毫米至1.0毫米。前述該基板44可以是導線架、印刷電路 板、或陶瓷基板。基板44的材質可以是銅（Cu)、鋁（A1)、 鐵（Fe)、鎳（Ni)之純元素或添加少量其它元素之合金。基板 44的材質亦可以是矽（Si)、氧化鋁（a12〇3)、氮化鋁（A1N)、 低 >皿共燒多層陶竞（Low-Temperature Cofired Ceramics， LTCC)或覆銅陶竞基板（Direct Bonded Copper，DBC)。 接著，將該晶片42以一預接合時間及一預接合溫度加 熱固定於該基板44上，進行預接合，使鉍銦錫層41及銀 層43之間經預擴散反應形成一預擴散合金層45,以增加預 接合之效果。加熱的方式可以採用雷射加熱、熱風加熱、 红外線加熱、熱壓接合、或超音波輔助熱壓接合，其中所 施加之預接合溫度可以是但不限於25°C至150°C，預接合 壓力可以是1〇克力至200克力，預接合時間可以是但不限 201250849 於〇·1私到2秒，較佳的是〇.1秒到1秒。此加熱的時間可 視預擴散反應情形而適當調整。較佳的加熱時間是當级鋼 錫2 41及銀層43之間形成了非常薄的預擴散合金層“時 :斤花的時間。其中預擴散反應可為固固擴散反應或液固擴 政反應。當然，若在製程中，增加預接合時間，使更多的 預擴散合金層45被形成，亦屬可實施的方式。 、 接者，將以一擴散反應溫度及一擴散反應時間加熱預 接5之°亥明片42與基板44，使該鉍銦錫層41與該銀層43 在兩者接合面處進行擴散反應，以形成擴散合金層45α，以 形成圖三所示之結構。在一具體實施例中，加熱方式可為 熱風式、烤箱、紅外線加熱或熱板加熱，其中擴散反應溫 度可以是但不限於4〇。。至3〇〇。。。前述擴散反應時間可以 依擴散反應溫度而調整M列如’當擴散反應溫度較高時， 擴散反應時間可以較短。當擴散反應溫度較低時，擴散反 應時間可以較長。其擴散反應時間可以是10分鐘至3小 時。擴散反應之目的在於讓鉍銦錫層41之合金元素與銀層 43的το素相互擴散。較佳的擴散反應時間則是讓大部分的 鉍銦錫層4丨中的合金元素完成擴散所需的時間。其中，擴 散反應可為固固擴散反應或液固擴散反應。該鉍銦錫層41 可以用鉍銦（Bi-In)、鉍錫（Bi_Sn)、鉍銦錫（Bi_In_Sn)、鉍銦 錫鋅（B卜In-Sn-Zn)、鉍銦鋅（Bi_In_Zn)以及銦錫（In Sn)合金 材料所組成的群組中至少一種合金材料所取代。其中，Bi_in 的溶點約為 liot，Bi_Sn H點約為 138<t，Bi_25in i8Sn 的溶點約為82 C，Bi-20In-30Sn-3Zn的熔點約為90°C， Βι-33Ιη-〇·5Ζη的熔點約為n〇c>c，In_Sn的熔點約為ι2ΐ^。 11 201250849 其中銀層43可以用選自於金（Au)、銀（Ag)、銅（Cu)及鎳（Ni) 所構成之群組中至少一種所取代。 經擴散反應後所形成之晶片接合結構，有以下幾種可 能的態樣》請參閱圖4所示，其中一種晶片接合結構。從 圖中可以知悉’晶片接合結構包含依序疊置的晶片42、擴 散合金層45 A、殘餘銀層43A以及基板44。前述之擴散合 金層45A的材質係可包含銅銦錫（Cu_In_Sn)介金屬（熔點至 少400°C以上）、鎳銦錫（Ni_In_Sn)介金屬（熔點約7〇〇〇c以 上）、鎳鉍（Ni-Bi)介金屬（熔點至少400°C以上）、金銦（Au-In) 介金屬（炫點至少400°C以上）、銀銦（Ag-In)介金屬（溶點至 少250oC以上）、金錫（Ag_sn)介金屬（熔點至少450°C以 上）、金鉍（Au-Bi)介金屬（熔點至少350。(3以上）與鉍金屬及 其合金（溶點至少250°C以上）。 明參閱圖5所示，其係為依據本發明之一較佳實施例 中的鉍銦錫層41與銀層43接合的合金分析圖，由圖5可 知關於Μ銦錫與銀的結合狀態。將鍍有Bi-25In-18Sn的鉍 銦錫合金之晶片設置於鍍銀導線架上，在9〇下施予壓力 進行預接合’以及在15〇°C下進行擴散反應一段時間後， 再進行合金分析所得到的合金分析圖。圖中可以看出，鉍 銦錫層與銀層間形成了 Bi及Ag-In-Sn介金屬之擴散合金層 45A，以及殘餘的銀層43 A »藉此可以得知，本發明所使用 之叙姻錫層41可與銀在低溫形成接合層。 另外’本實施例中，為縮短祕銦錫層41的擴散反應時 間’可使用一輔助擴散反應金屬層（圖中未示）包夾於該 鉍銦錫層41與晶片42之間，該輔助擴散反應金屬層之材 12 201250849 料係選自於金（AU)、銀（Ag)、鋼（Cu)及鎳（Ni)所構成群組。 此外，為增進輔助擴散反應金屬層與晶片42之間的黏著效 果，可使用-輔助黏著金屬|(圖中未示）包夾於該輔助 擴散反應金屬層與晶片42之間，該輔助黏著金屬層可包含 鎳（Ni)、鉻（Cr)、鉑（Pt)、鈦（Ti)或其它可增進黏著之純金屬 或合金。同樣地，本實施例中，為增進銀層43與基板44 之間的黏著效果，可使用一輔助黏著金屬層（圖中未示） 包夾於該銀層43與基板44之間，該辅助黏著金屬層可包 含鎳（Ni)、鉻（Cr)、鉑（Pt)、鈦（Ti)或其它可增進黏著之純金 屬或合金。 紅上所述，當知本發明提供一種晶片低溫接合結構之 方法其利用金/銀界面具有快速擴散之物理特性，以及 利用低溶點合金材料與金、冑、銅及鎳等金屬間擴散反應 後形成耐高溫合金之特性，來達成低溫晶片接合、擴散合 金層可耐高溫及高散熱性的目標。故本發明實為—富有新 穎！·生進步性，及可供產業利用功效者，應符合專利申請 要件無疑，爰依法提請發明專利申請，懇請貴審查委員 早曰賜予本發明專利，實感德便。 准以上所述者，僅為本發明之較佳實施例而已，並非 用_限叱本發明實施之範圍，即凡依本發明申請專利範圍 所述之形狀、構造、特徵、精神及方法所為之均等變化與 修飾，均應包括於本發明之申請專利範圍内。 【圖式簡單說明】 圖1係為本發明之一實施例的流程示意圖。 |Ξ| • 本發明之一具體實施例的横截面示意圖。 13 201250849 圖3係為本發明之擴散銀金合金層的原子比例圖。 f 圖4為本發明一具體實施例的横截面示意圖。 圖5為本發明之一實施例中的第一金屬層鉍銦錫層與 第一金屬層銀層接合的合金分析圖。 【主要元件符號說明】 21銀層 2 2晶片 23A金層 25助銲劑 4 1叙:姻錫層 43銀層 44基板 2 1A銀層 23金層 24基板 26擴散銀金合金層 42晶片 43A銀層 45 # 40錫/銀預擴散合金層 45 Α鉍銦錫/銀擴散合金層 14The melting point is as high as 900oC or more, t is a metal bond, an alloy formed by a diffusion reaction, and the joint structure has characteristics of high joint strength, heat dissipation, and high temperature resistance. Another preferred embodiment of the present invention provides low temperature wafer bonding and diffusion alloy layer by utilizing a low melting point alloy material and a metal such as gold, silver, copper, and nickel to form a high temperature resistant alloy after diffusion reaction. High temperature and south heat dissipation goals. Since the low melting point alloy material forms a high temperature resistant diffusion alloy layer between metals such as gold, silver, copper and nickel, the melting point of the alloy formed by the diffusion reaction is greater than 230 ° C, and the joint structure will have high joint strength and high heat dissipation. And can withstand the characteristics of high temperature operation. In a specific embodiment of the present invention, the effect of low temperature bonding of the wafer will be achieved by taking the Ag/Au material system as an example and not limited thereto. Referring to Figure 2, a cross-sectional view of an embodiment of the present invention is shown. First, a silver layer 21 is formed on one surface of a wafer 22 by electroplating, evaporation, sputtering or other metal formation. In a specific embodiment, the silver layer 21 has a thickness of about 0.5 mm (μm) to 1.5 mm (μm). In one embodiment, the smectic wafer 22 is a wafer such as a concentrating solar wafer, a power transistor, and a field effect transistor wafer. At the same time, a gold layer 23 is formed on a substrate 24 by electroplating, evaporation, sputtering or other metal formation. In a specific embodiment, the gold layer 23 has a thickness of from about 0.2 mm to about 0.8 mm. The substrate 24 can be a lead frame, a printed circuit board, or a ceramic substrate. The material of the substrate 24 may be a pure element of copper (Cu), aluminum (A1), iron (Fe), or nickel (Ni) or an alloy to which a small amount of other elements are added. The material of the substrate 24 may also be bismuth (si), aluminum oxide (Al2〇3), aluminum nitride (A1N) 'L〇w_Temperature Cofired Ceramics (LTCC) or Direct Bonded Copper, DBC). Next, the wafer 22 is press-bonded to the substrate 24 with a pre-bonding pressure and a flux 25 to increase the effect of the pre-bonding. After heating, the flux is volatilized, which facilitates diffusion reaction between the silver layer 21 and the gold layer 24 at the interface. In one embodiment, 'application of pressure or pressure to the wafer 22 and the substrate 24 allows the silver layer 21 and the gold layer 23 to be plastically deformed or diffused at the interface to be pre-bonded together, however, in another embodiment In the example, the flux 25 can be used to increase the effect of the pre-bonding, but the flux 25 is not necessarily used. In a specific embodiment, the pre-bonding method may be a simple pressing method, a hot pressing method or an ultrasonic assisted hot pressing method, wherein the pre-bonding pressure applied may be 10 gram force (gf) to 200 gram force (gf). The pre-bonding temperature may be, but is not limited to 25. (: to 200. (:, the time required to apply the pressure may be, but not limited to, 0. 2 seconds to 3 seconds. Next, the wafer 22 and the substrate 24 are pre-bonded by heating at a diffusion reaction temperature and a diffusion reaction time. The flux 25 is volatilized, and the silver layer 21 and the gold layer 23 are subjected to a solid diffusion reaction at the silver-gold junction to form a diffusion silver gold alloy layer 26 to form a structure as shown in FIG. In one embodiment, the heating mode may be hot air, infrared heating or hot plate heating. The diffusion reaction temperature may be, but not limited to, 1 〇〇 to 30 〇. The diffusion reaction time may be adjusted according to the diffusion reaction temperature. For example, when the diffusion reaction temperature is high, the diffusion reaction time can be shorter. When the diffusion reaction temperature is low, the diffusion reaction time can be longer. The diffusion reaction can be 30 minutes to 3 hours. In Fig. 2, The original silver layer 21 and the gold layer 23 are diffused and reacted to produce a diffused silver-gold alloy layer 26, and the residual silver layer HA and the gold layer 23A' have high thermal conductivity and high temperature resistance characteristics to satisfy wafer operation. It is required to reduce the degradation of the performance and efficiency of the wafer due to heat. Please refer to FIG. 3, which is an atomic ratio diagram of the diffusion silver-gold alloy layer 26 formed by the method for the low-temperature bonding structure of the wafer of the present invention. It can be seen that the method of the low temperature bonding structure of the wafer of the present invention is indeed feasible. In addition, in this embodiment, in order to enhance the adhesion between the silver layer 21 and the wafer 22, an auxiliary adhesion metal layer (not shown) may be used. The package is lost between the silver layer 21 and the wafer 22. The auxiliary adhesion metal layer may comprise nickel (Ni), chromium (C 〇, platinum (Pt), titanium (Ti) or other pure metal or alloy which promotes adhesion. Similarly, in this embodiment, in order to improve the adhesion between the gold layer 23 and the substrate 24, an auxiliary adhesive metal layer (not shown) may be sandwiched between the gold layer 23 and the substrate 24. The adhesive metal layer may comprise nickel (Ni), chromium (C 〇, platinum (Pt), titanium (Ti) or other pure metal or alloy which can promote adhesion. This embodiment uses the silver layer 21 and the gold layer 23 as an illustration. , but having the usual knowledge in the technical field to which the present invention pertains, It is to be understood that any change to the equivalent function is within the scope of the invention. For example, the silver layer 2 i may be replaced by gold (Au), and the gold layer 23 may be replaced by silver. Alternatively, the layer 21 may be gold. Alternatively, the gold layer 23 may be replaced by copper ((:1; 1). Or 'the silver layer 21 may be replaced with copper, while the gold layer 23 is not modified. In another embodiment of the invention' Taking the indium tin-tin/silver material system 201250849 as an example, the effect of the low-temperature bonding of the wafer can be achieved by the limitation thereof. Fig. 4 is a schematic cross-sectional view of the specific embodiment of the invention. (4) It can be seen that the wafer 42 is low temperature. The bonding method comprises the following steps: First, a (four) tin layer 41 is formed on the surface of the wafer 42 by electric bonding, steaming, forging or other metal forming. In a specific embodiment, the thickness of the tantalum indium tin layer 41 may be, but not limited to, 〇2 mm to 5 〇 mm. A preferred thickness is from K0 mm to 4.0 mm. In one embodiment, the B-chip 42 is a wafer such as a concentrating solar wafer, a power transistor, and a field effect transistor. At the same time, a silver layer 43 is formed on a substrate 44 by electroplating, evaporation, sputtering or other metal formation. In a specific embodiment, the thickness of the silver layer 43 may be, but not limited to, 0.2 mm to 2. mm. A preferred thickness is from 〇 5 mm to 1.0 mm. The substrate 44 may be a lead frame, a printed circuit board, or a ceramic substrate. The material of the substrate 44 may be a pure element of copper (Cu), aluminum (A1), iron (Fe), or nickel (Ni) or an alloy added with a small amount of other elements. The material of the substrate 44 may also be bismuth (Si), aluminum oxide (a12〇3), aluminum nitride (A1N), low > Low-Temperature Cofired Ceramics (LTCC) or copper-clad pottery Direct Bonded Copper (DBC). Then, the wafer 42 is heated and fixed on the substrate 44 by a pre-bonding time and a pre-bonding temperature, and pre-bonded to form a pre-diffusion alloy layer by pre-diffusion reaction between the germanium indium tin layer 41 and the silver layer 43. 45 to increase the effect of pre-joining. The heating may be performed by laser heating, hot air heating, infrared heating, thermocompression bonding, or ultrasonic assisted thermocompression bonding, wherein the pre-bonding temperature applied may be, but not limited to, 25 ° C to 150 ° C, pre-bonding pressure. It can be from 1 gram to 200 gram, and the pre-engagement time can be, but is not limited to, 201250849 〇·1 private to 2 seconds, preferably 〇.1 second to 1 second. The heating time can be appropriately adjusted depending on the pre-diffusion reaction. The preferred heating time is when a very thin pre-diffusion alloy layer is formed between the grade steel tin 2 41 and the silver layer 43. The time of the pre-diffusion reaction may be a solid-diffusion reaction or a liquid-solid diffusion reaction. Reaction. Of course, if the pre-bonding time is increased during the process, more pre-diffusion alloy layer 45 is formed, which is also an implementable method. The receiver will heat the diffusion reaction temperature and a diffusion reaction time. The bismuth plate 42 and the substrate 44 are connected to each other such that the bismuth indium tin layer 41 and the silver layer 43 are subjected to a diffusion reaction at the joint surfaces thereof to form a diffusion alloy layer 45α to form the structure shown in FIG. In a specific embodiment, the heating mode may be hot air, oven, infrared heating or hot plate heating, wherein the diffusion reaction temperature may be, but not limited to, 4 〇. to 3 〇〇. The diffusion reaction time may be diffused. The reaction temperature is adjusted to M column. For example, when the diffusion reaction temperature is high, the diffusion reaction time can be short. When the diffusion reaction temperature is low, the diffusion reaction time can be long. The diffusion reaction time can be 10 minutes to 3 hours. The purpose of the dispersion reaction is to interdif the alloying elements of the indium tin oxide layer 41 and the calcium layer 43. The preferred diffusion reaction time is required for the diffusion of the alloying elements in the majority of the indium tin oxide layer. The diffusion reaction may be a solid diffusion reaction or a liquid-solid diffusion reaction. The antimony indium tin layer 41 may be made of indium (Bi-In), antimony (Bi_Sn), antimony indium (Bi_In_Sn), antimony indium. Substituting at least one alloy material consisting of tin-zinc (B-In-Sn-Zn), bismuth-indium-zinc (Bi_In_Zn), and indium-tin-nickel (In Sn) alloy materials, wherein the melting point of Bi_in is about litol, The Bi_Sn H point is about 138<t, the melting point of Bi_25in i8Sn is about 82 C, the melting point of Bi-20In-30Sn-3Zn is about 90 ° C, and the melting point of Βι-33Ιη-〇·5Ζη is about n〇c>c The melting point of In_Sn is about ι 2 ΐ ^. 11 201250849 wherein the silver layer 43 may be substituted with at least one selected from the group consisting of gold (Au), silver (Ag), copper (Cu), and nickel (Ni). The wafer bonding structure formed by the diffusion reaction has the following possible aspects. Referring to FIG. 4, one of the wafer bonding As can be seen from the figure, the wafer bonding structure includes the sequentially stacked wafer 42, the diffusion alloy layer 45 A, the residual silver layer 43A, and the substrate 44. The material of the diffusion alloy layer 45A described above may include copper indium tin (Cu_In_Sn). a mesogenic metal (melting point of at least 400 ° C or higher), a nickel-indium tin (Ni_In_Sn) meson (melting point of about 7 〇〇〇 c or more), a nickel-niobium (Ni-Bi) intermetallic (melting point of at least 400 ° C or more), gold Indium (Au-In) Mesometal (hyun point at least 400 ° C or more), silver indium (Ag-In) meso (melting point at least 250 ° C or more), gold tin (Ag_sn) meso (melting point at least 450 ° C or more) Au-Bi intermetallic (melting point at least 350). (3 or more) with base metals and alloys (melting point of at least 250 ° C or more). Referring to Fig. 5, there is shown an alloy analysis diagram of a tantalum indium tin layer 41 bonded to a silver layer 43 in accordance with a preferred embodiment of the present invention. Fig. 5 shows the bonding state of tantalum indium tin and silver. A wafer of bismuth indium tin alloy coated with Bi-25In-18Sn is placed on a silver-plated lead frame, and pressure is applied at 9 预 for pre-bonding' and diffusion reaction is performed at 15 〇 ° C for a while, and then Analysis of the alloy obtained by alloy analysis. It can be seen that a diffusion alloy layer 45A of Bi and Ag-In-Sn intermetallic formed between the indium tin layer and the silver layer, and a residual silver layer 43 A » can be used to understand the use of the present invention. The tin layer 41 can form a bonding layer with silver at a low temperature. In addition, in the present embodiment, in order to shorten the diffusion reaction time of the secret indium tin layer 41, an auxiliary diffusion reaction metal layer (not shown) may be sandwiched between the germanium indium tin layer 41 and the wafer 42. The material of the diffusion reaction metal layer 12 201250849 is selected from the group consisting of gold (AU), silver (Ag), steel (Cu) and nickel (Ni). In addition, in order to enhance the adhesion between the auxiliary diffusion reaction metal layer and the wafer 42, an auxiliary adhesion metal (not shown) may be sandwiched between the auxiliary diffusion reaction metal layer and the wafer 42, the auxiliary adhesion metal. The layer may comprise nickel (Ni), chromium (Cr), platinum (Pt), titanium (Ti) or other pure metals or alloys that promote adhesion. Similarly, in this embodiment, in order to enhance the adhesion between the silver layer 43 and the substrate 44, an auxiliary adhesive metal layer (not shown) may be sandwiched between the silver layer 43 and the substrate 44. The adhesive metal layer may comprise nickel (Ni), chromium (Cr), platinum (Pt), titanium (Ti) or other pure metals or alloys that promote adhesion. As described above, it is known that the present invention provides a method for low-temperature bonding of wafers, which utilizes a physical property of rapid diffusion of a gold/silver interface, and a diffusion reaction between a metal having a low melting point alloy and gold, bismuth, copper and nickel. After forming the characteristics of the high temperature resistant alloy, the goal of low temperature wafer bonding and diffusion alloy layer can withstand high temperature and high heat dissipation. Therefore, the present invention is practical - rich and new! · Students who are progressive and available for industrial use should meet the patent application requirements. Undoubtedly, the invention patent application is filed according to law. You are requested to give the invention patent as early as possible. The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, that is, the shape, structure, features, spirit and method described in the patent application scope of the present invention. Equivalent changes and modifications are intended to be included in the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic flow chart of an embodiment of the present invention. |Ξ| • A schematic cross-sectional view of one embodiment of the invention. 13 201250849 FIG. 3 is an atomic ratio diagram of the diffused silver-gold alloy layer of the present invention. f Figure 4 is a schematic cross-sectional view of an embodiment of the invention. Fig. 5 is an alloy analysis diagram of a first metal layer bismuth indium tin layer bonded to a first metal layer silver layer in an embodiment of the present invention. [Main component symbol description] 21 silver layer 2 2 wafer 23A gold layer 25 flux 4 1 Syrian: sage tin layer 43 silver layer 44 substrate 2 1A silver layer 23 gold layer 24 substrate 26 diffusion silver gold alloy layer 42 wafer 43A silver layer 45 # 40 tin/silver pre-diffusion alloy layer 45 Α铋Indium tin/silver diffusion alloy layer 14