TW201232496A - Display panel - Google Patents
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- TW201232496A TW201232496A TW100102044A TW100102044A TW201232496A TW 201232496 A TW201232496 A TW 201232496A TW 100102044 A TW100102044 A TW 100102044A TW 100102044 A TW100102044 A TW 100102044A TW 201232496 A TW201232496 A TW 201232496A
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- substrate
- display panel
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- 239000000758 substrate Substances 0.000 claims abstract description 61
- 230000002093 peripheral effect Effects 0.000 claims abstract description 33
- 239000000565 sealant Substances 0.000 claims abstract description 12
- 125000006850 spacer group Chemical group 0.000 claims description 14
- 230000005540 biological transmission Effects 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 11
- 150000002367 halogens Chemical class 0.000 claims description 8
- 229910052736 halogen Inorganic materials 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- 239000000084 colloidal system Substances 0.000 claims description 5
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 3
- 238000003491 array Methods 0.000 claims description 2
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive effect Effects 0.000 claims 1
- 239000013078 crystal Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 42
- 239000010409 thin film Substances 0.000 description 9
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 239000010408 film Substances 0.000 description 4
- 239000003292 glue Substances 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
- RGCKGOZRHPZPFP-UHFFFAOYSA-N alizarin Chemical compound C1=CC=C2C(=O)C3=C(O)C(O)=CC=C3C(=O)C2=C1 RGCKGOZRHPZPFP-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- VPGRYOFKCNULNK-ACXQXYJUSA-N Deoxycorticosterone acetate Chemical compound C1CC2=CC(=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H](C(=O)COC(=O)C)[C@@]1(C)CC2 VPGRYOFKCNULNK-ACXQXYJUSA-N 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 235000011389 fruit/vegetable juice Nutrition 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000010534 mechanism of action Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 210000002784 stomach Anatomy 0.000 description 1
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
Description
36440twf.doc/I 201232496 A V 1 W 1 υυι. 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種顯示裝置,且特別是有關於一種 顯示面板。 【先前技術】 於諸多的平面顯示器中,具有高晝質、空間利用效率 佳、低消耗功率、無輻射等優越特性的薄膜電晶體液晶顯36440 twf.doc/I 201232496 A V 1 W 1 υυι. VI. Description of the Invention: [Technical Field] The present invention relates to a display device, and more particularly to a display panel. [Prior Art] In many flat panel displays, thin film transistor liquid crystal display with superior properties such as high quality, good space utilization efficiency, low power consumption, and no radiation
示器(Thin Film Transistor Liquid Crystal Display, TFT LCD)’已成為顯示器領域中的主流。薄膜電晶體液晶顯示 器主要是由主動元件陣列基板、彩色濾光基板以及夾於此 兩基板之間的液晶層所構成。 在元成主動元件陣列基板的製程後,通常會對主動元 件陣列基板上的晝素陣列進行電性檢測,或是在完成面板 製程後,對面板進行簡易的點燈檢測,以判斷書素陣列哎 面板可否正常運作。當晝素陣列或面板無法正常運作時: 便可對於不㈣元件(如薄膜電晶體或晝素電 路進行修補。然而’為了對於畫素_或面板進行檢測,, 在主動儿件陣列基板之周邊區上便需要製 (E—一)。此外,在主動元件== 線路區上也需要製作料通電壓喊周邊 壓輸入至祕縣基板的共通層。若共通電 線路,則共通電極佈㈣域將觀縮。 $置檢測 來配置共通電極層時,齡增加共通鹤Thin Film Transistor Liquid Crystal Display (TFT LCD) has become the mainstream in the field of displays. The thin film transistor liquid crystal display device is mainly composed of an active device array substrate, a color filter substrate, and a liquid crystal layer sandwiched between the two substrates. After the manufacturing process of the active component array substrate, the pixel array on the active device array substrate is usually electrically detected, or after the panel process is completed, the panel is subjected to simple lighting detection to determine the pixel array. Can the panel be functioning properly? When the pixel array or panel is not working properly: It can be repaired for non-fourth components (such as thin film transistors or halogen circuits). However, in order to detect pixels or panels, around the active array substrate In the area, it is necessary to make the system (E-1). In addition, in the active component == line area, it is also necessary to make a common voltage of the material pass voltage and the peripheral pressure input to the Mixian substrate. If the common line is connected, the common electrode cloth (four) domain When the detector is used to configure the common electrode layer, the common age is increased.
201232496 1 υ 1 υ i υοι fW 36440twf.d〇c/I 負載(RC loading),, 不足時,輸入至彩色货:其的佈線區域 可能不足,進而影響==共通電極層的共通電壓便 9顯不态的顯不品質。 【發明内容】 本發明提供一種复古έ =提供1顯一書 質:i一基:第二基板、-框膠以及-顯示介 區域。晝^_配置=區一環繞顯示區域的周邊 配置於第一基板的反的顯示區域中。周邊線路 周邊線路包括一導 ΐ導二内 問,且拒麻Μ 置於苐—基板與第二基板之 質位於第二二为周邊線路上並環繞晝素陣列。顯示介 、在本發;二之間,且被框膠所環繞。 多:分布於膠體中的導電間隙物。第二基;;有= 傳輸導電層透過導電間隙物而與共用電極層 括金^本發明之一實施财,上述之導電間隙物的材質包 201232496 lUiUiOMfW 36440ην£άοο/Ι 在本發明之一實施例中,上述之傳輸導電層具有一開 口,位於内導線與外導線之間。外導線依序透過傳輸導電 層、導電間隙物、共用電極層、導電間隙物、傳輸導電層 而與内導線電性連接。 在本發明之一實施例中,上述之傳輸導電層為一連續 膜層® 在本發明之一實施例中,上述之晝素陣列包括多個陣 列排列之晝素單元以及多條訊號線。訊號線與畫素單元電 性連接。内導線與部分訊號線連接,且内導線、外導線以 及訊號線屬於同一膜層。 在本發明之一實施例中,上述之顯示面板更包括至少 驅動晶片,配置於第一基板的周邊區域中,其中訊號線、 内導線與驅動晶片電性連接。 在本發明之一實施例中,上述之顯示面板更包括一軟 性電路板,配置於第一基板的周邊區域中,且與外導線以 及驅動晶片電性連接。 在本發明之一實施例中,上述之傳輸導電層的材質包 括銦錫氧化物(indium tin oxide, ΙΤΟ)或銦鋅氧化物 (indium zinc oxide, IZO )。 在本發明之一實施例中,上述之第一基板為一主動元 件陣列基板,而第二基板為一彩色濾光基板。 基於上述,本發明之顯示面板的設計是使周邊線路的 内導線與晝素陣列電性連接,而周邊線路的外導線藉由傳 輸導電層、内導線而與晝素陣列電性連接,因此可穩定顯 201232496 10101681TW 36440twf.doc/l 示區域内的共通電壓。換言之,相較於習知技術,本發明 之顯示面板可具有較大的佈線區域,且不會額外增加共通 電壓的電阻電容負載(RC loading),進而具有較佳的顯 不品質。 為讓本發明之上述特徵和優點能更明顯易懂,下文特 舉實施例,並配合所附圖式作詳細說明如下。 【實施方式】 圖1A為本發明之一貫施例之·一種顯示面板的不思 圖。圖1B為圖1A之顯示面板的俯視示意圖。圖1C為沿 圖1B之線I-Ι的剖面示意圖。在此必須說明的是,為了方 便說明起見’圖1B中省略繪示第二基板以及部分構件。 請同時參考圖1A、圖1B以及圖1C,在本實施例中,顯 示面板100a包括一第一基板11〇、一晝素陣列丨2〇 ' —周 邊線路130a、一第二基板140、一框膠15〇以及一顯示介 質 160。 詳細來說,第一基板110,例如是一主動元件(如薄 膜電晶體(Thin Film Transistor, TFT))陣列基板,其具 有一顯示區域112以及一環繞顯示區域i12的周邊區域 114。晝素陣列120配置於第一基板11〇的顯示區域112 中,其中畫素陣列120包括多個陣列排列之晝素單元I〕】 以及夕條訊號線(包括資料線124a以及閘極線113 ),且 這些資料線124a、這些閘極線113與晝素單元122電性連 接。在本實施例中,每-晝素單幻22包括一薄膜電晶體201232496 1 υ 1 υ i υοι fW 36440twf.d〇c/I load (RC loading),, when it is insufficient, input to color goods: its wiring area may be insufficient, and thus affect == common voltage of common electrode layer is 9 Not showing the quality. SUMMARY OF THE INVENTION The present invention provides a retro έ = provide 1 display book: i-base: a second substrate, a frame glue, and a display medium region.昼^_Configuration=Zone A periphery of the surrounding display area is disposed in the opposite display area of the first substrate. Peripheral lines The peripheral lines include a guide, and the substrate is placed on the second substrate as a peripheral circuit and surrounds the pixel array. The display is between the present and the second, and is surrounded by the sealant. Many: conductive spacers distributed in the colloid. The second base; has a transmission conductive layer that passes through the conductive spacer and the common electrode layer includes gold. The material of the conductive spacer is 201232496 lUiUiOMfW 36440ην£άοο/Ι In the example, the transmission conductive layer has an opening between the inner conductor and the outer conductor. The outer wires are electrically connected to the inner wires through the conductive layers, the conductive spacers, the common electrode layers, the conductive spacers, and the conductive layers. In one embodiment of the invention, the transmission conductive layer is a continuous film layer. In one embodiment of the invention, the pixel array includes a plurality of arrayed pixel units and a plurality of signal lines. The signal line is electrically connected to the pixel unit. The inner conductor is connected to a part of the signal line, and the inner conductor, the outer conductor and the signal line belong to the same film layer. In one embodiment of the present invention, the display panel further includes at least a driving die disposed in a peripheral region of the first substrate, wherein the signal wires and the inner wires are electrically connected to the driving chip. In an embodiment of the invention, the display panel further includes a flexible circuit board disposed in a peripheral region of the first substrate and electrically connected to the outer lead and the driving chip. In an embodiment of the invention, the material of the transmission conductive layer comprises indium tin oxide (ITO) or indium zinc oxide (IZO). In an embodiment of the invention, the first substrate is an active device array substrate, and the second substrate is a color filter substrate. Based on the above, the display panel of the present invention is designed to electrically connect the inner leads of the peripheral lines to the pixel array, and the outer leads of the peripheral lines are electrically connected to the pixel array by transmitting the conductive layer and the inner wires. Stable display 201232496 10101681TW 36440twf.doc / l shows the common voltage in the area. In other words, the display panel of the present invention can have a larger wiring area than the conventional technique, and does not additionally increase the RC loading of the common voltage, thereby having better quality. The above described features and advantages of the present invention will become more apparent from the description of the appended claims. [Embodiment] Fig. 1A is a schematic view of a display panel according to a conventional embodiment of the present invention. FIG. 1B is a top plan view of the display panel of FIG. 1A. Fig. 1C is a schematic cross-sectional view taken along line I-Ι of Fig. 1B. It must be noted here that, for convenience of explanation, the second substrate and the partial members are omitted in Fig. 1B. Referring to FIG. 1A, FIG. 1B and FIG. 1C, in the embodiment, the display panel 100a includes a first substrate 11A, a pixel array 丨2〇', a peripheral line 130a, a second substrate 140, and a frame. The glue 15 〇 and a display medium 160. In detail, the first substrate 110 is, for example, an active device (e.g., a Thin Film Transistor (TFT)) array substrate having a display area 112 and a peripheral area 114 surrounding the display area i12. The pixel array 120 is disposed in the display area 112 of the first substrate 11 , wherein the pixel array 120 includes a plurality of arrays of pixel units I] and a night signal line (including the data line 124a and the gate line 113). The data lines 124a and the gate lines 113 are electrically connected to the pixel unit 122. In the present embodiment, each of the alizarin monophonic 22 includes a thin film transistor
201232496 iuiuu,8jrw 36440twf.doc/I 23以及與薄膜電晶體m對應言免置的晝素電極⑵,其中 薄膜電晶體123是由閘極123a、源極123b以及沒極⑵c 所、1^成,所屬技術領域巾具有通常知識者應知薄膜 ,曰曰體123底閘極(bottom _ )之結構或頂間極(邮糾^ ) 之結構,在此僅用以說明並不刻意限制。 周邊線路ma配置於第一基板11〇的周邊區域m 之線路130a與晝素陣列120電性連接。本實施例 值a包括一内導線132、-外導線134以及-輸2層136a’其中内導線132與晝素陣列12G電性連 =夕卜導線134環繞内導線132的外圍配置,_輸導電 二a電性連接内導線132與外導線134。特別是,在本 而::J中’外導線134可藉由傳輸導電層咖、内導線m 发二陣列120電性連接。於此,傳輸導電層136&例如 二 ',骐層,而内導線132與部分資料線124a、部分閘 ,、113及共通電極線118連接,且内導線132、外導線 沾4^資料、線124&屬於同一膜層。此外,傳輸導電層136a 、負匕括銦錫氧化物或銦鋅氧化物。 更具體來說’第一基板110上亦具有這些閘極線113、 乂絕緣層115以及—保護層117,其中閘絕緣層ιΐ5覆 ^二二問極線113,而内導線132與外導線134位於閘絕 盥二U5上,且内導線132、外導線134透過閘絕緣層115 二問極線113電性絕緣。此外,保護層h7具有多個 :Dll7a (圖1C中僅示意地繪示二個),其中傳輸導電 曰13如透過開口 117&與内導線132及外導線134電性連 201232496 iuiuiomi'W 36440twf.doc/I 接。 第二基板140,例如是一彩色濾光基板,配置於第— 基板110的上方,意即配置於主動元件陣列基板11〇的對 向。一般而言’彩色濾光基板上主要包括一黑矩陣層(black matrix,BM)(未繪示)、一彩色濾光膜(未繪示)以及 -共用電極層142等’其中黑矩陣層作為遮光層(^咖 shield layer)用,且黑矩陣層必須具有良好的遮光效果與 低反射的特性。 ^ 框膠150配置於第一基板110與第二基板140之間, 且框膠150位於部分周邊線路13〇a上並環繞晝素陣列 120。在本實施例中,框膠150包括一膠體152以及多個分 布於膠體152中的導電間隙物154,其中傳輸導電層13如 可透過這些導電間隙物154而與第二基板14〇的共用電極 層142電性連接。如此一來,可使得位於第一基板11〇上 的傳輸導電層136a與位於第二基板14〇上的共用電極層 142電性連接而具有相同的共通電壓。此外,這些導電間 • 隙物154的材質為全面包覆金屬層的高分子材料。 顯示介質160位於第一基板u〇與第二基板14〇之 間,且被框膠150所環繞。在此必須說明的是,本發明並 不限定顯示面板l〇〇a的型態,其中隨著顯示介質16〇的不 同,顯示面板l〇〇a具有不同的作用機制。舉例而言,顯示 介質160可為液晶材料’則顯示面板100a為液晶顯示面板。 此外’本實施例之顯示面板100a更可包括至少一驅 動晶片170 (圖1B中繪示一個)以及一軟性電路板18〇。 9 201232496201232496 iuiuu, 8jrw 36440twf.doc/I 23 and a halogen electrode (2) corresponding to the thin film transistor m, wherein the thin film transistor 123 is formed by the gate 123a, the source 123b, and the electrodeless (2)c. The technical field of the art has a structure which is known to a person skilled in the art, and the structure of the bottom gate (bottom_) of the body 123 or the structure of the top electrode (mail correction) is used herein for illustrative purposes only and is not intended to be limiting. The line 130a of the peripheral line ma disposed in the peripheral region m of the first substrate 11A is electrically connected to the pixel array 120. The value a of the embodiment includes an inner wire 132, an outer wire 134, and a second layer 136a'. The inner wire 132 and the halogen array 12G are electrically connected to each other. The second wire is electrically connected to the inner wire 132 and the outer wire 134. In particular, in the ":J", the outer conductor 134 can be electrically connected by transmitting the conductive layer and the inner conductor m. Here, the conductive layer 136 & </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; 124& belongs to the same film layer. Further, the conductive layer 136a, the negative electrode includes indium tin oxide or indium zinc oxide. More specifically, the first substrate 110 also has these gate lines 113, the germanium insulating layer 115 and the protective layer 117, wherein the gate insulating layer ι 5 covers the second and second interrogation lines 113, and the inner and outer wires 132 and 134 It is located on the gate U5, and the inner wire 132 and the outer wire 134 are electrically insulated through the gate insulating layer 115. In addition, the protective layer h7 has a plurality of: D117a (only two are schematically shown in FIG. 1C), wherein the conductive conductive layer 13 is electrically connected to the inner lead 132 and the outer lead 134, such as through the opening 117&201232496 iuiuiomi'W 36440twf. Doc/I. The second substrate 140 is, for example, a color filter substrate disposed above the first substrate 110, that is, disposed opposite to the active device array substrate 11A. Generally, the color filter substrate mainly includes a black matrix (BM) (not shown), a color filter film (not shown), and a common electrode layer 142, etc. The shading layer is used, and the black matrix layer must have good shading effect and low reflection characteristics. The sealant 150 is disposed between the first substrate 110 and the second substrate 140, and the sealant 150 is located on the portion of the peripheral line 13A and surrounds the halogen array 120. In this embodiment, the sealant 150 includes a colloid 152 and a plurality of conductive spacers 154 distributed in the colloid 152, wherein the conductive layer 13 is transparent to the common electrode of the second substrate 14 through the conductive spacers 154. Layer 142 is electrically connected. In this way, the transmission conductive layer 136a on the first substrate 11A can be electrically connected to the common electrode layer 142 on the second substrate 14A to have the same common voltage. Further, these conductive spacers 154 are made of a polymer material which is entirely covered with a metal layer. The display medium 160 is located between the first substrate u and the second substrate 14 and surrounded by the sealant 150. It must be noted here that the present invention does not limit the type of the display panel 10a, wherein the display panel 10a has a different mechanism of action depending on the display medium 16〇. For example, the display medium 160 may be a liquid crystal material', and the display panel 100a is a liquid crystal display panel. Further, the display panel 100a of the present embodiment may further include at least one driving wafer 170 (one shown in FIG. 1B) and a flexible circuit board 18A. 9 201232496
1 υ 1 υ 1 ¢)81 TW 36440twf.docA 驅動晶片170配置於第一基板ho的周邊區域ιΐ4上,其 中這些資料線124a、這些閘極線113、内導線132會分別 與驅動晶片170電性連接。軟性電路板18〇配置於第一基 板11〇的周邊區域114中,且與外導線134以及驅動晶片 170電性連接。 由於本實施例之顯示面板l〇〇a的設計是使周邊線路 130a的内導線132與晝素陣列12〇電性連接,而周邊線路 130a的外導線134藉由傳輸導電層136a、内導線132而與 晝素陣列120電性連接,且透過框膠15〇中的這些導電間 隙物154而電性導通傳輸導電層136a以及第二基板14〇 上的共用電極層142,請參考圖ic中箭頭方向。如此一 來’可穩定顯示面板l〇〇a之顯示區域112内的共通電壓, 且不會額外增加共通電壓的電阻電容負載(Reloading), 進而使得顯示面板l〇〇a具有較佳的顯示品質。再者,由於 驅動晶片17〇的下方並沒有佈線,因此顯示面板1〇〇a可具 有較大且較靈活之佈線區域。 以下將再以一不同之實施例來說明顯示面板l〇〇b的 5史汁。在此必須說明的是,下述實施例沿用前述實施例的 元件標號與部分内容,其中採用相同的標號來表示相同或 近似的元件,並且省略了相同技術内容的說明。關於省略 邛分的說明可參考前述實施例,下述實施例不再重複贅述。 圖2A為本發明之另一實施例之一種顯示面板的俯視 示思圖。圖2B為沿圖2A之線Ιΐ-π的剖面示意圖。在此 必須說明的是,為了方便說明起見,圖2B中省略繪示第 2012324961 υ 1 υ 1 ¢) 81 TW 36440 twf.docA The driving wafer 170 is disposed on the peripheral region ι 4 of the first substrate ho, wherein the data lines 124a, the gate lines 113, and the inner leads 132 are electrically connected to the driving wafer 170, respectively. connection. The flexible circuit board 18 is disposed in the peripheral region 114 of the first substrate 11A and electrically connected to the outer leads 134 and the driving wafer 170. The display panel 10a of the present embodiment is designed such that the inner leads 132 of the peripheral line 130a are electrically connected to the pixel array 12, and the outer leads 134 of the peripheral line 130a are transported by the conductive layer 136a and the inner leads 132. And electrically connected to the halogen array 120, and through the conductive spacers 154 in the sealant 15 而 electrically conductive transmission of the conductive layer 136a and the common electrode layer 142 on the second substrate 14 ,, please refer to the arrow in Figure ic direction. In this way, the common voltage in the display area 112 of the display panel 10a can be stabilized, and the resistive load (Reloading) of the common voltage is not additionally increased, so that the display panel 10a has better display quality. . Furthermore, since there is no wiring under the driving chip 17 turns, the display panel 1a can have a large and flexible wiring area. The following will describe the juice of the display panel 10b in a different embodiment. It is to be noted that the following embodiments use the same reference numerals and the same elements in the foregoing embodiments, and the same reference numerals are used to refer to the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted points, reference may be made to the foregoing embodiments, and the following embodiments are not repeated. 2A is a top plan view of a display panel in accordance with another embodiment of the present invention. 2B is a schematic cross-sectional view taken along line Ιΐ-π of FIG. 2A. It must be noted here that, for the convenience of explanation, the illustration 201232496 is omitted in FIG. 2B.
iwiuiooiTW 36440twf.doc/I 二基板以及部分構件。請同時參考圖2A與圖2B ,本實施 例之顯示面板l〇〇b與上述實施例之顯示面板100a相似, 其不同之處在於:圖2A與圖2B中之周邊線路13〇b的傳 輪導電層136b具有一開口 137,其中開口 137位於内導線 132與外導線134之間,而外導線134可依序透過傳輸導 電層136b、這些導電間隙物154、第二基板14〇上的共用 電極層142、這些導電間隙物154、傳輸導電層13沾而與 φ 内導線132電性連接,請參考圖2B之箭頭方向。如此一 來,可穩定顯示面板l〇〇b之顯示區域112内的共通電壓, 且不會額外增加共通電壓的電阻電容負載(Rc1〇ading), 進而使得顯示面板l〇〇b具有較佳的顯示品質。 胃紅上所述,本發明之顯示面板的設計是使周邊線路的 内導線與晝素陣列電性連接,而周邊線路的外導線藉由傳 輸導電層、内導線而與畫素陣列電性連接,因此可穩定顯 示區域内的共通電壓。換言之’相較於習知技術,本發明 之顯示面板可具有較大的佈線區域,且不會額外增加共通 •電壓的電阻電容負載(RC loading),進而具有較佳 示品質。 ’ 雖然本發明已以實施例揭露如上,然其並非用以限定 任何所屬技術領域中具有通常知識者,在不脫離 月之精神和範圍内,當可作些許之更動與潤飾,故本 發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 11iwiuiooiTW 36440twf.doc/I Two substrates and some components. Referring to FIG. 2A and FIG. 2B simultaneously, the display panel 100b of the present embodiment is similar to the display panel 100a of the above embodiment, and the difference is that the transmission line of the peripheral line 13〇b in FIG. 2A and FIG. 2B The conductive layer 136b has an opening 137, wherein the opening 137 is located between the inner lead 132 and the outer lead 134, and the outer lead 134 can sequentially transmit through the conductive layer 136b, the conductive spacer 154, and the common electrode on the second substrate 14 The layer 142, the conductive spacers 154, and the transmission conductive layer 13 are electrically connected to the φ inner leads 132. Please refer to the direction of the arrow in FIG. 2B. In this way, the common voltage in the display area 112 of the display panel 10b can be stabilized, and the resistance and capacitance load (Rc1〇ading) of the common voltage is not additionally increased, thereby making the display panel 10b better. Display quality. As shown in the stomach red, the display panel of the present invention is designed to electrically connect the inner wires of the peripheral lines to the pixel array, and the outer wires of the peripheral lines are electrically connected to the pixel array by transmitting the conductive layer and the inner wires. Therefore, the common voltage in the display area can be stabilized. In other words, the display panel of the present invention can have a larger wiring area than the conventional technique, and does not additionally increase the RC loading of the common voltage, thereby having a better quality. The present invention has been disclosed in the above embodiments, and is not intended to limit any of the ordinary skill in the art, and the present invention may be modified and modified without departing from the spirit and scope of the present invention. The scope of protection is subject to the definition of the scope of the patent application attached. [Simple description of the schema] 11
201232496 iuiuiooiTW 36440twf.doc/I 圖1A為本發明之一實施例之一種顯示面板的示意 圖。 圖1B為圖1A之顯示面板的俯視示意圖。 圖1C為沿圖1B之線I-Ι的剖面示意圖。 圖2A為本發明之另一實施例之一種顯示面板的俯視 示意圖。 圖2B為沿圖2A之線II-II的剖面示意圖。 【主要元件符號說明】 100a、100b :顯示面板 110 :第一基板 112 :顯示區域 113 :閘極線 114 :周邊區域 115 :閘絕緣層 117 :保護層 117a :開口 118 :共通電極線 120 :晝素陣列 122 :晝素單元 123 :薄膜電晶體 123a :閘極 123b :源極 123c :汲極 12201232496 iuiuiooiTW 36440twf.doc/I Fig. 1A is a schematic view of a display panel according to an embodiment of the present invention. FIG. 1B is a top plan view of the display panel of FIG. 1A. 1C is a schematic cross-sectional view taken along line I-Ι of FIG. 1B. 2A is a top plan view of a display panel according to another embodiment of the present invention. Fig. 2B is a schematic cross-sectional view taken along line II-II of Fig. 2A. [Main component symbol description] 100a, 100b: display panel 110: first substrate 112: display region 113: gate line 114: peripheral region 115: gate insulating layer 117: protective layer 117a: opening 118: common electrode line 120: 昼Prime array 122: halogen unit 123: thin film transistor 123a: gate 123b: source 123c: drain 12
36440twf.doc/I 20123249636440twf.doc/I 201232496
i 1 u 1 υοι rW 124a :資料線 125 :晝素電極 130a、130b :周邊線路 132 :内導線 134 :外導線 136a、136b :傳輸導電層 137 :開口 140 :第二基板 142 :共用電極層 150 :框膠 152 :膠體 154 :導電間隙物 160 :顯示介質 17 0 .驅動晶片 180 :軟性電路板i 1 u 1 υοι rW 124a : data line 125 : halogen electrodes 130 a , 130 b : peripheral line 132 : inner conductor 134 : outer conductor 136 a , 136 b : transmission conductive layer 137 : opening 140 : second substrate 142 : common electrode layer 150 : frame glue 152: colloid 154: conductive spacer 160: display medium 17 0. drive wafer 180: flexible circuit board
1313
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100102044A TWI439981B (en) | 2011-01-20 | 2011-01-20 | Display panel |
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| Application Number | Priority Date | Filing Date | Title |
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| TW100102044A TWI439981B (en) | 2011-01-20 | 2011-01-20 | Display panel |
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| TW201232496A true TW201232496A (en) | 2012-08-01 |
| TWI439981B TWI439981B (en) | 2014-06-01 |
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| TW100102044A TWI439981B (en) | 2011-01-20 | 2011-01-20 | Display panel |
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