201238228 六、發明說明： 【發明所屬之技術領域】 本發明係有關返馳式變換器’更具體的說是有關採用 同步整流技術的返馳式變換器。 【先前技術】 大部分的筆記型電源轉接器採用返馳式變換器結構， 如圖1所示。爲了提高效率’大多數的筆記型電源轉接器 生産商均使用同步整流器（SR)來取代一般的整流二極體 ，換句話說，即在圖1所示的返馳式變換器中，用同步整 流場效應電晶體（FET )來代替變壓器T的次級繞組T,側的 二極體D。然而，用SR代替整流二極體的主要缺點是成本 較高，這與需要跨越隔離裝置（諸如，變壓器）而傳送相 關控制信號有關。 在一些現有技術系統中，控制信號可以由同步整流器 上的電壓信號而被導生出來，而不再跨越隔離裝置來傳送 控制信號。這樣做的一個問題是：相比動態電壓變化範圍 (幾十伏），同步整流器上的電壓信號（幾毫伏）非常小。爲 了避免誤觸發，常常會犧牲其帶寬，這將導致關斷時間延 長，效率降低。 在一些解決方案中，常使用跨導放大器來延遲同步整 流的開通，這可以解決誤觸發的問題。但是，在連續導通 模式（CCM )下，採用跨導放大器來延遲同步整流器的開 通的方法是無效的’同時，跨導放大器還將會帶來關斷減 -5- 201238228 緩的問題，這將導致更多的開關損耗。 因此，急需一個快速關斷同步整流器進而減小開關損 耗的解決方案’並且’此方案可以用在任何類型的返馳式 變換器上（諸如，連續導通模式（CCM )、非連續導通模 式（DCM)、准諧振模式的返馳式變換器）。 【發明內容】 針對現有返馳式變換器同步整流驅動技術中@ @ $ 多個問題，本發明提供一種返馳式變換器同步整流的智1慧 驅動方法和裝置。 本發明提出一種用以驅動同步整流器的驅動電路’包 括跨導放大器和比較器。跨導放大器第一輸入端連接第一 直流偏電壓，第二輸入端連接同步整流器的汲極，輸出端 連接同步整流器的閘極；比較器第一輸入端連接第二直流 偏電壓，第二輸入端連接同步整流器的汲極，輸出端透過 一個開關連接同步整流器的閘極。 根據本發明的實施例，所述同步整流器的導通係根據 同步整流器的寄生二極體的導通狀態來予以決定；而當同 步整流器被導通後，所述寄生二極體被關斷。 根據本發明的實施例，如果所述同步整流器的汲極信 號緩慢上升，則跨導放大器將輸出低位準來關斷同步整流 器：如果所述同步整流器的汲極信號急速上升，則比較器 將輸出高位準，並透過所述開關來關斷同步整流器。 根據本發明的實施例’所述第—直流偏電壓與第二直 -6 - 201238228 流偏電壓之間具有電壓差。 根據本發明的實施例，如果 ，則所述開關被導通；如果所述 所述開關被關斷。 本發明還提出一種智慧驅動 較器。跨導放大器用以放大同步 直流偏電壓之間的差値，並輸出 大信號來控制同步整流器；比較 汲極信號與第二直流偏電壓之間 信號，同時用比較信號來控制同 本發明還提出一種返馳式變 方法包括放大返馳式變換器中之 第一直流偏電壓之間的差値，並 用該放大信號來控制所述同步整 整流器的汲極信號和第二直流偏 ，同時用該比較信號來控制所述 根據本發明的實施例，所述 提供同步整流器的汲極信號至跨 提供第一直流偏電壓至跨導放大 導放大器放大返馳式變換器中之 第一直流偏電壓之間的差値’並 導放大器輸出的所述放大信號傳 以控制所述同步整流器；提供同 車父器的第一輸入而和供桌一直 所述比較器輸出爲高位準 比較器輸出爲低位準，則 器，包括跨導放大器和比 整流器的汲極信號與第一 一個放大信號，同時用放 器用以比較同步整流器的 的大小，並輸出一個比較 步整流器。 換器的驅動方法，該驅動 同步整流器的汲極信號與 輸出一個放大信號，同時 流器：以及比較所述同步 電壓並輸出一個比較信號 同步整流器。 驅動方法更具體地包括： 導放大器的第一輸入端和 器的第二輸入端，透過跨 同步整流器的汲極信號與 輸出一個放大信號；將跨 送至同步整流器的閘極， 步整流器的汲極信號至比 流偏電壓至放大器的第二 201238228 輸入端，透過比較器來比較所 第二直流偏電壓並輸出一個比 述比較信號透過一個開關傳送 制所述同步整流器。 本發明還提出一種智慧驅 用以透過放大同步整流器的汲 間的差値來控制同步整流器； 步整流器的汲極信號和第二直 。其中，第一裝置在同步整流 步整流器導通，並在同步整流 同步整流器關斷；第二裝置在 上升時將同步整流器管關斷。 本發明還提出又一種返馳 :當同步整流器的汲極信號爲 當所述汲極信號增大時，關斷 和現有技術相比，本發明 減小開關損耗，並且可以用在 變換器上。 述同步整流器的汲極信號和 較信號；將比較器輸出的所 至同步整流器的閘極，以控 動器，其包括：第一裝置， 極信號與第一直流偏電壓之 第二裝置，用以透過比較同 流偏電壓來控制同步整流器 器的汲極信號爲負値時將同 器的汲極信號緩慢上升時將 同步整流器的汲極信號急速 式變換器的驅動方法，包括 負値時，導通同步整流器； 同步整流器。 可快速關斷同步整流器進而 任何一種操作模式的返馳式 【實施方式】 本發明將在下文中結合附 發明結合實施例進行闡述，但 明限定於這些實施例中，相反 加之申請專利範圍所界定的本 圖而進行全面描述。雖然本 應理解爲這並非意指將本發 地，本發明意在涵蓋由所附 發明精神和範圍內所定義的 -8- 201238228 各種替換、修改和等同變換。此外，在下面對本發明的詳 細描述中，爲了更好的理解本發明，闡述了大量的細節。 然而，本領域技術人員將理解，沒有這些具體細節，本發 明同樣可以實施。在其他的一些實施例中，爲了便於凸顯 本發明的主旨，對於大家熟知的方案、流程、元件裝置以 及電路未作詳細的描述。 參考圖2，電路100中，使用跨導放大器UQ來開通同步 整流器，使用比較器U,來關斷同步整流器。如圖2所 示’電路1 00包括跨導放大器UQ，其同相端接收第一直流 偏電壓V,，反相端接收信號VD，其中，信號VD是同步整 流器Μ!的汲極信號；以及比較器U ,，其同相端接收汲極信 號V d，反相端接收第二直流偏電壓V2。 跨導放大器U〇的輸出端係直接連接到同步整流器…的 _極，比較器U i的輸出端透過一個內部開關S ,而被連接到 同步整流器M,的閘極。當比較器U,的輸出爲高位準時，內 部開關S ,導通，同步整流器Μ ,的閘極電壓爲低位準。當比 較器U ,輸出爲低位準時，內部開關s ,關斷，同步整流器Μ , 的閘極電壓係由跨導放大器UQ的輸出來予以決定。二極體 Di爲同步整流器％的寄生體二極體，用以在該體二極體D, 導通期間’將汲極信號VD電壓鉗位在一個負値，例如，-〇.7 V 〇 在操作過程中，如果返馳式變換器操作在連續導通模 #下’當返馳式變換器之初級繞組T〇側的主電晶體被關斷 時’二極體D ,立刻導通，使得汲極信號Vd變爲負値，例如 -9 - 201238228 ，-0.7V。因此，跨導放大器U〇的輸出，亦即，VG信號， 將逐漸增大，當VG升高到同步整流器Μ ,的開通閥値時， 同步整流器Μ ,導通，二極體D !關斷。 當返馳式變換器中變壓器之初級繞組TQ側的主電晶體 被導通時，次級繞組T,的感應電壓使汲極信號VD快速跳變 高位準，使得跨導放大器UQ的輸出信號（亦即，VG信號） 爲低位準。此時汲極信號VD的値大於第二直流偏電壓V2， 比較器Lh輸出高位準信號，將內部開關S1導通，並將％信 號拉低，同步整流器被快速關斷》 如果返馳式變換器係操作在非連續導通模式或准諧振 模式下，當返馳式變換器中變壓器之初級繞組TG側的主電 晶體關斷時，電路100的操作原理和連續導通模式下的操 作原理一致。但是，當返馳式變換器中變壓器之初級繞組 To側的主電晶體被導通時，因操作於非連續導通模式或准 諧振模式，汲極信號VD並非快速跳變而是緩慢上升後直到 大於第一直流偏電壓V,爲止，此時，跨導放大器U〇將使信 號VG變爲低位準，比較器U ,不再控制VG，在這種情況下 ，依然會關斷同步整流器M,。 透過設置一個死區，以避免跨導放大器UQ和比較器川 互相抵制，該死區爲第一直流偏電壓V,與第二直流偏電壓 V2之間的電壓差。當汲極信號vD跌到低於第一直流偏電壓 v 1 ’跨導放大器u Q透過調節V G而使得汲極信號V D値保持 在第一直流偏電壓V ,。如果汲極信號V D變化太快，則跨導 放大器U 0不能使汲極信號V D保持在第—直流偏電壓V ,，汲201238228 VI. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a flyback converter ‘more specifically to a flyback converter employing synchronous rectification technology. [Prior Art] Most notebook power adapters use a flyback converter structure, as shown in Figure 1. In order to improve efficiency, most notebook power adapter manufacturers use synchronous rectifiers (SR) to replace the general rectifier diodes. In other words, in the flyback converter shown in Figure 1, A synchronous rectification field effect transistor (FET) is substituted for the secondary winding T of the transformer T, and the diode D on the side. However, the main disadvantage of replacing the rectifying diode with SR is the higher cost, which is related to the need to transmit associated control signals across isolation devices such as transformers. In some prior art systems, the control signal can be derived from the voltage signal on the synchronous rectifier without the control signal being transmitted across the isolation device. One problem with this is that the voltage signal (several millivolts) on the synchronous rectifier is very small compared to the dynamic voltage variation range (tens of volts). In order to avoid false triggering, the bandwidth is often sacrificed, which leads to extended turn-off time and reduced efficiency. In some solutions, a transconductance amplifier is often used to delay the turn-on of the synchronous rectification, which can solve the problem of false triggering. However, in continuous conduction mode (CCM), the method of using a transconductance amplifier to delay the turn-on of the synchronous rectifier is ineffective. At the same time, the transconductance amplifier will also bring about a problem of shutdown minus -5, 201238228, which will Lead to more switching losses. Therefore, there is an urgent need for a solution to quickly turn off the synchronous rectifier and thereby reduce the switching loss 'and' this scheme can be used on any type of flyback converter (such as continuous conduction mode (CCM), discontinuous conduction mode (DCM) ), a quasi-resonant mode flyback converter). SUMMARY OF THE INVENTION In view of a plurality of problems in the synchronous flyback driving technology of the existing flyback converter, the present invention provides a smart driving method and apparatus for synchronous rectification of a flyback converter. The present invention proposes a driving circuit 'to drive a synchronous rectifier' comprising a transconductance amplifier and a comparator. The first input end of the transconductance amplifier is connected to the first DC bias voltage, the second input terminal is connected to the drain of the synchronous rectifier, the output end is connected to the gate of the synchronous rectifier; the first input end of the comparator is connected to the second DC bias voltage, and the second The input is connected to the drain of the synchronous rectifier, and the output is connected to the gate of the synchronous rectifier through a switch. According to an embodiment of the invention, the conduction of the synchronous rectifier is determined according to the conduction state of the parasitic diode of the synchronous rectifier; and when the synchronous rectifier is turned on, the parasitic diode is turned off. According to an embodiment of the invention, if the gate signal of the synchronous rectifier rises slowly, the transconductance amplifier will output a low level to turn off the synchronous rectifier: if the synchronous rectifier's drain signal rises rapidly, the comparator will output High level, and the synchronous rectifier is turned off through the switch. According to an embodiment of the present invention, there is a voltage difference between the first DC bias voltage and the second straight - -6 - 201238228 bias voltage. According to an embodiment of the invention, if so, the switch is turned on; if the switch is turned off. The invention also proposes a smart drive comparator. The transconductance amplifier is used to amplify the difference between the synchronous DC bias voltages, and outputs a large signal to control the synchronous rectifier; the signal between the drain signal and the second DC bias voltage is compared, and the comparison signal is used to control the same invention. A flyback variant method includes amplifying a difference 第一 between a first DC bias voltage in a flyback converter, and using the amplified signal to control a dipole signal and a second DC offset of the synchronous rectifier The comparison signal is used to control the first DC according to the embodiment of the present invention, the step of providing a synchronous rectifier to the first DC in the translating amplifier to the transconductance amplifier The difference between the bias voltages 并' and the amplified signal outputted by the amplifier is passed to control the synchronous rectifier; the first input of the same parent is provided, and the output of the comparator is always the high level comparator output a low level, including a transconductance amplifier and a rectifier diode signal and a first amplified signal, and a comparator for comparing the synchronous rectifier The size and output of a comparison step rectifier. The driving method of the converter, which drives the synchronous rectifier's drain signal and outputs an amplified signal, while the streamer: and compares the synchronous voltage and outputs a comparison signal synchronous rectifier. The driving method more specifically includes: a first input terminal of the amplifier and a second input of the device, transmitting a amplified signal through the drain signal across the synchronous rectifier; and sending the cross to the gate of the synchronous rectifier, the step of the step rectifier The pole signal to the bias current voltage is applied to the second 201238228 input terminal of the amplifier, and the second DC bias voltage is compared by the comparator and a comparison signal is outputted through a switch to form the synchronous rectifier. The present invention also proposes a smart drive for controlling the synchronous rectifier by amplifying the difference between the turns of the synchronous rectifier; the stepped rectifier's drain signal and the second straight. Wherein, the first device is turned on in the synchronous rectification step rectifier and turned off in the synchronous rectification synchronous rectifier; the second device turns off the synchronous rectifier tube when rising. The present invention also proposes a further flyback: when the drain signal of the synchronous rectifier is such that the drain signal is increased, the turn-off is reduced compared to the prior art, and can be used on the converter. a gate signal of the synchronous rectifier and a comparison signal; a gate of the synchronous rectifier to which the comparator outputs, and a control device including: a first device, a second device of the pole signal and the first DC bias voltage, A method for driving a rake signal of a synchronous rectifier, including a negative chirp, when the dipole signal of the synchronous rectifier is controlled to be relatively negative when the dipole signal of the synchronous rectifier is negatively increased. , turn on the synchronous rectifier; synchronous rectifier. The present invention will be described hereinafter with reference to the accompanying embodiments, but is limited to these embodiments, but instead is defined by the scope of the patent application. This picture is fully described. It is to be understood that the present invention is not intended to be limited by the scope of the present invention, which is intended to cover various alternatives, modifications and equivalents. In addition, in the following detailed description of the invention, the invention However, those skilled in the art will appreciate that the present invention may be practiced without these specific details. In other embodiments, well-known solutions, procedures, component devices, and circuits have not been described in detail in order to facilitate the disclosure. Referring to Figure 2, in circuit 100, a transconductance amplifier UQ is used to turn on the synchronous rectifier, and a comparator U is used to turn off the synchronous rectifier. As shown in FIG. 2, the circuit 100 includes a transconductance amplifier UQ whose in-phase terminal receives the first DC bias voltage V, and the inverting terminal receives the signal VD, wherein the signal VD is the drain signal of the synchronous rectifier Μ! The comparator U, the non-inverting terminal receives the drain signal Vd, and the inverting terminal receives the second DC bias voltage V2. The output of the transconductance amplifier U〇 is directly connected to the _ pole of the synchronous rectifier... The output of the comparator U i is connected to the gate of the synchronous rectifier M through an internal switch S. When the output of the comparator U is high, the gate voltage of the internal switch S, the conduction, and the synchronous rectifier 为 is low. When the comparator U, the output is low, the gate voltage of the internal switch s, turn-off, and synchronous rectifier Μ is determined by the output of the transconductance amplifier UQ. The diode Di is a parasitic diode of the synchronous rectifier %, and is used to clamp the drain signal VD voltage to a negative 在 during the turn-on of the body diode D, for example, -〇.7 V 〇 During operation, if the flyback converter operates under continuous conduction mode #' when the main transistor of the primary winding T〇 side of the flyback converter is turned off, the diode D is turned on immediately, making the bungee The signal Vd becomes negative, such as -9 - 201238228, -0.7V. Therefore, the output of the transconductance amplifier U〇, that is, the VG signal, will gradually increase. When the VG rises to the synchronous rectifier Μ, the synchronous rectifier Μ, the conduction, and the diode D! are turned off. When the main transistor on the TQ side of the primary winding of the transformer in the flyback converter is turned on, the induced voltage of the secondary winding T causes the drain signal VD to rapidly jump to a high level, so that the output signal of the transconductance amplifier UQ (also That is, the VG signal) is a low level. At this time, the 汲 of the drain signal VD is greater than the second DC bias voltage V2, the comparator Lh outputs a high level signal, turns on the internal switch S1, and pulls the % signal low, and the synchronous rectifier is quickly turned off, if the flyback converter When operating in the discontinuous conduction mode or quasi-resonant mode, when the main transistor on the primary winding TG side of the transformer in the flyback converter is turned off, the operation principle of the circuit 100 is consistent with the operation principle in the continuous conduction mode. However, when the main transistor on the To side of the primary winding of the transformer in the flyback converter is turned on, the drain signal VD does not jump rapidly but rises slowly until it is larger than the short-circuit conduction mode or the quasi-resonant mode. At the first DC bias voltage V, at this time, the transconductance amplifier U〇 will make the signal VG low, and the comparator U will no longer control the VG. In this case, the synchronous rectifier M will still be turned off. . By setting a dead zone to prevent the transconductance amplifier UQ and the comparator from interfering with each other, the dead zone is the voltage difference between the first DC bias voltage V and the second DC bias voltage V2. When the drain signal vD falls below the first DC bias voltage v 1 ', the transconductance amplifier u Q transmits the regulation V G such that the drain signal V D値 remains at the first DC bias voltage V . If the drain signal V D changes too fast, the transconductance amplifier U 0 cannot maintain the drain signal V D at the first DC bias voltage V, 汲
-10- 201238228 極信號v D將上升，並在某個時刻到達第二直流偏電壓v2。 在這種情況下，比較器U ,將導通內部開關S ,，迅速拉低VG ，進而關斷同步整流器Μ , ’從而不再有電流流過，防止了 同步整流器…被擊穿。 針對上面的發明技術，可能會有很多改進和變換例。 因此必須明白，在本發明之申請專利範圍內可以使用其他 具體方法來實施本發明的功能。當然，先前的描述只是本 發明的一個最佳實施例，在不背離其發明實質和申請專利 範圍的範疇，其他改進例同樣可以實現這樣的功能。 【圖式簡單說明】 附圖作爲說明書的一部分，對本發明實施例進行說明 ’並與實施例一起對本發明的原理進行解釋。 圖1所示爲一個返馳式變換器方塊圖。 圖2所示電路100是本發明的一個具體實施例，包括開 通一個同步整流器的跨導放大器和關斷一個同步整流器的 比較器。 【主要元件符號說明】 1 0 0 :電路 Μ 1 :问步整流 U,:比較器 U 〇 :跨導放大器 D !:二極體 -11- 201238228 s i :內部開關 To :初級繞組 τ,:次級繞組-10- 201238228 The pole signal v D will rise and reach the second DC bias voltage v2 at some point. In this case, the comparator U, which turns on the internal switch S, rapidly pulls down the VG, thereby turning off the synchronous rectifier Μ, so that no more current flows, preventing the synchronous rectifier from being broken down. Many improvements and variations are possible in light of the above inventive techniques. It is therefore to be understood that other specific methods can be used to implement the functions of the present invention within the scope of the invention. It is a matter of course that the foregoing description is only a preferred embodiment of the invention, and other modifications can be implemented in the same manner without departing from the scope of the invention and the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings illustrate the embodiments of the present invention Figure 1 shows a block diagram of a flyback converter. The circuit 100 of Figure 2 is a specific embodiment of the present invention comprising a transconductance amplifier that turns on a synchronous rectifier and a comparator that turns off a synchronous rectifier. [Main component symbol description] 1 0 0 : Circuit Μ 1 : Step rectification U,: Comparator U 〇: Transconductance amplifier D !: Diode-11- 201238228 si : Internal switch To : Primary winding τ,: Stage winding