201220074 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及一種基板管理控制器（baseboard management controller ， BMC) 恢復系統 ，尤其涉及一種應 用於終端設備的基板管理控制恢復系統及其使用方法。 【先前技術】 [0002] 基板管理控制器（BMC )被廣泛的應用於電腦等終端設備 中，其通過運行韌體（Firmware)檔以控制終端設備系 統的管理軟體和平臺管理硬體之間的介面，且可主動提 供包括終端設備系統得軟/硬體的系統狀態監視、事件日 誌記錄、自動警告及自動系統控制（如斷電）等功能。 例如，利用BMC可即時監視電腦系統中的異常電壓、溫度 和風扇速度，以判斷監視資料是否超過預設的範圍。 [0003] 由於BMC在終端設備中承擔重要的角色，設計者對BMC本 身的穩定性和可恢復性也提出了更高的要求。當BMC出現 工作異常時，需要通過更新、修改或調用BMC的韌體擋來 . ： ； 使BMC恢復工作。然而’習知i的的韌體檔更新方法大 都是基於作業系統實現的’對於不同的作業系統需要編 寫特定的BMC恢復程式。顯然該方法在實際應用中過於依 賴作業系統，靈活性較差’使得BMC的恢復過程較為複雜 【發明内容】 [0004] 鑒於以上内容，有必要提供一種便於BMC恢復的基板管理 控制器恢復系統。 [0005] 另，還有必要提供一種上述基板管理控制器恢復系統的 099137391 表單編號A0101 第4頁/共〗4頁 0992065186-0 201220074 使用方法。 [0006] Ο [0007] 一種基板管理控制器恢復系統，其通過調用韌體檔至基 板管理控制器，以使基板管理控制器恢復正常工作，該 基板管理控制器恢復系統包括BI0S單元、南橋及多工器 ，該BIOS單元通過南橋向基板管理控制器發送測試訊號 ，並通過南橋向多工器發送控制訊號，以使多工器選通 BIOS單元或基板管理控制器，當多工器選通基板管理控 制器時，BIOS單元讀取韌體檔並通過南橋和多工器將韌 體檔燒錄至基板管理控制器。 Ο [0008] 一種基板管理控制器恢復系碑的使用方基，其包括如下 步驟：BIOS單元向基板管理控制器發送測試命令；若發 送測試命令超過預定次數後基板管理控制器仍未回應， BIOS單元判定基板管理控制器工作異常，若基板管理控 制器回應，B10S單元繼續發送測試命令；b I 單元向雙 工器發送控制訊號’以通過雙工器使基板管理控制器和 南橋建立電性連接::；B10S單元將勃體稽燒錄至基板管理 控制器。 上述的基板管理控制器恢復系統通過在南橋和基板管理 控制器設置多工器’並使BIOS單元向多工器發送控制訊 號’以在基板管理控制器工作異常時，通過多工器選通 基板管理控制器’並燒錄韌體檔，進而使基板管理控制 器恢復正常工作。該基板管理控制器恢復系統無需編寫 特定的BMC恢復程式’對作業系統依賴少、使用方法靈活 ，且硬體結構簡單’便於基板管理控制器恢復正常工作 099137391 表單編號A0101 第5頁/共14頁 0992065186-0 201220074 [0009] [0010] [0011] [0012] 099137391 【實施方式】 請參考圖1 ’本發明的基板管理控制器恢復系統1〇〇應用 於電腦等終端設備中’該基板管理控制器恢復系統100包 括BMC10、南橋（South Bridge) 20、存儲模組30、 BIOS(Basic Input Output System)單元 40 及多工器 50 ( mult iplexer) 〇 該BMC10用於控制終端設備的管理軟體和平臺管理硬體之 間的介面，該BMC10包括依次電性連接的低引腳數（L〇w Pin Count ’ LPC)介面12、控制模組14及BMC快閃記憶 體16。該控制模組14通過南橋2〇與bios單元40電性連接 ，以實現相互通訊，進而便於Bi〇s單元4〇檢測該BMC10 是否異常。該BMC快閃記憶體16用以處理新燒錄的韌體檔 ’進而使工作異常的BMC10恢復正常工作。 該南橋20通過LPC匯流排電性連接至肫(：1〇的1^(：介面12 、光碟機或外接的 ... - ....... USB等存儲設備，其内部預先馈存獨从使復正常 工作的韌體檔。 :U:.......- 4BI0S單元40與南橋20電性連接，以通過南橋2〇向 MC10的控制模組14發送測試命令。在本實施例中約定 BIOS單元4〇與BMC10通訊所需時間為^，BMC1〇啟動所 需的時間為T2，BIOS單元40每間隔T1+T2時間即向控制 模且14發送測試命令。若向控制模組14發送測試命令超 過一預定的次數（例如連續三次以上），而控制模組14未 作應答，則判定BMC10工作異常，需要進行BMC1〇恢復操 作，此時BIOS單元40將向南橋2〇發送通用輸入/輸出（ 表單編號A0101 第6頁/共14頁 201220074 general purp〇se lnput 〇utput，Gpi〇)訊號。同 時，該BIGS單iuo與存儲模組3()電性連接，以讀取存儲 杈組30内的韌體擋，並通過南橋20和多工器50燒錄至 BMC10的BMC快閃記憶體16。該则3單元40包括議3快 閃記憶體42 ’該_5快閃記憶體42通過多工器5Q與南橋 20電性連接’以在南橋2Q和終端設備的中央處理器（圖 未示）的控制下啟動/重啟BI〇s系統。 [0013] Ο ο 多工器50包括輪入端52及輸出端54、56。該多工器5〇的 輸入端52通過串列外設介面（serial peripheral in_ terface，SPI)匯流排與南橋2〇電性速接，以通過南橋 20接收由BIOS單元40發送的gpI〇控料雜號。該輸出端54 、56用以在多工器50的控制下選通们⑽快閃記憶體42或 BMC快閃記憶體，具體地，當該多工器50接收到⑶⑺控 制訊號後’控制輸出端54與BIOS快閃記憶體42斷開電性 連接’同時控制輸出端56與BMC快閃記憶體16建立電性連 接，以將韌體標燒錄至BMC快閃記憶體16 ;當韌體檔完全 燒錄至BMC快閃記憶體16後，多工器50接收到另一GPl〇 控制訊號’以控制輸出端56與BMC快閃記憶體16斷開電性 連接，同時控制輸出端54與BIOS快閃記憶體42建立電性 連接，以重啟BIOS系統。 [0014] 下面結合圖2說明本發明的基板管理控制器恢復系統1〇〇 的使用方法，其包括如下步驟： 步驟S1:BI0S單元40啟動，多工器50的輸出端54與BIOS 快閃記憶體42建立電性連接； 099137391 表單编號A0101 第7頁/共14頁 0992065186-0 [0015] 201220074 [0016] [0017] [0018] [0019] [0020] [0021] [0022] [0023] 步驟S2:等待BMC的韌體檔正常啟動； 步驟S3:BI〇S單元40通過南橋2〇和LPC匯流排每間隔 T1+T2時間向bmc1〇的控制模組14發送測試命令； 步驟S4:BMC1〇的控制模組14收到測試命令，並作應答， 如果BIOS單元4〇向BMC10發送測試命令超過一預定次數（ 例如連續三次以上），而控制模組14均未回應，則判定 工作異常’並執行步驟S5 ;否則返回步驟S3 ; 步驟S5 :BI〇s單元40通過南橋2〇向多工器50發送GPI0訊 號’以控制多工器5 0的輸出端5 4與B I OS快閃記憶體4 2斷 開電性連接，同時控制輸出端56與BMC快閃記憶體16建立 電性連接； 步驟S6: BIOS單元40從存儲模組30中讀取可使BMC 10恢 復正常工作的韌體檔，並通過南橋20和多工器50將該韌 體檔燒錄至BMC快閃記憶體16内； ； ：.... ' 步驟S7:BI0S單元4〇再次向多工琴50煢送GPI0控制訊號 ’以使多工器50控制输出端5«與BMC快閃記憶體1 6斷開 電性連接，同時控制輸出端54與BI0S快閃記憶體42建立 電性連接； 步驟S8: BMC 10恢復並重新啟動作業系統，此時單元 40也重新啟動，並返回步驟S2以重新檢測BMC10。 可以理解’在BMC10進行恢復和重新啟動作業系統的過程 中，B10S單元40可以停止發送測試命令，以節省系統資 源。 099137391 表單煸號A0101 第8頁/共14頁 0992065186-0 201220074 [0024] 本發明的基板管理控制器恢復系統1 〇〇通過設置多工器50 ’並利用BIOS單元40向多工器50發送GPIO控制訊號，以 控制多工器50選通BMC快閃記憶體16，進而將韌體檔燒錄 至BMC快閃記憶體16内，以使BMC10恢復正常工作。該基 板管理控制器恢復系統1〇〇無需編寫特定的BMC恢復程式 ’對作業系統依賴性較小，硬體結構簡單，BMC 10的恢復 過程簡便。 [0025] 綜上所述，本發明符合發明專利要件，爰依法提出專利 Q 申請。惟’以上所述者僅為本發明之較佳實施方式，舉 凡熟悉本案技藝之人壬，於爰依本發明精神所作之等效 修飾或變化，皆應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 [0026] 圖1係本發明較佳實施方式的基板管理控制器恢復系統的 功能框圖； [0027] 圖2係圖1所示基板管理控制器進行恢復操知的方法流程 圖。 == .. 【主要元件符號說明】 I” [0028] 基板管理控制器恢復系統：1〇〇 [0029] 基板管理控制器：1〇 [0030] LPC介面：12 [0031] 控制模組：14 [0032] BMC快閃記憶體：16 [0033] 南橋：20 099137391 表單編號A0101 第9頁/共14頁 0992065186-0 201220074 [0034] 存儲模組：30 [0035] BIOS單元：40 [0036] BIOS快閃記憶體：42 [0037] 多工器：50 [0038] 輸入端：52 [0039] 輸出端：5 4、5 6 0992065186-0 099137391 表單編號A0101 第10頁/共14頁201220074 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to a baseboard management controller (BMC) recovery system, and more particularly to a substrate management control recovery system applied to a terminal device and use thereof method. [Prior Art] [0002] The Baseboard Management Controller (BMC) is widely used in terminal devices such as computers, which operate between firmware management software and platform management hardware by running firmware files. Interface, and can provide functions such as system status monitoring, event logging, automatic warning, and automatic system control (such as power failure) including soft/hardware of the terminal device system. For example, the BMC can instantly monitor abnormal voltages, temperatures, and fan speeds in a computer system to determine if the monitored data exceeds a preset range. [0003] Since the BMC plays an important role in the terminal device, the designer also puts forward higher requirements for the stability and recoverability of the BMC itself. When the BMC is working abnormally, you need to update, modify, or invoke the firmware of the BMC. : ; Restore the BMC. However, the conventional firmware update methods of the i are mostly based on the operating system. For a different operating system, a specific BMC recovery program needs to be written. Obviously, this method is too dependent on the operating system in practical applications, and the flexibility is poor, which makes the recovery process of the BMC more complicated. [Invention] [0004] In view of the above, it is necessary to provide a substrate management controller recovery system that facilitates BMC recovery. [0005] In addition, it is also necessary to provide a substrate management controller recovery system described above. 099137391 Form No. A0101 Page 4/Total 4 Page 0992065186-0 201220074 How to use. [0007] A substrate management controller recovery system that restores a normal operation of a substrate management controller by calling a firmware file to a substrate management controller including a BI0S unit, a south bridge, and a multiplexer, the BIOS unit sends a test signal to the baseboard management controller through the south bridge, and sends a control signal to the multiplexer through the south bridge, so that the multiplexer strobes the BIOS unit or the baseboard management controller, when the multiplexer strobes When the baseboard manages the controller, the BIOS unit reads the firmware file and burns the firmware file to the baseboard management controller through the south bridge and the multiplexer. [0008] A substrate management controller restores a user base of a tether, and the method includes the following steps: the BIOS unit sends a test command to the baseboard management controller; if the baseboard management controller does not respond after sending the test command for more than a predetermined number of times, the BIOS The unit determines that the baseboard management controller is working abnormally. If the baseboard management controller responds, the B10S unit continues to send the test command; the bI unit sends a control signal to the duplexer to establish an electrical connection between the baseboard management controller and the south bridge through the duplexer. ::; B10S unit will record Boss to the substrate management controller. The above-mentioned substrate management controller recovery system sings the substrate through the multiplexer by setting a multiplexer 'and causing the BIOS unit to send a control signal to the multiplexer' on the south bridge and the base management controller to operate abnormally when the substrate management controller operates abnormally. Manage the controller' and burn the firmware file to restore the baseboard management controller to normal operation. The baseboard management controller recovery system does not need to write a specific BMC recovery program. 'There is less dependence on the operating system, flexible use method, and simple hardware structure'. It is convenient for the baseboard management controller to resume normal operation. 099137391 Form No. A0101 Page 5 of 14 [9921] [0009] [0010] [0012] [0012] [0012] [Embodiment] Please refer to FIG. 1 'The substrate management controller recovery system 1 of the present invention is applied to a terminal device such as a computer.' The device recovery system 100 includes a BMC 10, a South Bridge 20, a storage module 30, a BIOS (Basic Input Output System) unit 40, and a multiplexer 50 (mult iplexer). The BMC 10 is used to control the management software and platform of the terminal device. The interface between the hardware is managed. The BMC 10 includes a low pin count (L〇w Pin Count ' LPC) interface 12, a control module 14 and a BMC flash memory 16 which are electrically connected in sequence. The control module 14 is electrically connected to the bios unit 40 through the south bridge 2 to realize mutual communication, thereby facilitating the Bi〇s unit 4 to detect whether the BMC 10 is abnormal. The BMC flash memory 16 is used to process the newly burned firmware file, thereby causing the abnormally working BMC10 to resume normal operation. The south bridge 20 is electrically connected to the 肫 (: 1 〇 1^ (: interface 12, optical disk drive or external... - USB storage device) through the LPC bus, and the internal storage is pre-fed The firmware file is used to make the normal working function. U:..- 4BI0S unit 40 is electrically connected to the south bridge 20 to send a test command to the control module 14 of the MC10 through the south bridge 2〇. In the embodiment, it is agreed that the time required for the BIOS unit 4 to communicate with the BMC 10 is ^, the time required for the BMC1 to start up is T2, and the BIOS unit 40 sends a test command to the control module and 14 every time interval T1 + T2. The group 14 sends the test command more than a predetermined number of times (for example, three times or more in succession), and the control module 14 does not respond, and determines that the BMC 10 is abnormal, and needs to perform a BMC1 recovery operation, at which time the BIOS unit 40 will send to the south bridge 2 General-purpose input/output (form number A0101, page 6/14, 201220074 general purp〇se lnput 〇put, Gpi〇) signal. At the same time, the BIGS single iuo is electrically connected to the storage module 3 () to read the storage. The firmware in the group 30 is blocked and burned to the BMC of the BMC10 through the south bridge 20 and the multiplexer 50. Memory 16. The 3 unit 40 includes a 3 flash memory 42 'The _5 flash memory 42 is electrically connected to the south bridge 20 through the multiplexer 5Q' to the central processor at the south bridge 2Q and the terminal device ( The BI〇s system is activated/restarted under the control of the figure. [0013] The multiplexer 50 includes a wheeled end 52 and an output end 54, 56. The input end 52 of the multiplexer 5〇 passes through the series A serial peripheral in_terface (SPI) bus is connected to the south bridge to receive the gpI control code transmitted by the BIOS unit 40 through the south bridge 20. The output terminals 54 and 56 are used for multiplexing. Under the control of the device 50, the flash memory 42 or the BMC flash memory is strobed. Specifically, when the multiplexer 50 receives the (3) (7) control signal, the control output 54 is disconnected from the BIOS flash memory 42. Electrical connection 'at the same time, the control output 56 establishes an electrical connection with the BMC flash memory 16 to burn the firmware to the BMC flash memory 16; when the firmware file is completely burned to the BMC flash memory 16 After that, the multiplexer 50 receives another GP1 control signal to control the output 56 to disconnect from the BMC flash memory 16 The connection is made while the control output 54 establishes an electrical connection with the BIOS flash memory 42 to restart the BIOS system. [0014] A method of using the substrate management controller recovery system 1 of the present invention will be described below with reference to FIG. The following steps are performed: Step S1: The BI0S unit 40 is started, and the output 54 of the multiplexer 50 is electrically connected to the BIOS flash memory 42; 099137391 Form No. A0101 Page 7 of 14 0992065186-0 [0015] 201220074 [0019] [0020] [0023] Step S2: Waiting for the firmware of the BMC to start normally; Step S3: The BI〇S unit 40 passes the South Bridge 2 and the LPC The bus bar sends a test command to the control module 14 of the bmc1〇 every time interval T1+T2; Step S4: The control module 14 of the BMC1〇 receives the test command and responds, if the BIOS unit 4 sends a test command to the BMC10. a predetermined number of times (for example, three consecutive times or more), and the control module 14 does not respond, then determines that the operation is abnormal ' and performs step S5; otherwise, returns to step S3; step S5: the BI〇s unit 40 passes the south bridge 2 to the multiplexer 50 send GPI0 signal 'to control the multiplexer 5 0 lose The output terminal 5 4 is electrically disconnected from the BI OS flash memory 4 2, and the control output 56 is electrically connected to the BMC flash memory 16; Step S6: The BIOS unit 40 reads from the storage module 30. The BMC 10 can be restored to the normal working firmware file, and the firmware file is burned into the BMC flash memory 16 through the south bridge 20 and the multiplexer 50; ; :.... 'Step S7: BI0S unit 4 〇After sending the GPI0 control signal 'to the multiplexer 50' again, the multiplexer 50 control output terminal 5« is electrically disconnected from the BMC flash memory 16 while controlling the output terminal 54 and the BI0S flash memory 42. Establishing an electrical connection; Step S8: The BMC 10 resumes and restarts the operating system, at which time the unit 40 is also restarted, and returns to step S2 to re-detect the BMC 10. It will be appreciated that during the BMC 10's recovery and restart of the operating system, the B10S unit 40 may stop transmitting test commands to save system resources. 099137391 Form nickname A0101 Page 8 of 14 0992065186-0 201220074 [0024] The substrate management controller recovery system 1 of the present invention transmits GPIO to the multiplexer 50 by setting the multiplexer 50' and using the BIOS unit 40. The control signal is controlled to multiplex the multiplexer 50 to strobe the BMC flash memory 16, and then the firmware file is burned into the BMC flash memory 16 to restore the BMC10 to normal operation. The board management controller recovery system does not need to write a specific BMC recovery program. The dependency on the operating system is small, the hardware structure is simple, and the recovery process of the BMC 10 is simple. [0025] In summary, the present invention complies with the requirements of the invention patent, and submits a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by the present invention in the spirit of the present invention are intended to be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0026] FIG. 1 is a functional block diagram of a substrate management controller recovery system according to a preferred embodiment of the present invention; [0027] FIG. 2 is a method for performing recovery operation of the substrate management controller shown in FIG. flow chart. == .. [Main component symbol description] I" [0028] Substrate management controller recovery system: 1〇〇[0029] Substrate management controller: 1〇[0030] LPC interface: 12 [0031] Control module: 14 [0032] BMC Flash Memory: 16 [0033] South Bridge: 20 099137391 Form No. A0101 Page 9 / Total 14 Page 0992065186-0 201220074 [0034] Memory Module: 30 [0035] BIOS Unit: 40 [0036] BIOS Flash memory: 42 [0037] Multiplexer: 50 [0038] Input: 52 [0039] Output: 5 4, 5 6 0992065186-0 099137391 Form No. A0101 Page 10 of 14