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TW201212753A - Copper foil for printed circuit board with excellent etching property and laminate using the same - Google Patents

Copper foil for printed circuit board with excellent etching property and laminate using the same Download PDF

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Publication number
TW201212753A
TW201212753A TW100110725A TW100110725A TW201212753A TW 201212753 A TW201212753 A TW 201212753A TW 100110725 A TW100110725 A TW 100110725A TW 100110725 A TW100110725 A TW 100110725A TW 201212753 A TW201212753 A TW 201212753A
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Taiwan
Prior art keywords
copper
atomic concentration
copper foil
depth direction
printed wiring
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TW100110725A
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Chinese (zh)
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TWI397359B (en
Inventor
Hideki Furusawa
Misato Chuganji
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Jx Nippon Mining & Amp Metals
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Publication of TW201212753A publication Critical patent/TW201212753A/en
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C30/00Coating with metallic material characterised only by the composition of the metallic material, i.e. not characterised by the coating process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

The present invention provides a copper foil for printed circuit board with excellent etching property when forming circuit pattern and suitable for fine pitches, and having magnetic property well surpressed, and a laminate body using the same. The copper foil for printed circuit board comprises: a copper foil substrate; and a covering layer, wherein the covering layer covers at least a portion of the surface of copper foil substrate and contains one or more of either platinum, palladium and gold. If the atomic concentrations (%) of gold, platinum and/or palladium in depth direction (x: unit nm) obtained by analyzing from the surface to the depth direction using XPS are set as f(x), the atomic concentration (%) of copper is set as g(x), the atomic concentration (%) of oxygen is set as h(x), the atomic concentration (%) of carbon is set as i(x), and the sum of atomic concentrations (%) of other metal is set as j(x), they will satisfy ∫ f(x)dx/(∫ f(x)dx+∫ g(x)dx+∫ h(x)dx+∫ i(x)dx+∫ j(x)dx)≤ 0.9 in pitch [0, 1.0], and ∫ f(x)dx/(∫ f(x)dx+∫ g(x)dx+∫ h(x)dx+∫ i(x)dx+∫ j(x)dx)≤ 0.6 in a zone [1.0, 4.0].

Description

201212753 六、發明說明: 【發明所屬之技術領域】 本發明係有關於一種印刷配線板用銅箔及使用其之積 層體,尤其有關於一種可撓性印刷配線板用銅箔及使用其 之積層體。 【先前技術】 印刷配線板歷於這半個世紀來發展快速,如今幾乎所 有電子設備中均有使用。隨著近年來對電子設備之小型 化、高性能化之需求增大,搭載零件之高密度構裝化及訊 號之高頻化不斷進展’對印刷配線板要求導體圖案之微細 化(細間距化(fine pitch))或高頻對應等。 印刷配線板通常係經下述步驟來製造 著於銅而製成積層體之後藉由姓刻於銅箔面形成導體 圖案。因此,要求印刷配線板用銅箔具有良好的蝕刻性。 若不對銅羯之與樹脂不接著之面實施表面處理,則蝕 刻後之銅箔電路的銅部分自銅箔表面朝下,亦即朝向樹脂 層逐漸擴展地姓刻(產生壓陷)。通常會成為電路側之面 的角度較小的「壓陷」,尤其當產生較大的「壓陷」時, 亦有於樹脂基板附近發生銅電路短路而成為不良品之情 形。此處’第5圖係表示於形成銅電路時產生「壓陷」而 在樹脂基板附近發生銅電路短路之—例的f路表面放大昭 片。 ’、、、 | 一勺丨防止這種逐; 擴展之蝕刻不良,亦考慮有延長蝕 负蝕刻時間,進行更多蝕刻 201212753 以減少該「壓陷」。但是,此時將存在下述問題:當存在 已達特定寬度尺寸之部位時,則該部位將會被進一步蝕 刻’故其銅@部分的電路寬度會因而變窄,電路設計上無 法獲得所要之均一的線寬度(電路寬度),尤其是該部分 (破細線化之部分)會發熱,有時會發生斷線。於進一步 推展電子電路之精細圖案化之過程中,目前因此㈣刻不 良而引起之問題更嚴重,於電路形成上成為較大問題。 在專利文獻1中揭示有改善上述問題之方法,係於蝕 刻面側之銅馆形成蝕刻速度比銅慢的金屬或合金層之表面 處理。此時之金屬或合金係Ni、c〇及其等之合金。於設計 電路時,由於蚀刻液係自抗儀劑塗佈側,亦即自銅箔表面 開始浸透,因此,若於抗蝕劑正下方具有蝕刻速度較慢的 金屬或合金層,則可以抑制該金屬或合金層附近的銅箔部 分之蝕刻,而其他銅箔部分之蝕刻仍進行,因此能得到「壓 陷」減少且可形成寬度更為均一之電路之效果,與先前技 術相比較可以形成較為陡λ肖之電路,可謂之具有較大進步。 又’於專利文獻2中’形成厚度為1〇〇〇〜1〇〇〇〇人之 Cu薄膜,並於該Cu薄膜上形成厚度為1〇〜3〇〇人之蝕刻速 度比鋼慢之Ni薄膜。 專利文獻1 .日本特開2002— 176242號公報 專利文獻2 :日本特開2000 — 2696 1 9號公報 【發明内容】 近年來’進一步發展電路之微細化及高密度化,需要 具有側面傾斜更為陡峭之電路。然而,專利文獻丨所記載 201212753 之技術並不能滿足該等要求。 又,專利文獻1所揭示之表面處理層,須藉由軟蚀刻 來除去,it而與樹脂之非接著面之表面處理銅羯在加工成 積層體之步驟中’須實施樹脂黏貼等高溫處理。這將引起 表面處理層氧化,結果導致銅箔蝕刻性劣化。 關於前者,為了縮短除去钮刻之時間,並較為乾淨地 除去,必須極力使表面處理層的厚度較薄,並且於後者之 情形下’因具有下述_,故須加以改良或替換為其他材 料,該問題係:基底的銅層因受熱而被氧化(由於會變色, 因此通稱為「燒痕」)’且抗钮劑的塗佈性(均句性 '密 口丨生)不良或於蝕刻時界面氧化物過度蝕刻等導致發生圖 案蝕刻的蝕刻性、短路及電路圖案寬度之控制性等不良乂 問題。 ^進而,專利文獻1和專利文獻2所揭示之表面處理層 係使用Ni或Co來形成’然而這將帶來Ni ^戈c〇會因其磁 性而對電子設備造成不良影響之擔憂。 因此,本發明的課題在於提供一種於形成電路圖案時 蝕刻性良好且適於細間距化、並且磁性被良好地抑制之印 刷配線板用銅箔及使用其之積層體。 本發明人等經潛心研究,結果發現在將包含鉑、鈀及 金之任一種以上之被覆層,以特定之原子濃度設置於銅箔 之與樹脂不接著之面側之情形下,可形成電路側之面的傾 斜角為80。以上之電路。藉此能夠形成可充分對應近年來之 電路微細化及高密度化之電路。 201212753 在基於以上見解而完成之本發明於一個態樣中,係提 供一種印刷配線板用銅荡’其銅箔基材以及被覆層,該被 覆層被覆銅箔基材表面的至少一部分,且包含鉑、紐及金 之任一種以上,並且,若將藉由XPS自表面往深度方向分 析所得之深度方向(X :單位nm )的金、鉑及/或鈀的原子 濃度(%)設為f(X),將銅的原子濃度設為g(x),將氧的原 子濃度(%)設為h(x) ’將碳的原子濃度(%)設為i(x),將其他 金屬的原子濃度總和設為j(x),則於區間[0,丨0]中,滿足 Jf(x)dx/(Jf(x)dx + ig(x)dx + ih(x)dx + Ji(x)dx + 。(?〇(1)〇$0.9,於區間[1.0,4.0]中,滿足^(?〇仏/(^()〇(1)( +[Technical Field] The present invention relates to a copper foil for a printed wiring board and a laminated body using the same, and more particularly to a copper foil for a flexible printed wiring board and a laminate using the same body. [Prior Art] Printed wiring boards have developed rapidly over the past half century and are now used in almost all electronic devices. In recent years, the demand for miniaturization and high performance of electronic devices has increased, and high-density mounting of mounted components and high-frequency signals have progressed. 'There is a need for miniaturization of conductor patterns on printed wiring boards (fine pitching) (fine pitch)) or high frequency correspondence. The printed wiring board is usually formed by laminating a copper to form a laminated body, and then forming a conductor pattern by a surname on the copper foil surface. Therefore, copper foil for printed wiring boards is required to have good etching properties. If the surface of the copper enamel and the resin are not surface-treated, the copper portion of the etched copper foil circuit faces downward from the surface of the copper foil, i.e., gradually spreads toward the resin layer (indentation occurs). In general, "indentation" which is a small angle on the surface of the circuit side is caused, and in particular, when a large "indentation" occurs, a copper circuit is short-circuited in the vicinity of the resin substrate, which is a defective product. Here, Fig. 5 shows an enlarged surface of the f-path surface in which a "clamping" occurs when a copper circuit is formed and a copper circuit is short-circuited in the vicinity of the resin substrate. ‘,,, | A spoonful of 丨 这种 ; ; ; ; ; ; 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展 扩展However, at this time, there will be a problem that when there is a portion having a certain width dimension, the portion will be further etched, so that the circuit width of the copper@ portion is thus narrowed, and the circuit design cannot obtain the desired one. A uniform line width (circuit width), especially in this part (the thinned portion), generates heat and sometimes breaks. In the process of further promoting the fine patterning of electronic circuits, the problems caused by the (4) defects are more serious, and it becomes a big problem in circuit formation. Patent Document 1 discloses a method for improving the above problem by forming a surface treatment of a metal or alloy layer having a slower etching rate than copper in a copper gallery on the etching surface side. The metal or alloy at this time is an alloy of Ni, c〇, and the like. When the circuit is designed, since the etching liquid is applied to the coating side of the self-resistance agent, that is, from the surface of the copper foil, if the metal or alloy layer having a slow etching rate is directly under the resist, the etching can be suppressed. The etching of the copper foil portion near the metal or alloy layer is performed, and the etching of the other copper foil portions is still performed, so that the effect of reducing the "indentation" and forming a circuit having a more uniform width can be obtained, which can be formed in comparison with the prior art. The steep λ Xiao circuit can be said to have made great progress. Further, in Patent Document 2, a Cu film having a thickness of 1 Å to 1 Å is formed, and a thickness of 1 〇 3 to 3 is formed on the Cu film. The etching rate is slower than that of steel. film. [Patent Document 1] Japanese Laid-Open Patent Publication No. 2000-176242 (Patent Document 2) Japanese Laid-Open Patent Publication No. 2000-2696 No. 9 (Invention) In recent years, in order to further develop the miniaturization and high density of circuits, it is necessary to have a side tilt. Steep circuit. However, the technique of 201212753 described in the patent document does not satisfy these requirements. Further, the surface treatment layer disclosed in Patent Document 1 is required to be removed by soft etching, and the surface-treated copper crucible having a non-adhesive surface of the resin is subjected to high-temperature treatment such as resin adhesion in the step of processing into a laminate. This causes oxidation of the surface treatment layer, resulting in deterioration of the etching property of the copper foil. In the former case, in order to shorten the time for removing the button and remove it relatively cleanly, it is necessary to make the thickness of the surface treatment layer as thin as possible, and in the latter case, 'because of the following _, it is necessary to improve or replace it with other materials. This problem is caused by the fact that the copper layer of the substrate is oxidized by heat (generally referred to as "burn marks" due to discoloration) and the coating property of the resisting agent is uniform or etched. When the interface oxide is excessively etched or the like, problems such as etching of pattern etching, short-circuiting, and controllability of the width of the circuit pattern occur. Further, the surface treatment layers disclosed in Patent Document 1 and Patent Document 2 are formed using Ni or Co. However, this causes a concern that Ni^Gec〇 may adversely affect electronic equipment due to its magnetic properties. In view of the above, it is an object of the present invention to provide a copper foil for a printed wiring board which is excellent in etchability and which is suitable for fine pitch and which is excellent in magnetic properties when a circuit pattern is formed, and a laminated body using the same. As a result of intensive studies, the present inventors have found that a coating layer containing at least one of platinum, palladium, and gold can be formed in a circuit in a specific atomic concentration on the side of the copper foil which is not adjacent to the resin. The side angle of the side is 80. The above circuit. This makes it possible to form a circuit that can sufficiently match the recent miniaturization and high density of circuits. 201212753 In one aspect of the invention based on the above findings, there is provided a copper foil substrate for a printed wiring board and a coating layer thereof, the coating layer covering at least a portion of the surface of the copper foil substrate, and comprising Any one or more of platinum, neon, and gold, and the atomic concentration (%) of gold, platinum, and/or palladium in the depth direction (X: unit nm) obtained by XPS analysis from the surface to the depth direction is f. (X), the atomic concentration of copper is g(x), and the atomic concentration (%) of oxygen is h(x) 'The atomic concentration (%) of carbon is i(x), and other metals are used. If the sum of atomic concentrations is set to j(x), then Jf(x)dx/(Jf(x)dx + ig(x)dx + ih(x)dx + Ji(x) is satisfied in the interval [0, 丨0] )dx + . (?〇(1)〇$0.9, in the interval [1.0,4.0], satisfy ^(?〇仏/(^()〇(1)( +

Jg(x)dx+ Jh(x)dx+ Ji(x)dx+ Jj(x)dx)g〇_6。 於本發明的印刷配線板用銅箔的一實施方式中,具備 銅箔基材以及被覆層,該被覆層被覆上述銅箔基材表面的 至少一部分,且包含鉑、鈀及金之任丨種以上,並且,若 將藉由XPS自表面往深度方向分析所得之深度方向(χ :單 位nm )的金 '鉑及/或鈀的原子濃度(%)設為f(x),將銅的 原子濃度(%)設為g(x),將氧的原子濃度(%)設為h(x),將碳 的原子濃度(%) S免為1(χ) ’將其他金屬的原子濃度總和設為 J⑻,則於區間[0,1.0]中,滿足 0 03 ^f(x)dx/(if(x)dx +Jg(x)dx+ Jh(x)dx+ Ji(x)dx+ Jj(x)dx)g〇_6. In one embodiment of the copper foil for a printed wiring board according to the present invention, the copper foil base material and the coating layer are coated, and the coating layer covers at least a part of the surface of the copper foil base material and contains platinum, palladium, and gold. In the above, if the atomic concentration (%) of gold 'platinum and/or palladium in the depth direction (χ: unit nm) obtained by XPS analysis from the surface in the depth direction is f(x), the atom of copper is used. The concentration (%) is set to g(x), the atomic concentration (%) of oxygen is set to h(x), and the atomic concentration (%) of carbon is exempted from 1 (χ) 'The atomic concentration of other metals is set. For J(8), in the interval [0,1.0], it satisfies 0 03 ^f(x)dx/(if(x)dx +

Jg(x)dx+ ih(x)dx+ Ji(x)dx+ ij(x)dx)g〇 9,於區間 〇 4 〇] 中,滿足 0.01gJf(x)dx/(Jf(x)dx+Jg(x)dx+fh(x)dx+ii(x)dx + ij(x)dx) $ 0.6。 於本發明的印刷配線板用銅箔的另一實施方式中,於 進行相當於聚醯亞胺硬化之熱處理時,若將藉由xps自表 6 201212753 面往深度方向分析所得之深度方向(X:單位nm)的金、錄 及鈀的原子濃度(%)設為f(x) ’將銅的原子濃度(%)設為 g(X)將氧的原子濃度(%)設為h(x),將碳的原子濃度(%) 設為Kx),將其他金屬的原子濃度總和設為j(x),則於區間 + ij(x)dx)客 〇.3,於區間 π 〇,4〇]中,滿足 if(x)dx/(if(x)dx + J"g(x)dx+ _fh(x)dx+ Ji(x)dx+ Jj(x)dx)g 0.3。 於本發明的印刷配線板用銅箔的又一實施方式中,於 進行相^於聚醯亞胺硬化之熱處理時,若將藉由χρ8自表 面往深度方向分析所得之深度方向(X :單位nm )的金、鉑 及鈀的原子濃度(%)設為f(x),將銅的原子濃度(%)設為 g(x),將氧的原子濃度(%)設為h(x),將碳的原子濃度(%) 設為ι(χ),將其他金屬的原子濃度總和設為j(x),則於區間 [0,1.0]中,滿足 〇.〇lsJf(x)dx/(Jf(x)dx+Jg(x)dx+jh(x)dx + ii(x)dx + Jj(x)dx)s〇 3 ,於區間 ^ 〇 4 〇]中滿足 0.01 ^if(x)dx/(ff(x)dx + ig(x)dx + Jh(x)dx + Ji(x)dx + ij(x)dx)$〇.3。 於本發明的印刷配線板用銅箔的又一實施方式中,進 行了相當於聚醯亞胺硬化之熱處理,若將藉由xps自表面 在冰度方向分析所付之深度方向(x :單位nrn )的金、銘及 鈀的原子濃度(%)設為f(x),將銅的原子濃度(%)設為g(x), 將氧的原子濃度(%)設為h(x),將碳的原子濃度(%)設為 i ( X ) ’將其他金屬的原子濃度總和設為j ( X ),則於區間[〇 1 〇 ] 中,滿足 Jf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + ii(x)dX + 201212753 ij(x)dx)$0.3,於區間[1.0,4_0]中,滿足Jf(x)dx/(Jf(x)dx +Jg(x)dx+ ih(x)dx+ Ji(x)dx+ ij(x)dx)g〇9, in the interval 〇4 〇], satisfy 0.01gJf(x)dx/(Jf(x)dx+Jg( x)dx+fh(x)dx+ii(x)dx + ij(x)dx) $ 0.6. In another embodiment of the copper foil for a printed wiring board according to the present invention, when the heat treatment corresponding to the hardening of the polyimide is performed, the depth direction obtained by analyzing the depth from the surface of the surface of the surface of the surface of the surface of the surface of : atomic concentration (%) of gold, recording, and palladium in unit nm) is f(x) 'The atomic concentration (%) of copper is set to g(X), and the atomic concentration (%) of oxygen is set to h (x). ), the atomic concentration (%) of carbon is set to Kx), and the sum of atomic concentrations of other metals is set to j(x), then the interval + ij(x)dx) is 〇.3, in the interval π 〇, 4 In 〇], if(x)dx/(if(x)dx + J"g(x)dx+ _fh(x)dx+ Ji(x)dx+ Jj(x)dx)g 0.3 is satisfied. In still another embodiment of the copper foil for a printed wiring board according to the present invention, in the heat treatment for hardening the polyimide, if the depth direction is analyzed by the χρ8 from the surface to the depth direction (X: unit) The atomic concentration (%) of gold, platinum, and palladium in nm is f(x), the atomic concentration (%) of copper is g(x), and the atomic concentration (%) of oxygen is h(x). When the atomic concentration (%) of carbon is set to ι (χ) and the sum of the atomic concentrations of other metals is set to j(x), then in the interval [0, 1.0], 〇.〇lsJf(x)dx/ is satisfied. (Jf(x)dx+Jg(x)dx+jh(x)dx + ii(x)dx + Jj(x)dx)s〇3 , satisfying 0.01 ^if(x) in the interval ^ 〇4 〇] Dx/(ff(x)dx + ig(x)dx + Jh(x)dx + Ji(x)dx + ij(x)dx)$〇.3. In still another embodiment of the copper foil for a printed wiring board according to the present invention, a heat treatment corresponding to the hardening of the polyimide is performed, and the depth direction (x: unit) to be analyzed by the xps from the surface in the ice direction is performed. The atomic concentration (%) of gold, mum and palladium of nrn) is f(x), the atomic concentration (%) of copper is g(x), and the atomic concentration (%) of oxygen is h(x). , by setting the atomic concentration (%) of carbon to i ( X ) ' to set the sum of the atomic concentrations of other metals to j ( X ), then in the interval [〇1 〇], Jf(x)dx/(Jf( x)dx + Jg(x)dx + Jh(x)dx + ii(x)dX + 201212753 ij(x)dx)$0.3, in the interval [1.0,4_0], satisfy Jf(x)dx/(Jf( x)dx +

Jg(x)dx+ Jh(x)dx+ Ji(x)dx+ Jj(x)dx)$〇.3。 於本發明的印刷配線板用銅猪的又一實施方式中,進 行了相當於聚醯亞胺硬化之熱處理(氮環境、35〇t、加熱 2小時)’右將藉由XPS自表面往深度方向分析所得之深 度方向(X:單位nm)的金、鉑及鈀的原子濃度(%)設為, 將銅的原子濃度(%)設為g(x),將氧的原子濃度(%)為h(x), 將碳的原子濃度(%)設為i(X),將其他金屬的原子濃度總和 設為 j(x)’ 則於區間[0,1.0]中,滿足 0.01$Jf(x)dx/(if⑻dx + Jg(x)dx + Jh(x)dx 十 Ji(x)dx + Jj(x)dx)g〇.3,於區間[i 〇 4 〇] 中,滿足 0.01 各 + Jj(x)dx) $ 0·3。 於本發明的印刷配線板用銅箔的又一實施方式中,被 覆層中的麵附著量為105(^g/dm2以下,鈀附著量為 600pg/dm2以下’金附著量為1〇〇(^g/dm2以下。 於本發明的印刷配線板用銅箔的又一實施方式中,被 覆層中的鉑附著量為2〇〜4〇(^g/dm2,鈀附著量為Μ〜 250gg/dm2,金附著量為 2〇〜4〇〇Jig/dm2。 於本發明的印刷配線板用銅箔的又一實施方式中,印 刷配線板係可撓性印刷配線板 於本發明的又一方面,提供一種電子電路之形成方 法,包括下述步驟:準備由本發明銅箔所構成之壓延銅箔 或電解銅箔之步驟;以銅箔的被覆層為蝕刻面,製作銅箔 與樹脂基板之積層體之步驟;利用氣化鐵水溶液或氣化銅 8 201212753 X/合液對積層體進行姓刻’除去不需要銅的部分而形成銅 電路之步驟。 於本發明的又-方面,提供一種積層體,係本發明的 銅箔與樹脂基板之積層體。 於本發明的又一方面,提供一種積層體,係銅層與樹 脂基板之積層體,其具備被覆銅層表面至少一部分之本發 明的被覆層。 於本發明積層體的-實施方式中,樹脂基板係聚酿亞 胺基板。 於本發明的又一丨面,提供一種印刷配線板,係以本 發明積層體作為材料。 根據本發明,可以接供__接+ 丄、 」权供種在形成電路圖案時蝕刻性 良好且適於細間距化、並且磁性 啦氏极艮好地抑制之印刷配線 板用銅箱及使用其之積層體。 【實施方式】 (銅箱基材) 可用於本發明之銅落基材的形態並無特別限制,典型 而言可以壓延㈣或電解銅箱之型態來使用。㉟常,電解 銅猪係將銅自硫酸銅锻浴電解析出至欽或不鐵鋼的滾筒 (drum)上銅而製造,壓延銅落係 。 ,,,^ 仗迟仃利用壓延輥之塑性 加工和熱處理來製造。多將壓延銅箱 』,自用於要求彎曲性之用 印刷配線板導體圖案 例如亦·可使用:摻雜 銅箔基材的材料,除了通常用作 之動煉銅、無氧銅等高純度銅以外, 201212753Jg(x)dx+ Jh(x)dx+ Ji(x)dx+ Jj(x)dx)$〇.3. In still another embodiment of the copper pig for a printed wiring board according to the present invention, heat treatment (nitrogen environment, 35 〇t, heating for 2 hours) corresponding to polyimine hardening is performed, and right will be applied from the surface to the depth by XPS. The atomic concentration (%) of gold, platinum, and palladium in the depth direction (X: unit nm) obtained by the direction analysis is such that the atomic concentration (%) of copper is g(x), and the atomic concentration (%) of oxygen is obtained. For h(x), the atomic concentration (%) of carbon is set to i(X), and the sum of the atomic concentrations of other metals is set to j(x)'. In the interval [0, 1.0], 0.01$Jf is satisfied. x)dx/(if(8)dx + Jg(x)dx + Jh(x)dx Ten Ji(x)dx + Jj(x)dx)g〇.3, in the interval [i 〇4 〇], satisfy 0.01 each + Jj(x)dx) $0·3. In still another embodiment of the copper foil for a printed wiring board according to the present invention, the amount of surface adhesion in the coating layer is 105 (cm/dm 2 or less, and the amount of palladium adhered to 600 pg/dm 2 or less is less than 1 金) In another embodiment of the copper foil for a printed wiring board according to the present invention, the platinum adhesion amount in the coating layer is 2 〇 to 4 〇 (^g/dm 2 , and the palladium adhesion amount is Μ 〜 250 gg / In another embodiment of the copper foil for a printed wiring board according to the present invention, the printed wiring board is a flexible printed wiring board in still another aspect of the present invention. Provided is a method for forming an electronic circuit comprising the steps of: preparing a rolled copper foil or an electrolytic copper foil composed of the copper foil of the present invention; and forming a laminate of a copper foil and a resin substrate by using a coating layer of the copper foil as an etched surface Step of forming a copper circuit by using a vaporized iron aqueous solution or vaporized copper 8 201212753 X/liquid mixture to form a copper circuit by removing the portion that does not require copper. In addition, in another aspect of the present invention, a laminate is provided. The body is a laminate of the copper foil and the resin substrate of the present invention. According to still another aspect of the present invention, there is provided a laminate comprising a laminate of a copper layer and a resin substrate, comprising a coating layer of the present invention comprising at least a part of a surface of the copper layer. In the embodiment of the laminate of the present invention, the resin substrate The present invention provides a printed wiring board which is made of the laminated body of the present invention. According to the present invention, the __接+丄, ” A copper case for a printed wiring board and a laminated body using the same, which is excellent in etchability and suitable for fine pitch, and which is excellent in magnetic properties. [Embodiment] (Copper case substrate) can be used in the present invention. The form of the copper drop substrate is not particularly limited, and can be generally used by calendering (four) or electrolytic copper box type. 35 often, electrolytic copper pig system analyzes copper from copper sulfate forging bath to Qin or not iron. The steel drum is made of copper and rolled, and the copper is rolled. The steel is manufactured by the plastic working and heat treatment of the calender roll. The rolled copper box is used for the printed wiring requiring bending. Plate conductor · Also be used, for example, the case of: doping the substrate material is copper, in addition to copper is generally used as the actuator, other than the oxygen-free high-purity copper, 201,212,753

Sn之銅、摻雜Ag之銅以及如添加有&、以〆 合金、添加有Ni和Si等之卡逊备或Mg等之銅 寻之卡遜系鋼合金之類的鋼 外’於本說明書中’當單獨使用術語「㈣ 另 銅合金箔。 」夺,亦包含 可用於本發明之銅箱基材的厚度亦並無特別限制, 要適度調郎為適合用於印刷配線板 ,^ Γ 双又厚度即可。例如,可 以為5〜⑽叫左右4中,於以形成精細圖案為目的之情 =下為3—以下,較佳為2〇μιη以下,典型為5〜2_左 用於本發明之銅羯基材並無特別限制,例如,亦可使 用未經粗化處理之銅落基材。先前,為如下情況:利 用特殊鍍敷於表面附上“ m、級之凹凸,而實施表面粗化處 =,藉由物理性的定準效應使銅落基材具有與樹脂間之接 著性’然@ ’另一方面,就細節距或高頻電氣特性而言, 平滑之落較好,而粗化箱.會朝不利方向起發展。又,若為 未’、’坐粗化處理之銅箔基材,則由於粗化處理步驟被省略而 具有提高經濟性和生產性之效果。 (1)被覆層的構成 於鋼箱基材之與絕緣基板接著之面的相反側(預定形 成電路之面側)的表面至少—部分上,形成有被覆層。被 覆層包含翻、纪及金之任1種以上。 再者’於鋼箔基材之與絕緣基板接著之面側,亦可形 成例如由自銅箔基材表面依次積層之中間層及表層所構成 之其他被覆層以提高銅箔基材與絕緣基板之接著性。此 10 201212753 、Ti、Zn、Co、V、 1中間層亦可由金屬 ' Zn、Co、Nb 及 Ta ’較佳為由例如N i、 2種之合金所構成。 時’車父佳為中間層係包含例如Ni、Mo, Sn ' Μη ' Nb、Ta及Cr之至少任1種。 單體構成’較佳為由例如Ni、Mo、Ti、 之任1種構成。中間層亦可由合金構成, Zn、V、Sn、Mn、Cr及Cu之至少任意: (2) 被覆層的雲定 被覆層的馨定可利用XPS或AES等表面分析裝置,自 表層開始進行氩濺鍍,進行深度方向之化學分析,根據各 檢測峰值之存在來進行鑒定。 (3) 被覆層表面的原子濃度 若被覆層的貴金屬原子濃度過高,則初期蝕刻性會變 差,難以獲得本發明之良好的蝕刻性。因此,本發明之被 覆層若將藉由XPS自表面往深度方向分析所得之深度方向 (X ··單位nm )的金、鉑及/或鈀的原子濃度(%)設為f(x), 將銅的原子濃度(%)設為g(x),將氧的原子濃度(%)設為 h(x) ’將碳的原子濃度(%)設為i(x),將其他金屬的原子濃 度總和設為j(X),則於區間[0,1.0]中,滿足丨f(x)dx + Jg(x)dx+ Jh(x)dx+ _fi(x)dx+ [j(x)dx)S0.9,於區間[1·0,4.0] 中,滿足 Jf(x)dx/(Jf(x)dx+_fg(x)dx+Jh(x)dx+Ji(x)dx +Copper of Sn, copper doped with Ag, and steel such as copper-added Cason steel alloy added with &, niobium alloy, added with Ni and Si, etc. In the specification, 'when the term "(4) another copper alloy foil is used alone, the thickness of the copper box substrate which can be used in the present invention is also not particularly limited, and it is suitable for use in a printed wiring board, ^ Γ Double and thickness can be. For example, it may be 5 to (10) called left and right 4, for the purpose of forming a fine pattern = 3 or less, preferably 2 〇 μηη or less, typically 5 to 2 _ left for the copper ruthenium of the present invention. The material is not particularly limited, and for example, a copper-off substrate which has not been subjected to roughening treatment can also be used. Previously, there was a case where a special plating was applied to the surface to attach "m, the unevenness of the surface, and the roughening of the surface was performed = the physical property of the substrate was used to make the copper substrate have adhesion to the resin" However, @ 'on the other hand, in terms of fine pitch or high-frequency electrical characteristics, the smoothing is better, and the roughening box will develop in an unfavorable direction. Also, if it is not ',' sitting roughening copper In the foil substrate, since the roughening treatment step is omitted, the effect of improving economy and productivity is improved. (1) The coating layer is formed on the opposite side of the steel substrate from the subsequent surface of the insulating substrate (predetermined circuit formation) At least one part of the surface of the surface side is formed with a coating layer. The coating layer includes one or more of tumbling, gold, and gold. Further, for example, the side of the steel foil substrate and the insulating substrate may be formed, for example. The intermediate layer composed of the intermediate layer and the surface layer laminated from the surface of the copper foil substrate in order to improve the adhesion between the copper foil substrate and the insulating substrate. The intermediate layer of 201212753, Ti, Zn, Co, V, 1 may also be The metal 'Zn, Co, Nb and Ta' are preferably It is composed of N i and two kinds of alloys. At the time, the intermediate layer contains at least one of Ni, Mo, Sn ' Μ η 'Nb, Ta, and Cr. The monomer composition is preferably made of, for example, Any one of Ni, Mo, and Ti. The intermediate layer may be made of an alloy, and at least any of Zn, V, Sn, Mn, Cr, and Cu: (2) The scent of the cloud coating of the coating layer may be XPS. Or surface analysis equipment such as AES, argon sputtering from the surface layer, chemical analysis in the depth direction, and identification based on the presence of each detection peak. (3) The atomic concentration on the surface of the coating layer is too high if the concentration of noble metal atoms in the coating layer is too high. In addition, the initial etching property is deteriorated, and it is difficult to obtain the excellent etching property of the present invention. Therefore, the coating layer of the present invention is gold in the depth direction (X··unit nm) obtained by XPS analysis from the surface in the depth direction. The atomic concentration (%) of platinum and/or palladium is f(x), the atomic concentration (%) of copper is g(x), and the atomic concentration (%) of oxygen is h(x)'. The atomic concentration (%) of carbon is set to i(x), and the sum of the atomic concentrations of other metals is set to j(X). In [0,1.0], 丨f(x)dx + Jg(x)dx+ Jh(x)dx+ _fi(x)dx+ [j(x)dx)S0.9 is satisfied, in the interval [1·0, 4.0] In the case, satisfy Jf(x)dx/(Jf(x)dx+_fg(x)dx+Jh(x)dx+Ji(x)dx +

Jj(x)dx) S 0.6 〇 又’為了獲得本發明效果之良好的蝕刻性,需要一定 程度之貴金屬原子濃度。因此,較佳為於區間[〇, 1 .〇]中,滿 足 〇.〇3Sif(x)dx/(Jf(x)dx + Jg(x)dx + fh(x)dx + Ji(x)dx + Jj(x)dx)S0.9’ 於區間[1·0,4·0]中,滿足 o.oi $ff(x)dx/(Jf(x)dx 11 201212753 + Jg(x)dx + Jh(x)dx + Ji(x)dx + Jj(x)dx) $ 〇·6。 又’較佳為當進行了相當於聚醯亞胺硬化之熱處理(氮 環境、350°C、加熱2小時)時,若將藉由xps自表面往深 度方向分析所得之深度方向(x:單位nm)的金、始及纪的 原子濃度(%)設為f(x),將銅的原子濃度(%)設為g(x),將氧 的原子濃度(%)設為h(x),將碳的原子濃度設為i(x),將 其他金屬的原子濃度總和設為j(x),則於區間[H 〇]中,滿 足 if(x)dx/(Jf(x)dx + ig(x)dx + Jh⑻dx + Ji(x)dx + 1](\)4兀)$0.3’於區間[1.〇,4.〇]中,滿足4(\)£}乂/(&(^)(^){ + ig(x)dx+ Jh(x)dx+ ii(x)dx+ _fj(x)dx)$0.3。 進而’更佳為於區間[0,1.0]中,滿足 0.01 ^Jf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + ii(x)dx + 1|(父)£1\)$0.3’於區間[1.〇,4.〇]中,滿足0.01^办)(^/价(){)^ + _fg(x)dx+ Jh(x)dx+ Ji(x)dx+ Jj(x)dx)$0.3。 又,一種進行了相當於聚醯亞胺硬化之熱處理(氮環 境、350°C '加熱2小時)之印刷配線板用銅箔,較佳為若 將藉由XPS自表面往深度方向分析所得之深度方向(X :單 位nm )的金、鉑及鈀的原子濃度設為f(x),將銅的原子 濃度(%)设為g(X),將氧的原子濃度(%)設為h(X),將碳的原 子濃度(%)設為i(x) ’將其他金屬的原子濃度總和設為j(x), 則於區間[〇,1.〇]中’滿 Sjf^xWx/Uf^dx+ig^dx+Jh^dx + Ji(x)dx + ij(x)dx)$〇.3 ,於區間[ι·〇,4.0]中.,滿足 Jf(x)dx/(ff(x)dx + ig(x)dx + fh(x)dx + Ji(x)dx + Jj(x)dx) $ 0.3 〇 12 201212753 進而,更佳為於區間[0,1.0]中,滿足 0.01 ^Jf(x)dx/(Jf(x)dx + ig(x)dx + Jh(x)dx + Ji(x)dx -l· Jj(x)dx)$〇_3,於區間[l.〇,4.〇]中,滿足 0.01 $Jf(x)dx/(Jf(x)dx + ig(x)dx+ Jh(x)dx+ ii(x)dx+ Jj(x)dx)$0.3。 (4)附著量 於由鉑構成被覆層之情形下,鉑附著量為l〇5 Opg/dm2 以下’更佳為20〜400pg/dm2,進而更佳為50〜300pg/dm2。 於由鈀構成被覆層之情形下,鈀附著量為60(^g/dm2以下, 更佳為20〜250pg/dm2 ’進而更佳為30〜I80pg/dm2。於由 金構成被覆層之情形下’金附著量為l()〇〇pg/dm2以下,更 佳為20〜4〇〇pg/dm2,進而更佳為5〇〜3〇(^g/dm2。若被覆 層的銘附著量未達bgg/dm2、被覆層的鈀附著量未達 lOpg/dm2及被覆層的金附著量未達1〇gg/dm2,則效果均不 充分。另一方面,若被覆層的鉑附著量超過1〇5〇pg/dm2、 被覆層的鈀附著量超過60(^g/dm2及被覆層的金附著量超 過lOOO^/dm2,則分別會對初期蝕刻性造成不良影響。 進而,為了提高防錄效果,可於被覆層上,進而形成 鉻層或鉻酸鹽層及/切烧處理層。又,於㈣基材與被覆 層之間’只要不對初期蝕刻性產生不良影響,㈣加熱變 色之觀點而言,亦可設置基底層。基底層較佳為鎳、鎳合 金、始、銀及猛。設置基底層之方法,可使用乾式 式法之任一種。 (銅箔的製造方法) 本發明的印刷配線板用銅落可藉由濺鍍法形成。亦 13 201212753 即,藉由濺鍍法,利用被覆層來被覆銅箔基材表面的至少 J刀。具體而言,係藉由濺鍍法,於銅箔的蝕刻面側形 成被覆層,該被覆層係由蝕刻速率比銅低之鉑、鈀及金之 任1種以上所構成。被覆層並不限於藉由濺鍍法來形成, 亦可利用例如電鍍、無電鍍等濕式鍍敷法而形成。 (印刷配線板的製造方法) 可使用本發明的銅箔根據常用方法來製造印刷配線板 (PWB)。以下舉出印刷配線板的製造方法之例。 首先,貼合鋼结與絕緣基板來製造積層體。積層有銅 箔之絕緣基板,只要具有適用於印刷配線板之特性,則並 無特別限制,例如,用於剛性PWB時,可使用紙基材酚樹 脂、紙基材環氧樹脂、合成纖維布基材環氧樹脂、玻璃布 —紙複合基材環氧樹脂、玻璃布一玻璃不織布複合基材環 氧樹脂及玻璃布基材環氧樹脂等,用於Fpc時,可使用聚 酯膜或聚醯亞胺膜等。 關於貼合之方法,在用於剛性PWB之情形下,準備以 下之預浸體:將樹脂含浸於玻璃布等基材中,且使樹脂硬 化至半硬化狀態為止。可將銅箔自被覆層的相反側之面重 疊於預浸體,並進行加熱加壓,藉此進行貼合。 在用於可撓性印刷配線板(FPC)之情形下,可使用環氧 系或丙烯酸系接著劑來將聚醢亞胺膜或聚酯膜與銅箔接著 (3層結構)。又,不使用接著劑之方法(2層結構),可 以列舉:洗鑄法,將作為聚醯亞胺之前驅物之聚酼亞胺清 漆(聚醯胺酸(polyamic acid)清漆)塗佈於銅箔,並透過加 201212753 熱而醯亞胺化;或積層法,於聚醯亞胺臈上塗佈熱塑性之 聚酿亞胺’並於其上疊合銅羯,並進行加熱加壓。於洗鑄 法中,在塗佈聚醯亞胺清漆之前’預先塗佈熱塑性聚酿亞 胺等錯固塗層(anchor coat)材料亦極為有效。 本發明的積層體可用於各種印刷配線板(PWB),並無特 別限制,例如,就導體圖案的層數之觀點而言,可應用於 單面PWB、雙面PWB及多層PWB ( 3層以上),就絕緣基 板材料的種類之觀點而言,可應用於剛性PWB、可撓性PWB (FPC)及剛性-可撓性pwB中。又’本發明的積層體,並 不限定於將銅箔貼附於樹脂上而形成之上述覆銅積層板, 亦可為利用濺鍍、鍍敷而於樹脂上形成銅層之金屬喷敷材 料。 將形成有下述結構之積層體浸潰於蝕刻液中,該結構 係:在形成於以上述方法製作之積層體的銅箔上之被覆層 表面塗佈抗蝕劑,且藉由遮罩曝光圖案,藉由顯影形成抗 钮劑圖案。此時,選自由抑制姓刻之鉑族金屬、金及銀所 構成之群中的丨種所構成之被覆層,係位於銅箔上靠近抗 钱劑部分之位置,抗蝕劑側之銅箔之蝕刻,係以比該被覆 層附近被蝕刻之速度更快之速度,對遠離被覆層之部位之 銅進行餘刻’藉此銅的電路圖案之蝕刻係大致垂直地進 行°藉此可除去不需要銅的部分,繼而剝離/除去姓刻抗触 劑’露出電路圖案。 相對於用以在積層體形成電路圖案之蝕刻液,被覆層 的餘刻速度充分小於銅,因此,具有改善蝕刻因數之效果。 15 201212753 触刻液可使用氣化銅水溶液或氣化鐵水溶液等,但氣化鐵 水溶液尤其有效。其原因在於:微細電路的钮刻需要花費 時間,而氣化鐵水溶液的蝕刻速度比氣化銅水溶液快。又, 於形成被覆層之前,亦可預先於銅箔基材表面形成耐熱層。 (印刷配線板的銅箔表面電路的線型圖案形狀) 而形成之印刷配線板的銅箔 尺狀的兩側面並非垂直地形 箔的表面向下’亦即朝向樹 壓陷)。藉此,長尺狀的兩 而具有傾斜角Θ。為了適應目 細間距化)’儘量使線型圖 該傾斜角Θ小,壓陷則因此 。又’傾斜角Θ通常於各線 固定。若這種傾斜角0之不 產生不良影響之虞。因此, 之印刷配線板的銅箔表面電 兩側面分別相對於絕緣基板 並且,相同電路内的tane之 如上述般自被覆層側钱刻 表面電路的各線型圖案,其長 成於絕緣基板上,通常係自銅 脂層,逐漸展開而形成(產生 側面分別相對於絕緣基板表面 前所要求之電路圖案微細化( 案的間距變狹窄極為重要,若 變大’線型圖案之間距則變寬 型圖案及線型圖案内並非完全 均較大’將存在會對電路品質 較佳為自被覆層側蝕刻而形成 路的各線型圖案,其長尺狀的 表面具有65〜90。之傾斜角❸, 才示準偏差為1.0以下。 [實施例] 本發月的實施例,提供這些實 更好地理解本發明甘立 只〇妁你马了 發月,其思圖並非在於限定本發明。 (例1 :實施例1〜5 i ) (於銅箔形成被覆層) 16 201212753 準備厚度為17μηι、12μπι及9μηι的壓延銅羯(日礦金 屬製造cuoo)來作為實施例i〜21和25〜51的銅荡基材。 壓延銅箱的表面粗糙度(Rz)分別為〇.2μιη、〇 5μιη。又,準 備厚度為9μπι的電解銅·治(曰礦金屬製造几匸箔)來作為 實施例22〜24的銅箱基材。電解銅落之與樹脂之接著面的 表面粗糙度(Rz)為3.8μιη,蝕刻面的表面粗糙度(Rz)為 0.2 1 μηι 〇 藉由逆向濺鍍去掉附著於銅箔表面之薄氧化膜,並利 用以下裝置及條件對Au、Pt ,戈Pd之乾進行賤鍛,藉此形 成被覆層。被覆層的厚度可藉由調整成骐時間而變化。濺 鍍所使用之各種金屬的單體係使用純度為3N者。 •裝置:批次式濺鍍裝置(ULVAC公司,型號MNS_ 6000 ) •極限真空(ultimate vacuum) : l.〇x - 5pa •濺鍍壓:0.2PaJj(x)dx) S 0.6 〇 Further, in order to obtain good etching properties of the effect of the present invention, a certain concentration of noble metal atoms is required. Therefore, it is preferable to satisfy 〇.〇3Sif(x)dx/(Jf(x)dx + Jg(x)dx + fh(x)dx + Ji(x)dx in the interval [〇, 1 .〇] + Jj(x)dx)S0.9' in the interval [1·0,4·0], satisfying o.oi $ff(x)dx/(Jf(x)dx 11 201212753 + Jg(x)dx + Jh(x)dx + Ji(x)dx + Jj(x)dx) $ 〇·6. Further, it is preferable that when the heat treatment corresponding to the hardening of the polyimide is carried out (nitrogen atmosphere, 350 ° C, heating for 2 hours), the depth direction obtained by analyzing the depth direction from the surface by xps (x: unit) The atomic concentration (%) of gold, the first and the epoch is set to f(x), the atomic concentration (%) of copper is set to g(x), and the atomic concentration (%) of oxygen is set to h(x). If the atomic concentration of carbon is i(x) and the sum of the atomic concentrations of other metals is j(x), then in the interval [H 〇], if(x)dx/(Jf(x)dx + is satisfied. Ig(x)dx + Jh(8)dx + Ji(x)dx + 1](\)4兀)$0.3' in the interval [1.〇,4.〇], satisfy 4(\)£}乂/(&( ^)(^){ + ig(x)dx+ Jh(x)dx+ ii(x)dx+ _fj(x)dx)$0.3. Further, 'better in the interval [0,1.0], satisfy 0.01 ^Jf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + ii(x)dx + 1| (Father) £1\)$0.3' in the interval [1.〇,4.〇], satisfying 0.01^) (^/ Price(){)^ + _fg(x)dx+ Jh(x)dx+ Ji(x )dx+ Jj(x)dx)$0.3. Further, a copper foil for a printed wiring board which is subjected to heat treatment (nitrogen atmosphere, heating at 350 ° C for 2 hours) corresponding to polyimine hardening is preferably obtained by XPS analysis from the surface to the depth direction. The atomic concentration of gold, platinum, and palladium in the depth direction (X: unit nm) is f(x), the atomic concentration (%) of copper is g(X), and the atomic concentration (%) of oxygen is h. (X), the atomic concentration (%) of carbon is set to i(x) ', and the sum of the atomic concentrations of other metals is set to j(x), then in the interval [〇, 1.〇], 'full Sjf^xWx/ Uf^dx+ig^dx+Jh^dx + Ji(x)dx + ij(x)dx)$〇.3 , in the interval [ι·〇, 4.0], satisfying Jf(x)dx/(ff (x) dx + ig(x)dx + fh(x)dx + Ji(x)dx + Jj(x)dx) $ 0.3 〇12 201212753 Furthermore, it is better to satisfy 0.01 in the interval [0, 1.0] ^Jf(x)dx/(Jf(x)dx + ig(x)dx + Jh(x)dx + Ji(x)dx -l· Jj(x)dx)$〇_3, in the interval [l. 〇, 4.〇], satisfy 0.01 $Jf(x)dx/(Jf(x)dx + ig(x)dx+ Jh(x)dx+ ii(x)dx+ Jj(x)dx)$0.3. (4) Adhesive amount In the case where the coating layer is composed of platinum, the platinum adhesion amount is l 〇 5 Opg / dm 2 or less, more preferably 20 to 400 pg / dm 2 , and still more preferably 50 to 300 pg / dm 2 . In the case where the coating layer is composed of palladium, the palladium adhesion amount is 60 (^g/dm2 or less, more preferably 20 to 250 pg/dm2' and further preferably 30 to I80 pg/dm2. In the case where the coating layer is composed of gold 'The amount of gold adhesion is l() 〇〇pg/dm2 or less, more preferably 20 to 4 〇〇pg/dm2, and even more preferably 5 〇 to 3 〇 (^g/dm2. If the coating is not attached) When the bgg/dm2, the palladium adhesion amount of the coating layer is less than 10 pg/dm2, and the gold adhesion amount of the coating layer is less than 1 〇gg/dm2, the effect is insufficient. On the other hand, if the platinum adhesion amount of the coating layer exceeds 1 〇5〇pg/dm2, the palladium adhesion amount of the coating layer exceeds 60 (^g/dm2 and the gold adhesion amount of the coating layer exceeds 100^/dm2, which adversely affects the initial etching property. Further, in order to improve the anti-recording The effect can be formed on the coating layer to form a chromium layer or a chromate layer and/or a chopping treatment layer. Further, between (4) the substrate and the coating layer, as long as the initial etching property is not adversely affected, (4) the viewpoint of heating discoloration In addition, the base layer may also be provided. The base layer is preferably nickel, nickel alloy, primary, silver and fierce. The method of setting the base layer may be a dry method. (Method for Producing Copper Foil) The copper drop for the printed wiring board of the present invention can be formed by sputtering. 13201212753 That is, at least J of the surface of the copper foil substrate is coated with a coating layer by a sputtering method. Specifically, a coating layer is formed on the etched surface side of the copper foil by a sputtering method, and the coating layer is made of one or more of platinum, palladium, and gold having a lower etching rate than copper. It is not limited to being formed by a sputtering method, and may be formed by a wet plating method such as electroplating or electroless plating. (Manufacturing Method of Printed Wiring Board) Printed wiring can be manufactured according to a usual method using the copper foil of the present invention. (PWB). An example of a method of manufacturing a printed wiring board is as follows. First, a steel clad and an insulating substrate are bonded to each other to produce a laminated body. An insulating substrate in which a copper foil is laminated is provided as long as it has characteristics suitable for a printed wiring board. There is no particular limitation. For example, when used for rigid PWB, paper substrate phenol resin, paper substrate epoxy resin, synthetic fiber cloth substrate epoxy resin, glass cloth-paper composite substrate epoxy resin, glass cloth can be used. a glass is not woven For the case of Fpc, a composite film epoxy resin or a glass cloth substrate epoxy resin can be used, and a polyester film or a polyimide film can be used. For the bonding method, in the case of using a rigid PWB, preparation is made. The prepreg is obtained by impregnating a resin with a substrate such as a glass cloth and curing the resin to a semi-hardened state. The surface of the copper foil from the opposite side of the coating layer may be superposed on the prepreg and heated and pressurized. In this case, in the case of a flexible printed wiring board (FPC), an epoxy-based or acrylic-based adhesive can be used to bond the polyimide film or the polyester film to the copper foil (3). Layer structure). Further, the method of not using an adhesive (two-layer structure) may be exemplified by a washing and casting method, and a polyimine varnish (polyamic acid varnish) which is a precursor of polyimine. Applying to copper foil and heat-immobilizing by adding 201212753; or laminating method, coating thermoplastic polyimide II on polyimine and superimposing copper crucible thereon and heating Pressurize. In the die-casting method, it is also extremely effective to pre-coat an anchor coat material such as a thermoplastic polyamine before coating a polyimide varnish. The laminate of the present invention can be used for various printed wiring boards (PWB), and is not particularly limited. For example, from the viewpoint of the number of layers of the conductor pattern, it can be applied to single-sided PWB, double-sided PWB, and multilayer PWB (three or more layers). From the viewpoint of the type of the insulating substrate material, it can be applied to rigid PWB, flexible PWB (FPC), and rigid-flexible pwB. Further, the laminated body of the present invention is not limited to the copper-clad laminate formed by attaching a copper foil to a resin, and may be a metal spray material in which a copper layer is formed on a resin by sputtering or plating. . The layered body having the following structure is formed by applying a resist to the surface of the coating layer formed on the copper foil of the layered body produced by the above method, and exposing it by masking The pattern forms a resist pattern by development. At this time, the coating layer selected from the group consisting of a platinum group metal, gold, and silver which suppresses the surname is located on the copper foil near the anti-money agent portion, and the resist side copper foil The etching is performed on the copper portion away from the coating layer at a speed faster than the etching speed in the vicinity of the coating layer. The etching of the circuit pattern of the copper is performed substantially vertically. The portion of the copper is required, which in turn is stripped/removed from the surrogate agent's exposed circuit pattern. The etching speed of the coating layer is sufficiently smaller than that of the etching liquid for forming the circuit pattern in the laminated body, and therefore, the effect of improving the etching factor is obtained. 15 201212753 The contact liquid can use a vaporized copper aqueous solution or an aqueous solution of iron oxide, etc., but an aqueous solution of iron oxide is particularly effective. The reason for this is that the buttoning of the fine circuit takes time, and the etching rate of the aqueous solution of the vaporized iron is faster than that of the aqueous solution of copper oxide. Further, a heat-resistant layer may be formed in advance on the surface of the copper foil substrate before the formation of the coating layer. (The linear pattern shape of the copper foil surface circuit of the printed wiring board) The copper foil of the printed wiring board formed on both sides of the ruler is not perpendicular to the surface of the foil, i.e., toward the tree. Thereby, the two long legs have a slant angle Θ. In order to adapt to the meshing of the mesh, the tilt angle is reduced as much as possible. Also, the tilt angle is usually fixed to each line. If this inclination angle of 0 does not cause adverse effects. Therefore, the two sides of the surface of the copper foil of the printed wiring board are respectively opposed to the insulating substrate, and the tane in the same circuit is formed on the insulating substrate from the line pattern of the surface layer of the coating layer as described above. Usually, it is formed from the copper grease layer and gradually spreads out (the surface pattern required to be thinned before the surface of the insulating substrate is made to be finer (the pitch of the case is narrowed is extremely important, and if it is enlarged, the width of the line pattern is wider). And the linear pattern is not completely larger. There will be a line pattern in which the circuit quality is preferably formed by etching from the coating layer side, and the long-sized surface has a tilt angle of 65 to 90. The deviation is 1.0 or less. [Embodiment] The embodiment of the present month provides a better understanding of the present invention, and the present invention is not limited to the present invention. Example 1 to 5 i ) (coating layer formed on copper foil) 16 201212753 A rolled copper crucible (Cuoo made of Nitrite metal) having a thickness of 17 μm, 12 μm, and 9 μm was prepared as Examples i to 21 and 25 The copper slab substrate of 51. The surface roughness (Rz) of the rolled copper box is 〇.2μιη, 〇5μιη, respectively, and an electrolytic copper ruthenium (manufactured by bismuth ore metal) having a thickness of 9 μm is prepared as an example. 22 to 24 copper box substrate. The surface roughness (Rz) of the electrolytic copper falling surface and the resin is 3.8 μm, and the surface roughness (Rz) of the etched surface is 0.2 1 μηι 去 by reverse sputtering to remove the adhesion. A thin oxide film on the surface of the copper foil is used for upsetting the Au, Pt, and Go Pd by the following apparatus and conditions to form a coating layer. The thickness of the coating layer can be changed by adjusting the enthalpy time. The single system used for each metal used has a purity of 3 N. • Device: batch sputtering device (ULVAC, model MNS_ 6000) • ultimate vacuum: l.〇x - 5pa • Sputter pressure :0.2Pa

•逆向濺鑛功率:100W• Reverse splashing power: 100W

•濺鍍功率:50W •把:蚀刻面用• Sputtering power: 50W • Put: etched surface

Au— 50wt%Pd ' Pt- 5 0wt%PdAu—50wt%Pd 'Pt- 5 0wt%Pd

Au- 5 0wt%PtAu- 5 0wt%Pt

Ni、Zn、Co、Cr、Ag、Mo(3N)Ni, Zn, Co, Cr, Ag, Mo(3N)

Ni— 20wt%Zn ' Ni— 20wt%Sn •靶:接著面用 Ni、Cr(3N) 17 201212753 •成膜速度:針對各靶經一定時間成膜約0 2μιη,用三 維測定器測定厚度,計算出每單位時間的濺錄速率。 對設置有被覆層之銅箔’藉由逆向濺鍍去掉預先附著 於與被覆層為相反側之表面的薄氧化被膜,依次使Ni層和 C r層成膜(實施例1〜21 '實施例2 5〜5 1 )。 於根據上述順序實施了表面處理之銅箔,以7kgf/cm2 之壓力、於下利用熱壓機使帶有接著劑之聚醯亞胺膜 (尼康工業(Nikkan Industries Co. Ltd.)製造,CISV1215) 進行40分鐘積層。將部分銅羯於氮環境且為35〇它下保持 2小時之後,根據上述順序使其與聚醯亞胺臈積層。 <附著量的測定> 被覆㈣Au、Pd A Pt &附著量測定,係利用王水將 表面處理銅@樣本溶解,稀釋該溶解液,藉由原子吸光分 析法來進行。 <XPS之測定> 將製作被覆層之縱深分析時之XPS之運轉條件示於以Ni—20wt%Zn 'Ni—20wt%Sn • Target: Ni, Cr(3N) on the surface 17 201212753 • Film formation rate: For each target, filming is about 0 2μιη for a certain period of time, and the thickness is measured by a three-dimensional measuring device. The splatter rate per unit time. The copper foil provided with the coating layer was subjected to reverse sputtering to remove the thin oxide film previously attached to the surface opposite to the coating layer, and the Ni layer and the Cr layer were sequentially formed into films (Examples 1 to 21'. 2 5~5 1). The surface-treated copper foil was subjected to the above-described procedure, and a polyimide film with an adhesive (Nikon Industries Co. Ltd., manufactured by Nikkan Industries Co. Ltd., CISV1215) was used at a pressure of 7 kgf/cm 2 under a hot press. ) Perform a 40-minute buildup. After a portion of the copper was crucible in a nitrogen atmosphere and maintained at 35 Torr for 2 hours, it was allowed to be deposited with the polyimine according to the above procedure. <Measurement of adhesion amount> Coating (IV) Measurement of adhesion amount of Au, Pd A Pt & The surface treatment copper@sample was dissolved by aqua regia, and the solution was diluted and subjected to atomic absorption spectrometry. <Measurement of XPS> The operating conditions of XPS in the case of the depth analysis of the coating layer are shown in

•裝置:XPS測定裝置(ULVAC _ PH 5600MC) •極限真空:3 8xl〇- 7pa 率為·:線檢:色:Γ或非單色MgKa、x射線輸出 度為45。 面積為800㈣、試料與檢測器所成之 •離子束:離子 種類為Ar+、加速電愿為3kv、$# 18 201212753 =叫)面積為3mmx3mm、漱鑛速率為2 (wmin (叫換 •測定係於利用⑽之成膜後,分別對實施了比測定接 者強度時之聚醯亞胺硬化條件(35〇tx3〇分)更為嚴苛之 之條件之熱處理(35W分)之狀態下的被膜層進行分 析。 (藉由姓刻而形成之電路形狀) 利用丙酮對銅猪的蝕刻面進行脫脂’並浸潰於硫酸 (l〇〇g/L)中3G秒,從而去掉表面的污垢和氧化層。繼而, 利用旋轉塗佈機(SpinC〇ate〇將液體抗蝕劑(東京應化工業 製造’ OFPR- 8〇()lB )㈤加於姓刻面,並乾燥。將乾燥後 的抗蝕劑厚度調整至1μιη。之後,藉由曝光步驟印刷1〇條 電路,進而根據以下條件來實施去除不需要銅箔的部分之 餘刻處理。 刻條件> •氣化鐵水溶液:(37wt%、波美度·· 40。) •液溫:50°C •噴壓:0.25MPa (形成間距為50μιη之電路) •抗 ϋ 劑 L/S = 33pm/17pm •完成電路下部(底部)寬度:25μπ1 •蝕刻時間:1 〇〜13 〇秒 (形成間距為30μιη之電路) •抗钱劑 L/S = 25pm/5pm 19 201212753 •完成電路下部(底部)宽度:15μηι •触刻時間:3 0〜7 0秒 •蝕刻終點之確認:改變時間’按多個標準進行蝕刻, 利用光學顯微鏡確認銅未殘留於電路之間,該時間即為蝕 刻時間。 蝕刻後,於45t的NaOH水溶液(1〇〇g/L)中浸潰i分 鐘,剝離抗姓劑。 <触刻因數的測定條件> 蝕刻因數係用來表示下述a與銅箔厚度b之比b/a,該 a係表示逐漸展開蝕刻時(產生壓陷時)、以及假設電路垂 直姓刻時之來自銅箔上面的垂線與樹脂基板之交點開始之 壓陷長度的距離,該b/a數值越大,意味著傾斜角變得越 大,無蝕刻殘渣殘留,壓陷小。圖i係表示部分電路圖案 的表面照片、該部分中的電路圖案的寬度方向橫剖面示意 圖及使用該示意圖之蝕刻因數計算方法之概略。該a係自電 路上方藉由SEM觀察來測定’計算出蚀刻因數= 。 藉由使用該蝕刻因數,可以簡單地判斷出蝕刻性之良否。 進而,傾斜角Θ係藉由利用按照上述順序測定之a及銅羯的 厚度b來計算反正切而算出。其測定範圍係電路長為 600μπι ’ 12點蝕刻因數,採用其標準偏差和傾斜角θ的平 均值作為結果。 (例2 :實施例52〜54) 於銅層厚度為8μιη之金屬喷敷CCL(日礦金屬製造 makinasu ’銅層側Ra為Ο.ΟΙμιη,連結塗層的金屬附著量 201212753 為1780pg/dm,〇為3 60pg/dm2)上,以例1之順序蒸 鍍Au、Pt及Pd,並評價蝕刻性。 ’‘' (例3 .實施例5 5〜6 0 ) 準備厚度為9μιη之下述壓延銅箔(bhya箔),該壓 I銅名係於與絕緣基板接著之面實施粗化處理、於蝕刻面 實施2種防銹處理(鍍糾鉻酸鹽、鍍川以合金+鉻酸 鋅)粗化處理面及防銹處理面的Ra均為〇 "叫。於該蝕 刻面’以W 1之順序蒸鑛Au、pt及pd,並評價餘刻性。 (例4 :比較例1〜3 :胚料) 準備12μπι厚、ΐ7μπι厚及9μηι厚之壓延銅羯,分別按 照與例1相同的順序接著聚醯亞胺膜。繼而於相反面藉由 塗佈感光性抗㈣丨及進行曝光巧來印刷 於例1之條件實施去除不需要㈣的部分之敍刻:理進而 (例5 :比較例4〜9 ) 準備一厚之壓延銅羯,分別以例r順序實施表面 處理’並進行飯刻處理。 (例6 :比較例1 〇) 仍/予度馬之麼延銅羯的單面按照下述條件實 鑛Ν!之後,在其相反面,以例!之順序藉由濺鑛來實施 面處理。以經實施鑛…之面作為钱刻面之方式,按照例 之順序於該銅箔接著聚醯亞胺膜,並藉 五錯由蝕刻形成電路• Device: XPS measuring device (ULVAC _ PH 5600MC) • Ultimate vacuum: 3 8xl 〇 - 7pa Rate: Line inspection: Color: Γ or non-monochromatic MgKa, x-ray output is 45. The area is 800 (four), sample and detector made of • ion beam: ion type is Ar+, acceleration power is 3kv, $# 18 201212753 = called) area is 3mmx3mm, ore rate is 2 (wmin (called change • measurement system) After the film formation of (10), the film is in a state of heat treatment (35 W minutes) which is subjected to conditions more stringent than the polyethylenimine hardening conditions (35 〇 tx 3 〇) at the time of measuring the strength of the bond. The layer is analyzed. (The shape of the circuit formed by the surname) The etched surface of the copper pig is degreased with acetone and immersed in sulfuric acid (l〇〇g/L) for 3G seconds to remove surface dirt and oxidation. Then, using a spin coater (SpinC〇ate〇, a liquid resist (manufactured by Tokyo Chemical Industry Co., Ltd. 'OFPR-8〇()lB) (5) is added to the facet and dried. The dried resist is dried. The thickness of the agent was adjusted to 1 μm. Thereafter, a 1 circuit was printed by an exposure step, and a process of removing a portion where the copper foil was not required was carried out according to the following conditions. Engraving conditions > • An aqueous solution of vaporized iron: (37 wt%, Baumedu··40.) • Liquid temperature: 50 ° C • Spray pressure 0.25 MPa (forming a circuit with a pitch of 50 μm) • Anti-cracking agent L/S = 33 pm / 17 pm • Finishing circuit lower (bottom) width: 25 μπ1 • Etching time: 1 〇~13 〇 seconds (forming a circuit with a pitch of 30 μιη) • Anti-money agent L/S = 25pm/5pm 19 201212753 • Complete circuit lower (bottom) width: 15μηι • Touch time: 3 0~7 0 seconds • Confirmation of etching end point: change time 'etching according to multiple standards, use The optical microscope confirmed that copper did not remain between the circuits, and this time was the etching time. After the etching, it was immersed in a 45 t aqueous NaOH solution (1 〇〇g/L) for 1 minute to peel off the anti-surname agent. The measurement condition is used to indicate the ratio b/a of the following a to the thickness b of the copper foil, which indicates the time when the etching is gradually developed (when the depression occurs), and the copper is assumed to be the vertical name of the circuit. The distance between the perpendicular line on the foil and the indentation length at the intersection of the resin substrate, the larger the b/a value means that the inclination angle becomes larger, no etching residue remains, and the depression is small. Fig. i shows a partial circuit pattern. Surface photo, the part A schematic diagram of a transverse cross-sectional view of a circuit pattern in the width direction and an outline of an etching factor calculation method using the schematic diagram. The a-system is determined by SEM observation from the top of the circuit to calculate 'calculation factor=. By using the etching factor, it is simple Further, it is judged whether or not the etching property is good. Further, the tilt angle is calculated by calculating the arc tangent using the thickness b of a and the copper ruth measured in the above-described order, and the measurement range is a circuit length of 600 μπι ' 12-point etching factor. The average value of the standard deviation and the inclination angle θ was used as a result. (Example 2: Examples 52 to 54) The metal sprayed CCL having a copper layer thickness of 8 μm (the mineral layer made of Nippon Mining Metals, the side of the copper layer Ra is Ο.ΟΙμιη, and the metal adhesion amount of the joint coating 201212753 is 1780 pg/dm, On the order of 3 60 pg/dm 2 ), Au, Pt and Pd were vapor-deposited in the order of Example 1, and the etching property was evaluated. ''' (Example 3: Example 5 5 to 6 0) The following rolled copper foil (bhya foil) having a thickness of 9 μm was prepared, and the pressure I copper name was subjected to roughening treatment and etching on the surface adjacent to the insulating substrate. The surface of the roughening treatment surface and the rust-preventing surface of the two kinds of anti-rust treatments (plating chromate, plated alloy + zinc chromate) are all 〇" Au, pt and pd were vaporized in the order of W 1 on the etched face, and the residual property was evaluated. (Example 4: Comparative Examples 1 to 3: blank) A rolled copper crucible having a thickness of 12 μm, a thickness of ΐ7 μm and a thickness of 9 μm was prepared, and then a polyimide film was attached in the same order as in Example 1. Then, on the opposite side, by applying the photosensitive anti-(4) antimony and performing the exposure, the conditions of Example 1 were carried out to remove the unnecessary (4) part of the engraving: and then (Example 5: Comparative Examples 4 to 9) The rolled copper crucibles were subjected to surface treatment in the order of r, respectively, and subjected to a meal treatment. (Example 6: Comparative Example 1 〇) Still, the one side of the 羯 羯 延 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照 按照! The order is treated by sputtering. In the manner of carrying out the face of the mine as the face of the money, the copper foil is then bonded to the polyimide film in the order of the example, and the circuit is formed by etching by five errors.

• Ni : 30g/L• Ni : 30g/L

• pH : 3.0 •溫度:50°C 21 201212753 •電流密度:35A/dm2 •時間:4秒 (例7 :比較例11〜12 ) 延銅 實施 鋅) 準備厚度為9μηι之下述壓延銅箱(ΒΗγΑ箔),該壓 箱係於與絕緣基板接著之面實施粗化處理、 2種防銹處理(鍍Ni+鉻酸鹽、鍍Niz ^丨面 。垃阳/, 〇金+絡酸 强“、、例1之順序將該等進行蝕刻。 例1〜7各自的測定結果示於表1〜6。 22 201212753 [表l]• pH: 3.0 • Temperature: 50°C 21 201212753 • Current density: 35A/dm2 • Time: 4 seconds (Example 7: Comparative Example 11~12) Zinc extended copper) Prepare the following calendered copper box with a thickness of 9μηι ( ΒΗγΑ foil), the pressure box is subjected to roughening treatment on the surface adjacent to the insulating substrate, and two kinds of anti-rust treatments (Ni+chromate plating, Niz® plating surface, Layang/, sheet metal+strong acid) These examples were etched in the order of Example 1. The measurement results of Examples 1 to 7 are shown in Tables 1 to 6. 22 201212753 [Table l]

23 201212753 [表2] 銅猪 相當於聚醖 亞胺硬化之 熱處理 附著量(Mg/dm2) 厚度 (μπι) 種類 Au Pt Pd Ni Zn Co Cr Ag Sn Mo 實施例28 12 196 — — 155 — — — — — — 實施例29 — 189 — 143 - — — — — — 實施例30 — — 118 166 實施例31 184 - — — 223 — — — — — 實施例32 — 200 — — 212 — — — — — 實施例33 — — 133 — 208 實施例34 190 — — — — 122 - - - — 實施例35 — 222 - — - 143 — — — — 實施例36 — — 122 — - 151 — — — — 實施例37 204 71 實施例38 — 219 - — — — 52 — — — 實施例39 - — 115 — — — 58 — - — 實施例40 187 — — — — — — 244 — — 實施例41 - 195 — — — — — 266 — — 實施例42 — - 119 — — — — 241 — — 實施例43 192 185 實施例44 — 211 173 實施例45 — — 126 — — — - - — 171 實施例46 189 — - 205 62 實施例47 — 208 —. 201 59 實施例48 — — 119 212 66 實施例49 194 — — 238 — — — — 68 — 實施例50 — 218 — 241 — — — — 71 — 實施例51 — — 135 246 — - — — 74 — 實施例52 8 金屬 噴敷 CCL 159 實施例53 — 166 實施例54 — — 73 — — — — — — - 實施例55 9 壓延 191 — — 890 — — 20 — — — 實施例56 — 202 - 實施例57 — — 127 實施例58 185 - — 20 300 — 30 — — — 實施例59 — 212 — 實施例60 — — 122 24 201212753 [表3] XPS表面分析 50μπι間距 (L/S=3 3 μτη/17 μπι) 30μΓη 間 S (L/S=25Km/5 μιη) 【〇,Π [1,41 蝕刻因數 傾斜角 (°) 蝕刻因數 傾斜角 (°) Au、Pt 及 Pd (%) Au、Pt 及 Pd (%) 平均值 標準偏差 平均值 標準偏差 實施例1 2 1 2.7 0.1 70 1.6 0.1 58 實施例2 8 3 6.8 0.1 82 2.7 0.1 70 實施例3 31 9 8.4 0.1 83 5.0 0.5 79 實施例4 21 10 11 0.2 85 5.7 0.4 80 實施例5 77 41 8.7 0.5 83 4.2 0.8 77 實施例6 2 , 2 3.0 0.1 72 1.7 0.1 60 實施例7 9 3 7.2 0.1 82 2.7 0.1 70 實施例8 38 12 9.1 0.1 84 5.2 0.4 79 實施例9 22 11 11 0.2 85 5.8 0.4 80 實施例10 88 59 8.5 0.5 83 3.9 0.9 76 實施例11 2 1 3.3 0.1 73 1.7 0.1 60 實施例12 8 2 7.1 0.1 82 2.5 0.1 68 實施例13 34 11 9.4 0.2 84 5.1 0.3 79 實施例14 23 9 11 0.2 85 5.6 0.3 80 實施例15 79 45 8.5 0.5 83 4.0 0.9 76 實施例16 77 42 7.7 0.4 83 2.6 0.5 69 實施例17 85 58 7.8 0.4 83 2.5 0.5 68 實施例18 87 43 7.7 0.5 83 2.5 0.5 68 實施例19 6 8 9.3 0.3 84 5.2 0.3 79 實施例20 5 7 9.2 0.3 84 5.2 0.4 79 實施例21 4 4 9.2 0.2 84 5.4 0.4 80 實施例22 9 11 11 0.3 85 6.1 0.4 81 實施例23 9 11 11 0.3 85 5.9 0.5 80 實施例24 9 21 11 0.3 85 5.8 0.4 80 實施例25 55 20 8.9 0.4 84 5.7 0.5 80 實施例26 77 32 9.0 0.4 84 5.6 0.5 80 實施例27 75 25 9.2 0.3 84 5.6 0.5 80 25 201212753 [表4] XPS表面分析 50μιτι間距 (L/S=33pm/17pm) 30μηι間距 (L/S=25pm/5um) r〇,n Π,41 蝕刻因數 傾斜角(°) 蝕刻因數 傾斜角(°) Au、Pt 及 Pd (%) Au、Pt 及 Pd (%) 平均值 標準偏差 平均值 標準偏差 實施例28 51 16 9.3 0.2 84 5.8 0.6 80 實施例29 73 17 8.8 0.2 84 5.9 0.3 80 實施例30 74 17 9.1 0.2 84 5.9 0.4 80 實施例31 52 18 9.0 0.3 84 5.8 0.5 80 實施例32 72 20 8.9 0.3 84 5.7 0.2 80 實施例33 72 23 9.0 0.2 84 6.1 0.4 81 實施例34 55 21 9.0 0.2 84 6.0 0.4 81 實施例35 71 21 8.9 0.3 84 5.8 0.3 80 實施例36 73 18 8.9 0.2 84 5.9 0.4 80 實施例37 52 23 9.0 0.2 84 6.1 0.5 81 實施例38 71 24 9.0 0.2 84 5.9 0.2 80 實施例39 73 25 9.1 0.3 84 5.8 0.3 80 實施例40 53 14 9.2 0.2 84 6.0 0.4 81 實施例41 73 13 9.0 0.3 84 5.8 0.4 80 實施例42 72 15 9.3 0.2 84 6.1 0.3 81 實施例43 52 17 9.0 0.2 84 6.2 0.5 81 實施例44 71 19 8.8 0.2 84 6.1 0.3 81 實施例45 72 20 9.0 0.3 84 5.9 0.4 80 實施例46 54 18 8.9 0.3 84 6.0 0.5 81 實施例47 69 18 8.9 0.3 84 5.9 0.6 80 實施例48 71 18 9.0 0.3 84 6.1 0.4 81 實施例49 53 18 9.0 0.3 84 6.0 0.5 81 實施例50 71 18 8.9 0.3 84 6.0 0.5 81 實施例51 70 19 9.0 0.2 84 6.2 0.4 81 實施例52 36 10 9.0 0.1 84 5.8 0.1 80 實施例53 35 10 9.0 0.1 84 5.9 0.2 80 實施例54 37 13 9.1 0.2 84 6.1 0.3 81 實施例55 55 21 8.6 0.2 83 6.0 0.3 81 實施例56 69 16 8.5 0.1 83 6.0 0.4 81 實施例57 72 20 8.4 0.2 83 6.3 0.3 81 實施例58 53 18 8.6 0.2 83 5.9 0.4 80 實施例59 71 18 8.7 0.1 83 5.8 0.4 80 實施例60 71 21 8.8 0.1 84 6.2 0.3 81 26 201212753 [表5] ]箔 相當於聚酿亞胺 硬化之熱處理 附著量(pg/dm勹 厚度 (μπι) 種類 Au Pt Pd Ni Zn Co Cr Ag Mo 比較例1 12 壓延 無 — — 一 — — — 一 一 _ 比較例2 17 壓延 無 — — — — 一 — 一 一 一 比較例3 9 電解 無 — — 一 — — — _ 一 一 比較例4 無 1011 — — — — —— —— — — 比較例5 有 1022 — — — — — 一 一 — 比較例6 12 壓延 無 — 1053 一 — — — 一 — — 比較例7 有 一 1092 — — — —— 一 一 一 比較例8 無 — — 722 — — — —— — 一 比較例9 — — 731 — — — 一 —— 一 比較例10 17 壓延 — —— — 901 — — 一 —— — 比較例11 9 壓延 — 一 — 890 — — 20 — 一 比較例12 — — — 100 290 — 20 一 _ [表6] XPS表 面分析 50μηι間距 (L/S=33um/17um) 30μηι間距 (L/S=25um/5um) r〇,n [1,41 蝕刻因數 傾斜角(°) 蝕刻因數 傾斜角(°) Au、Pt 及 Pd (%) Au、Pt 及 Pd (%) 平均值 標準偏 差 平均 俏 標準偏 差 比較例1 — — 1.7 0.3 60 1.6 0.1 58 比較例2 — 一 1.8 0.2 61 一 * —* 一 ** 比較例3 *—· — 1.8 0.2 61 1.3 0.0 52 比較例4 52 44 8.2 1.9 83 —** —** 比較例5 33 31 8.3 1.8 83 __ ** 比較例6 77 75 8.4 1.7 83 一 ** 比較例7 32 32 8.3 1.7 83 參拿 比較例8 78 76 8.3 1.8 83 ♦本 孝本 比較例9 35 32 8.2 1.9」 83 ♦幸 孝本 —** 比較例10 — 1.7 0.3 60 1.4 0.3 54 比較例11 — 1.7 0.2 J 60 1.4 0.2 54 比較例12 — 1.4 0.2 Π 54 1.2 0.2 50 * :電路上部未殘留’因此無法計算。 &quot;:初始蝕刻性較差,無法計算。 〈評價&gt; (實施例1〜6 0 ) 於實施例1〜18中,能夠以5〇μηι間距和3〇μηι間距這 27 201212753 兩種間距的抗触劑圖案,形成触刻因數較大且亦無不均、 並且剖面近似於矩形方狀之電路。 於實施例1 9〜24中,即便於對銅箔實施相當於聚醯亞 胺硬化之熱處理,且表層貴金屬擴散之狀態下,亦能以50μΓη 間距和30μηι間距這兩種間距的抗蝕劑圖案,形成蝕刻因數 較大且亦無不均、並且剖面近似於矩形方狀之電路。 又,於實施例22〜24中’即便在與樹脂接著之面實施 了粗化處理,亦能以50μιη間距和30μπι間距這兩種間距的 抗触劑圖案,形成蝕刻因數較大且亦無分散現象、並且剖 面近似於矩形方狀之電路。 於實施例25〜27中,即便銅箔的厚度為ι7μηι,亦能 以50μηι間距和30μηι間距這兩種間距的抗触劑圖案,形成 蚀刻因數較大且亦無不均、並且剖面近似於矩形方狀之電 路。 於實施例28〜51中,即便將Ni、Zn、Co、Cr、Ag、 Sn及Mo作為被覆層的基底層,亦能以5〇μιη間距和 間距這兩種間距的抗蝕劑圖案,形成蝕刻因數較大且亦無 不均、並且剖面近似於矩形方狀之電路。 於實施例52〜54中,即便使用厚度為8|am之金屬喷敷 CCL來作為銅箔,亦能以5〇|im間距和3〇μιη間距這兩種間 距的抗蝕劑圖案’形成蝕刻因數較大且亦無不均、並且剖 面近似於矩形方狀之電路。 於實施例55〜60中,即便為經實施一般的2種防銹處 理(鑛Νι +鉻酸鹽、鍍NiZn合金+鉻酸鋅)之厚度為9μιη 28 201212753 的銅羯’並且該銅笛係在與樹脂接著之面實施粗化處理, 亦·能以50μπι間距和30μηι間距這兩種間距的抗蝕劑圖案, 形成蝕刻因數亦較大且亦無不均、並且剖面近似於矩形方 狀之電路。 圖2係表示實施例3的銅箔之藉由xPS而得之深度方 向的濃度剖面圖。圖3係表示實施例22的銅箔之藉由xps 而得之深度方向的濃度剖面圖。圖4係表示根據實施例27 形成之電路的照片及其剖面照片。 (比較例1〜1 2 ) 比較例1〜3分別為銅箔表面未經處理之胚料。於比較 例1、3中,雖然此夠以50μιη間距和30μηι間距這兩種間 距的抗蝕劑圖案形成電路’但是若與實施例13〜15相比, 電路之壓陷增大。比較例2係以50μπι間距之抗蝕劑圖案進 行’其電路之壓陷增大。又’在30 μηι間距之抗钱劑圖案中, 由於在銅箔厚度方向之蝕刻完成之前,於電路上方進行了 側蝕,因此,無法形成電路。 於比較例4〜9中’由於pt、Pd及Au的附著量超過了 上限值(分別為 l〇5〇pg/dm2、60〇Kg/dm2 及 10〇〇pg/dm2), 並且於表層1〜4nm中該等之原子濃度亦提高,因此銅箔蝕 刻面的耐腐食性增加,故無法以3〇μιη間距之抗蝕劑圖案形 成電路。 於比較例10〜12中,由於未形成貴金屬被覆層,因此, 蝕刻性不良,在50μιη和3〇μιη間距這兩種間距的抗蝕劑圖 案中,電路之壓陷增大。 29 201212753 明 說 —1 簡 式 圖 rk 圖1 :係表示部/刀電路圖案的表面照片、於該部分中的 電路圖案的寬度方向橫剖面示意圖及使用該示意圖之蝕刻 因數(EF)計算方法之概略。 圖2 :係實施例3的銅箔之藉由xps而得之深度方向 的濃度剖面圖。 圖3 :係實施例22的銅箔之藉由XPS而得之深度方向 的濃度剖面圖。 圖4 :係表示根據實施例27形成之電路及其剖面 片。 圖5 :係表示於形成銅電路時產生「壓陷」而在樹脂基 板附近發生銅電路短路之一例的電路表面放大照片。 【主要元件符號說明】 無 3023 201212753 [Table 2] Copper pig is equivalent to heat treatment adhesion of polyimine hardening (Mg/dm2) Thickness (μπι) Type Au Pt Pd Ni Zn Co Cr Ag Sn Mo Example 28 12 196 — — 155 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Example 33 - 133 - 208 Embodiment 34 190 - - - - 122 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 71 Embodiment 38 — 219 — — — 52 — — — Example 39 — — 115 — — — 58 — — — Example 40 187 — — — — — — 244 — — Example 41 — 195 — — — — — 266 - Example 42 - - 119 - - - - 241 - - Example 43 192 185 Embodiment 44 - 211 173 Embodiment 45 - 126 - - - - - 171 Embodiment 46 189 - - 205 62 Embodiment 47 - 208 -. 201 59 Embodiment 48 - 119 212 66 Embodiment 49 194 - 238 - - - 68 - Embodiment 50 - 218 - 241 - - - 71 - Example 51 - 135 246 — — — — 74 — Example 52 8 Metal Spray CCL 159 Example 53 — 166 Example 54 — — 73 — — — — — — — Example 55 9 Calender 191 — — 890 — — 20 — — — Example 56 - 202 - Example 57 - 127 Example 58 185 - 20 300 - 30 - - Example 59 - 212 - Example 60 - 122 24 201212753 [Table 3] XPS surface analysis 50 μπι spacing (L/S =3 3 μτη/17 μπι) 30μΓηη S (L/S=25Km/5 μηη) [〇,Π [1,41 Etch factor tilt angle (°) Etch factor tilt angle (°) Au, Pt and Pd (% Au, Pt and Pd (%) mean standard deviation mean standard deviation Example 1 2 1 2.7 0.1 70 1.6 0.1 58 Example 2 8 3 6.8 0.1 82 2.7 0.1 70 Example 3 31 9 8.4 0.1 83 5.0 0.5 79 Example 4 21 10 11 0.2 85 5.7 0.4 80 Example 5 77 41 8.7 0.5 83 4.2 0.8 77 Example 6 2 , 2 3.0 0.1 72 1.7 0.1 60 Example 7 9 3 7.2 0.1 82 2.7 0.1 70 Example 8 38 12 9.1 0.1 84 5.2 0.4 79 Example 9 22 11 11 0.2 85 5.8 0.4 80 Example 10 88 59 8.5 0.5 83 3.9 0.9 76 Example 11 2 1 3.3 0.1 73 1.7 0.1 60 Example 12 8 2 7.1 0.1 82 2.5 0.1 68 Example 13 34 11 9.4 0.2 84 5.1 0.3 79 Example 14 23 9 11 0.2 85 5.6 0.3 80 Example 15 79 45 8.5 0.5 83 4.0 0.9 76 Example 16 77 42 7.7 0.4 83 2.6 0.5 69 Example 17 85 58 7.8 0.4 83 2.5 0.5 68 Example 18 87 43 7.7 0.5 83 2.5 0.5 68 Example 19 6 8 9.3 0.3 84 5.2 0.3 79 Example 20 5 7 9.2 0.3 84 5.2 0.4 79 Example 21 4 4 9.2 0.2 84 5.4 0.4 80 Example 22 9 11 11 0.3 85 6.1 0.4 81 Example 23 9 11 11 0.3 85 5.9 0.5 80 Example 24 9 21 11 0.3 85 5.8 0.4 80 Example 25 55 20 8.9 0.4 84 5.7 0.5 80 Example 26 77 32 9.0 0.4 84 5.6 0.5 80 Example 27 75 25 9.2 0.3 84 5.6 0.5 80 25 201212753 [Table 4] XPS surface analysis 50μιτι spacing (L/S=33pm/17pm) 30μηι spacing (L/S=25pm /5um) r〇,n Π,41 Etch factor tilt angle (°) Etch factor tilt angle (°) Au, Pt and Pd (%) Au, Pt and Pd (%) Mean standard deviation mean standard deviation Example 28 51 16 9.3 0.2 84 5.8 0.6 80 Example 29 73 17 8.8 0.2 84 5.9 0.3 80 Example 30 74 17 9.1 0.2 84 5.9 0.4 80 Example 31 52 18 9.0 0.3 84 5.8 0.5 80 Example 32 72 20 8.9 0.3 84 5.7 0.2 80 Example 33 72 23 9.0 0.2 84 6.1 0.4 81 Example 34 55 21 9.0 0.2 84 6.0 0.4 81 Example 35 71 21 8.9 0.3 84 5.8 0.3 80 Example 36 73 18 8.9 0.2 84 5.9 0.4 80 Example 37 52 23 9.0 0.2 84 6.1 0.5 81 Example 38 71 24 9.0 0.2 84 5.9 0.2 80 Example 39 73 25 9.1 0.3 84 5.8 0.3 80 Example 40 53 14 9.2 0.2 84 6.0 0.4 81 Example 41 73 13 9.0 0.3 84 5.8 0.4 80 Example 42 72 15 9.3 0.2 84 6.1 0.3 81 Example 43 52 17 9.0 0.2 84 6.2 0.5 81 Example 44 71 19 8.8 0.2 84 6.1 0.3 81 Example 45 72 20 9.0 0.3 84 5.9 0.4 80 Example 46 54 18 8.9 0.3 84 6.0 0.5 81 Example 47 69 18 8.9 0.3 84 5.9 0.6 80 Example 48 71 18 9.0 0.3 84 6.1 0.4 81 Example 49 53 18 9.0 0.3 84 6.0 0.5 81 Example 50 71 18 8.9 0.3 84 6.0 0.5 81 Example 51 70 19 9.0 0.2 84 6.2 0.4 81 Example 52 36 10 9.0 0.1 84 5.8 0.1 80 Example 53 35 10 9.0 0.1 84 5.9 0.2 80 Example 54 37 13 9.1 0.2 84 6.1 0.3 81 Example 55 55 21 8.6 0.2 83 6.0 0.3 81 Example 56 69 16 8.5 0.1 83 6.0 0.4 81 Example 57 72 20 8.4 0.2 83 6.3 0.3 81 Example 58 53 18 8.6 0.2 83 5.9 0.4 80 Example 59 71 18 8.7 0.1 83 5.8 0.4 80 Example 60 71 21 8.8 0.1 84 6.2 0.3 81 26 201212753 [Table 5] ] Foil is equivalent to poly brewing Heat treatment adhesion amount of imine hardening (pg/dm 勹 thickness (μπι) type Au Pt Pd Ni Zn Co Cr Ag Mo Comparative Example 1 12 Calendering None — One — — — One _ Comparative Example 2 17 Calendering No — — — — 一—一一一比较例3 9 Electrolysis None — One — — — _ One Comparative Example 4 No 1011 — — — — —— —— — — Comparative Example 5 There are 1022 — — — — — Example 6 12 Calendering None — 1053 One — — — One - Comparative Example 7 has a 1092 - - - - 11 - Comparative Example 8 - - 722 - - - - - A Comparative Example 9 - 731 - - - A - A Comparative Example 10 17 Calender - — — 901 — — 一 — — Comparative Example 11 9 Calendering — A — 890 — — 20 — A Comparative Example 12 — — — 100 290 — 20 A _ [Table 6] XPS Surface Analysis 50μηι Spacing (L/S=33um /17um) 30μηι pitch (L/S=25um/5um) r〇,n [1,41 Etch factor tilt angle (°) Etch factor tilt angle (°) Au, Pt and Pd (%) Au, Pt and Pd ( %) Mean Standard Deviation Average Standard Deviation Comparison Example 1 - 1.7 0.3 60 1.6 0.1 58 Comparative Example 2 - One 1.8 0.2 61 One * - * One ** Comparative Example 3 *—· — 1.8 0.2 61 1.3 0.0 52 Comparison Example 4 52 44 8.2 1.9 83 —** —** Comparative Example 5 33 31 8.3 1.8 83 __ ** Comparative Example 6 77 75 8.4 1.7 83 One ** Comparative Example 7 32 32 8.3 1.7 83 Reference Example 8 78 76 8.3 1.8 83 ♦ Ben filial comparison example 9 35 32 8.2 1.9” 83 ♦ Fortunately filial piety — ** Comparative example 10 — 1.7 0.3 60 1.4 0.3 54 Comparative Example 11 - 1.7 0.2 J 60 1.4 0.2 54 Comparative Example 12 - 1.4 0.2 Π 54 1.2 0.2 50 * : The upper part of the circuit is not left ah, so it cannot be calculated. &quot;: The initial etchability is poor and cannot be calculated. <Evaluation> (Examples 1 to 60) In Examples 1 to 18, it is possible to form a resisting factor with a pitch of 5〇μηι and a pitch of 3〇μηι, which are two kinds of pitches of 201212753. There is also no unevenness, and the cross section approximates a rectangular square circuit. In the examples 19 to 24, even in the case where the copper foil is subjected to a heat treatment corresponding to the hardening of the polyimide, and the surface precious metal is diffused, the resist pattern having a pitch of 50 μΓη and a pitch of 30 μm can be used. Forming a circuit with a large etching factor and no unevenness, and the cross section is approximately rectangular. Further, in Examples 22 to 24, even if the surface of the resin was subjected to the roughening treatment, the anti-contact agent pattern having a pitch of 50 μm and a pitch of 30 μm could be formed with a large etching factor and no dispersion. A phenomenon, and the cross section approximates a rectangular square circuit. In Examples 25 to 27, even if the thickness of the copper foil is ι 7 μηι, the anti-contact agent pattern of the two pitches of 50 μm and 30 μm pitch can be formed with a large etching factor and no unevenness, and the cross section is approximately rectangular. Square circuit. In Examples 28 to 51, even if Ni, Zn, Co, Cr, Ag, Sn, and Mo were used as the underlayer of the coating layer, it was possible to form a resist pattern having a pitch of 5 μm and pitch. A circuit having a large etching factor and no unevenness, and the cross section is approximately rectangular. In Examples 52 to 54, even if a metal sprayed CCL having a thickness of 8 |am was used as the copper foil, etching can be formed by a resist pattern of two pitches of 5 〇 | im pitch and 3 〇 μη pitch. A circuit with a large factor and no unevenness, and a section similar to a rectangular square. In Examples 55 to 60, even the copper rafts having a thickness of 9 μm η 28 201212753, which were subjected to two general rust-preventing treatments (mineral Ν + chromate, NiZn alloy + zinc chromate), and the copper flute The roughening treatment is performed on the surface of the resin, and the resist pattern can be formed with a pitch of 50 μm and a pitch of 30 μm, and the etching factor is also large and uneven, and the cross section is approximately rectangular. Circuit. Fig. 2 is a cross-sectional view showing the concentration in the depth direction of the copper foil of Example 3 by xPS. Fig. 3 is a cross-sectional view showing the concentration in the depth direction of the copper foil of Example 22 in terms of xps. Figure 4 is a photograph showing a circuit formed in accordance with Embodiment 27 and a cross-sectional photograph thereof. (Comparative Examples 1 to 1 2) Comparative Examples 1 to 3 are unprocessed blanks on the surface of the copper foil, respectively. In Comparative Examples 1 and 3, although it was sufficient to form the circuit with the resist pattern of the two pitches of 50 μm and 30 μm, the indentation of the circuit was increased as compared with Examples 13 to 15. In Comparative Example 2, the resist pattern of the circuit was increased by a resist pattern of 50 μm. Further, in the 30 μηι spacing anti-money agent pattern, since the side etching was performed on the upper side of the circuit before the etching in the thickness direction of the copper foil was completed, the circuit could not be formed. In Comparative Examples 4 to 9, 'the adhesion amount of pt, Pd, and Au exceeded the upper limit (1〇5〇pg/dm2, 60〇Kg/dm2, and 10〇〇pg/dm2, respectively), and was on the surface layer. Since the atomic concentration of these atoms is also increased in 1 to 4 nm, the corrosion resistance of the copper foil-etched surface is increased, so that the circuit cannot be formed with a resist pattern having a pitch of 3 μm. In Comparative Examples 10 to 12, since the noble metal coating layer was not formed, the etching property was poor, and in the resist pattern of the two pitches of 50 μm and 3 μm pitch, the depression of the circuit was increased. 29 201212753 —————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————— . Fig. 2 is a cross-sectional view showing the concentration in the depth direction obtained by xps of the copper foil of the third embodiment. Fig. 3 is a cross-sectional view showing the concentration in the depth direction of the copper foil of Example 22 by XPS. Fig. 4 is a view showing a circuit formed according to Embodiment 27 and a sectional sheet thereof. Fig. 5 is a magnified photograph of a circuit surface showing an example of occurrence of "indentation" in the formation of a copper circuit and short-circuiting of a copper circuit in the vicinity of a resin substrate. [Main component symbol description] None 30

Claims (1)

201212753 七、申請專利範圍: 1 一種印刷配線板用銅箔,具備銅箔基材以及被覆層, 該被覆層被覆該銅箱基材表面的至少一部分且包含鉑、鈀 及金之任1種以上; 右將藉由XPS自表面往深度方向分析所得之深度方向 (X ·單位nm)的金、鉑及/或鈀的原子濃度(%)設為, 將銅的原子濃度(%)設為g(x),將氧的原子濃度(%)設為 h(x),將碳的原子濃度(%)設為i(x),將其他金屬的原子濃 度總和設為j(x),則於區間[〇,!.〇]中,滿足jf(x)dx/(if(x)dx + ig(x)dx+ fh(x)dx+ Ji(x)dx+ fj(x)dx)g〇.9,於區間[ι.〇,4·〇] 中,滿足 Jf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + Ji(x)dx + Jj(x)dx)$〇、6。 2. 如申請專利範圍第i項之印刷配線板用銅箔,具備銅 猪基材以及被覆層,該被覆層被覆上述銅箔基材表面的至 少一部分且包含銘、把及金之任1種以上; 若將藉由XPS自表面往深度方向分析所得之深度方向 (X :單位nm )的金、鉑及/或鈀的原子濃度設為f(x), 將銅的原子濃度(%)設為g(x),將氧的原子濃度設為 h(x) ’將碳的原子濃度(%)設為i(x),將其他金屬的原子濃 度總和設為j(x) ’則於區間[〇,l.o]中,滿足 0.03^if(x)dx/(Jf(x)dx + lg(x)dx 4- Jh(x)dx 4- Ji(x)dx + ij(x)dx)S0.9’ 於區間[1.0,4·0]中,滿足 0·(π $Jf(x)dx/(Jf(x)dx + Jg(x)dx+ Jh(x)dx+ _fi(x)dx+ Jj(x)dx)$ 0.6。 3. 如申請專利範圍第1或2項之印刷配線板用銅箔,其 31 201212753 中,於進行相當於聚醯亞胺硬化之熱處理時,若將藉由xps 自表面往深度方向分析所得之深度方向(x:單位nm)的金、 鉑及鈀的原子濃度(%)設為f(x),將銅的原子濃度設為 g(x),將氧的原子濃度(%)設為h(x),將碳的原子濃度(〇/。) 設為i(x),將其他金屬的原子濃度總和設為j(x),則於區間 + ij(x)dx)so.3,於區間[mo]中,滿足Jf(x)dx/(if(x)dx + Jg(x)dx+ ih(x)dx+ Ji(x)dx+ Jj(x)dx)$0 3。 4. 如申請專利範圍第3項之印刷配線板用銅箔,其中, 於進行相當於聚醯亞胺硬化之熱處理時,若將藉由xps自 表面往深度方向分析所得之深度方向(χ :單位nm )的金、 鉑及鈀的原子濃度(%)設為f(x),將銅的原子濃度(%)設為 g(x),將氧的原子濃度(%)設為h(x),將碳的原子濃度(%) 設為l(x),將其他金屬的原子濃度總和設為j(x),則於區間 [0,1.0]中,滿足0.01‘4()()£^/(【()〇(^+4()〇(1){+4()〇(^ + ii(x)dx + ij(x)dx)^0.3 &gt; 於區間[1.0,4·0]中,滿足 0.01Sjf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + “⑴心 + Jj(x)dx)$〇.3。 5. 如申請專利範圍第1或2項之印刷配線板用銅箔,其 中進行了相當於聚醢亞胺硬化之熱處理,若將藉由XPS 自表面往深度方向分析所得之深度方向(X:單位nm )的金、 鉑及鈀的原子濃度(%)設為f(x),將銅的原子濃度(%)設為 g(x),將氧的原子濃度(%)設為h(x),將碳的原子濃度(%) 設為l(x),將其他金屬的原子濃度總和設為j(x),則於區間 32 201212753 [0,1.0]*M^Sjf(x)dx/(Jf(x)cix+Jg(x)dx+ih(x)clx+Ji(x)dx + ij(x)dx)S〇.3,於區間[1.0,4.0]中,滿足 f(x)dx/(if(x)dx + Jg(x)dx+ Jh(x)dx+ ii(x)dx+ Jj(x)dx)S0.3。 6. 如申請專利範圍第5項之印刷配線板用銅箔,其中, 進行了相當於聚醯亞胺硬化之熱處理,若將藉由XPS自表 面往深度方向分析所得之深度方向(X :單位nm )的金、鉑 及纪的原子濃度(%)設為f(x),將銅的原子濃度設為 g(x) ’將氧的原子濃度(%)設為h(x),將碳的原子濃度(〇/0) δ史為i(x),將其他金屬的原子濃度總和設為j(x),則於區間 [0,1.0]*y;S〇.〇lSjf(x)dx/(Jf(x)dx+Jg(x)dx+Jh(x)dx + Ji(x)dx + [j(x)dx)S0.3 ’ 於區間[l.〇,4.〇]中,滿足 0.01 ^if(x)dx/(if(x)dx + Jg(x)dx + Jh(x)dx + Ji(x)dx + Jj(x)dx)S0.3。 7. 如申請專利範圍第1或2項之印刷配線板用銅箔,其 中’該被覆層中的鉑附著量為1〇5 〇pg/dm2以下,把附著量 為600pg/dm2以下’金附著量為i〇〇〇pg/dm2以下。 8 ·如申請專利範圍第7項之印刷配線板用銅箔,其中, 該被覆層中的鉑附著量為20〜400pg/dm2,鈀附著量為20 〜25 0pg/dm2,金附著量為 20〜400pg/dm2。 9.如申請專利範圍第1或2項之印刷配線板用銅箔,其 中’印刷配線板係可撓性印刷配線板。 .10.—種電子電路形成方法’包括下述步驟: 準備申請專利範圍第丨或2項之銅箔所構成之壓延銅 箔或電解銅箔之步驟; 33 201212753 以該銅4的被覆層為钮刻面’製作該銅箔與樹脂基板 之積層體之步驟; 利用氣化鐵水溶液或氣化銅水溶液對該積層體進行蝕 刻’除去不需要銅的部分而形成銅電路之步驟。 11.一種積層體,係申請專利範圍第丨或2項之銅箔與 樹脂基板之積層體。 12.—種積層體, 被覆該銅層表面至少一 被覆層。 係銅層與樹脂基板之積層體,其具備 -部分之申請專利範圍第1或2項之201212753 VII. Patent application scope: 1 A copper foil for a printed wiring board, comprising a copper foil base material and a coating layer covering at least a part of the surface of the copper box substrate and containing at least one of platinum, palladium and gold The right atomic concentration (%) of gold, platinum, and/or palladium in the depth direction (X·unit nm) obtained by XPS analysis from the surface in the depth direction is set to the atomic concentration (%) of copper as g. (x), when the atomic concentration (%) of oxygen is h(x), the atomic concentration (%) of carbon is i(x), and the sum of atomic concentrations of other metals is j(x), Interval [〇,! In 〇], satisfy jf(x)dx/(if(x)dx + ig(x)dx+ fh(x)dx+ Ji(x)dx+ fj(x)dx)g〇.9, in the interval [ι. 〇,4·〇], satisfy Jf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + Ji(x)dx + Jj(x)dx)$〇,6 . 2. The copper foil for a printed wiring board according to the invention of claim i, comprising a copper pig substrate and a coating layer, the coating layer covering at least a part of the surface of the copper foil substrate and comprising any one of Ming, Hand, and Gold In the above, if the atomic concentration of gold, platinum, and/or palladium in the depth direction (X: unit nm) obtained by XPS analysis from the surface in the depth direction is f(x), the atomic concentration (%) of copper is set. For g(x), the atomic concentration of oxygen is h(x) 'The atomic concentration (%) of carbon is i(x), and the sum of the atomic concentrations of other metals is j(x)'. [〇, lo], satisfy 0.03^if(x)dx/(Jf(x)dx + lg(x)dx 4- Jh(x)dx 4- Ji(x)dx + ij(x)dx)S0 .9' In the interval [1.0,4·0], satisfy 0·(π $Jf(x)dx/(Jf(x)dx + Jg(x)dx+ Jh(x)dx+ _fi(x)dx+ Jj( x)dx)$0.6. 3. For the copper foil for printed wiring boards of the first or second patent application, in 31 201212753, when the heat treatment corresponding to the hardening of polyimine is carried out, The atomic concentration (%) of gold, platinum, and palladium in the depth direction (x: unit nm) obtained by analyzing the surface in the depth direction is f(x), The atomic concentration is g(x), the atomic concentration (%) of oxygen is h(x), the atomic concentration of carbon (〇/.) is i(x), and the atomic concentration of other metals is set. For j(x), then in the interval + ij(x)dx)so.3, in the interval [mo], satisfy Jf(x)dx/(if(x)dx + Jg(x)dx+ ih(x) Dx+ Ji(x)dx+ Jj(x)dx)$0 3. 4. The copper foil for a printed wiring board according to the third aspect of the patent application, wherein, in the heat treatment corresponding to the hardening of the polyimide, the depth direction obtained by analyzing the depth direction from the surface by xps (χ: The atomic concentration (%) of gold, platinum, and palladium in units of nm is f(x), the atomic concentration (%) of copper is g(x), and the atomic concentration (%) of oxygen is h (x). ), if the atomic concentration (%) of carbon is set to l(x) and the sum of atomic concentrations of other metals is set to j(x), then 0.01 '4()() is satisfied in the interval [0, 1.0]. ^/([()〇(^+4()〇(1){+4()〇(^ + ii(x)dx + ij(x)dx)^0.3 &gt; in the interval [1.0,4·0 ], satisfying 0.01Sjf(x)dx/(Jf(x)dx + Jg(x)dx + Jh(x)dx + "(1)心+Jj(x)dx)$〇.3. 5. If applying for a patent The copper foil for a printed wiring board according to the first or second aspect, wherein the heat treatment corresponding to the hardening of the polyimide is performed, and the gold in the depth direction (X: unit nm) obtained by XPS analysis from the surface in the depth direction is performed. The atomic concentration (%) of platinum and palladium is f(x), the atomic concentration (%) of copper is g(x), and the atomic concentration (%) of oxygen is h(x). The atomic concentration (%) of carbon is set to l(x), and the sum of the atomic concentrations of other metals is set to j(x), then in the interval 32 201212753 [0,1.0]*M^Sjf(x)dx/(Jf( x)cix+Jg(x)dx+ih(x)clx+Ji(x)dx + ij(x)dx)S〇.3, in the interval [1.0,4.0], satisfy f(x)dx/( If (x)dx + Jg(x)dx+ Jh(x)dx+ ii(x)dx+ Jj(x)dx)S0.3. 6. A copper foil for a printed wiring board according to claim 5, wherein A heat treatment corresponding to the hardening of polyimine is carried out, and the atomic concentration (%) of gold, platinum, and ruthenium in the depth direction (X: unit nm) obtained by XPS analysis from the surface to the depth direction is set to f (x). ), the atomic concentration of copper is set to g(x) 'The atomic concentration (%) of oxygen is h(x), and the atomic concentration of carbon (〇/0) δ is i(x), and other metals are used. The sum of the atomic concentrations is set to j(x), then the interval [0,1.0]*y; S〇.〇lSjf(x)dx/(Jf(x)dx+Jg(x)dx+Jh(x)dx + Ji(x)dx + [j(x)dx)S0.3 ' In the interval [l.〇,4.〇], satisfy 0.01 ^if(x)dx/(if(x)dx + Jg(x ) dx + Jh(x)dx + Ji(x)dx + Jj(x)dx)S0.3. 7. The copper foil for printed wiring boards according to claim 1 or 2, wherein the amount of platinum deposited in the coating layer is 1〇5 〇pg/dm2 or less, and the adhesion amount is 600 pg/dm2 or less. The amount is below i〇〇〇pg/dm2. 8. The copper foil for a printed wiring board according to the seventh aspect of the invention, wherein the coating layer has a platinum adhesion amount of 20 to 400 pg/dm 2 , a palladium adhesion amount of 20 to 25 0 pg/dm 2 , and a gold adhesion amount of 20 ~400pg/dm2. 9. The copper foil for a printed wiring board according to claim 1 or 2, wherein the printed wiring board is a flexible printed wiring board. .10. A method for forming an electronic circuit 'includes the following steps: a step of preparing a rolled copper foil or an electrolytic copper foil composed of a copper foil of the second or second patent application; 33 201212753 a step of forming a laminate of the copper foil and the resin substrate; a step of etching the laminate by using an aqueous solution of vaporized iron or a solution of vaporized copper to remove a portion not requiring copper to form a copper circuit. A laminate comprising a laminate of a copper foil and a resin substrate of claim No. 2 or 2. 12. A layered body covering at least one coating layer on the surface of the copper layer. a laminate of a copper layer and a resin substrate, which has a part of claim 1 or 2 板為聚醯亞胺基板。The plate is a polyimide substrate. 體作為材料。 34Body as a material. 34
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