201211968 六、發明說明： 【發明所屬之技術領域】 本發明係有關於-種感測裝置，特別是有關於一種具 有畫素放大器之感測裝置，該晝素放大器具有二階參考電 壓。 ’ 【先前技術】 -般而言’感測晝素包括一感測元件、轉移電晶體、 重置電晶體、以及源極隨耦電晶體。轉移諦聽以、重置電 晶體、以及源極隨耦電晶體耦接至一浮動擴散節點 (floating diffusion node)，而此浮動擴散節點耦接源極隨 麵電晶體之控制端。在曝光期間中，感測元件用來感測光 線以產生-❹i信號’且在讀出期間巾，卿電晶體導通 以將感測信號轉移至浮動擴散節點以執行讀出操作。在讀 出期間，於轉移電晶體將感測信號轉移至浮動擴散節點之 前，重置電晶體導通以將浮動擴散節點之位準重置到一預 設位準，其中，該預設位準係作為轉移之感測信號的基本 位準。然而，當重置操作完成而重置電晶體關閉時，由於 重置電晶體所導致的電流注入效應，使得浮動擴散節點的 位準由該預設位準下降。爭動擴散節點的位準下降導致較 小的畫素讀出擺幅（swing)，這不利於讀出操作。 因此，期望提供一種感測裝置，其可解決在晝素單元 中由重置電晶體所導致的電流注入效應。 【發明内容】 本發明提供一種感測裝置，包括晝素單元與輸出單 201211968 元。晝素單元操作在曝光期間以及讀出期間，其包括 兀：、轉移電晶體、重置電晶體、以及輸出電晶體。感測 二測光線。轉移電晶體輕接於感測元件與浮動擴 =點之間。重置電晶體減於第—節點與浮動擴散節點 =赴且由重置信號所控制。輸出電晶體具有祕浮動擴 控制端、耦接第一節點之輸入端、以及輸出端。 間，重置電晶體受控於重置信號之重置相位以重 單:準。輸出單壤輸出電晶體。輸出 =Γΐ 且根據浮動擴散節點之位準與參考信 號於第-㈣上產生晝素輸出信號。在讀出期間， 號處於第-位準，且在重置相位之後 於^ 第-位準之第二位準。 巧。唬處於低於 本發明另提供一種感測装置，其包 單元操作在曝光期間以及讀出期間 晝素 件、重置電晶體、以及輸出電晶趙。感===元 輕接於電壓源與浮動擴散節點之心由重置 仏唬所控制。輸出電晶體具有耦接浮 端，接電壓源之輸入端、以及輸出端。在 置電晶體受控於重置信號之重置…重 之位準。在讀編，電壓源處於第一:== 位之後，電壓源處於低於第一位準 相 【實施方式】 半 下文::亡:=目：、特徵和優點能更明顯易懂， 較佳妹例，並配合所_式，作詳細說明如 5 201211968 第1圖係表示根據本發明一實施例之感測裝置。參閱 第1圖，感測裝置1包括晝素單元10以及輸出單元11。 晝素單元10包括感測元件100、轉移電晶體101、重置電 晶體102、源極隨耦器SF。源極隨耦器SF包括輸出電晶 體103，源極隨耦器SF之輸入端耦接輸出電晶體103之控 制端。電晶體101至103為N型金氧半（NMOS)電晶體。 晝素單元10操作在一曝光其間與一讀出期間。參閱第1 圖，感測元件100係以一光二極體來實現，其具有耦接接 地端GND之陽極電極且具有陰極電極。轉移電晶體101 之控制端接收控制信號TX，其輸入端耦接光二極體100之 陰極電極，且其輸出端耦接一浮動擴散節點FN。重置電晶 體102之控制端接收一重置信號RST，其輸入端耦接節點 N10，且其輸出端耦接浮動擴散節點FN。輸出電晶體103 之控制端耦接浮動擴散節點FN，其輸入端耦接節點N10， 且其輸入端耦接輸出單元11。晝素單元更包括一電容器 104，其耦接於節點N10與浮動擴散節點FN之間。電容器 104是一實際電容器或者是輸出電晶體103之寄生電容。 輸出單元11耦接電晶體103之輸出端。輸出單元11 接收一參考信號VREF，並根據浮動擴散節點FN之位準與 參考信號VREF於節點N10上產生一晝素輸出信號 SOUT。在此實施例中，參考信號VREF為二階電壓信號。 在曝光期間，感測單元100感測光線以產生一感測信 號SS。第2圖係表示在曝光期間後之讀出期間中感測裝置 1的主要信號時序圖。參閱第1及2圖，在讀出期間，重 201211968 置k號RST在時間點T1與時間點T2 (時間點丁2出現於 時1點Τ1之後）之間被致能（如以），以形成一重置 相位PRST。重置電晶體1〇2被重置相位pRST所導通，以 重置浮動擴散節點FN之位準。在時間點τι與時間點T3 (時間點T3出現於時間點η之後）之間，參考信號vref201211968 VI. Description of the Invention: [Technical Field] The present invention relates to a sensing device, and more particularly to a sensing device having a pixel amplifier having a second-order reference voltage. [Prior Art] In general, the sense element includes a sensing element, a transfer transistor, a reset transistor, and a source follower transistor. The transfer listener, reset transistor, and source follower transistor are coupled to a floating diffusion node coupled to the control terminal of the source follower transistor. During the exposure period, the sensing element is used to sense the light to produce a -❹i signal' and during the readout period, the transistor is turned on to transfer the sensed signal to the floating diffusion node to perform the readout operation. During readout, before the transfer transistor transfers the sensed signal to the floating diffusion node, resetting the transistor conduction to reset the level of the floating diffusion node to a predetermined level, wherein the preset level is As the basic level of the sensed signal of the transfer. However, when the reset operation is completed and the reset transistor is turned off, the level of the floating diffusion node is lowered by the preset level due to the current injection effect caused by resetting the transistor. The level drop of the competing diffusion node results in a smaller pixel readout swing, which is detrimental to the read operation. Accordingly, it is desirable to provide a sensing device that addresses the current injection effect caused by resetting a transistor in a pixel unit. SUMMARY OF THE INVENTION The present invention provides a sensing device including a pixel unit and an output sheet 201211968. The pixel unit operates during exposure and during readout, and includes: 转移: transfer transistor, reset transistor, and output transistor. Sensing Two measurements of light. The transfer transistor is lightly connected between the sensing element and the floating expansion point. The reset transistor is subtracted from the -th node and the floating diffusion node = and is controlled by the reset signal. The output transistor has a secret floating control terminal, an input coupled to the first node, and an output terminal. The reset transistor is controlled by the reset phase of the reset signal to repeat: quasi. Output single-sector output transistor. The output = Γΐ and the pixel output signal is generated on the - (4) according to the level of the floating diffusion node and the reference signal. During readout, the number is at the first level and after the phase is reset, at the second level of the ^-level. Skillful. The 唬 is lower than the present invention. Further, a sensing device is provided, the package unit operating during exposure and during reading, the 昼 element, the reset transistor, and the output illuminator. Sense === Element The heart that is connected to the voltage source and the floating diffusion node is controlled by the reset 仏唬. The output transistor has a coupling floating end, an input end of the voltage source, and an output end. The reset transistor is controlled by the reset signal reset level. After reading and writing, after the voltage source is at the first: == position, the voltage source is lower than the first level. [Embodiment] Semi-description:: Death: = Objective: Features and advantages can be more obvious and easy to understand. For example, 5 201211968 FIG. 1 shows a sensing device according to an embodiment of the present invention. Referring to Fig. 1, the sensing device 1 includes a halogen unit 10 and an output unit 11. The pixel unit 10 includes a sensing element 100, a transfer transistor 101, a reset transistor 102, and a source follower SF. The source follower SF includes an output transistor 103, and the input of the source follower SF is coupled to the control terminal of the output transistor 103. The transistors 101 to 103 are N-type gold oxide half (NMOS) transistors. The halogen unit 10 operates during an exposure period and during a readout period. Referring to Fig. 1, the sensing element 100 is realized by a photodiode having an anode electrode coupled to the ground terminal GND and having a cathode electrode. The control terminal of the transfer transistor 101 receives the control signal TX, the input end of which is coupled to the cathode electrode of the photodiode 100, and the output end of which is coupled to a floating diffusion node FN. The control terminal of the resetting transistor 102 receives a reset signal RST, the input end of which is coupled to the node N10, and the output end of which is coupled to the floating diffusion node FN. The control terminal of the output transistor 103 is coupled to the floating diffusion node FN, the input end of which is coupled to the node N10, and the input end of which is coupled to the output unit 11. The pixel unit further includes a capacitor 104 coupled between the node N10 and the floating diffusion node FN. Capacitor 104 is an actual capacitor or parasitic capacitance of output transistor 103. The output unit 11 is coupled to the output end of the transistor 103. The output unit 11 receives a reference signal VREF and generates a halogen output signal SOUT at the node N10 according to the level of the floating diffusion node FN and the reference signal VREF. In this embodiment, the reference signal VREF is a second order voltage signal. During exposure, the sensing unit 100 senses light to produce a sense signal SS. Fig. 2 is a view showing a main signal timing chart of the sensing device 1 during the readout period after the exposure period. Referring to Figures 1 and 2, during the readout period, the weight 201211968 is set to enable the k-number RST between the time point T1 and the time point T2 (the time point D 2 appears after 1 point Τ 1), A reset phase PRST is formed. The reset transistor 1〇2 is turned on by the reset phase pRST to reset the level of the floating diffusion node FN. Between the time point τι and the time point T3 (the time point T3 appears after the time point η), the reference signal vref
處於一較高位準LVH，且在時間點T3上參考信號VREF ，換至處於一較低位準lvl。換句話說，參考信號vref 是在重置相位PRST之後切換至較低位準LVL。接著，在 時間點T3之後的時間點T4，控制信號τχ被致能來導通 轉移電晶體101 ’以將感測信號SS轉移至浮動擴散節點 FN。 第3圖係表示第1圖之輸出單元u之一實施例與晝素 單元10 °參閱第3圖’輸出單元11，包括電晶體300-303， 其中，電晶體300及301為P型金氧半（PM〇s)電晶體， 而電晶體3〇2與303為NM0S電晶體。電晶體3〇〇之控制 端耦接節點N30，其輸入端耦接供應電壓源VDD，且其輸 出端搞接節點NH)。電晶體3()1之控制端轉接節點刪， 其輸入端耦接供應電壓源VDD，且其輸出端耦接電晶體 mi之控制端於節點N30。電晶體300與301形成一電流 源CS。:電晶岸3〇2 •^控與螂真锋療尊堯表農藏VREF，其 輸入端輕接電晶體301之輸出端於節點N30，且其輸出端 輕接輪出電晶體1〇3之輸出端。電晶體3〇3之控制端接收 偏壓電壓VBIA，其輸入端耦接輸出電晶體1〇3之輸出端， 且其輸出端耦接接地端GND。 參閱第3圖’輸出電晶體與輸出單元3〇之電晶體 201211968 300-303形成了差動放大器。電容器104作為此差動放大器 之回授電容。此差動放大器根據浮動擴散節點FN之位準 與參考信號VREF間的差異而於節點N10上產生晝素輸出 信號SOUT。在讀出期間，晝素輸出信號SOUT為了讀出 操作的相關雙重取樣（correlated double sampling，CDS) 而被取樣兩次。詳細來說，畫素輸出信號SOUT在控制信 號TX被致能之前（即在時間點T4之前）被取樣以產生一 基本值，且接著在控制信號TX被反致能（de-asserted)之 後（其在時間點T5之後）被取樣以產生一輸出值。基本值 與輸出值之間的差異則作為一讀出信號，其表示光二極體 100所感測到之光線強度。 在第2圖中，參考信號VREF處於較高位準LVH，且 在重置相位PRST之後的時間點T3上，參考信號VREF切 換至處於較低位準LVL。當重置電晶體102於時間點T2 被關閉時’由於重置電晶體102所導致的電流注入效應， 使得浮動擴散節點FN之位準下降。假設參考信號持續維 持在較高位準LVH。在時間點T4之前，差動放大器根據 浮動擴散節點FN下降後之位準與具有較高位準LVH之參 考信號VREF來產生具有較高位準之晝素輸出信號 :SOUT。锋句話說，在時間點T4之間藉由取樣晝素輸出信 號SOUT所獲得之基本值較大。因此，根據基本值與輸出 值之差異所產生之讀出信號的擺幅較小，這不利於後續的 讀出操作。 然而’在本發明實施例中，參考信號並非一直處於較 高位準LVH。當重置電晶體102於時間點T2關閉時，由 201211968 於重置電晶體102所導致的電流注入效應，使得浮動擴散 節點FN之位準下降。此外，在時間點T3，參考信號VREF 下降至較低位準LVL。因此’在時間點T4之前，差動放 大器根據浮動擴散節點FN下降後之位準與具有較低位準 LVL之參考信號VREF來產生畫素輸出信號SOUT。而此 時的晝素輸出信號SOUT之位準低於當參考信號VREF持 續處於較高位準LVH時的晝素輸出信號SOUT之位準。因 此’在時間點T4之前藉由取樣晝素輸出信號SOUT而獲得 鲁 之基本值，不會隨著浮動擴散節點FN之位準下降而變為 較大。因此，根據基本值與輸出值之差而產生之讀出信號 的擺幅較為適當。 第4圖係表示第1圖之輸出單元11之另一實施例與晝 素單元10。輸出單元11”包括第3圖之電晶體300-303。除 了第4圖之電晶體302之控制端的連接之外，第圖中電晶 體300-303之間的連接與第3圖之連接相同。因此，為了 簡潔’在此處省略敘述電晶體300-303之間的連接。輸出 鲁 單元11”更包括電晶體400-403，其中，電晶體400-402為 PMOS電晶體，而電晶體403為NMOS電晶體。電晶體400 之控制端接收一致能信號EN，其輸入端接收參考信號 VREF，且其輸出端耦接節點Ν10。電晶體401之控制端接 收致能信號EN，其輸入端耦接供應電壓源VDD，且其輸 出端耦接節點N30。電晶體402之控制端接收一致能信號 ENB，其輸入端接收參考信號VREF，以及其輸出端耦接節 點N40。致能信號ENB為致能信號EN之反向信號（即致 能信號ΕΝΒ與ΕΝ互為反向）。電晶體403之控制端接收 201211968 腦’其輸人端_節點，且其輸出端據 接地端㈣。由於電晶體搬與4〇3分別為ρΜ〇§與丽⑽ 電晶體且都接收致能信號ENB，因此電晶體術與4〇3是 在不同的賴上被致能㈣ENB所導通。根據第4圖，電 晶體302之控制端並非如同第3圖中電晶體搬之控制端 -般係直接接收參考信號VREF。q參考㈣vref被 提供至電晶體402，且電晶體3〇2之控制端透過被致能信 號ENB所導通之電晶體402來接收參考信號VREF。 第5圖係表示讀出期間中第4圖之感測裝置的主要信 號時序圖。帛5圖之重置信號RST、控制信號τχ、以及參 考信號VREF的時序與第2圖之時序相同。因此，根據重 置信號RST與控制信號ΤΧ的晝素單元1〇之操作與第3 圖相關之敘述相同。第5圖額外地顯示用來控制電晶體 與401之致能彳§號ΕΝ的時序。在介於時間點η與Τ4之 間的時間點Τ31之前，致能信號εν被反致能以導通電晶 體400與401，且因此致能信號ΕΝΒ則被致能以關閉電晶 體402並導通電晶體403。在時間點Τ31時，致能信號ΕΝ 被致能以關閉電晶體400與401，而致能信號ΕΝΒ則被反 致能以導通電晶體402並關閉電晶體403。At a higher level LVH, and at the time point T3, the reference signal VREF is switched to a lower level lvl. In other words, the reference signal vref is switched to the lower level LVL after resetting the phase PRST. Next, at a time point T4 after the time point T3, the control signal τ χ is enabled to turn on the transfer transistor 101 ′ to transfer the sensing signal SS to the floating diffusion node FN. Figure 3 shows an embodiment of the output unit u of Figure 1 and the pixel unit 10 °. Referring to Figure 3, the output unit 11 includes transistors 300-303, wherein the transistors 300 and 301 are P-type gold oxides. Half (PM〇s) transistors, and transistors 3〇2 and 303 are NM0S transistors. The control terminal of the transistor 3 is coupled to the node N30, and its input terminal is coupled to the supply voltage source VDD, and its output terminal is coupled to the node NH). The control terminal of the transistor 3 (1) is switched, and its input terminal is coupled to the supply voltage source VDD, and its output terminal is coupled to the control terminal of the transistor mi at the node N30. The transistors 300 and 301 form a current source CS. :Electric crystal shore 3〇2 •^ control and 螂真锋疗尊尧表农藏 VREF, its input terminal is connected to the output end of the transistor 301 at the node N30, and its output terminal is lightly connected to the transistor 1〇3 The output. The control terminal of the transistor 3〇3 receives the bias voltage VBIA, the input end of which is coupled to the output end of the output transistor 1〇3, and the output end thereof is coupled to the ground terminal GND. Referring to Fig. 3', the output transistor and the output unit 3's transistor 201211968 300-303 form a differential amplifier. Capacitor 104 acts as a feedback capacitor for this differential amplifier. The differential amplifier generates a pixel output signal SOUT at node N10 according to the difference between the level of the floating diffusion node FN and the reference signal VREF. During readout, the pixel output signal SOUT is sampled twice for correlated double sampling (CDS) of the read operation. In detail, the pixel output signal SOUT is sampled before the control signal TX is enabled (ie, before time point T4) to generate a base value, and then after the control signal TX is de-asserted (de-asserted) ( It is sampled after time point T5 to produce an output value. The difference between the basic value and the output value is used as a readout signal indicating the intensity of the light sensed by the photodiode 100. In Fig. 2, the reference signal VREF is at a higher level LVH, and at a time point T3 after the reset phase PRST, the reference signal VREF is switched to be at a lower level LVL. When the reset transistor 102 is turned off at the time point T2, the level of the floating diffusion node FN is lowered due to the current injection effect caused by resetting the transistor 102. Assume that the reference signal is continuously maintained at a higher level LVH. Before the time point T4, the differential amplifier generates a higher-order pixel output signal according to the level of the floating diffusion node FN falling and the reference signal VREF having the higher level LVH: SOUT. In other words, the basic value obtained by sampling the pixel output signal SOUT between time points T4 is large. Therefore, the amplitude of the readout signal generated based on the difference between the basic value and the output value is small, which is disadvantageous for the subsequent readout operation. However, in the embodiment of the invention, the reference signal is not always at a higher level LVH. When the reset transistor 102 is turned off at the time point T2, the current injection effect caused by the reset transistor 102 by 201211968 causes the level of the floating diffusion node FN to drop. Further, at time point T3, the reference signal VREF drops to a lower level LVL. Therefore, before the time point T4, the differential amplifier generates the pixel output signal SOUT based on the level of the floating diffusion node FN falling and the reference signal VREF having the lower level LVL. At this time, the level of the pixel output signal SOUT is lower than the level of the pixel output signal SOUT when the reference signal VREF is continuously at the higher level LVH. Therefore, the basic value of Lu is obtained by sampling the pixel output signal SOUT before the time point T4, and does not become larger as the level of the floating diffusion node FN decreases. Therefore, the amplitude of the readout signal generated based on the difference between the basic value and the output value is appropriate. Fig. 4 is a view showing another embodiment of the output unit 11 of Fig. 1 and the pixel unit 10. The output unit 11" includes the transistors 300-303 of Fig. 3. The connection between the transistors 300-303 in the figure is the same as the connection of Fig. 3 except for the connection of the control terminals of the transistor 302 of Fig. 4. Therefore, for the sake of brevity, the connection between the transistors 300-303 is omitted here. The output unit 11" further includes transistors 400-403, wherein the transistors 400-402 are PMOS transistors, and the transistor 403 is NMOS transistor. The control terminal of the transistor 400 receives the coincidence signal EN, the input terminal receives the reference signal VREF, and the output terminal thereof is coupled to the node Ν10. The control terminal of the transistor 401 receives the enable signal EN, the input terminal of which is coupled to the supply voltage source VDD, and the output terminal of which is coupled to the node N30. The control terminal of the transistor 402 receives the coincidence signal ENB, its input terminal receives the reference signal VREF, and its output terminal is coupled to the node N40. The enable signal ENB is the reverse signal of the enable signal EN (i.e., the enable signals ΕΝΒ and ΕΝ are opposite each other). The control terminal of the transistor 403 receives the 201211968 brain's input terminal node, and its output terminal is grounded (four). Since the transistor is moved to 4Μ〇3 as the ρΜ〇§ and 丽(10) transistors and both receive the enable signal ENB, the transistor and 4〇3 are enabled on different radians (4) ENB is turned on. According to Fig. 4, the control terminal of the transistor 302 is not directly receiving the reference signal VREF as in the control terminal of the transistor in Fig. 3. The reference (iv) vref is supplied to the transistor 402, and the control terminal of the transistor 3〇2 receives the reference signal VREF through the transistor 402 turned on by the enable signal ENB. Fig. 5 is a timing chart showing the main signals of the sensing device of Fig. 4 in the reading period. The timing of the reset signal RST, the control signal τ χ, and the reference signal VREF of FIG. 5 is the same as the timing of FIG. 2 . Therefore, the operation of the pixel unit 1A according to the reset signal RST and the control signal 相同 is the same as that described in the third figure. Figure 5 additionally shows the timing used to control the transistor and the enablement of 401. Before the time point Τ31 between the time points η and Τ4, the enable signal εν is reversed to conduct the transistors 400 and 401, and thus the enable signal 致 is enabled to turn off the transistor 402 and conduct power. Crystal 403. At time Τ31, the enable signal ΕΝ is enabled to turn off the transistors 400 and 401, and the enable signal 反 is reversed to conduct the crystal 402 and turn off the transistor 403.
參閱第4圖’輸出電晶邀為魏奥:幕木U，，冬電晶體 300-303及400-402形成一差動放大器。此差動放大器根據 浮動擴散節點FN之物准予參考信號VREF間的差異而於 節點N10上產生晝素輸出信號SOUT。在讀出期間，畫素 輸出信號SOUT為了讀出操作的相關雙重取樣（，CDS ) 而被取樣兩次。詳細來說，參閱第5圖，晝素輸出信號SOUT 201211968 在控制信號τχ被致能之前（即在時間點T4之前）被取樣 以產生一基本值，且接著在控制信號τχ被反致能之後（其 在時間點Τ5之後）被取樣以產生一輸出值。基本值與輸 >出 值之間的差異則作為一讀出信號，其表示光二極體1〇〇所 感測到之光線強度。 根據第5圖之實施例，參考信號VREF為二階電壓信 號。參考信號VREF在介於時間點T1與時間點T3之間時 處於較高位準LVH，且接著在時間點Τ3時切換位處於較 φ 低位準LVL。 參考第4及5圖，在時間點Τ3之前，致能信號四被 反致能以導通電晶體400與401。具有較高位準LVH之朱 考信號VREF透過導通之電晶體4〇〇的傳送，使得節點 之電壓則根據具有較高位準LVH之參考信號VREf而處於 該較高位準LVH。此外，重置信號RST在時間點打與時 間點T2之間被致能以形成重置相位pRST。重置電晶體⑺2 被重置信號PRST所導通以藉由具有較高位準LVh之參考 •信號VREF來重置浮動擴散節點FN之位準。在重置相位 PRST之後的時間點T3，參考信號VREF切換為處於較低 位準LVL。在時間點T31 ,致能信號被致能以關閉電晶.體 400與401 ’而致能信號ENB被反致能以導通電晶體4〇2 並關閉電晶體403。因此，節點N4〇之電壓處於較低位準 LVL。換句話說，節點N40 (即電晶體302之控制端）透 過導通之電晶體402來接收具有較低位準LVL之參考信號 VREF。接著，在時間點T3之後的時間點T4，控制信號 τχ被指能以導通轉移電晶體101以將感測信號ss轉移至 201211968 浮動擴散節點FN。 當重置電晶體102在時間點T2時被關閉，由於重置電 晶體102所導致的電流注入效應，使得浮動擴 fn 之位準由較高位準L V Η下降。假設參考信號VRE F係持續 地處於較高位準LVH。在時間點T4之前’差動放大器根 據浮動擴散節點FN下降後之位準與參考信號VREF來產 生具有較高位準之晝素輸出信號SOUT。換句話說，在時 間點T4之間藉由取樣晝素輸出信號S〇ut所獲得之基本值 較大。因此，根據基本值與輸出值之差異所產生之讀出信 號的擺幅較小，這不利於後續的讀出操作。 然而，在本發明實施例中’參考信號並非一直處於較 高位準LVH。當重置電晶體1〇2於時間點T2關閉時，由 於重置電晶體102所導致的電流注入效應，使得浮動擴散 節點FN之位準下降。此外，在時間點Τ3，參考信號vref 下降至較低位準LVL，且節點N40(電晶體302之控制端） 之電壓透過導通之電晶體402藍接收具有較低位準 參考信號VREF。因此，在時間點T4之前，差動放大器根鲁 據浮動擴散節點FN下降後之位準與節點Ν40之較低位準 LVL來產生畫素輸出信號s〇UT。而此時的晝素輸出信號 严位平低於當參考;信號VREF持續處於較高位準 LVH時的晝素輸出信號SOUT之位準。因此，在時間點T4 之前藉由取樣晝素輸出信號SOUT而獲得之基本值，不會 隨著浮動擴散節點FN之位準下降而變為較大。因此，根 據基本值與輸出值之差而產生之讀出信號的擺幅較為適 當。 12 201211968 成差==實施例’輪出單元11/11V11，，與電日日日體103形 點FN。此外，如第3動圖=之一輸入端域浮動擴散節 圖之貫施例’此差動放大器之另一耠 直接接收參考信號丽;或者如第4圖之實施例輸Referring to Figure 4, the output of the crystal is invited to Weiao: Mumu U, and the winter crystals 300-303 and 400-402 form a differential amplifier. The differential amplifier generates a pixel output signal SOUT at the node N10 according to the difference between the reference signals VREF of the floating diffusion node FN. During readout, the pixel output signal SOUT is sampled twice for the correlated double sampling (, CDS) of the read operation. In detail, referring to FIG. 5, the pixel output signal SOUT 201211968 is sampled before the control signal τ χ is enabled (ie, before time point T4 ) to generate a basic value, and then after the control signal τ χ is reverse enabled (It is after time point Τ5) is sampled to produce an output value. The difference between the basic value and the output > value is used as a readout signal indicating the intensity of the light sensed by the photodiode 1〇〇. According to the embodiment of Fig. 5, the reference signal VREF is a second order voltage signal. The reference signal VREF is at a higher level LVH between time point T1 and time point T3, and then the switching bit is at a lower φ low level LVL at time point Τ3. Referring to Figures 4 and 5, before the time point Τ3, the enable signal four is reversed to conduct the transistors 400 and 401. The test signal VREF having a higher level LVH is transmitted through the turned-on transistor 4〇〇 such that the voltage of the node is at the higher level LVH according to the reference signal VREf having a higher level LVH. Further, the reset signal RST is enabled between the time point and the time point T2 to form the reset phase pRST. The reset transistor (7) 2 is turned on by the reset signal PRST to reset the level of the floating diffusion node FN by the reference signal VREF having a higher level LVh. At the time point T3 after the phase PRST is reset, the reference signal VREF is switched to be at the lower level LVL. At time T31, the enable signal is enabled to turn off the transistor 400 and 401' and the enable signal ENB is reversed to conduct the transistor 4〇2 and turn off the transistor 403. Therefore, the voltage at node N4 is at a lower level LVL. In other words, node N40 (i.e., the control terminal of transistor 302) receives a reference signal VREF having a lower level LVL through conductive transistor 402. Next, at a time point T4 after the time point T3, the control signal τ χ is indicated to turn on the transfer transistor 101 to transfer the sensing signal ss to the 201211968 floating diffusion node FN. When the reset transistor 102 is turned off at the time point T2, the level of the floating spread fn is lowered by the higher level L V 由于 due to the current injection effect caused by resetting the transistor 102. It is assumed that the reference signal VRE F is continuously at a higher level LVH. Before the time point T4, the differential amplifier generates a higher level of the pixel output signal SOUT based on the level of the floating diffusion node FN falling and the reference signal VREF. In other words, the basic value obtained by sampling the pixel output signal S〇ut between the time points T4 is large. Therefore, the read signal generated based on the difference between the basic value and the output value has a small swing, which is disadvantageous for the subsequent read operation. However, the reference signal is not always at a higher level LVH in embodiments of the invention. When the reset transistor 1〇2 is turned off at the time point T2, the level of the floating diffusion node FN is lowered due to the current injection effect caused by resetting the transistor 102. Furthermore, at time point Τ3, the reference signal vref drops to a lower level LVL, and the voltage at node N40 (the control terminal of transistor 302) is received through the turned-on transistor 402 blue to have a lower level reference signal VREF. Therefore, before the time point T4, the differential amplifier generates a pixel output signal s〇UT according to the level of the floating diffusion node FN falling and the lower level LVL of the node Ν40. At this time, the pixel output signal is strictly lower than the reference level; the signal VREF is at the level of the pixel output signal SOUT at a higher level LVH. Therefore, the basic value obtained by sampling the pixel output signal SOUT before the time point T4 does not become larger as the level of the floating diffusion node FN decreases. Therefore, it is appropriate to swing the readout signal based on the difference between the basic value and the output value. 12 201211968 Difference == Embodiment 'The wheeling unit 11/11V11, and the electric day, day, and body 103 point FN. In addition, as in the third motion picture = one of the input end domain floating diffusion diagrams, the other embodiment of the differential amplifier directly receives the reference signal MN; or as in the embodiment of Fig. 4
:有另一輪入端透過導通之電晶體402攔接收 被關二B#，ώ Μ之參考信號VREF。當重置電晶體1〇2 :丄，於電流注入效應使得浮動擴散節點FN之位 妒車乂同位準LVH下降，此外，參考信號vref則下降至 準LVL。因此，晝素輸出信號§㈣之位 者洋動擴散節點^ w ^ 基本餘輸出值之差準下降而變為較大。因此，根據 輸出值之差而產生之讀出信號的擺幅較為適當。 間筮6 1圖係表不根據本發明另-實施例之感測装置。參 閱第6圖，感測裝置6句姓蚩冬_-Μ金主w 1 括感測元件_、重^ 2素早A 。里素早兀60包 源極_器_包=二、以及源極_器_。 之輸人_接輸出電日t 3G2’且源極㈣器咖〇 聊莰铷€日日體302之控制端。晝素單元6〇操作 :曝光其間與讀出期間。參閱第6圖，感測元件㈣係以 ^極體來實現’其陽植電極·接地端GND，而其陰極 極輕接夺動擴散節點FN6〇。重置電晶體3〇1之控制端接 ，重置域RST60 ’其輪人端純電壓源VS6。，且其輸出 端耦接净動擴散節點FN6〇。晝素輸出信號S〇UT6〇根據浮 動擴散節點FN60之位準與電壓源VS6〇而產生於輸出電晶 體602之輸出端上。 在曝光期間，感測元件600感測光線以產生一感測信 號SS60。第7圖係表示在曝光期間後之讀出期間中感測裝 13 201211968 置6的主要信號時序圖。參閱第6及7圖，在讀出期門 重置信號RST60在時間點T1與時間點T2 (時間點 現於時間點Τ1之後）之間被致能，以形成一重置才目位 PRST。重置電晶體601被重置相位PRST所導通，以重 浮動擴散節點FN60之位準。在時間點Τ1與時間點Τ3 (時 間點Τ3出現於時間點Τ2之後）之間，電壓源VS6〇〆於 一較高位準LVH’且在時間點T3上電壓源VS60切換2产 於一較低位準LVL。換句話說，電壓源VS60县> 去w处 疋隹重置相 位PRST之後切換至較低位準LVL。 在讀出期間，晝素輸出信號SOUT60為了讀出操作的 相關雙重取樣（CDS )而被取樣兩次。詳細來說，金素輸 出信號SOUT60在時間點丁2與時間點T3之間被取二以」 生一基本值，且接著在時間點T3之後被取樣以產生一輸出 值。基本值與輸出值之間的差異則作為一讀出信號，其表 示光二極體600所感測到之光線強度。根據第6圖之實施 例，晝素輸出信號SOUT60係根據浮動擴散節點FN6〇之 位準與電壓源VS60而決定的。電壓源VS60並非一直處於 較高位準LVH。在時間點T3,電壓源VS60由較高位準 切換至較低位準lvl。因此，根據在時間點T3之前取樣 獲得之基本值與在時間點Τ3之後取樣獲得之輪出值間的 差異所產生之讀出信號變為較大。 本發明雖以較佳實施例揭露如上，然其並非用以限定 本發明的範圍，任何所屬技術領域中具有通常知識者，在 不脫離本發明之精神和範圍内，當可做些許的更動與潤 飾，因此本發明之保護範圍當視後附之申請專利範圍所界 201211968 定者為準。 【圖式簡單說明】 第1圖表示根據本發明一實施例之感測裝置； 第2圖係表示在曝光期間後之讀出期間令第1 測裝置的主要信號時序圖； 感 第3圖表示第！圖之輸出單元之一實施例與晝 . 一第4圖表示第！圖之輸出單元之另一實施例與晝^單 φ 帛5圖表7F讀出期間中第4圖之感測裝置的主要信號 時序圖； 第6圖表示根據本發明另一實施例之感測裴置；以及 第7圖表示在曝光期間後之讀出期間中第6圖之感淨 裝置的主要信號時序圖。 【主要元件符號說明】 第1圖： 1〜感測裝置； 11〜輸出單元； ιοί〜轉移電晶體； 1〇3〜輪出電晶體； FN〜浮動擴散節點； N10〜節點； SF〜源極隨耦器； SS〜感測信號； VREF〜參考信號； 10〜晝素單元； 1〇〇〜感測元件； 102〜重置電晶體； 104〜電容器； GND〜接地端； RST〜重置信號； S〇UT〜晝素輪出信號; TX〜控制信號； 15 201211968 第2圖： LVH〜較高位準； PRST〜重置相位； 第3圖： 11’〜輸出單元； CS〜電流源； VIBA〜偏壓電壓； 第4圖； 11’〜輸出單元； ΕΝ、ENB〜致能信號； LVL〜較低位準； T1...T5〜時間點； 300...303〜電晶體； N30〜節點；There is another round of input through the conductive transistor 402 to receive the reference signal VREF of the off two B#, ώ 。. When the transistor 1〇2 : 重置 is reset, the current injection effect causes the floating diffusion node FN to drop in the same level LVH, and in addition, the reference signal vref drops to the quasi-LVL. Therefore, the difference between the output of the quaternary output signal § (4) and the output of the basic residual output value becomes larger. Therefore, the swing of the read signal generated based on the difference between the output values is appropriate. The 筮6 1 diagram is not a sensing device according to another embodiment of the present invention. Referring to Figure 6, the sensing device 6 is surnamed 蚩 winter _- Μ gold main w 1 including sensing element _, heavy ^ 2 prime early A. Lisu is 60 packs away from source _ _ _ package = two, and source _ _. The input _ is connected to the output electricity day t 3G2' and the source (four) is the curry of the day. Alizarin unit 6〇 operation: during exposure and during reading. Referring to Fig. 6, the sensing element (4) is realized by the body of the body, and its cathode electrode is lightly connected to the diffusion node FN6. Reset the control termination of the transistor 3〇1 and reset the domain RST60 ’ its pure terminal voltage source VS6. And its output end is coupled to the net motion diffusion node FN6〇. The pixel output signal S〇UT6〇 is generated at the output of the output transistor 602 according to the level of the floating diffusion node FN60 and the voltage source VS6〇. During exposure, sensing element 600 senses light to produce a sense signal SS60. Fig. 7 is a view showing the main signal timing chart of the sensing device 13 201211968 set in the readout period after the exposure period. Referring to Figures 6 and 7, the read gate reset signal RST60 is enabled between the time point T1 and the time point T2 (the time point is after the time point Τ1) to form a reset target PRST. The reset transistor 601 is turned on by the reset phase PRST to re-level the diffusion node FN60. Between time point Τ1 and time point Τ3 (time point Τ3 appears after time point Τ2), voltage source VS6 〇〆 is at a higher level LVH' and at time point T3 voltage source VS60 switches 2 to produce a lower Level LVL. In other words, the voltage source VS60 county> goes to w and switches to the lower level LVL after resetting the phase PRST. During readout, the pixel output signal SOUT60 is sampled twice for correlated double sampling (CDS) of the read operation. In detail, the gold element output signal SOUT60 is taken two times between the time point D2 and the time point T3 to generate a basic value, and then sampled after the time point T3 to generate an output value. The difference between the basic value and the output value is used as a readout signal indicating the intensity of the light sensed by the photodiode 600. According to the embodiment of Fig. 6, the pixel output signal SOUT60 is determined according to the level of the floating diffusion node FN6 and the voltage source VS60. Voltage source VS60 is not always at a higher level LVH. At time point T3, voltage source VS60 switches from a higher level to a lower level lvl. Therefore, the readout signal generated based on the difference between the basic value obtained by sampling before the time point T3 and the round-off value obtained by sampling after the time point Τ3 becomes larger. The present invention has been disclosed in the above preferred embodiments, and is not intended to limit the scope of the present invention. Any one of ordinary skill in the art can make a few changes without departing from the spirit and scope of the invention. Retouching, therefore, the scope of protection of the present invention is subject to 201211968, which is bound by the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a sensing device according to an embodiment of the present invention; Fig. 2 is a view showing a main signal timing chart of a first measuring device during a reading period after an exposure period; The first! One embodiment of the output unit of the figure and 昼. A fourth figure shows the first! Another embodiment of the output unit of the figure and the main signal timing diagram of the sensing device of FIG. 4 in the period of reading 7F of the graph φ5; FIG. 6 shows the sensing 根据 according to another embodiment of the present invention. And FIG. 7 shows a main signal timing chart of the sensor device of FIG. 6 in the readout period after the exposure period. [Main component symbol description] Figure 1: 1~ sensing device; 11~output unit; ιοί~ transfer transistor; 1〇3~ wheel output transistor; FN~ floating diffusion node; N10~ node; SF~source Dependent device; SS~ sensing signal; VREF~ reference signal; 10~ 昼 unit; 1〇〇~ sensing element; 102~ reset transistor; 104~ capacitor; GND~ ground; RST~ reset signal ; S〇UT~昼素轮出出; TX~ control signal; 15 201211968 2nd picture: LVH~higher level; PRST~reset phase; 3rd picture: 11'~output unit; CS~current source; VIBA ~ Bias voltage; Figure 4; 11' ~ output unit; ΕΝ, ENB ~ enable signal; LVL ~ lower level; T1...T5 ~ time point; 300...303~ transistor; N30~ node;
400...403〜電晶體； N40〜節點； 第5圖： T31〜時間點； 第6圖： 6〜感測裝置； 600〜感測元件； 60.2〜輸出電晶體；. GND〜接地端； SF60〜源極隨耦器； SS60〜感測信號； • 60〜畫素單元； 601〜重置電晶體； FN60〜浮動擴散節點； RST60〜重置信號； SOUT60〜畫素輸出信號； VS60〜電壓源。 16400...403~transistor; N40~node; Fig. 5: T31~time point; Fig. 6: 6~ sensing device; 600~ sensing element; 60.2~output transistor; GND~ground; SF60 ~ source follower; SS60 ~ sensing signal; • 60 ~ pixel unit; 601 ~ reset transistor; FN60 ~ floating diffusion node; RST60 ~ reset signal; SOUT60 ~ pixel output signal; VS60 ~ voltage source. 16