201138582 六、發明說明： 【發明所屬之技術領域】 本發明係關於使電氣零 內之內置零件基板及使用其 之製造方法。 【先前技術】 以往，內置零件基板係 有電子零件（參照例如專利 之內置零件基板係具備有： 體電路：及埋設在絕緣基材 相連接而連接於導體電路的 但是，上述習知的內置 置爲主，因此伴隨著高度方 材僅爲一種預浸體（prepre 動較大，在零件的埋設性、 本等方面會有問題。 此外，僅在接近於多層 子零件時，爲了使用配線而 表面安裝零件相連接，必須 此外，在專利文獻1中 連接領域的形成，因此在與 [先前技術文獻] 件或電子零件埋設在絕緣基材 之多層基板以及內置零件基板 以薄型爲目的，僅在單面內置 文獻1 )。專利文獻1所記載 絕緣基材；形成在該雙面的導 之中，其端子部與連接端子部 電子零件。 零件基板由於以小型零件的內 向的限制。此外，由於絕緣基 g )，因此在層積時，高度變 電氣特性、機械特性、材料成 基板之其中一面之側內置有電 與被安裝在其相反側的表面的 在貫穿基板的貫穿孔迂迴。 ，由於使用阻焊劑來進行零件 預浸體的密接方面會有問題。 -5- 201138582 [專利文獻] [專利文獻1 ]日本特開2 0 1 0 - 2 7 9 1 7號公報 【發明內容】 (發明所欲解決之課題） 本發明係考慮到上述習知技術者，除了小型零件以外 ，亦將大型的電氣或電子零件內置在基板的單面或雙面， 而且無須透過中間層，即可直接以貫穿孔來連接形成在雙 面的導體電路。此外，目的在提供可使用貫穿基板內部的 貫穿孔而將所內置的零件與基板表面的電路相連接，並且 在將絕緣基材與零件支持板作層積時抑制作爲基板的高度 變動，可提升零件的埋設性、電氣特性、機械特性，而且 與預浸體的密接良好的內置零件基板及使用其之多層基板 以及內置零件基板之製造方法。 (解決課題之手段） 爲達成前述目的，在本發明中係提供一種內置零件基 板，其特徵爲具備有：層積僅由樹脂材料所形成且彼此物 理特性不同的複數樹脂層所形成的絕緣基材；露出於前述 絕緣基材表面的導體圖案；及被埋設在該絕緣基材，具有 與前述導電圖案作電性連接的連接端子的電氣或電子零件 ，前述零件係橫切前述複數樹脂層的交界面而配置。 較佳爲配置在前述導體圖案側的前述樹脂層的硬度係 比配置在相鄰的前述絕緣基材的內側的前述樹脂層的硬度 -6- 201138582 爲低。 較佳爲配置在前述導體圖案側的前述樹脂 比配置在相鄰的前述絕緣基材的內側的前述樹 ，其流動性較高、介電損失較低、與導體的密 較佳爲配置在相鄰的前述絕緣基材的內側 層係可廣泛選擇介電常數。 較佳爲配置在相鄰的前述絕緣基材的內側 層的材質係比配置在前述導體圖案側的前述樹 ，其玻璃轉移溫度較高' 熱膨脹率較低、材料 價。 較佳爲前述零件係具有分別與形成在前述 雙面的前述導體圖案相連接的第1零件本體、 本體。 此外，在本發明中係提供一種多層基板， 有：1或複數中間層；及夾持該中間層而被配 側的最外層，前述中間層或前述最外層的任一 利範圍第1項之內置零件基板。 較佳爲前述第1零件本體及前述第2零件 與形成在接近於連接端子之側之前述最外層的 連接。 此外，在本發明中係提供一種內置零件基 法，其特徵爲：依序進行：阻劑形成工程，使 導電層之中應與電氣或電子零件的連接端子作 零件連接領域露出而形成阻焊劑；連接工程， 層的材質係 脂層的材質 接力較局。 的前述樹脂 的前述樹脂 脂層的材質 成本較爲廉 絕緣基材之 與第2零件 其特徵爲具 置在最爲外 者爲申請專 本體係分別 導體圖案相 板之製造方 支持板上之 電性連接的 將前述連接 201138582 端子與前述零件連接領域透過連接材料而作電性連接；及 埋設工程，將僅由樹脂材料所形成且彼此物理特性不同的 複數樹脂層重疊而形成絕緣基材，對形成在前述絕緣基材 的貫穿孔，插通與前述導電層之前述零件連接領域相連接 之狀態的前述零件，以前述零件橫切前述複數樹脂層之交 界面的方式將前述導電層與前述樹脂層進行壓接，並且在 前述貫穿孔內塡充前述樹脂材料而將前述零件埋設在前述 樹脂層內。 較佳爲在前述埋設工程實施前，具備有用以將導電層 表面粗面化的粗面化處理工程、及用以將前述零件連接領 域平坦化的平坦化處理工程。 更佳爲前述平坦化處理工程係〇〜5 /z m的微蝕刻、 或1〜20分鐘的酸洗淨、或灰化量100A〜50000A的電漿 蝕刻的任一者。 (發明之效果） 藉由本發明，由於在由物理特性不同的樹脂層所構成 的絕緣基材埋設有電氣或電子零件，因此在藉由層積來埋 設零件時可抑制樹脂變形，而且藉由流動性良好的樹脂來 提升零件的埋設性。該效果係可藉由以橫切樹脂層的交界 面的方式使零件作配置而顯著獲得。 此外，由於在由不同的樹脂層所構成的絕緣基材埋設 有電氣或電子零件，因此可使高頻特性提升。 此外，由於在由不同的樹脂層所構成的絕緣基材埋設 -8 - 201138582 有電氣或電子零件，因此可使與導體的密接力提升。 此外，由於在由不同的樹脂層所構成的絕緣基材埋設 有電氣或電子零件，因此可使耐熱性及貫穿孔的連接可靠 性提升。 此外，由於在由不同的樹脂層所構成的絕緣基材埋設 有電氣或電子零件，因此可使特性阻抗、電源阻抗的控制 提升。 此外，由於在由不同的樹脂層所構成的絕緣基材埋設 有電氣或電子零件，因此可使各種特性提升，並且使材料 成本減低。 此外，藉由將配置在導體圖案側的樹脂層的硬度比配 置在相鄰的絕緣基材的內側的樹脂層的硬度爲低，亦即藉 由將配置在基板內側的樹脂層的硬度比配置在基板外側的 樹脂層的硬度爲高，可抑制樹脂層變形，且可抑制基板之 高度方向的偏移發生。 此外，藉由去除經粗面化處理之導電層上的有機皮膜 ，可一面維持良好的焊料擴展、焊料內圓角形狀，一面使 與絕緣基材的密接力提升。 此外，藉由在基板雙面內置電子零件，使用配線而與 安裝在多層基板的表背面的表面安裝零件相連接時，無須 在貫穿基板的貫穿孔迂迴，即可以最短距離由內置零件至 最外層的導體圖案形成導體電路。 此外，當在基扳雙面內置有電子零件時，利用貫穿基 板的貫穿孔，可以最短距離連接配設在基板雙面的電子零 -9 * 201138582 件彼此。 此外，藉由將1或複數內置零件基板配置在多層基板 的任意位置，使設計自由度提升。 此外，藉由本發明，藉由預先在樹脂層設置貫穿孔’ 可埋設大型的電氣或電子零件。 【實施方式】 如第1圖所示，備妥支持板1。支持板1爲例如SUS 板。接著，如第2圖所示，在支持板1上形成導電層2。 導電層2爲例如銅鍍敷。接著，如第3圖所示，在導電層 2上形成阻焊劑3 »該阻焊劑3係以露出預定部分的導電 層2的方式所形成。導電層2的露出部分係形成爲未來應 與電氣或電子零件的連接端子作電性連接的零件連接領域 4。該第1關〜第3圖爲阻劑形成工程。 接著，如第4圖所示，備妥電氣或電子零件5。將該 零件5的連接端子6、與導電層2的零件連接領域4作電 性連接。該連接係在連接端子6與零件連接領域4之間介 在有利用乳脂焊料等連接材料的焊料回焊7來進行。藉此 形成零件支持體1 2。形成爲該第4圖的狀態即爲連接工 程。 接著’如第5圖所示’備妥彼此物理特性（在本例中 爲硬度）不同的樹脂層8、9。樹脂層8係所謂的預浸體 。樹脂層9係使預浸體硬化者。樹脂層8、9係分別具有 貫穿孔10、11。該貫穿孔10、11係形成爲零件5可插通 -10- 201138582 的大小。貫穿孔1 〇、1 1係形成在層積樹脂層8、9時呈接 連的位置。在圖中係顯示由上下兩側層積零件支持體12 (支持板1予以省略）之例。因此，在樹脂層9係以上下 零件5揷通的方式在2部位設有貫穿孔1 1。接著，將零 件5穿通至貫穿孔1 0、1 1，將上側的零件支持體1 2、樹 脂層8 '樹脂層9、樹脂層8 >下側的零件支持體12重疊 壓接。 藉此，如第6圖所示，該等係予以層積而形成有基板 中間體13。樹脂層8及9係被層積而一體化，且被塡充 在貫穿孔1 〇、1 1的間隙。藉此形成絕緣基材1 5。因此， 零件5係被埋設在絕緣基材1 5。由於預先設有貫穿孔1 0 、11，因此在層積時可抑制零件5之壓力。因此，可將大 型的零件5埋設在絕緣基材15內》樹脂層8及9的交界 面18係位於零件5的上面5a與下面5b之間。更詳而言 之，將零件5揷通的樹脂層8及9的交界面18係位於其 所揷通的零件5中的上面5a與下面5b之間。該第5圖〜 第6圖爲埋設工程。 接著，如第7圖所示，使用蝕刻等而在導體層2形成 導體圖案14。亦可視需要設置貫穿孔16，在貫穿孔16內 進行鍍敷處理而使雙面導通。藉此形成內置零件基板17 。其中，由於樹脂層8及9僅以樹脂材料所形成，因此可 形成如上所示之貫穿孔1 6。因此，設計導體電路的自由 度得以提升。此外，如第7圖所示，當在基板1 7的雙面 內置電子零件5時，利用貫穿基板17的貫穿孔16，可以 -11 - 201138582 最短距離連接配設在基板1 7之雙面的電子零件5彼此。 參照第7圖可知’經由上述製造工程所得之內置零件 基板17係具備有：絕緣基材15、電氣或電子零件5、及 導體圖案1 4。如上所述’零件5係被埋設在絕緣基材j 5 。導體圖案1 4係與零件5的連接端子6作電性連接，且 露出於絕緣基材15的表面。絕緣基材15係層積有樹脂層 8及9者。樹脂層8及9係僅以樹脂材料所形成。接著， 如上所述，樹脂層8及9的硬度係彼此不同。此外，樹脂 層8及9的交界面18係位於零件5的上面5 a與下面5b 之間。 如上所示，在由硬度不同的樹脂層8及9所構成的絕 緣基材15埋設有電氣或電子零件5，因此在藉由層積來 埋設零件5時可抑制樹脂變形，而使零件5的埋設性提升 。伴隨於此，零件5的電氣特性、機械特性亦提升。該效 果係可藉由使樹脂層8及9的交界面18位於零件5的上 面5a與下面5b之間而顯著獲得。亦即，樹脂層8及9彼 此協同作動而使零件5的埋設性提升。例如，若使配置在 導體圖案1 4側的樹脂層8的硬度比配置在相鄰的絕緣基 材1 5內側的樹脂層9的硬度爲低，則在層積時可提高與 應作爲導體圖案14的導電層2的密接性，並且由於具有 硬度高的樹脂層，因此可抑制作爲絕緣基材1 5時的變形 ，可抑制基板17的高度方向的偏移發生。 其中，爲了提高樹脂層8與導電層2的密接性，亦可 在導電層2施行粗面化處理。該粗面化處理工程係在前述 -12- 201138582 埋設工程之前實施。此外，爲了確保用以將零件5的連接 端子6與零件連接領域4相連接的連接材料（焊料）的良 好擴展性，亦可在埋設工程之前先實施用以將零件連接領 域4平坦化的平坦化處理工程。在導電層2的表面全體施 行粗面化處理之後，藉由在零件連接領域4施行平坦化處 理，來去除經粗面化處理的導電層2上的有機皮膜，而可 一面維持良好的焊料擴展、焊料內圓角形狀，一面使與絕 緣基材10的密接力提升。平坦化處理工程係可使用0〜5 Μ 1«的微蝕刻、或1〜20分鐘的酸洗淨、或灰化量1 00A 〜50000A的電漿蝕刻的任一者。 如上所述，該例中的零件5係具有：與形成在基板 1 7 (絕緣基材1 5 )上側的導體圖案1 4作電性連接的第1 零件本體19、及與形成在下側的導體圖案14作電性連接 的第2零件本體20。第7圖中所說明的基板17係針對在 基板雙面內置有零件5之所謂的雙面內置基板加以說明， 但是針對僅在基板單面內置有零件5之所謂的單面內置基 板，本發明亦當然適用。此外，亦當然適用於多層基板 22 > 適用作爲多層基板22之例係如第8圖〜第1 0圖所示 。在第8圖〜第1 0圖中任一基板1 7均作爲中間層加以使 用，但是當然亦可作爲最外層加以使用。第8圖的多層基 板22係在基板1 7外側配置有具有連接穿孔2 1的基板23 。基板17與基板23係透過金屬糊的凸塊24而相層積。 第9圖的多層基板22係使用2枚基板17而將該等利用金 -13- 201138582 屬糊的凸塊24予以連接者。第10圖的多層基板22係透 過凸塊24而與具有連接穿孔21的基板23相連接者。 在上述任一多層基板22中，零件5(第1零件本體 19及第2霧件本體20)及連接端子6係可設置在接近最 外層之側，因此可以至多層基板2 2之最外層的導體圖案 爲最短距離來形成導體電路。 此外，藉由將1或複數基板17配置在多層基板22的 任意位置，使設計自由度提升》 其中，在上述中係以硬度作爲樹脂層8、9之物理特 性的不同爲例加以說明，但是在流動性、介電損失、介電 常數、與導體的密接性、玻璃轉移溫度、熱膨脹率爲不同 者，亦可得相同效果。再者，即使材料價格不同，亦可得 相同效果。 【圖式簡單說明】 第1圖係依序顯示本發明之內置零件基板之製造方法 的槪略圖。 第2圖係依序顯示本發明之內置零件基板之製造方法 的槪略圖。 第3圖係依序顯示本發明之內置零件基板之製造方法 的槪略圖。 第4圖係依序顯示本發明之內置零件基板之製造方法 的槪略圖。 第5圖係依序顯示本發明之內置零件基板之製造方法 -14- 201138582 的槪略圖。 第6圖係依序顯示本發明之內置零件基板之製造方法 的槪略圖。 第7圖係本發明之內置零件基板的槪略圖。 第8圖係顯示本發明之多層基板的槪略圖。 第9圖係顯示本發明之其他多層基板的槪略圖。 第10圖係顯示本發明之另一其他多層基板的槪略圖 【主要元件符號說明】 1 :支持板 2 :導電層 3 :阻焊劑 4 :零件連接領域 5 :電氣或電子零件 5 a :零件的上面 5 b :零件的下面 6 :連接端子 7 :焊料回焊 8 :樹脂層 9 :樹脂層 1 〇 :貫穿孔 1 1 :貫穿孔 1 2 :零件支持體 -15- 201138582 1 3 :基板中間體 14 :導體圖案 1 5 :絕緣基材 1 6 :貫穿孔 1 7 :內置零件基板 1 8 :交界面 1 9 :第1零件本體 20:第2零件本體 2 1 :連接穿孔 2 2 :多層基板 2 3 :基板 24 :凸塊BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a built-in component substrate in which electrical is made to zero and a method of manufacturing the same. [Prior Art] Conventionally, the built-in component substrate is provided with electronic components (see, for example, the patented built-in component substrate includes: a body circuit: and an embedded insulating substrate are connected to the conductor circuit, but the above-described conventional built-in Mainly, the height of the square material is only one type of prepreg (the prepre is large, and there is a problem in the embedding property of the part, etc. In addition, the surface is used only for wiring when it is close to the multilayer sub-parts. In addition, in the case of the connection of the mounting parts, the connection field is formed in Patent Document 1, and therefore, the multilayer substrate and the built-in component substrate embedded in the insulating substrate with the [prior art document] or the electronic component are thin, and only Insulation base material described in Patent Document 1; the terminal portion and the connection terminal portion electronic component are formed in the double-sided guide. The component substrate is restricted by the inward direction of the small component. Base g), so when laminated, the height changes electrical characteristics, mechanical properties, and the material is built into one side of the substrate Electrically detour surface is mounted on the opposite side of the through hole through the substrate. There is a problem in the use of solder resist to bond the parts to the prepreg. [Patent Document 1] [Patent Document 1] Japanese Patent Laid-Open Publication No. H01-2001-1996--------------------------------- The present invention is based on the above-mentioned prior art. In addition to small parts, large electrical or electronic parts are also built into one or both sides of the substrate, and the conductor circuits formed on both sides can be directly connected by through holes without passing through the intermediate layer. Further, it is an object of the present invention to provide a through-hole that penetrates the inside of a substrate to connect the built-in component to a circuit on the surface of the substrate, and to suppress height variation as a substrate when the insulating substrate and the component support plate are laminated. A built-in component substrate having good embedding properties, electrical characteristics, and mechanical properties, and a good adhesion to the prepreg, and a multilayer substrate using the same, and a method of manufacturing the built-in component substrate. (Means for Solving the Problem) In order to achieve the above object, in the present invention, there is provided a built-in component substrate characterized by comprising: an insulating base formed by laminating a plurality of resin layers which are formed only of a resin material and have different physical properties from each other a conductor pattern exposed on a surface of the insulating substrate; and an electrical or electronic component embedded in the insulating substrate and having a connection terminal electrically connected to the conductive pattern, wherein the component is transverse to the plurality of resin layers Configured at the interface. It is preferable that the hardness of the resin layer disposed on the side of the conductor pattern is lower than the hardness of the resin layer -6 to 201138582 disposed on the inner side of the adjacent insulating substrate. Preferably, the resin disposed on the side of the conductor pattern is higher in fluidity and lower in dielectric loss than the tree disposed on the inner side of the adjacent insulating substrate, and is preferably disposed in phase with the conductor. The dielectric layer can be widely selected from the inner layer of the aforementioned insulating substrate. It is preferable that the material of the inner layer of the adjacent insulating base material is higher than the above-mentioned tree disposed on the side of the conductor pattern, and the glass transition temperature is high, and the coefficient of thermal expansion is low and the material is expensive. Preferably, the component has a first component body and a body that are respectively connected to the conductor pattern formed on the double-sided surface. Further, in the present invention, there is provided a multilayer substrate comprising: 1 or a plurality of intermediate layers; and an outermost layer which is sandwiched by the intermediate layer, and the intermediate layer or the outermost layer of any of the outermost regions Built-in part substrate. Preferably, the first component body and the second component are connected to the outermost layer formed on the side close to the connection terminal. In addition, in the present invention, a base method for a built-in component is provided, which is characterized in that: a resist formation process is performed, and a solder resist is formed by exposing a connection portion of a conductive layer to an electrical or electronic component as a component connection field. ; connection engineering, the material of the layer is the material of the grease layer. The material of the resinous layer of the resin is relatively inexpensive, and the second component is characterized in that it has the outermost part of the manufacturer's support plate for the conductor pattern plate of the application system. The connection of the connection of the connection terminal 201138582 and the aforementioned part connection area is electrically connected through the connection material; and the embedding process, the plurality of resin layers formed only of the resin material and having different physical properties are superposed to form an insulating substrate, The through hole formed in the insulating base material is inserted into the part connected to the component connection area of the conductive layer, and the conductive layer and the resin are formed so that the part crosses the interface of the plurality of resin layers The layer is pressure-bonded, and the aforementioned resin material is filled in the through hole to embed the above-mentioned part in the resin layer. Preferably, before the implementation of the embedding process, a roughening treatment project for roughening the surface of the electroconductive layer and a planarization treatment project for flattening the connection region of the components are provided. More preferably, it is any of the micro-etching of the flattening processing system 〇 5 / z m, or the acid cleaning of 1 to 20 minutes, or the plasma etching of the amount of ashing 100A - 50000A. (Effect of the Invention) According to the present invention, since electrical or electronic components are embedded in an insulating base material made of a resin layer having different physical properties, deformation of the resin can be suppressed when the components are buried by lamination, and flow can be suppressed. A good resin to improve the embedding of parts. This effect can be remarkably obtained by arranging the parts in such a manner as to cross the interface of the resin layers. Further, since electrical or electronic parts are embedded in an insulating base material composed of different resin layers, high frequency characteristics can be improved. Further, since the insulating base material composed of different resin layers is embedded with -8 - 201138582, there is an electrical or electronic component, so that the adhesion to the conductor can be improved. Further, since electrical or electronic components are embedded in the insulating base material composed of different resin layers, heat resistance and connection reliability of the through holes can be improved. Further, since electrical or electronic parts are embedded in the insulating base material composed of different resin layers, the control of the characteristic impedance and the power source impedance can be improved. Further, since electrical or electronic parts are buried in the insulating base material composed of different resin layers, various characteristics can be improved and the material cost can be reduced. Further, by setting the hardness of the resin layer disposed on the conductor pattern side to be lower than the hardness of the resin layer disposed inside the adjacent insulating substrate, that is, by arranging the hardness ratio of the resin layer disposed inside the substrate The hardness of the resin layer on the outer side of the substrate is high, and deformation of the resin layer can be suppressed, and occurrence of offset in the height direction of the substrate can be suppressed. Further, by removing the organic film on the roughened conductive layer, the adhesion to the insulating substrate can be improved while maintaining good solder spread and solder fillet shape. In addition, by connecting the electronic components on both sides of the substrate and using the wiring to connect to the surface mounting components mounted on the front and back surfaces of the multilayer substrate, it is not necessary to wander through the through holes of the substrate, that is, the shortest distance from the built-in parts to the outermost layer The conductor pattern forms a conductor circuit. Further, when electronic components are built in both sides of the base plate, the electronic zero -9 * 201138582 pieces disposed on both sides of the substrate can be connected to each other with the shortest distance by using the through holes penetrating through the substrate. Further, the degree of freedom in design is improved by arranging one or a plurality of built-in component substrates at arbitrary positions on the multilayer substrate. Further, according to the present invention, a large-sized electrical or electronic component can be buried by providing a through hole in the resin layer in advance. [Embodiment] As shown in Fig. 1, a support plate 1 is prepared. The support board 1 is, for example, a SUS board. Next, as shown in FIG. 2, the conductive layer 2 is formed on the support plate 1. The conductive layer 2 is, for example, copper plating. Next, as shown in Fig. 3, a solder resist 3 is formed on the conductive layer 2. The solder resist 3 is formed to expose a predetermined portion of the conductive layer 2. The exposed portion of the conductive layer 2 is formed into a component connection field 4 which should be electrically connected to a connection terminal of an electric or electronic component in the future. The first to third figures are resist formation processes. Next, as shown in Fig. 4, electrical or electronic parts 5 are prepared. The connection terminal 6 of the component 5 is electrically connected to the component connection region 4 of the conductive layer 2. This connection is made between the connection terminal 6 and the component connection region 4 by solder reflow 7 using a bonding material such as cream solder. Thereby, the part support 1 2 is formed. The state formed in the fourth figure is the connection process. Next, as shown in Fig. 5, resin layers 8 and 9 having different physical properties (hardness in this example) are prepared. The resin layer 8 is a so-called prepreg. The resin layer 9 is used to harden the prepreg. The resin layers 8, 9 have through holes 10, 11, respectively. The through holes 10, 11 are formed such that the part 5 can be inserted through the size of -10-201138582. The through holes 1 〇 and 1 1 are formed at positions where they are connected when the resin layers 8 and 9 are laminated. In the figure, an example in which the component support 12 (the support plate 1 is omitted) is laminated by the upper and lower sides. Therefore, the through hole 1 1 is provided in two places in such a manner that the resin layer 9 is placed above the lower part 5 . Next, the workpiece 5 is passed through the through holes 10 and 161, and the upper part support body 2, the resin layer 8' resin layer 9, the resin layer 8 > the lower part support 12 are superposed and pressure-bonded. Thereby, as shown in Fig. 6, these substrates are laminated to form the substrate intermediate body 13. The resin layers 8 and 9 are laminated and integrated, and are filled in the gaps between the through holes 1 and 11. Thereby, the insulating substrate 15 is formed. Therefore, the part 5 is embedded in the insulating base material 15 . Since the through holes 10 and 11 are provided in advance, the pressure of the part 5 can be suppressed at the time of lamination. Therefore, the large-sized component 5 can be embedded in the insulating base material 15. The interface 18 of the resin layers 8 and 9 is located between the upper surface 5a and the lower surface 5b of the component 5. More specifically, the interface 18 of the resin layers 8 and 9 through which the component 5 is passed is located between the upper surface 5a and the lower surface 5b of the member 5 which is passed through. The 5th to 6th drawings are buried projects. Next, as shown in Fig. 7, the conductor pattern 14 is formed on the conductor layer 2 by etching or the like. The through hole 16 may be provided as needed, and a plating process may be performed in the through hole 16 to turn the double side. Thereby, the built-in component substrate 17 is formed. Among them, since the resin layers 8 and 9 are formed only of a resin material, the through holes 16 as shown above can be formed. Therefore, the degree of freedom in designing the conductor circuit is improved. Further, as shown in FIG. 7, when the electronic component 5 is built on both sides of the substrate 17, the through hole 16 penetrating the substrate 17 can be connected to the both sides of the substrate 17 by the shortest distance of -11 - 201138582. Electronic parts 5 are each other. Referring to Fig. 7, the built-in component substrate 17 obtained through the above-described manufacturing process includes an insulating base material 15, electrical or electronic component 5, and a conductor pattern 14. As described above, the part 5 is embedded in the insulating substrate j 5 . The conductor pattern 14 is electrically connected to the connection terminal 6 of the component 5 and exposed on the surface of the insulating substrate 15. The insulating base material 15 is formed by laminating resin layers 8 and 9. The resin layers 8 and 9 are formed only of a resin material. Next, as described above, the hardness of the resin layers 8 and 9 is different from each other. Further, the interface 18 of the resin layers 8 and 9 is located between the upper surface 5a and the lower surface 5b of the part 5. As described above, since the electrical or electronic component 5 is embedded in the insulating base material 15 composed of the resin layers 8 and 9 having different hardnesses, the resin deformation can be suppressed when the component 5 is buried by lamination, and the component 5 can be prevented. Increased embedding. Along with this, the electrical characteristics and mechanical properties of the component 5 are also improved. This effect can be remarkably obtained by arranging the interface 18 of the resin layers 8 and 9 between the upper surface 5a and the lower surface 5b of the part 5. That is, the resin layers 8 and 9 act in concert with each other to improve the embedding property of the component 5. For example, when the hardness of the resin layer 8 disposed on the side of the conductor pattern 14 is lower than the hardness of the resin layer 9 disposed inside the adjacent insulating substrate 15, it can be improved as a conductor pattern during lamination. Since the conductive layer 2 of 14 has adhesiveness and has a resin layer having a high hardness, deformation at the time of the insulating base material 15 can be suppressed, and occurrence of a shift in the height direction of the substrate 17 can be suppressed. However, in order to improve the adhesion between the resin layer 8 and the conductive layer 2, the conductive layer 2 may be subjected to a roughening treatment. This roughening treatment was carried out before the above-mentioned -12-201138582 embedding project. Further, in order to ensure good spreadability of the connecting material (solder) for connecting the connection terminal 6 of the component 5 to the component connection region 4, it is also possible to perform flattening for flattening the component connection region 4 before the embedding process. Processing project. After the roughening treatment is performed on the entire surface of the conductive layer 2, the organic film on the roughened conductive layer 2 is removed by performing the planarization treatment in the component connection region 4, while maintaining good solder extension. The shape of the fillet of the solder increases the adhesion to the insulating substrate 10 on one side. The flattening process can use either 0 to 5 Μ 1 « microetching, or acid cleaning for 1 to 20 minutes, or plasma etching with a ashing amount of 100 A to 50000 A. As described above, the component 5 in this example has the first component body 19 electrically connected to the conductor pattern 14 formed on the upper side of the substrate 17 (insulating substrate 15), and the conductor formed on the lower side. The pattern 14 is electrically connected to the second part body 20. The substrate 17 described in FIG. 7 is a so-called double-sided built-in substrate in which the component 5 is embedded on both sides of the substrate. However, the present invention is directed to a so-called single-sided built-in substrate in which the component 5 is built on only one side of the substrate. Of course, it applies. Further, it is of course also applicable to the multilayer substrate 22 > Applicable as the multilayer substrate 22 is as shown in Figs. 8 to 10 . Any of the substrates 17 in Figs. 8 to 10 is used as an intermediate layer, but it is of course also possible to use it as the outermost layer. In the multilayer substrate 22 of Fig. 8, a substrate 23 having a connection via 21 is disposed outside the substrate 17. The substrate 17 and the substrate 23 are laminated through the bumps 24 of the metal paste. In the multilayer substrate 22 of Fig. 9, two substrates 17 are used, and the bumps 24 of the gold-13-201138582 paste are connected. The multilayer substrate 22 of Fig. 10 is connected to the substrate 23 having the connection vias 21 via the bumps 24. In any of the multilayer substrates 22 described above, the component 5 (the first component body 19 and the second mist body 20) and the connection terminal 6 can be disposed on the side close to the outermost layer, so that the outermost layer of the multilayer substrate 2 2 can be The conductor pattern is the shortest distance to form the conductor circuit. Further, by arranging one or a plurality of substrates 17 at any position of the multilayer substrate 22, the degree of freedom in design is improved. In the above, the hardness is used as an example of the difference in physical properties of the resin layers 8 and 9, but The same effect can be obtained in terms of fluidity, dielectric loss, dielectric constant, adhesion to a conductor, glass transition temperature, and thermal expansion coefficient. Furthermore, even if the material prices are different, the same effect can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a method of manufacturing a built-in component substrate of the present invention in order. Fig. 2 is a schematic view showing the method of manufacturing the built-in component substrate of the present invention in order. Fig. 3 is a schematic view showing the manufacturing method of the built-in component substrate of the present invention in order. Fig. 4 is a schematic view showing the manufacturing method of the built-in component substrate of the present invention in order. Fig. 5 is a schematic view showing the manufacturing method of the built-in component substrate of the present invention -14-201138582 in order. Fig. 6 is a schematic view showing the manufacturing method of the built-in component substrate of the present invention in order. Fig. 7 is a schematic view showing the built-in component substrate of the present invention. Fig. 8 is a schematic view showing a multilayer substrate of the present invention. Fig. 9 is a schematic view showing another multilayer substrate of the present invention. Figure 10 is a schematic view showing another multilayer substrate of the present invention. [Main component symbol description] 1 : Support plate 2 : Conductive layer 3 : Solder resist 4 : Part connection field 5 : Electrical or electronic parts 5 a : Parts Upper 5 b : Lower part of the part 6 : Connection terminal 7 : Solder reflow 8 : Resin layer 9 : Resin layer 1 〇 : Through hole 1 1 : Through hole 1 2 : Part support -15 - 201138582 1 3 : Substrate intermediate 14 : Conductor pattern 1 5 : Insulation substrate 1 6 : Through hole 1 7 : Built-in component substrate 1 8 : Interface 1 9 : First part body 20 : Second part body 2 1 : Connection hole 2 2 : Multilayer substrate 2 3: substrate 24: bump