201137603 六、發明說明： 【發明所屬之技術領域】 本發明關於-種除錯系統及其相關方法，尤指一種用來制及控 制電腦主機狀態之除錯系統及其相關方法。 【先前技術】 Λ 幻丨貝利地啟動，即須使用除錯卡來檢測^ 腦，然而由⑽f卿雜，_綱碼 、 此，為了能順利地戦每1除錯碼，逐筆完整顯 ^中:民國專利_72號專利的一種顯示基本輸入丄㈣ 碼完整訊息的方法，相關裝置設計如第丨圖辭，2出t 裝置31及-電子裝置4。之基本架鮮_ 置=二貝招 讀記憶體Μ、-運算單元52、—輸入輸出軸⑶置:包Η 裝置54，其中唯讀記_51用來儲存—基本-…線傳輪201137603 VI. Description of the Invention: [Technical Field] The present invention relates to a debug system and related methods, and more particularly to a debug system for controlling and controlling the state of a computer host and related methods. [Prior Art] 丨 丨 丨 丨 丨 丨 启动 , , , , , , , , , , , , 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨^中: A method of displaying the basic input 丄(4) code complete message of the Patent No. 72 of the Republic of China, the related device design is as shown in the figure, the t device 31 and the electronic device 4. The basic frame fresh _ set = two shells read memory Μ, - arithmetic unit 52, - input and output shaft (3) set: package 装置 device 54, which only read _51 for storage - basic - ... line pass
Input Output System, BIOS) ί- -v , 鞔出系統（Basic 权式，運真單元52用λ 入輸出系統程式，輸人輸料模組53騎=執行該基本輸 介面，無線傳輸裝置54用來傳^ 1與外界溝通之 -無線傳置54、—輪人輸料模组幻 ^裝置40包含 算單元52及—顯示私％ ,其中無線傳卓元55、一運 置W傳來之訊,!顧，輪端出埠模組 料接收_ 卞裝置40與外界淺 201137603 通之，I面’儲存單元55用來儲存—資料表 所有相關運算，顧+@ _ 异早凡52用來執仃 訊裝置6醜线後相關之訊息。域即可將資 拉: 基本輸入輸出系統偵錯碼無線傳送至電子_置4〇 Α 鞛由電子裝置40之運作，將原本只 =置4〇,再 完整之訊她梅之。 恤質之偵錯碼，對照出其 '、、;而’若是在除錯過程巾欲進行基本輸 進行控制及運作狀態的偵測等額外檢測操作，SIT 外安裝其他的控制介面卡，如此 _則而要另 亦會造成在除錯操作上的諸多不便。θ除錯時程，同時 【發明内容】 包含本-發ΓΓ其—安種;制電《主機狀態之除峨，其 •出 _片，來 連接於該基本輸入輸出系 da曰片，其電 輸出系統更_更新該基:輸二==:=人 來與該控制晶片進行資料傳 d包輸單元，其用 料傳輸單元傳輸該基本輸八輸：二用來控制該資 該控制靡心顯示 201137603 +彳貞麻_—域板之^^ L的方法，麵錯卡钱_域板上， j 輸出系統日日日片，該方法包含馳-舞㈣基本輪入 動更新；讀取基本輸人輸出系統㈣龍；偵_;=== 統晶片之燒錄_並根據該應賴置所傳來之該基本輸人輪=系 更新資料針對該基本輸人輪出系統^進行燒錄錚否·、先 =該主機板;該除錯卡儲存該基本輸入輸出心= 所傳來之該除錯資料。 及德用打顯不從鱗錯卡 【實施方式】 第2圖’其為本發明—較佳實施例—除錯系統1〇 ^除錯糸統刚包含—除錯卡1〇2及一電子裝置刚；除^ =於:主機板106上的一組件互連插槽1〇8，其較 ^互賴__(PCI)㈣或4速周雜件互賴流術= j-E)插t此外，除錯卡陶電連接於主機板上刚之—電^ 二〇及-基本輸入輸出系統接腳112;除錯卡 ^ 輸二輸出系統晶片114、一控制晶片u— 入輸出系統晶片m用來控制主機板的運作；控制= : 傾入輪出糸統晶片114、儲存基本輸入輪出系 201137603 統晶片114執行開機自我測試（p〇wer〇nSelfTest,p〇sT)時所產 生之除錯資料及讀取主機板1%之—電源運作狀態與—硬碟運作狀 態；顯示裝置118電連接於㈣“ 116，翻來顯示該除錯資料。 •处電子裝置1〇4編^除錯卡1〇2，其較佳地為一電腦，其包含一 資料傳輸單元120及一應用裝置122 ;資料傳輸單元120用來與控 制晶片116進行資料傳輸，在此實施例中，其較佳地為-無線傳輸 裝置或-資料傳輸線；應用裝置122用來控制資料傳輸單元⑽傳 輸該基本輸入輸出系統更新資料至控制晶片116及顯示該除錯資 料，應用裝置122較佳地為安裝於電子裝置1()4内的—使用者介面 軟體，此外，應用裝置122另用來提供一基本輸入輸出系統更新按 鈕圖不124、-電源狀態圖示126、一硬碟狀態圖示128、一單步追 蹤圖示130、-電源按紐圖示132及一重置按紐圖示…。 以下針對除錯系統刚之作動進行詳細說明。首先，請參閱第3 圖’其為本發明一較佳實施例利用第2圖所示除錯系統謂更新基 本輸入輸出系統資料以及紀錄除錯f料之方法的流糊；在步驟 中，若是在除錯主機板觸時欲針對基本輸入輸出系統晶片叫 進行更新’僅須啟動細裝置122之基本輸入輸料統更新，在此 實施例中，意即點選基本輸人輸“統更新按_示124 ;在此之 後，應用裝置122就會讀取基本輸人輸出系統更新資料（步驟⑽， 此處所提及之基讀人輸出系贼新_係可·—般常見之資料 讀取方式獲取，如彳_上下鮮；接著，控制晶片ιΐ6就會偵測 201137603 土本輸輸出系統晶片114之燒錄類型以及根據應用裝置⑵所傳 來之該基本輪人輸出纽更新資料針對基本輸m统晶片114 ^行燒錄（步驟3G8)，並會確認基本輸人輸妹統^ ιΐ4的燒錄 疋否正確（步驟310 )，若燒錄正確無誤，則會繼續進行下面的步驟， 反之’則是會再次執行步驟3G8，朗燒軸功為止。而在傳送該 基本輸入輸出系統更新資料至控制晶片116之前，意即在步驟綱 :曰‘』裝置122可先進行主機板1〇6是否處於關機狀態之偵測， 右疋偵測出主機板1G6處於關機狀態，資料傳輸單元㈣會直接進 ㈣糊敝 m繼一關機訊 〜 日片116以關閉主機板1〇6 (步驟306)，如此-來，即可 116係在域板_於_狀態下進行基本輸入輸 出系統晶片114之更新’以避免資料更新失敗。 動主在機完板輸出系統晶片114之更新後，控制晶片116會啟 =機板叫步驟312)以使基本輸人輸出_片114開始進行 =機自我測試’並同時儲存基本輸人輸出系統晶請執行開機自 將所儲存的該崎義_裝置二== 相關顯示結果’舉例來說’其係可利用如第示 朗列 :=r表，，細者可清楚地得= 另外，請參閱第4圖，其為本發明一較佳實施例利用第2圖所示 201137603 _ =如㈣她㈣ 板106時欲針對安裝於装卜夕一士 ^ 固右疋在除錯主機 先需啟動域板π)6 (步_)，^理器進行單步追雜修，首 供之單牛轉可闕顧健122所提 追關不130 (步驟術)，如此-來，控制晶片116就合 =資料傳輸單元120所傳來之單步追縱訊號進入單步追職 二里:進換句話說’控制晶片116就會開始控制該中央 :中(步驟 4°6)，_^ 中央處理讀純令（步驟顿），在完成上述控制流程之後，控 制晶片U6就會等待應用裝置122發出該中央處理器運行下一指令 的要求（步驟410)，如此循環之，即可讓使用者利用除錯卡_ 進行單步追蹤除錯流程。 此外，應職置122亦可允許使財透職錯纽⑽偵測及控 制主機板106之運作狀態。如上所述，透過與電源接腳ιι〇及基本 輸入輸出系統接腳112之間的電性連接，除錯卡1〇2可與主機板⑴6 建立相關㈣的傳輸，舉例來說，請參閱第5圖，其為本發明一較 佳實施例利用第2圖所示除錯系、统1〇〇顯示主機板1〇0之運作狀^ 之方法的流程圖’首先’控制晶片116可從主機板上的電源運 作狀態接腳及硬碟運作狀態接腳讀取到相對應之一電源運作狀態及 —硬碟運作狀態（步驟500)，接著應用裝置122可透過資料傳輸單 几120接收控制晶片116所讀取到之該電源運作狀態及該硬碟運作 狀態（步驟502)，並據以控制其所提供之電源狀態圖示126及硬碟 狀態圖示128之顯示（步驟504)，以供使用者在除錯過程中可快速 201137603 月楚地知知主機板1〇6的運作狀態，從而避免錯誤操作。 用者欲控制域板1%之運作狀態，則僅須根據其控制需求 6用裳置122上所提供之控制圖示即可。舉例來說，請參閱第 圖’其為本發明一較佳實施例利用第2圖所示除錯系統⑽控制 4·板106之運作狀態之方法的;;危程圖，若想要關閉或開啟主機板 可點選應用裝置122所提供之電源按紅圖示⑶（步驟_)， 者除錯卡1〇2上之控制晶片116就會判斷主機板廳是否關機 機Γ驟602 )，若是的話，控制晶片116會送出一開機訊號以開啟主 機板步驟_，反之，控制晶片116則會開始計算使用者點 選電源按_示132的時間（步驟6⑹，若小於1#、，控制晶片116 會傳达-關閉軟體訊號至主機板廳（步驟6〇8)，若大於2秒，則 控制晶片116就會傳送-關閉硬體訊號至主機板挪（步驟 同理’若點選朗裝置122所提供之重置触圖示134 (如第 所不）’則控f㈣116就會傳送—趟_ 機板106。 重罝主 此外’電子裝置KH與除錯㈣2之連接可不限於上述 資料傳輸，意即應縣置122亦可透㈣料傳輸單元_不同的 主機板建立-對多之有線或無線連接，如此—來，使騎 且清楚地得知不_輪之_運作_及除錯歷程，同時亦可! 對多地進行线_更新及其運作㈣的控制。 201137603 相較於先前肋需要科安裝其他的介面卡輯主機板進行相 =:及控制，透過電子裝置與除錯卡之有線或無線連接及應用 裝置.供之功賴示與除錯卡上之控制晶片的整合設計，本發明 :除錯系統可允許使用者在進行域板除錯的過程中，可直接進行 ，本輸入輸出系統資料更新與運作狀態偵測及控制等額外檢測操 T如此—來，由於不需額外安裝其他的介面卡，因此本發明之整 口/生除錯設計不僅可大幅地縮短主機板的除錯檢測時間，同時亦可 提昇除錯卡在錢上的便利性。除此之外，透過躺裝置上逐筆顯 不除錯碼之魏，柯讓細者綺楚地得知域板之除錯歷程。 舰以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍 之均等變化與修舞，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖為先前技術資訊裝置及電子裝置的基本架構示意圖。 第2圖為本發明較佳實施例除錯系統之示意圖。 第3圖為本發明利用第2圖所示除錯系統偵測及控制電腦主機狀 尤、之方法的流程圖。 祕14圖林發9驗佳倾刪料2騎稀錯系錄行單步追 蹤檢修之方法的流程圖。 第5料本發賊佳實關棚第2 _稀料、_示主機板 運作狀態之方法的流程圖。 201137603 第6圖為本發明較佳實施例利用第2圖所示除錯系統控制主機板 之運作狀態之方法的流程圖。 【主要元件符號說明】 資訊骏置 40 電子裝置 唯讀記憶體 52 運算單元 輸入輸出埠模組 54 無線傳輪裳置 記憶單元 56 顯示單元 除錯系統 102 除錯卡 電子t置 106 主機板 組件互連插槽 110 電源接腳 控制晶片 118 顯示裂置 資料傳輸單元 122 應用裝置 電源狀態圖示 128 硬碟狀態圖示 單步追蹤圖示 132 電源按紐圖示 重置按紐圖示 基本輪入輸出系統接腳 基本輸入輸出系統晶片 基本輸入輸出系統更新按紐圖不Input Output System, BIOS) ί- -v , 鞔出系统 (Basic right, the transport unit 52 uses λ into the output system program, the input transport module 53 rides = executes the basic interface, the wireless transmission device 54 To pass the communication with the outside world - wireless transmission 54, the wheeled transmission module magic device 40 contains the calculation unit 52 and - display private %, which wireless transmission Zhuoyuan 55, a transport W sent the news , Gu, the wheel end of the module receiving material _ 卞 device 40 and the outside shallow 201137603 through, I side 'storage unit 55 is used to store - data table all related operations, Gu + @ _ different early 52 used to The message is related to the ugly line of the device. The domain can be pulled: the basic input/output system error detection code is wirelessly transmitted to the electronic _4 〇Α 鞛 by the operation of the electronic device 40, the original is only set to 4 〇, The complete story of her Meizhi. The quality of the error detection code, compared to its ',, and 'if the debugging process is required to perform basic detection and control and operation status detection and other additional detection operations, SIT external installation Other control interface cards, and so on, will also cause a lot of inconvenience in debugging operations. Debugging time course, at the same time [invention content] includes this-hair------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- More _ update the base: input two ==: = person to the data transfer d packet transmission unit with the control chip, the material transmission unit transmits the basic input and output: two is used to control the capital control the heart display 201137603 + ramie _ - domain board ^ ^ L method, face error card money _ domain board, j output system day and day film, the method contains Chi-dance (four) basic round-up update; read the basic input Output system (4) Dragon; Detect _; === The burning of the system chip _ and according to the basic input wheel transmitted by the dependent device = update data for the basic input rounding system ^ burning 铮 No ·, first = the motherboard; the debug card stores the basic input and output heart = the debug data transmitted. And the German use does not mark the wrong card [embodiment] Figure 2 is the invention - preferred embodiment - debug system 1 〇 ^ debug 刚 just included - debug card 1 〇 2 and an electronic device just; except ^ = in: host A component on the 106 interconnect slot 1 〇 8, which is more than __ (PCI) (four) or four-speed weekly miscellaneous parts j = = jE) plug t In addition, the debug card is electrically connected to the motherboard上上—Electricity ^ 〇 and - basic input and output system pin 112; Debug card ^ 2 output system chip 114, a control chip u - input and output system chip m used to control the operation of the motherboard; control =: Pour into the wheel system 114, store the basic input wheel system 201137603 system chip 114 to perform the boot self-test (p〇wer〇nSelfTest, p〇sT) when the debug data generated and read the motherboard 1% - The power operation state and the hard disk operation state; the display device 118 is electrically connected to (4) "116, which displays the debug data. • The electronic device 1〇4 is a debug card 1〇2, which is preferably a computer, which includes a data transmission unit 120 and an application device 122. The data transmission unit 120 is used for data transmission with the control chip 116. In this embodiment, it is preferably a wireless transmission device or a data transmission line; the application device 122 is configured to control the data transmission unit (10) to transmit the basic input/output system update data to the control chip 116 and display the debug data. The application device 122 is preferably a user interface software installed in the electronic device 1 (4). In addition, the application device 122 is further configured to provide a basic input/output system update button map 124, a power status icon 126, A hard disk status icon 128, a single step tracking icon 130, a power button graphic 132, and a reset button icon. The following is a detailed description of the debugging system. First, please refer to FIG. 3, which is a flow paste of the method for updating the basic input/output system data and recording the debugging material by using the debugging system shown in FIG. 2 according to a preferred embodiment of the present invention; in the step, if In the case of the debug main board touch, it is necessary to update the basic input/output system chip call 'only need to start the basic input and output system update of the fine device 122. In this embodiment, it means to select the basic input and output. _ shows 124; after that, the application device 122 will read the basic input output system update data (step (10), the base reader output mentioned here is a thief new _ system can be - commonly read data reading The method is obtained, for example, 上下_上上鲜; then, the control chip ΐ6 will detect the burning type of the 201137603 native output output system chip 114 and the basic round person output update information transmitted by the application device (2) for the basic input The m system wafer 114 is programmed to be burned (step 3G8), and it is confirmed whether the programming of the basic input system is correct (step 310). If the programming is correct, the following steps will be continued, and vice versa. 'Yes Step 3G8 is executed again, and the axis power is burned up. Before the basic input/output system update data is transmitted to the control chip 116, it means that the device 122 can first perform whether the motherboard 1〇6 is in the shutdown state. The detection, the right 疋 detects that the motherboard 1G6 is in the off state, the data transmission unit (4) will directly enter (4) paste m after a shutdown message ~ the day 116 to close the motherboard 1 〇 6 (step 306), so - come Then, the 116 system is updated in the domain board__ state to update the basic input/output system chip 114 to avoid data update failure. After the master completes the update of the system output system chip 114, the control chip 116 will start. The board is called step 312) so that the basic input output_slice 114 starts to perform the machine self-test' and simultaneously stores the basic input output system crystal. Please perform the power-on self-storage of the stored _device 2 == related display result' For example, 'the system can be used as the first column: =r table, and the details can be clearly obtained. </ RTI> In addition, please refer to FIG. 4, which is a schematic diagram of the present invention using the 201137603 _ = as (four) she (four) board 106 when the needle Installed on the installation of Bu Xi Yi Shi ^ Gu right 疋 in the debug host first need to start the domain board π) 6 (step _), ^ processor for single-step chasing repair, the first supply of single cattle turn can be Gu Jian 122 The proposed tracking is not 130 (step), so that the control chip 116 is combined = the single-step tracking signal transmitted by the data transmission unit 120 enters the single-step pursuit: in other words, the control chip 116 It will start to control the central: medium (step 4 °6), _^ central processing read pure order (steps), after completing the above control process, the control chip U6 will wait for the application device 122 to issue the central processor operation The requirement of an instruction (step 410), so that the user can use the debug card _ to perform a single-step tracking and debugging process. In addition, the job placement 122 may also allow the accountant to detect and control the operational status of the motherboard 106. As described above, through the electrical connection between the power pin ιι and the basic input/output system pin 112, the debug card 1 〇 2 can be associated with the motherboard (1) 6 for transmission (IV), for example, see 5 is a flow chart of a method for displaying the operation state of the motherboard 1 〇 0 by using the debug system shown in FIG. 2 according to a preferred embodiment of the present invention. First, the control chip 116 can be controlled from the host. The power operation state pin and the hard disk operating state pin on the board are read to a corresponding power operation state and a hard disk operation state (step 500), and then the application device 122 can receive the control chip through the data transmission unit 120. The power operation status and the hard disk operation status read by the 116 (step 502), and the display of the power status icon 126 and the hard disk status icon 128 provided by the control unit (step 504) are provided for During the debugging process, the user can quickly know the operation status of the motherboard 1〇6 in 201137603, thereby avoiding erroneous operations. If the user wants to control the operating state of the domain board by 1%, it is only necessary to use the control diagram provided on the skirt 122 according to its control requirement. For example, please refer to the figure 'which is a method for controlling the operating state of the 4 board 106 by using the debugging system (10) shown in FIG. 2; a dangerous diagram, if you want to close or Turning on the motherboard can click the power icon (3) provided by the application device 122 (step _), and the control chip 116 on the debug card 1 〇 2 will determine whether the motherboard hall is shut down (step 602), if If the control chip 116 sends a power-on signal to turn on the motherboard step _, on the other hand, the control chip 116 starts to calculate the time when the user clicks the power source to display 132 (step 6 (6). If less than 1 #, the control chip 116 Will send - close the software signal to the main board hall (step 6 〇 8), if more than 2 seconds, the control chip 116 will transmit - turn off the hardware signal to the motherboard board (steps are the same as the point selection device 122 The reset touch icon 134 (if not mentioned) is provided, then the control f (four) 116 will be transmitted - 趟 _ board 106. The connection between the electronic device KH and the debug (four) 2 is not limited to the above data transmission, That is, Yingxian County 122 can also pass through (four) material transmission unit _ different hosts Board setup - many wired or wireless connections, so - to make it easy to know the ride and the debugging process, as well as the line_update and its operation (4) Control 201137603 Compared with the previous ribs, the company needs to install other interface card motherboards for phase=: and control, through the wired or wireless connection and application device of the electronic device and the debug card. The integrated design of the control chip, the invention: the debugging system allows the user to directly perform the process of debugging the domain board, and the additional detection operation of the input and output system data update and operation state detection and control In this way, since no additional interface cards need to be installed, the whole port/bug debugging design of the present invention can not only greatly shorten the debugging detection time of the motherboard, but also improve the convenience of the debugging card in money. In addition, except for the Wei, which does not clear the error code on the lying device, Ke lets the user know the debugging process of the domain board. The above is only the preferred embodiment of the present invention. , applying for a patent according to the invention The uniform variation of the scope and the dance are all covered by the present invention. [Simplified Schematic] FIG. 1 is a schematic diagram of the basic structure of the prior art information device and the electronic device. FIG. 2 is a view of the preferred embodiment of the present invention. Schematic diagram of the wrong system. Fig. 3 is a flow chart of the method for detecting and controlling the computer main body using the debugging system shown in Fig. 2. The secret 14 Tu Linfa 9 test good dumping material 2 riding faults A flow chart of the method for single-step tracking and repairing of the line. The fifth method is a flow chart of the method of the thief's 2nd _ thinner, _ showing the operating state of the motherboard. 201137603 Figure 6 is a preferred embodiment of the present invention A flow chart of a method for controlling the operating state of a motherboard by using the debugging system shown in Fig. 2. [Key element symbol description] Information Jun 40 electronic device read only memory 52 arithmetic unit input/output unit 54 wireless transmission Skip memory unit 56 display unit debug system 102 debug card electronic t set 106 motherboard assembly interconnect slot 110 power pin control chip 118 display split data transfer unit 122 application device power supply Drive State 128 illustrates a single step trace status icon 132 illustrates the power reset button icon button shown substantially into the wheel pin output system basic input output system BIOS updates wafer of FIG button is not
31 51 53 55 1〇0 1〇4 1〇8 H6 12〇 126 13〇 134 U2 114 124 步驟 300、302、304、306、308、310、312、314、316 步驟 400、402、404、406、408、410 步驟 500、502、504 12 201137603 步驟 600、602、604、606、608、61031 51 53 55 1〇0 1〇4 1〇8 H6 12〇126 13〇134 U2 114 124 Steps 300, 302, 304, 306, 308, 310, 312, 314, 316 Steps 400, 402, 404, 406, 408, 410 steps 500, 502, 504 12 201137603 steps 600, 602, 604, 606, 608, 610
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