201135971 六、發明說明： 【發明所屬之技術領威】 [0001] 本發明有關一種發光二極體（1 ight-emi tt ing di_ ode，LED)結構’尤指—種能增加電流分佈能力的發光 二極體結構。 [先前技術3 [0002] 發光二極體（Light Emitting Diode, LED)具有 發光效率高、壽命長、體積小、低耗電以及色彩表現佳 等許多優點，因此在講求環保節能的訴求下，大量地替 代現有的發光光源。自1993年曰本提出之氮化鎵基發光 二極體產生重大突破後’全球掀起了氮化鎵基發光二極 體的研究風潮。 [0003] 習知之發光二極體結構1 〇如「圖1」所示，其包含一 基板11、一N型半導體層12、一發光層13(或稱為活性層 (active layer))、一P型半導體層14、一p型電流擴散 層 15(current spreading layer)、一第一電極 16以 及一第二電極17 ;其中’該N型半導體層12形成於基板u 上，該發光層13形成於N型半導體層12上，該p型半導體 層14形成於發光層13上，該P型電流擴散層15形成於該p 型半導體層14上；該第一電極16形成於p型電流擴散層15 上，該第二電極17則形成於該N型半導體層12上的外露平 面。該N型半導體層12例如為一n型氮化鎵（GaN)層，該p 型半導體層14例如為一P型氮化鎵層，該發光層丨3例如為 一氮化銦鎵（InGaN)層。 [0004] 由於平面式或大面積的發光二極體在第一電極“與？ 0992018499-0 099110501 表單編號A0101 第3頁/共21頁 201135971 型半導體層14之間的片電（sheet resistance)阻值較 大’谷易發生電流擁擠（current crowding)現象，因 此可藉由加入P型電流擴散層15改善電流擁擠現象並同時 提升發光效率。 [0005] 傳統的發光二極體係採用鎳金或鉻金合金做為p型電 流擴散層15，藉以提升電流分布的均勻性。惟，鎳金或 鉻金合金材質的P型電流擴散層15透光性不佳，必須限制 其厚度介於數百Ux獲得較佳的透光效果。^，過薄的 厚度不易形成緻密穩定的賴，此難以在均勻分散電 流和透光要求下取得平衡。 [0006] 近幾年來，逐漸以透明導電氧化物（transparent conductive oxlde，TC0)薄膜取代上述金屬合金 做為P型電流擴散層15，藉以改善透光的問題。然而透 明導電氧化物的透光率雖可達90%以上，但仍有與p型半 導體層1憎姆接觸不佳關題，導致容易產生電流擁擠 現象（current crowding^’降低整略的出先效率。改 善上述歐姆接觸不佳的習·術甚多，例如中華民國# y 利第579608號之「發光元件形成電極的方法與結構」， 其係於P型氮化鎵半導體層上先形成金屬或金屬合金材質 的歐姆接觸點，遂再於其上形成透光氧化物薄膜；或如 中華民國專利第1240443號之「發光二極體及其製造方法 」，其係於P型氮化鎵半導體層上先形成一超晶格應力接 觸層，而後再形成透明導電層。 高電流注入下的均勻電流分佈，一直都是高功率、 大面積氮化鎵系發光二極體以及固態照明技術的發展重 099110501 表單編號A0101 第4頁/共21頁 0992018499-0 [0007] 201135971 點。惟，P型電流擴散層15雖改善了 P型半導體層14區域 的電流擁擠現象並降低該區域的片電阻值，但對於大面 積及高電流注入的發光二極體來說，電流擁擠現象會轉 移至N型半導體層12區域。由於高電流注入時發生的電流 擁塞現象會劇烈地影響發光層13的發光效率，同時造成 元件局部區域過熱，如此會降低發光二極體元件的内部 量子效率，導致發光效率不佳。 【發明内容】 [0008] ❹ [0009]201135971 VI. Description of the Invention: [Technical Leadership of the Invention] [0001] The present invention relates to a structure of a light-emitting diode (LED), especially a light-emitting capability capable of increasing current distribution capability. Diode structure. [Prior Art 3 [0002] Light Emitting Diodes (LEDs) have many advantages such as high luminous efficiency, long life, small size, low power consumption, and good color performance. Therefore, under the demand for environmental protection and energy conservation, a large number of Replace the existing illuminating light source. Since the breakthrough of the gallium nitride-based light-emitting diode proposed by Sakamoto in 1993, the global research trend of GaN-based light-emitting diodes has been launched. [0003] A conventional light-emitting diode structure 1 is shown in FIG. 1 and includes a substrate 11, an N-type semiconductor layer 12, a light-emitting layer 13 (also referred to as an active layer), and a light-emitting diode structure. a P-type semiconductor layer 14, a p-type current spreading layer 15, a first electrode 16 and a second electrode 17; wherein the N-type semiconductor layer 12 is formed on the substrate u, and the light-emitting layer 13 is formed On the N-type semiconductor layer 12, the p-type semiconductor layer 14 is formed on the light-emitting layer 13, and the P-type current diffusion layer 15 is formed on the p-type semiconductor layer 14; the first electrode 16 is formed on the p-type current diffusion layer. The second electrode 17 is formed on the exposed plane of the N-type semiconductor layer 12. The N-type semiconductor layer 12 is, for example, an n-type gallium nitride (GaN) layer, and the p-type semiconductor layer 14 is, for example, a P-type gallium nitride layer, and the light-emitting layer 丨3 is, for example, an indium gallium nitride (InGaN) layer. Floor. [0004] Sheet resistance of the planar or large-area light-emitting diode between the first electrode "and 0992018499-0 099110501 Form No. A0101 Page 3 / 21 page 201135971 type semiconductor layer 14 The value of the larger 'Valley is current crowding phenomenon, so the current crowding phenomenon can be improved by adding the P-type current diffusion layer 15 while improving the luminous efficiency. [0005] The conventional light-emitting diode system uses nickel gold or chromium The gold alloy is used as the p-type current diffusion layer 15 to improve the uniformity of current distribution. However, the P-type current diffusion layer 15 made of nickel gold or chrome-gold alloy has poor light transmittance and must be limited to a thickness of several hundred Ux. Obtaining a better light transmission effect. ^, too thin thickness is not easy to form a dense and stable reliance, which is difficult to achieve a balance between uniform dispersion current and light transmission requirements. [0006] In recent years, gradually transparent conductive oxide (transparent) The conductive oxlde, TC0) film replaces the above metal alloy as the P-type current diffusion layer 15, thereby improving the problem of light transmission. However, the transmittance of the transparent conductive oxide is more than 90%. There is still a poor contact with the p-type semiconductor layer 1 , which leads to the current crowding phenomenon (current crowding ^ 'reduced the overall efficiency of the overall. The improvement of the above ohmic contact is not good, such as the Republic of China # y 利 579608, "Method and Structure for Forming Electrodes of Light-Emitting Elements", which is formed by forming an ohmic contact point of a metal or metal alloy on a P-type gallium nitride semiconductor layer, and then forming a light-transmissive oxide thereon. a thin film of a light-emitting diode and a method for manufacturing the same, which is formed by forming a superlattice stress contact layer on a P-type gallium nitride semiconductor layer and then forming a transparent conductive layer. The uniform current distribution under high current injection has always been the development of high power, large area GaN-based LEDs and solid-state lighting technology. 099110501 Form No. A0101 Page 4 / Total 21 Page 0992018499-0 [0007] 201135971. However, the P-type current diffusion layer 15 improves the current crowding phenomenon in the P-type semiconductor layer 14 region and reduces the sheet resistance value in the region, but for large-area and high-current injections. In the case of the light-emitting diode, the current crowding phenomenon is transferred to the region of the N-type semiconductor layer 12. The current congestion phenomenon caused by the high current injection may drastically affect the light-emitting efficiency of the light-emitting layer 13, and cause local overheating of the device. This reduces the internal quantum efficiency of the light-emitting diode element, resulting in poor luminous efficiency. [Abstract] [0008] [0009]
[0010] 有鑑於此，本發明的目的在於解決上述問題，進而 提出一種能提升N型區域電流擴散效果，降低N型區域片 電阻值.的發光二極體結構。 為了達成前述目的，本發明係於N型半導體層之間再 添加一N型電流擴散層，用以使流經N型半導體層的電流 均勻分佈。本發明提出之發光二極體結構包含：一基板 、一N型半導體層、一y發光層、一P型半導體層以及至少 一N型電流擴散層。其中，該N型半導體層形成於該基板 上，發光層形成於該N型半導體層上，P型半導體層形成 於該發光層上；該N型電流擴散層則包含三層以上的子層 ，該些子層之通式為In A1 Ga" 、N(0SxSl，OS ySl，OSx + ySl)，並自該基板侧朝該發光層側依序由 低能隙層疊至高能隙。 藉由N型電流擴散層提供較高的電子濃度，可有效提 升電流的均勻分佈並降低片電阻值；同時地，透過本發 明亦可降低發光二極體的操作電壓，且提升其發光效率 。有關本發明的詳細技術内容及較佳實施例，配合圖式 099110501 表單編號A0101 第5頁/共21頁 0992018499-0 201135971 說明如後。 【實施方式】 [0011] [0012] 本發明之發光二極體結構，係於N型半導體層間再形 成至少一N型電流擴散層，藉以增加電流於N型半導體層 的侧向均勻分布，使其擁有較高的電子濃度與較低的片 電阻。惟須說明的是，本發明中「N型電流擴散層」與「 P型電流擴散層」詞彙中之「N型」與「P型」係用以區分 該些電流擴散層位於N型或P型的區域，而非指電流擴散 層本身必定限定為N型摻雜或P型摻雜，實務上可選用的 材質將於後述作詳細的說明。有關本發明之詳細說明及 技術内容，現配合圖式說明如下： 請參閱「圖2」所示，其為本發明 < 實施例之結構示 意圖’如圖所示：該實施例中，發光二極體結構2〇包含 :一基板21、一 N型半導體層22、一 N型電流擴散層23、 一發光層24、一 P型半導體層25 :、一 P.型電流擴散層26、 一第一電極27以及一第二電極28。其中，該N型半導體層 22形成於基板21上；該N型電流擴散層23形成於該N型半 導體層22之間（即發光層24與基板21之間的區域）；該發 光詹24形成於N型半導體層22的部分區域上，致使該n型 半導體層22形成一外露平面220 ;該P型半導體層25形成 於發光層24上；該p型電流擴散層26形成於該p型半導體 層25上；該第一電極27形成於p型電流擴散層26上，該第 二電極28則形成於該N型半導體層22上的外露平面220。 該N型電流擴散層23用以提供更高的電子濃度並同時 降低N型電流擴散層23的片電阻，以增加電流通過N型半 099110501In view of the above, an object of the present invention is to solve the above problems, and to provide a light-emitting diode structure capable of improving the current spreading effect in the N-type region and reducing the resistance value of the N-type region sheet. In order to achieve the above object, the present invention is to add an N-type current diffusion layer between the N-type semiconductor layers for uniformly distributing the current flowing through the N-type semiconductor layer. The LED structure of the present invention comprises: a substrate, an N-type semiconductor layer, a y-emitting layer, a P-type semiconductor layer, and at least one N-type current spreading layer. The N-type semiconductor layer is formed on the substrate, the light-emitting layer is formed on the N-type semiconductor layer, and the P-type semiconductor layer is formed on the light-emitting layer; the N-type current diffusion layer includes three or more sub-layers. The sublayers have the general formula of In A1 Ga", N (0SxSl, OS ySl, OSx + ySl), and are sequentially stacked from the substrate side toward the light-emitting layer side by a low energy gap to a high energy gap. By providing a higher electron concentration by the N-type current diffusion layer, the uniform distribution of the current can be effectively increased and the sheet resistance value can be lowered. Meanwhile, the operating voltage of the light-emitting diode can be reduced and the luminous efficiency can be improved by the present invention. For the detailed technical content and preferred embodiment of the present invention, the drawing pattern 099110501 Form No. A0101 Page 5 of 21 0992018499-0 201135971 The description is as follows. [Embodiment] [0012] The light emitting diode structure of the present invention is formed by forming at least one N-type current diffusion layer between the N-type semiconductor layers, thereby increasing current distribution in the lateral direction of the N-type semiconductor layer, so that It has a high electron concentration and a low sheet resistance. It should be noted that the "N-type" and "P-type" in the "N-type current diffusion layer" and "P-type current diffusion layer" in the present invention are used to distinguish the current diffusion layers from being N-type or P-type. The type of region, rather than the current diffusion layer itself, must be limited to N-type doping or P-type doping. The practical materials that can be used are described in detail later. The detailed description and the technical content of the present invention will be described below with reference to the following drawings: Please refer to FIG. 2, which is a schematic structural diagram of the present invention. As shown in the figure, in this embodiment, the light-emitting two The polar body structure 2 includes: a substrate 21, an N-type semiconductor layer 22, an N-type current diffusion layer 23, a light-emitting layer 24, a P-type semiconductor layer 25: a P. type current diffusion layer 26, a first An electrode 27 and a second electrode 28. The N-type semiconductor layer 22 is formed on the substrate 21; the N-type current diffusion layer 23 is formed between the N-type semiconductor layers 22 (ie, a region between the light-emitting layer 24 and the substrate 21); On a partial region of the N-type semiconductor layer 22, the n-type semiconductor layer 22 is formed into an exposed plane 220; the P-type semiconductor layer 25 is formed on the light-emitting layer 24; the p-type current diffusion layer 26 is formed on the p-type semiconductor On the layer 25, the first electrode 27 is formed on the p-type current diffusion layer 26, and the second electrode 28 is formed on the exposed plane 220 on the N-type semiconductor layer 22. The N-type current diffusion layer 23 is used to provide a higher electron concentration while reducing the sheet resistance of the N-type current diffusion layer 23 to increase the current through the N-type half 099110501.
表單編號A01CU 第6頁/共21頁 0992018499-0 [0013] 201135971 Ο 導體層22的分散程度，促使電流均勻分佈。其中，該^型 電流擴散層23係由三層或三層以上的子層組成，且該些 子層係由低能隙（band gap)材料層疊至高能隙材料，且 低能隙材料的子層靠近基板21側，高能隙材料的子層係 靠近發光層24侧。更進一步地，該N型電流擴散層23各子 層的材質可以通式In A1 Ga^ 、N表示，其中OSxSl X y (1-x-y) ，0 Sy S 1 ’ 0 Sx + y S 1。藉由選擇不同乂與丫的數值，可 獲致不同的能隙材料。舉例來說，在本發明的一實施例 中，該N型電流擴散層23自低能隙至高能隙可分別包含一 氮化銦鎵（In Ga, N，0客XS1)層231、一氮化鎵 X 1 _ X ::. . . ... . (GaN)層232以及一氮化鋁鎵（A1 Ga, N，OSxSl)層 X 1-x 233，三者形成多異質接面（heterojunction)結構。其 中，在氮化銦鎵層231與氮化鎵層232碎接面處，兩材料 的晶格失配（lattice mismatch)會導致壓電場 (piezoelectric field)極化，進而產生高濃度的電子 ;在氮化鎵232與氮化鋁鎵231的_面處則會發生自發性 極化（spontaneous polarization)現象而增加電子濃 ο 度，因此可大幅提升N型電流擴散層23的電子濃度。此外 ，該N型電流擴散層23位於N型半導體層22間的位置，可 考量設置於該第二電極28與該N型半導體層22的接面上方 ，即該外露平面220最低處之上方，以獲得較佳的電流分 散效果。 [0014] 此外，該N型電流擴散層23的磊晶可為矽摻雜結構或 是無摻雜結構’在此並無限定；在一實施例中，該N型電 流擴散層23的厚度可介於lnm〜200nm之間。在製程上， 099110501 表單編號A0101 第7頁/共21頁 0992018499-0 201135971 [0015] [0016] [0017] 099110501 該N型電流擴散層23的形成方法係可先於基板21上先形成 一第一 N型半導體層221 ’再於該第一 N型半導體層221上 依低能隙子層至高能隙子層的順序形成該N型電流擴散層 23，隨後再依序形成一第二N型半導體層222、發光層24 、P型半導體層25等。 在本發明之一實施例中’上述之基板21可為一絕緣 基板，舉例而言，做為該絕緣基板的材料包括：氧化鐘 鎵（LiGa〇3)、氧化鋁鋰（LiAl〇3)、氮化鎵（GaN)、氧 化鎂（MgO)、氧化鋅（ZnO)、氧化鋁（藍寶石）（ai 〇， 2 3 sapphire)和氮化鋁（A1N)、碳化矽（Sic)、矽基板（Si) 等。 在本發明之一實施例中，發光層24可為一多層量子 井（multi-quantum well, MQW)結構。此外，構成上 述之N型半導體層22、發光層24與P型半導體層25之材質 可為含有氮化鎵之三五族元素材料，以如下的通式 InxAlyGa(i-x-y)N表示，其中〇容X各1，OSySl，0$ X + ySl。該等氮化鎵化合物的形成方法並無特殊的限定 ，例如：金屬有機化學氣相沉積法（M〇CVD)、氫化氣相磊 晶成長法（HVPE)、氣化物氣相磊晶法、分子束磊晶成長 法（MBE)等可供成長上述材料的所有方法。 在本發明之一實施例中，該N型半導體層22與該基板 21之間可再形成一緩衝層29，該緩衝層29例如為氮化物 、氧化鋅等與基板21或n型半導體層22間晶格常數 (lattice constant)較相近的材料。在一實施例中， 該緩衝層的厚度可介Mlnm~2〇〇nm之間。 表單編號A0101 第8頁/共21頁 0992018499-0 201135971 [0018] Ο [0019] ❹ [0020] 在本發明之一實施例中，上述之ρ型電流擴散層26用 以增加Ρ型區域的電流分佈，其可為一透明導電氧化物(transparent conductive oxide，TCO)層，例如材 質為：氧化銦錫（indium tin oxide, IT0)、氧化鎘錫 (cadmium tin oxide，CTO)、氧化銻錫（antimony tin oxide，ΑΤΟ)、氧化銘辞（aluminum (doped) zinc oxide，AZO)、氧化銦辞（indium (doped) zinc oxide, IZO)、氧化辞（zinc oxide，ZnO)、氧 化銦（indium tin oxide, InO)、氧化錫（tin oxide， SnO) 、 氧化鋁銅 （CQpper aluminujn 〇xide， CAO)以及氧化鋼锶（str〇ntium c〇pper 〇xide，sc〇) 等。 在本發明之一實施例中，作為上述第一電極27及第 二電極28的材質可為任何作為電極的材料，舉例來說， 其可為選自銦（In)、錫（Sn)、鋅（zn)、錄（Ni)、金 (Au)、鉻（Cr)、鈷（c〇)、,鎘（cd)、鋁（A1)、釩（V)、銀 (Ag)、鈦（Ti)、鑛（|)、鉑（pt)、鈀（pd)、铑（Rh)以及 釕（Ru)所構成群組中的其一或其二元或二元以上的金屬 合金，但不以其為限。且第一電極27及第二電極28的厚 度可介於卜1〇, 〇〇〇nm間。 請再參閱「圖3」，其為本發明另一實施例之結構示 意圖，與上述實施例相異處在於，本實施例之N型半導體 層22中可包含複數個N型電流擴散層23，該些N型電流擴 散層23可位於第二電極28與N型半導體層22接面處與發光 層24之間，且每一 N型電流擴散層23互相不接觸，且亦不 099110501 表單編號A0101 第9頁/共21頁 0992018499-0 201135971 接觸於發光層24，其間训型半導艘作為間隔。藉此，透 過複數細型電流擴散層23可加強電流於ν型區域的分散 效果，而助於提升整體之發光效率。 [0021] 本發明並以實驗顯示上述之Ν型電流擴散層23確實可 曰加電桃刀政的旎力。若以「圖丨」的發光二極體結構Μ 為對照組’「圖2」的發光二極體結構2〇為實驗組比對 在相同條件下Ν型電流擴散層23結構對Ν型半導體層22的 電流擴散效果與片電阻的影響，其相關參數與結果如下Form No. A01CU Page 6 of 21 0992018499-0 [0013] 201135971 分散 The degree of dispersion of the conductor layer 22 causes the current to be evenly distributed. Wherein, the current-type diffusion layer 23 is composed of three or more sub-layers, and the sub-layers are laminated by a low-gap material to a high-gap material, and the sub-layer of the low-gap material is close to On the side of the substrate 21, the sub-layer of the high-gap material is close to the side of the light-emitting layer 24. Further, the material of each sub-layer of the N-type current diffusion layer 23 can be represented by the general formulas In A1 Ga^ , N, where OSxSl X y (1-x-y), 0 Sy S 1 ' 0 Sx + y S 1 . Different energy gap materials can be obtained by selecting different values of 乂 and 丫. For example, in an embodiment of the present invention, the N-type current diffusion layer 23 may include an indium gallium nitride (In Ga, N, 0 guest XS1) layer 231, a nitride, respectively, from a low energy gap to a high energy gap. Gallium X 1 _ X ::. . . . . (GaN) layer 232 and an aluminum gallium nitride (A1 Ga, N, OSxSl) layer X 1-x 233, which form a multi-heterojunction structure. Wherein, at the interface between the indium gallium nitride layer 231 and the gallium nitride layer 232, a lattice mismatch of the two materials causes polarization of the piezoelectric field, thereby generating a high concentration of electrons; In the _ plane of the gallium nitride 232 and the aluminum gallium nitride 231, a spontaneous polarization phenomenon occurs to increase the electron concentration, so that the electron concentration of the N-type current diffusion layer 23 can be greatly increased. In addition, the N-type current diffusion layer 23 is located between the N-type semiconductor layers 22, and can be disposed above the junction between the second electrode 28 and the N-type semiconductor layer 22, that is, above the lowest point of the exposed plane 220. For better current dispersion. [0014] In addition, the epitaxial layer of the N-type current diffusion layer 23 may be an erbium-doped structure or an undoped structure, which is not limited herein; in an embodiment, the thickness of the N-type current diffusion layer 23 may be Between 1nm~200nm. In the process, 099110501 Form No. A0101 Page 7 / Total 21 Page 0992018499-0 201135971 [0016] [0017] 099110501 The N-type current diffusion layer 23 is formed by first forming a first on the substrate 21. An N-type semiconductor layer 221 ′ further forms the N-type current diffusion layer 23 on the first N-type semiconductor layer 221 in the order of the low-gap sub-layer to the high-gap sub-layer, and then sequentially forms a second N-type semiconductor. Layer 222, light-emitting layer 24, P-type semiconductor layer 25, and the like. In one embodiment of the present invention, the substrate 21 may be an insulating substrate. For example, the material of the insulating substrate includes: gallium oxide (LiGa〇3), lithium aluminum oxide (LiAl〇3), GaN, MgO, ZnO, Alumina (sapphire) ) Wait. In one embodiment of the invention, the luminescent layer 24 can be a multi-quantum well ( MQW) structure. In addition, the material constituting the N-type semiconductor layer 22, the light-emitting layer 24, and the P-type semiconductor layer 25 may be a material of a Group III element containing gallium nitride, and is represented by the following formula: InxAlyGa(ixy)N, wherein X each 1, OSySl, 0$ X + ySl. The method for forming the gallium nitride compound is not particularly limited, and examples thereof include metal organic chemical vapor deposition (M〇CVD), hydrogenated vapor epitaxy (HVPE), vapor phase epitaxy, and molecules. All methods of growing the above materials, such as beam epitaxy (MBE). In an embodiment of the present invention, a buffer layer 29 may be further formed between the N-type semiconductor layer 22 and the substrate 21, and the buffer layer 29 is, for example, nitride, zinc oxide, or the like, and the substrate 21 or the n-type semiconductor layer 22 A material with a relatively narrow lattice constant. In an embodiment, the buffer layer may have a thickness between M1 nm and 2 〇〇 nm. Form No. A0101 Page 8 of 21 0992018499-0 201135971 [0019] In one embodiment of the present invention, the p-type current diffusion layer 26 is used to increase the current in the Ρ-type region. Distribution, which may be a transparent conductive oxide (TCO) layer, for example, indium tin oxide (IT0), cadmium tin oxide (CTO), antimony tin oxide (antimony) Tin oxide, ΑΤΟ, aluminium (doped) zinc oxide (AZO), indium (doped) zinc oxide (IZO), zinc oxide (ZnO), indium tin oxide (indium tin oxide, InO), tin oxide (SnO), aluminum oxide (CQpper aluminujn 〇xide, CAO), and strontium strontium (str〇ntium c〇pper 〇xide, sc〇). In one embodiment of the present invention, the material of the first electrode 27 and the second electrode 28 may be any material as an electrode. For example, it may be selected from the group consisting of indium (In), tin (Sn), and zinc. (zn), recorded (Ni), gold (Au), chromium (Cr), cobalt (c〇), cadmium (cd), aluminum (A1), vanadium (V), silver (Ag), titanium (Ti) One of the group consisting of ore (|), platinum (pt), palladium (pd), rhodium (Rh), and ruthenium (Ru), or a binary or binary metal alloy thereof, but not limit. The thickness of the first electrode 27 and the second electrode 28 may be between 〇1 and 〇〇〇nm. Please refer to FIG. 3 again, which is a schematic structural view of another embodiment of the present invention. The difference from the above embodiment is that the N-type semiconductor layer 22 of the embodiment may include a plurality of N-type current diffusion layers 23, The N-type current diffusion layer 23 may be located between the junction of the second electrode 28 and the N-type semiconductor layer 22 and the light-emitting layer 24, and each of the N-type current diffusion layers 23 is not in contact with each other, and is not 099110501. Form No. A0101 Page 9 of 21 0992018499-0 201135971 The light-emitting layer 24 is in contact with the training semi-guide boat as a space. Thereby, the plurality of fine current diffusion layers 23 can enhance the dispersion effect of the current in the ν-type region, thereby contributing to the improvement of the overall luminous efficiency. [0021] The present invention has experimentally shown that the above-described 电流-type current diffusion layer 23 can indeed increase the power of the peach knives. If the light-emitting diode structure 「 of the "Fig. 2" is used as the control group, the light-emitting diode structure of Fig. 2 is the experimental group. Under the same conditions, the structure of the 电流-type current diffusion layer 23 is opposite to the Ν-type semiconductor layer. The current spreading effect of 22 and the influence of sheet resistance, the related parameters and results are as follows
表一所示。可發現包含Ν型電流擴散層23的Ν型半導體層 22 ’其片電阻值僅為未包含祝型電流擴散層23者之約2〇% 。再施加電壓下，Ν型區域的電流擴散能力則可以電流密 度（current density)的量值來估計，若以電流密度高 於600 (A/cm2)且平行基板21方向的區域範圍來估算，實 驗組可較對照組提升約20%。 [0022]表一 對照組 ...：： ； ；. 實驗組 4 P型半導體層 GaN (0. 2 只¥) % GaN (0. 2 // m) 發光層 Ino.ieGao.84N In〇.16Ga〇.84N N型半導體層 GaN (3jam) GaN (3^m) N型電流擴散層 無 (Α1〇.Λ.9Ν/ 表單編號A0101 第10頁/共21頁 0992018499-0 099110501 201135971 N) (30nm/20 nm/ 15nm) 片電阻（〇hm/sq) 50 10. 4 電流密度 >600(A/cm2)長度 365(y m) 一·- 436(β m) 「圖4-1」與「圖4-2」則分別顯示上述實驗組與對 照組的接面溫度（junction temperature)與操作電壓 (operation voltage)變化。由結果可知，加入N型電 流擴散層23後可降低整體發光二極韓的操作電壓並可降 低接面溫度，而具省電、節能的優勢；同時，由於電流 均勻分布，可提升發光二極體整體妁發光效率。 [0024] 請再參閱「圖5」，其為本發明另一實施例之結構示 、意圖。本發明亦適用於直立式發光二極體結構3〇，其包 含：一基板31、一 N型半導體層32、一 N型電流擴散層33 、一發光層34、一P型半導體層35、一!>型電流擴散層36 、一第一電極37 ’且隹N型半導體層32形成於基板31上， 該N型電流擴散層3 3形成於該N型半導體層3 2之間，結構 同於上述；該發光層34形成於N型半導體層32上，該P型 半導體層35形成於發光層34上；該p型電流擴散層36形成 於該P型半導體層35上；該第一電極37形成於P型電流擴 散層36上。其中，該基板31為—導電型半導體，在該基 板31與第一電極37施加一操作電壓的情況下，該發光二 極體結構30可發出光亮。其中，該基板31為導電型材質 ，例如可為：碳化矽（SiC)、氧化鋅（zn〇)、矽（Si)、鱗 099110501 表單編號A0101 第11頁/共21頁 0992018499-0 201135971 4匕錄（GaAs)、石申4匕錄（GaAs)、i64b#_(ZnSe)、填4匕在因 (InP)及加入矽摻雜之導電型氮化鎵（GaN)等。 [0025] 惟以上所述者，僅為本發明之較佳實施例，非欲侷 限本發明專利之專利保護範圍，故舉凡運用本發明說明 書及圖式内容所為之等效變化與修飾，均同理包含於本 發明之權利保護範圍，合予陳明。 【圖式簡單說明】 [0026] 本發明的實施方式係結合圖式予以描述： [0027] 「圖1」為習知發光二極體之結構示意圖； [0028] 「圖2」為本發明一 實施例之結構示意圖； [0029] 「圖3」為本發明另 一實施例之結構示意圖； [0030] 「圖4-1」與「圖4- -2」為本發明對照習知結構之實驗比 較圖；及 [0031] 「圖5」為本發明另 一實施例之結構示意圖。 【主要元件符號說明】 [0032] 1 0,20,30· · · · •••發光二極體結構 [0033] 11,21,31· · · · • ••基板 [0034] 1 2, 22, 32 · . · · • · · N型半導體層 [0035] 13, 24, 34 .... ...發光層 [0036] 14, 25,35···· • . · P型半導體層 [0037] 1 5, 26, 36 · · · · • · · P型電流擴散層 099110501 表單編號A0101 第12頁/共21頁 0992018499-0 201135971 [0038] 1 6, 27, 37 . · [0039] 17,28···· ...第二電極 [0040] 23, 33 · · · _ • · · · N型電流擴散層 [0041] 29..... ••緩衝層 [0042] 220 ..... ••外露平面 [0043] 221..... .·第一N型半導體層 [0044] 222 · · · · · ..第二N型半導體層 [0045] 231..... •.氮化銦鎵層 [0046] 232 ..... ..氮化鎵層 [0047] 233 ..... .•氮化鋁鎵 Ο 099110501 表單編號Α0101 第13頁/共21頁 0992018499-0Table 1 shows. It can be found that the 半导体-type semiconductor layer 22' including the Ν-type current diffusion layer 23 has a sheet resistance value of only about 2% of that which does not include the current-type current diffusion layer 23. When the voltage is applied again, the current spreading capability of the Ν-type region can be estimated by the magnitude of the current density. If the current density is higher than 600 (A/cm 2 ) and the region of the parallel substrate 21 is estimated, the experiment is performed. The group can be increased by about 20% compared with the control group. [0022] Table 1 control group...:: ; ;. Experimental group 4 P-type semiconductor layer GaN (0.20 ¥) % GaN (0.2 m / m) luminescent layer Ino.ieGao.84N In〇. 16Ga〇.84N N-type semiconductor layer GaN (3jam) GaN (3^m) N-type current diffusion layer None (Α1〇.Λ.9Ν/ Form No. A0101 Page 10 of 21 0992018499-0 099110501 201135971 N) ( 30nm/20 nm/ 15nm) Chip resistance (〇hm/sq) 50 10. 4 Current density>600(A/cm2) Length 365(ym) One·- 436(β m) “Figure 4-1” and “ Fig. 4-2" shows the junction temperature and operation voltage of the above experimental group and the control group, respectively. It can be seen from the results that the addition of the N-type current diffusion layer 23 can reduce the operating voltage of the overall light-emitting diode and reduce the junction temperature, thereby having the advantages of power saving and energy saving; and at the same time, the light-emitting diode can be improved due to uniform current distribution. The overall luminous efficiency of the body. [0024] Please refer to FIG. 5 again, which is a structural diagram and an intention of another embodiment of the present invention. The present invention is also applicable to a vertical light emitting diode structure 3A, comprising: a substrate 31, an N-type semiconductor layer 32, an N-type current diffusion layer 33, a light-emitting layer 34, a P-type semiconductor layer 35, and a a type current diffusion layer 36, a first electrode 37', and a 隹N-type semiconductor layer 32 formed on the substrate 31, the N-type current diffusion layer 33 is formed between the N-type semiconductor layers 32, and has the same structure The light-emitting layer 34 is formed on the N-type semiconductor layer 32, and the P-type semiconductor layer 35 is formed on the light-emitting layer 34; the p-type current diffusion layer 36 is formed on the P-type semiconductor layer 35; the first electrode 37 is formed on the P-type current diffusion layer 36. The substrate 31 is a conductive semiconductor. When the operating voltage is applied to the substrate 31 and the first electrode 37, the LED structure 30 can emit light. The substrate 31 is made of a conductive material, and may be, for example, tantalum carbide (SiC), zinc oxide (zn〇), yttrium (Si), scale 099110501, Form No. A0101, Page 11 of 21, 0992018499-0, 201135971 4匕Recorded (GaAs), Shishen 4 匕 (GaAs), i64b #_ (ZnSe), filled with (InP) and ytterbium doped conductive gallium nitride (GaN). [0025] The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the patent protection of the present invention, so the equivalent changes and modifications of the present invention and the contents of the drawings are the same. It is included in the scope of protection of the present invention and is combined with Chen Ming. BRIEF DESCRIPTION OF THE DRAWINGS [0026] Embodiments of the present invention are described in conjunction with the drawings: [0027] FIG. 1 is a schematic structural view of a conventional light-emitting diode; [0028] FIG. 2 is a BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a schematic structural view of another embodiment of the present invention; [0030] FIG. 4-1 and FIG. 4-2 are experiments of the conventional structure of the present invention. Comparative diagram; and [0031] FIG. 5 is a schematic structural view of another embodiment of the present invention. [Explanation of main component symbols] [0032] 1 0,20,30· · · ·•••Light-emitting diode structure [0033] 11,21,31· · · · •••Substrate [0034] 1 2, 22 , 32 · · · · · · · N-type semiconductor layer [0035] 13, 24, 34 .... ... light-emitting layer [0036] 14, 25, 35 · · · · · · · P-type semiconductor layer [ 0037] 1 5, 26, 36 · · · · · · · P-type current diffusion layer 099110501 Form No. A0101 Page 12 / Total 21 Page 0992018499-0 201135971 [0038] 1 6, 27, 37 . · [0039] 17 , 28···· ...second electrode [0040] 23, 33 · · · _ • · · · N-type current diffusion layer [0041] 29..... •• Buffer layer [0042] 220 .. ...••Exposed plane [0043] 221...... First N-type semiconductor layer [0044] 222 · · · · · .. Second N-type semiconductor layer [0045] 231..... • Indium gallium nitride layer [0046] 232 ..... .. gallium nitride layer [0047] 233 ..... • Aluminium nitride gallium Ο 099110501 Form number Α 0101 Page 13 / 21 pages 0992018499 -0