201123150 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係有關於一種驅動液晶顯示裝置之方法，特別是 一種以四線之多線定址技術驅動液晶顯示裝置之方法。 [先前技術] [0002] 多線定址技術（Mu 11: i-Li ne Addressing，通常簡稱為 MLA)是一種驅動液晶顯示裝置的技術，其中又以四線之 多線定址技術最為常見。請參考第一圖，其係為以四線 之多線定址技術驅動之液晶顯示裝置方塊圖。一液晶顯 示裝置10包含一液晶顯示控制單元100、一多線定址數學 計算單元200、一行驅動單元300、一列驅動單元400及 一液晶顯示面板單元500。該行驅動單元300包含至少一 行電極302 ;該列驅動單元包含一第一列電極402、一第 二列電極404、一第三列電極406及一第四列電極408 ; 該液晶顯示面板單元500包含多數之面板元素50 0a〜 500η 〇 [0003] 該液晶顯示控制單元100將欲執行之信號，先經過該多線 定址數學計算單元200運算成符合多線定址輸出的形式之 後，再送到該行驅動單元300及該列驅動單元400，再以 該行電極302、該第一列電極402、該第二列電極404、 該第三列電極406及該第四列電極408驅動該液晶顯示面 板單元500之該些面板元素500a〜500η。 [0004] 一般在討論以多線定址技術驅動液晶顯示器時，都會以 矩陣的形式來表示。請參考第二圖，其係為習知列驅動 單元輸出電壓矩陣表示圖。舉例來說，在一第一子圖框 098143770 表單編號Α0101 第4頁/共25頁 0982074953-0 201123150 時間，該第一列電極402、該第二列電極404、該第三列 電極406及該第四列電極408分別對該第m列第η行、該第 m+1歹4第η行、該第m + 2歹第η行及該第m + 3列第η行的該些 面板元素500a〜500η輸出一單位之正電壓、一單位之正 電壓、一單位之負電壓及一單位之正電壓。餘此類推， 即可由矩陣的形式清楚得知輸出電壓大小。 [0005] Ο Ο [0006] 請參考第三圖，其係為習知液晶顯示面板顯示矩陣表示 圖。第三圖代表在該些面板元素500a〜500η當中，該第 m列第η行（顯示為-1)、該第m+1列第η行（顯示為1) 、該第m+2列第η行（顯示為1)及該第m+3列第η行（顯 示為-1)的該些面板元素500a〜500η為開啟、關閉、關 閉及開啟（以上為-1代表開啟，1代表關閉；當然也可以 以1代表開啟，-1代表關閉，則此時為關閉、開啟、開啟 及關閉）。該些面板元素500a〜500η的開啟或關閉，係 由該液晶顯示控制單元100送出之欲執行之信號決定，也 就是由使用者決定。換句話說，第三圖是該液晶顯示面 板單元500最後要顯現狀態的矩陣表示圖。 目前以四線之多線定址技術驅動液晶顯示裝置時，在該 列驅動單元400的輸出電壓矩陣大多都使用如第二圖所示 的矩陣。再者，配合第三圖所示的液晶顯示面板顯示矩 陣，互相作矩陣運算，即可算出該行驅動單元300之該行 電極302所需輸出之電壓矩陣。也就是說，該多線定址數 學計算單元200的工作之一即在對該列驅動單元400輸出 電壓矩陣及該液晶顯示面板單元500顯示矩陣互相作矩陣 運算，以計算出該行驅動單元300之該行電極302所需輸 098143770 表單編號Α0101 第5頁/共25頁 0982074953-0 201123150 出之電壓矩陣。 [0007] 請參考第四圖，其係為第二圖與第三圖作矩陣運算後之 示意圖。矩陣運算後即可得到該行電極302所需輸出之電 壓矩陣。在第四圖的範例中，矩陣運算結果顯示該行電 極302在該第一子圖框時間對該第m列第η行、該第m + Ι列 第η行、該第m + 2列第η行及該第m + 3列第η行的該些面板 元素500a〜500η輸出二單位之負電壓；換言之，該行電 極302在該第一子圖框時間輸出二單位之負電壓。同理， 該行電極302在該第二子圖框時間、該第三子圖框時間及 該第四子圖框時間分別輸出二單位之正電壓、二單位之 負電壓及二單位之正電壓。 [0008] 綜上所述，吾人可知目前習知之以四線之多線定址技術 驅動液晶顯示裝置之方法，係以第二圖之該列驅動單元 40 0輸出電壓矩陣，配合例如第三圖之該液晶顯示面板單 元500最後要顯現狀態的矩陣，作矩陣的運算，以反推算 出如第四圖之該行電極302所要輸出之電壓矩陣圖。然而 ，第三圖與第四圖僅為其中一個實施例，實際上四線之 多線定址技術會有十六種實施例（因為每一該些面板元 素500a〜500η有1與-1兩種選擇，所以四線即為二的四 次方等於十六種）。這些十六種實施例如第五圖及第六 圖所示。 [0009] 從第五圖及第六圖的矩陣運算結果可得知，該行電極302 並不如第四圖只需輸出二單位之正電壓或二單位之負電 壓。事實上， 098143770 表單編號Α0101 第6頁/共25頁 0982074953-0 201123150 _]目為習知四線之多線定址技術中，該行電極3〇2的輸出電 壓種類-共有五種電壓種類之多，所以習知四線之多線 定址技術常見的缺點為電路較為複雜，以及直流對直流 不平衡的狀況較為明顯。 【發明内容】 [⑻11]為改善上述習知技術之缺點，本發明之目的在於提供一 種以四線之多線定址技術驅動液晶顯示裝置之方法。 剛A達成本發明之上述目的，本發明之以四線之多線定址 Ο 技術驅動液晶顯示裝置之方法係應用於一液晶顯示裝置 ;該液晶顯示裝置包含一行驅動單元'一列驅動單元及 一液晶顯示面板單元；該行·驅動單元包含至少一行電極 ，該列驅動單元包含一第一列電極、一第二列電極、一 第二列電極及一第四列電極；該液晶顯示面板單元包含 多數之面板元素；一預設面板子單元包含一第111列第n行 、一第m+1列第η行及一第!^?列第η行的該些面板元素。 該以四線之多線定址技術驅動液晶顯示裝置之方法包含 〇 :在一第一子圖框時間，譎第一列電極、該第二列電極 及該第三列電極分別對該第m列第〇行、該第m +丨列第η行 及該第m+2列第η行的該些面板元素輸出一單位之負電壓 、一單位之正電壓及一單位之負電壓；在一第二子圖框 時間，該第一列電極、該第二列電極及該第三列電極分 別對該第in列第η行、該第m + l列第η行及該第m + 2列第η行 的該些面板元素輸出一單位之正電壓、一單位之負電壓 及一單位之負電壓；在一第三子圖框時間，該第一列電 極、該第二列電極及該第三列電極分別對該第^列第η行 098143770 表單編號Α0101 第7頁/共25頁 0982074953-0 201123150 、該第m +1列第η行及該第m + 2列第η行的該些面板元素輸 出一單位之負電壓、一單位之負電壓及一單位之正電壓 ;及在一第四子圖框時間，該第一列電極、該第二列電 極及該第三列電極分別對該第m列第η行、該第m+1列第η 行及該第m + 2列第η行的該些面板元素輸出一單位之正電 壓、一單位之正電壓及一單位之正電壓。 【實施方式】 [0013] 本發明之以四線之多線定址技術驅動液晶顯示裝置之方 法係應用於如第一圖以四線之多線定址技術驅動之液晶 顯示裝置。本發明係改良第二圖習知之該列驅動單元400 之輸出電壓矩陣；且本發明之該列驅動單元400之輸出電 壓矩陣如第七圖所示。再者，習知四線之多線定址技術 係一次處理四線，而本發明係一次處理三線。 [0014] 請參考第八圖，其係為本發明之矩陣運算及表格示意圖 。第八圖的上半部的左邊四乘四矩陣即為第七圖所示本 發明之該列驅動單元400之輸出電壓矩陣；第八圖上半部 中間四乘一的矩陣即為該液晶顯示面板單元5 0 0最後要顯 現狀態的矩陣；兩者互相作矩陣運算即可得到如第八圖 上半部右邊四乘一的矩陣，即本發明之該行電極302所需 輸出之電壓矩陣。 [0015] 第八圖上半部僅為本發明之一實施例，本發明實際上一 共有八種實施例，表列如第八圖下半部所示。其中第八 圖上半部的實施例係在第八圖下半部的第五列。因為本 發明係一次處理三線，但為符合矩陣運算規則，將產生 一假單元（Dummy )。舉例來說，第八圖上半部中間四乘 098143770 表單編號A0101 第8頁/共25頁 0982074953-0 201123150 一的矩陣（該液晶顯示面板單元500最後要顯現狀態的矩 陣）依序為1、-1、-1及1 ;但本發明僅處理前面三個1、 -1及-1，最後一個1稱之為假單元（Dummy)，僅為符合 矩陣運算而存在。 [0016] 綜上所述，本發明係採用如第七圖之該列驅動單元400之 輸出電壓矩陣；並且一次處理三線，而由第八圖可得知 ，本發明之該行電極302將僅有零電壓、四單位之正電壓 及四單位之負電壓，共三種電壓選擇。因此大大改善習 知該行電極302有五種電壓輸出而造成的電路較為複雜， 以及直流對直流不平衡的狀況較為明顯的缺點。 [0017] 以下將就本發明之以四線之多線定址技術驅動液晶顯示 裝置之方法作詳細解說。請參考第九圖，其係為本發明 之四線之多線定址技術之列驅動單元輸出電壓矩陣流程 圖。並請參考第一圖，一預設面板子單元502係包含該第 m列第η行、該第m+1列第η行及該第m + 2列第η行的該些面 板元素500a〜500η。 [0018] 在該第一子圖框時間，該第一列電極402、該第二列電極 404及該第三列電極406分別對該第m列第η行、該第m+1 列第η行及該第m + 2列第η行的該些面板元素500a〜500η 輸出一單位之負電壓、一單位之正電壓及一單位之負電 壓（S10)。 [0019] 在該第二子圖框時間，該第一列電極402、該第二列電極 404及該第三列電極406分別對該第m列第η行、該第m+1 列第η行及該第m+2列第η行的該些面板元素500a〜500η 098143770 表單編號Α0101 第9頁/共25頁 0982074953-0 201123150 輸出-單位之正電壓、-單位之負及—單位之 壓（S20)。 [0020] [0021] [0022] [0023] [0024] 在》亥第—子圖框時間，該第—列電極術該第二列電極 4〇4及該第三列電極分別對該知列第n行該細！ 列第晴及該細2列第η行的該些面板元素5〇〇a〜5〇〇n 輪出一單位之負電壓、—單位之負電壓及—單位之正電 壓（S30) 〇 在該第四子圖框時間’該第-列電極402、該第二列電極 4〇4及該第三列電極分別對該第祖列第n行該細j 〇 列第η行及該第m + 2列第η行的該些面板元素5〇〇a 〜500η 輸出一單位之正電壓、一單位之正電壓及一單位之正電 壓（S40)。 接著，以下解說請一併參考第八圖下半部的表格。 在该第一子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電極3〇2對該預設面板 子早元502分別輸出零電壓、零電壓、零電壓及四單位之 ◎ 正電壓，該第m列第η行、該第m+Ι列第η行及該第m+2列 第η行的該些面板元素5〇〇a〜5〇〇n將顯示為}(關閉）、 1 (關閉）及1 (關閉）。 在該第一子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電極302對該預設面板 子單元502分別輸出零電壓、零電壓、四單位之負電壓及 零電壓；該第m列第η行、該第m + 1列第η行及該第m + 2列 第η行的該些面板元素500a〜500η將顯示為1 (關閉）、 098143770 表單編號Α0101 第10頁/共25頁 0982074953-0 201123150 1 (關閉）及-1 (開啟）。 [0025] 在該第一子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電極3〇2對該預設面板 子單元502分別輸出四單位之負電壓、零電壓、零電壓及 零電壓；該第!!!列第η行、該第m+1列第η行及該第m+2列 第η行的該些面板元素5〇〇3〜5〇〇11將顯示為1 (關閉）、 -1 (開啟）及1 (關閉）。 [0026] Ο 在该第一子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電極3〇 2對該預設面板 子單元502分別輸出零電壓、四單位之負電壓、零電壓及 零電壓；該第m列第η行、該第m+1列第晴及該第m+2列 第11行的該些面板元素500a〜500η將顯示為-1 (開啟） 、1 (關閉）及1 (關閉）。 [0027] 在該第一子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電接3如對該預設面板 子單ΤΟ502分別輸出零電壓、四箪杻之正電壓、零電壓及 零電壓；該第m列第晴、該第®+l列第晴及該第m+2列 第η行的該些面板元素5〇〇a〜5〇〇n將顯示為1 (關閉）、 -1 (開啟）及-1 (開啟）。 [0028] 在該第—子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖極時間，該行電極對該預設面板 子皁兀502分別輸出四單位之正電壓、零電壓、零電壓及 零電壓’該第m列第晴、該第m + 1列第晴及該第㈣列 第n打的該些面板元素50〇a〜500η將顯示為](開啟） 098143770 表單編號Α0101 第〗1頁/共25頁 0982074953-0 201123150 ' 1 (關閉）及-1 (開啟）。 陶]在4第—子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電極3〇2對該預設面板 子單元502分別輸出零電壓、零電壓、四單位之正電壓及 零電壓；該第111列第n行、該第m+Ι列第η行及該第㈣列 第η行的該些面板元素5〇〇a〜5〇〇n將顯示為_丨（開啟） 、-1 (開啟）及1 (關閉）。 [0030] 在該第一子圖框時間、該第二子圖框時間、該第三子圖 框時間及該第四子圖框時間，該行電極3 〇 2對該預設面板 子單元502分別輸出零電壓、零電壓、零電壓及四單位之 負電壓；該第m列第n行、該第m+1列第〇行及該第m+2列 第η行的該些面板元素5〇〇a〜5〇〇n將顯示為_丨（開啟） 、-1 (開啟）及-1 (開啟）。 [0031] 由以上說明可知本發明之以四線之多線定址技術驅動液 晶顯示裝置之方法，與習知技術不同之特點與優點為： [0032] 1.該列驅動單元400之輸出電缂矩陣如第七圖所示。 ...；： ：..BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a liquid crystal display device, and more particularly to a method of driving a liquid crystal display device by a four-wire multi-line addressing technique. [Prior Art] [0002] Multi-line addressing technology (Mu 11: i-Li ne Addressing, commonly referred to as MLA) is a technology for driving a liquid crystal display device, and a four-wire multi-line addressing technique is most common. Please refer to the first figure, which is a block diagram of a liquid crystal display device driven by a four-wire multi-line addressing technique. A liquid crystal display device 10 includes a liquid crystal display control unit 100, a multi-line addressing mathematical calculation unit 200, a row of driving units 300, a column of driving units 400, and a liquid crystal display panel unit 500. The row driving unit 300 includes at least one row of electrodes 302. The column driving unit includes a first column electrode 402, a second column electrode 404, a third column electrode 406, and a fourth column electrode 408. The liquid crystal display panel unit 500 The majority of the panel elements 50 0a to 500η 〇 [0003] The liquid crystal display control unit 100 first performs the signal to be executed by the multi-line addressing mathematical calculation unit 200 to conform to the multi-line address output form, and then sends the signal to the line. The driving unit 300 and the column driving unit 400 further drive the liquid crystal display panel unit with the row electrode 302, the first column electrode 402, the second column electrode 404, the third column electrode 406 and the fourth column electrode 408 The panel elements 500a to 500n of 500. [0004] Generally speaking, when a liquid crystal display is driven by a multi-line addressing technique, it is represented in the form of a matrix. Please refer to the second figure, which is a matrix diagram of the output voltage matrix of the conventional column driver unit. For example, in a first sub-frame 098143770, form number Α0101, page 4/25 pages 0982074953-0, 201123150, the first column electrode 402, the second column electrode 404, the third column electrode 406, and the The fourth column electrode 408 respectively the panel elements of the mth column, the nth row, the m+1th4th nth row, the m+2歹th nth row, and the m+3th column nth row 500a~500η outputs a positive voltage of one unit, a positive voltage of one unit, a negative voltage of one unit, and a positive voltage of one unit. After all, the output voltage can be clearly known from the form of a matrix. [0005] Please refer to the third figure, which is a display matrix representation of a conventional liquid crystal display panel. The third figure represents the nth row of the mth column (displayed as -1), the m+1th column and the nth row (displayed as 1), and the m+2th column. The panel elements 500a to 500n of the η row (shown as 1) and the ηth row (shown as -1) of the m+3 column are on, off, off, and on (the above is -1 for on, and 1 for off) Of course, you can also turn it on by 1 and turn off on -1, then turn it off, on, on, and off. The opening or closing of the panel elements 500a to 500n is determined by the signal to be executed sent by the liquid crystal display control unit 100, that is, determined by the user. In other words, the third figure is a matrix representation of the state in which the liquid crystal display panel unit 500 is to be finally displayed. At present, when a liquid crystal display device is driven by a four-wire line addressing technique, a matrix as shown in the second figure is often used in the output voltage matrix of the column drive unit 400. Furthermore, the voltage matrix of the output of the row electrode 302 of the row driving unit 300 can be calculated by performing a matrix operation on the liquid crystal display panel display matrix shown in the third figure. That is, one of the operations of the multi-line addressing mathematical calculation unit 200 is to perform a matrix operation on the output voltage matrix of the column driving unit 400 and the display matrix of the liquid crystal display panel unit 500 to calculate the row driving unit 300. The row electrode 302 needs to be input 098143770 Form No. Α0101 Page 5/Total 25 Page 0982074953-0 201123150 The voltage matrix. Please refer to the fourth figure, which is a schematic diagram of the matrix operation of the second figure and the third figure. After the matrix operation, the voltage matrix of the output of the row electrode 302 can be obtained. In the example of the fourth figure, the result of the matrix operation shows that the row electrode 302 is at the first sub-frame time for the mth column, the nth row, the m+th column, the nth row, and the m+2th column. The n-th row and the panel elements 500a-500n of the m+3th column and the nth row output two units of negative voltage; in other words, the row electrode 302 outputs two units of negative voltage at the first sub-frame time. Similarly, the row electrode 302 outputs two units of positive voltage, two units of negative voltage, and two units of positive voltage at the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, respectively. . [0008] In summary, we can know that the conventional method for driving a liquid crystal display device by using a four-wire line addressing technique is to output a voltage matrix in the column of the driving unit 40 0 of the second figure, for example, in the third figure. The liquid crystal display panel unit 500 finally presents a matrix of states, and performs a matrix operation to inversely calculate a voltage matrix diagram to be outputted by the row electrode 302 as shown in the fourth figure. However, the third and fourth figures are only one of the embodiments. In fact, there are sixteen embodiments of the four-wire multi-line addressing technique (because each of the panel elements 500a~500η has 1 and -1) Choice, so the four lines are two, the fourth power is equal to sixteen). These sixteen implementations are shown in the fifth and sixth figures. [0009] From the results of the matrix operations of the fifth and sixth figures, it can be seen that the row electrode 302 does not need to output two units of positive voltage or two units of negative voltage as in the fourth diagram. In fact, 098143770 Form No. 1010101 Page 6 / Total 25 Page 0982074953-0 201123150 _] In the conventional four-wire line addressing technology, the output voltage of the row electrode 3〇2 - there are five voltage types Many, so the common shortcomings of the four-wire line addressing technology are that the circuit is more complicated, and the DC-DC imbalance is more obvious. SUMMARY OF THE INVENTION [(8)11] In order to improve the above-described drawbacks of the prior art, it is an object of the present invention to provide a method of driving a liquid crystal display device by a four-wire multi-line addressing technique. Having achieved the above object of the present invention, the method for driving a liquid crystal display device by a four-wire multi-line addressing technique is applied to a liquid crystal display device; the liquid crystal display device includes a row of driving units 'one column of driving units and one liquid crystal a display panel unit; the row driving unit comprises at least one row of electrodes, the column driving unit comprises a first column electrode, a second column electrode, a second column electrode and a fourth column electrode; the liquid crystal display panel unit comprises a majority The panel element; a preset panel sub-unit includes a panel element of the 111th row nth row, an m+1th column ηth row, and a _th column of the ηth row. The method for driving a liquid crystal display device by using a four-wire line addressing technique includes: at a first sub-frame time, the first column electrode, the second column electrode, and the third column electrode respectively corresponding to the m-th column The panel elements of the third row, the nth row and the nth row of the m+2 column output a unit of a negative voltage, a positive voltage of one unit, and a negative voltage of one unit; In the two sub-frame time, the first column electrode, the second column electrode, and the third column electrode respectively correspond to the nth row of the in-th column, the n-th row of the m-th column, and the m-th column of the m-th column The panel elements of the η row output a unit of positive voltage, a unit of negative voltage, and a unit of negative voltage; at a third sub-frame time, the first column electrode, the second column electrode, and the third The column electrodes respectively correspond to the panel of the ηth row 098143770 form number Α0101 page 7 / 25 pages 0982074953-0 201123150, the m +1 column η row, and the m + 2 column η row The element outputs a unit of negative voltage, a unit of negative voltage, and a unit of positive voltage; and at a fourth sub-frame time, the first column The second column electrode and the third column electrode respectively output one unit to the panel elements of the mth column nth row, the m+1th column nth row, and the m+2 column nth row Positive voltage, positive voltage of one unit and positive voltage of one unit. [Embodiment] The method of driving a liquid crystal display device by a four-wire multi-line addressing technique of the present invention is applied to a liquid crystal display device driven by a four-line multi-line addressing technique as shown in the first figure. The present invention is to improve the output voltage matrix of the column driving unit 400 of the second figure; and the output voltage matrix of the column driving unit 400 of the present invention is as shown in the seventh figure. Furthermore, the conventional four-wire line addressing technique processes four lines at a time, and the present invention processes three lines at a time. [0014] Please refer to the eighth figure, which is a matrix operation and a table diagram of the present invention. The left four-by-four matrix of the upper half of the eighth figure is the output voltage matrix of the column driving unit 400 of the present invention shown in the seventh figure; the matrix of the middle four by one of the upper half of the eighth figure is the liquid crystal display. The panel unit 500 finally wants to present a matrix of states; the two are mutually matrix-operated to obtain a matrix of four by one to the right of the upper half of the eighth figure, that is, the voltage matrix of the output of the row electrode 302 of the present invention. [0015] The upper half of the eighth figure is only one embodiment of the present invention, and the present invention actually has eight embodiments in total, as shown in the lower half of the eighth figure. The embodiment of the upper half of the eighth figure is in the fifth column of the lower half of the eighth figure. Since the present invention processes three lines at a time, in order to conform to the matrix operation rule, a dummy unit (Dummy) is generated. For example, the upper middle half of the eighth figure is 098,143,770, the form number A0101, the eighth page, the total of 25 pages, the number of pages 0982074953-0, 201123150, the matrix (the matrix of the liquid crystal display panel unit 500 finally showing the state) is sequentially 1. -1, -1, and 1; however, the present invention only processes the first three, -1, and -1, and the last one is called a dummy (Dummy), which exists only for the matrix operation. In summary, the present invention adopts the output voltage matrix of the column driving unit 400 as shown in FIG. 7; and processes the three lines at a time, and as can be seen from the eighth figure, the row electrode 302 of the present invention will only There are zero voltage, four units of positive voltage and four units of negative voltage, a total of three voltage options. Therefore, it is greatly improved that the circuit caused by the five kinds of voltage outputs of the row electrode 302 is complicated, and the DC-DC imbalance is more obvious. [0017] Hereinafter, a method of driving a liquid crystal display device by a four-wire multi-line addressing technique of the present invention will be described in detail. Please refer to the ninth figure, which is a flow chart of the output voltage matrix of the driving unit of the four-wire multi-line addressing technology of the present invention. Referring to the first figure, a preset panel sub-unit 502 includes the panel elements 500a of the mth column, the nth row, the m+1th column, the nth row, and the m+2th column and the nth row. 500η. [0018] at the first sub-frame time, the first column electrode 402, the second column electrode 404, and the third column electrode 406 respectively the nth row and the m+1th column η of the mth column The row and the panel elements 500a to 500n of the nth row and the nth row output a unit of a negative voltage, a unit of positive voltage, and a unit of negative voltage (S10). [0019] at the second sub-frame time, the first column electrode 402, the second column electrode 404, and the third column electrode 406 respectively the nth row and the m+1th column The panel elements 500a~500η 098143770 of the row and the m+2th column η row Form No. 1010101 Page 9/Total 25 Page 0982074953-0 201123150 Output-unit positive voltage, - unit negative and - unit pressure (S20). [0024] [0024] [0024] [0024] In the "Hai-sub-frame time, the first column electrode, the second column electrode 4〇4 and the third column electrode respectively The nth line is fine! The panel elements 5〇〇a~5〇〇n of the column clear and the second row of the nth row rotate a unit of negative voltage, a negative voltage of the unit, and a positive voltage of the unit (S30). a fourth sub-frame time 'the first column electrode 402, the second column electrode 4〇4, and the third column electrode respectively for the nth row of the first row of the ancestors, the nth row and the mth row The panel elements 5〇〇a to 500n of the 2nd nth row output a positive voltage of one unit, a positive voltage of one unit, and a positive voltage of one unit (S40). Next, please refer to the table in the lower part of the eighth figure together with the following explanation. At the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrode 3〇2 outputs the preset panel sub-element 502 respectively. Zero voltage, zero voltage, zero voltage, and four units of positive voltage, the mth column η row, the m+th column η row, and the m+2 column η row of the panel elements 5〇 〇a~5〇〇n will be displayed as } (off), 1 (off), and 1 (off). During the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrode 302 outputs zero voltage to the preset panel sub-unit 502, Zero voltage, four units of negative voltage and zero voltage; the panel elements 500a to 500n of the mth column η row, the m+1th column η row, and the m+2 column η row are displayed as 1 (closed), 098143770 Form No. 1010101 Page 10/Total 25 Page 0982074953-0 201123150 1 (Off) and -1 (On). [0025] at the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrode 3〇2 is to the preset panel sub-unit 502 Outputting four units of negative voltage, zero voltage, zero voltage and zero voltage respectively; the panel of the !!!th row, the m+1th column η row, and the m+2 column η row Elements 5〇〇3~5〇〇11 will be displayed as 1 (off), -1 (on), and 1 (off). [0026] 行 at the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrode 3〇2 is on the preset panel subunit 502 respectively output zero voltage, four units of negative voltage, zero voltage and zero voltage; the mth column η row, the m+1th column gradation and the m+2 column 11th row of the panel elements 500a ~500η will be displayed as -1 (on), 1 (off), and 1 (off). [0027] at the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrical connection 3 is as the preset panel sub-unit 502 Outputting a zero voltage, a positive voltage of four turns, a zero voltage, and a zero voltage respectively; the m-th column is sunny, the ++1 column is sunny, and the panel elements of the m+2 column nth row are 5〇 〇a~5〇〇n will be displayed as 1 (off), -1 (on), and -1 (on). [0028] at the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-picture time, the row electrode outputs the preset panel sub-sap 502 The positive voltage, zero voltage, zero voltage and zero voltage of the four units 'the mth column is sunny, the m + 1 column is sunny, and the panel elements 50〇a~500η of the nth column are displayed For] (ON) 098143770 Form No. 1010101 No. 1 Page/Total 25 Page 0982074953-0 201123150 ' 1 (closed) and -1 (opened). In the 4th sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrode 3〇2 respectively separates the preset panel subunit 502 Outputting zero voltage, zero voltage, four units of positive voltage and zero voltage; the 111th row nth row, the m+th column η row, and the fourth column η row of the panel elements 5〇〇a ~5〇〇n will be displayed as _丨 (on), -1 (on) and 1 (off). [0030] at the first sub-frame time, the second sub-frame time, the third sub-frame time, and the fourth sub-frame time, the row electrode 3 〇 2 is to the preset panel sub-unit 502 Outputting a zero voltage, a zero voltage, a zero voltage, and a negative voltage of four units; the panel elements 5 of the mth column, the nth row, the m+1th column, and the m+2th column and the nth row 〇〇a~5〇〇n will be displayed as _丨 (on), -1 (on), and -1 (on). [0031] From the above description, the method for driving a liquid crystal display device by the four-wire multi-line addressing technology of the present invention has different features and advantages from the prior art: [0032] 1. The output power of the column driving unit 400 The matrix is shown in the seventh figure. ...;: :..
[0033] 2· —次處理三線。 [0034] 3.該行電極302僅有三種電壓種類，因此大大改善習知 該行電極302有五種電壓輸出而造成的電路較為複雜，以 及直流對直流不平衡的狀況較為明顯的缺點。 [0035] 综上所述，當知本發明已具有產業利用性、新穎性與進 步性，又本發明之構造亦未曾見於同類產品及公開使用 ’完全符合發明專利申請要件，爰依專利法提出申請。 098143770 表單編號A0101 第12頁/共25頁 0982074953-0 201123150 【圖式簡單說明】 [0036] 第一圖為以四線之多線定址技術驅動之液晶顯示裝置方 塊圖。 [0037] 第二圖為習知列驅動單元輸出電壓矩陣表示圖。 [0038] 第三圖為習知液晶顯示面板顯示矩陣表示圖。 [0039] 第四圖為第二圖與第三圖作矩陣運算後之示意圖。 [0040] 第五圖及第六圖為四線之多線定址技術之矩陣運算實施 〇 [0041] 例。 第七圖為本發明之列驅動單元之輸出電壓矩陣表示圖。 [0042] 第八圖為本發明之矩陣運算及表格示意圖。 [0043] 第九圖為本發明之四線之多線定址技術之列驅動單元輸 出電壓矩陣流程圖。 [0044] 【主要元件符號說明】 液晶顯示裝置10 ❹ [0045] 液晶顯示控制單元100 [0046] 多線定址數學計算單元200 [0047] 行驅動單元300 [0048] 列驅動單元400 [0049] 液晶顯示面板單元5 0 0 [0050] 行電極3 0 2 [0051] 第一列電極402 098143770 表單編號A0101 第13頁/共25頁 0982074953-0 201123150 [0052] 第二列電極404 [0053] 第三列電極406 [0054] 第四列電極408 [0055] 預設面板子單元502 [0056] 面板元素500a〜500η 098143770 表單編號Α0101 第14頁/共25頁 0982074953-0[0033] 2 - - processing three lines. [0034] 3. The row electrode 302 has only three types of voltages, so that the circuit caused by the five kinds of voltage outputs of the row electrode 302 is complicated, and the DC-DC imbalance is more obvious. [0035] In summary, it is known that the present invention has industrial applicability, novelty and advancement, and the structure of the present invention has not been seen in similar products and public use is fully in accordance with the requirements of the invention patent application, and is proposed according to the patent law. Application. 098143770 Form No. A0101 Page 12 of 25 0982074953-0 201123150 [Simplified Schematic] [0036] The first figure is a block diagram of a liquid crystal display device driven by a four-wire line addressing technique. [0037] The second figure is a conventional matrix drive unit output voltage matrix representation. [0038] The third figure is a display matrix representation of a conventional liquid crystal display panel. [0039] The fourth figure is a schematic diagram of the second figure and the third figure after matrix operation. [0040] The fifth and sixth figures are matrix operation implementations of the four-wire multi-line addressing technique. [0041] Example. Figure 7 is a diagram showing the output voltage matrix of the column driving unit of the present invention. [0042] The eighth figure is a schematic diagram of a matrix operation and a table of the present invention. [0043] FIG. 9 is a flow chart of the output voltage matrix of the column driving unit of the four-wire multi-line addressing technology of the present invention. [Main Element Symbol Description] Liquid Crystal Display Device 10 [0045] Liquid Line Display Control Unit 100 [0046] Multi-line Addressing Math Calculation Unit 200 [0047] Row Drive Unit 300 [0048] Column Drive Unit 400 [0049] Liquid Crystal Display panel unit 5 0 0 [0050] row electrode 3 0 2 [0051] first column electrode 402 098143770 form number A0101 page 13 / total 25 page 0982074953-0 201123150 [0052] second column electrode 404 [0053] third Column electrode 406 [0054] Fourth column electrode 408 [0055] Preset panel subunit 502 [0056] Panel elements 500a~500n 098143770 Form number Α0101 Page 14/Total 25 page 0982074953-0