201121047 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種電晶體感測元件’特別係指一種具有奈米 線通道作為感測應用之奈米線電晶體感測元件。 【先前技術】 隨著半導體製程技術的進步與生醫分析需求大增’使得具有 可微小化和可大量製備的場效電晶體式的感測元件成為主流的生 醫感測元件之一，其中更以結合奈米技術將矽奈米線（奈米線通道) 透過傳統微縮製程（top-down approach)放置於場效電晶體之閘極 旁，除可大幅提升感測的靈敏度外，也解決傳統以bulk金屬-氧化 層·半導體-場效電晶體（bulk Metal-Oxide-Semiconductor Field-Effect Transistor(MOSFET))結構的場效電晶體式的感測元件 受限於基板漏電流等不理想效應限制的問題。 雖然，上述這種矽奈米線感測元件因奈米特性對感測訊號具 有高響應與高靈敏度，並被證實可用於脱氧核糖核酸 (DeoxyriboNucleic Acid, DNA)、蛋白質（proteins)和酸驗度(pH)的 檢測應用上，但其感測方式大多係將奈米線通道本身直接接觸或 隔著薄絕緣層於待測物質中進行感測，此方式會造成感測元件可 靠度降低(使用壽命變短）、保存能力不佳和封裝上困難等問題。 因此’如何能在不接觸奈米線通道下進行感測作業，除保持 原有高響應與高靈敏度，又能確保感測元件的玎靠度及保存能 力，一直是相關感測元件廠商努力研發的目標。 201121047 【發明内容】 本案發明人有鑑於上述現有矽奈米線感測元件存在之問題， 乃著手進行研發，以期可以解決該問題或提供更良善之解決方 案，經過不斷努力及試驗，終於研發出本發明。 本發明之第一目的在於提供一種奈米線電晶體感測元件，特 別係指一種具有奈米線通道作為感測應用之電晶體感測元件，相 較於習知的矽奈米線感測元件，本發明之電晶體感測元件可將用 於感測之奈米線有效隔離於待測環境之外，來確保感測元件的可 Φ 靠度及保存能力。 為達上述之目的，本發明電晶體感測元件，係包括有： 一絕緣基板； 至少一奈米線通道，係形成於該絕緣基板上； 一汲極，係形成於該奈米線通道之一側； 一源極，係形成於該奈米線通道相對該汲極之另一側； 一閘極介電層，係形成於該奈米線通道上； 至少一閘極，係對應於該奈米線通道之長度形成於該閘極介 籲電層上； 一導體層，係形成於該絕緣基板上，並連結該至少一閘極； 一覆蓋絕緣層，係覆蓋於該奈米線通道、該汲極、該源極、 該閘極介電層、該至少一閘極及該導體層； 一穿孔，係設置於該導體層上，並穿設於該覆蓋絕緣層内； - 及 - 一天線導體層，其具有一感測平台及一連接部，該感測平台 係形成於該覆蓋絕緣層上，該連接部係填充該穿孔與該導體層電 201121047 性連接。 因此，藉由上述之奈米線電晶體感測元件，本發明可利用該 天線導體層有效地隔離該奈米線通道於待測環境之外，來確保奈 米線電晶體感測元件的可靠度及保存能力。 【實施方式】 為使熟悉該項技藝人士暸解本發明之目的，兹配合圖式將本 發明之較佳實施例詳細說明如下。 請參考第一 A及一 B圖所示，係本發明電晶體感測元件之第 φ 一實施例，其包括有： 一絕緣基板（100); 一奈米線通道（110)，係形成於該絕緣基板（100)上； 一汲極（114)，係形成於該奈米線通道（110)之一侧； 一源極（113)，係形成於該奈米線通道（110)相對該汲極（114 )之另一側； 一閘極介電層（111)，係形成於該奈米線通道（110)上； 一閘極（112)，係形成於該閘極介電層（111)上； ® 一導體層（115)，係形成於該絕緣基板（100)上，並連結該閘極 (112); 一覆蓋絕緣層（150)，係覆蓋於該奈米線通道（110)、該汲極 (114) 、該源極（113)、該閘極介電層（111)、該閘極（112)及該導體層 (115) ; •一穿孔（120)，係對應設置於該導體層（115)上，並穿設於該覆 蓋絕緣層（150)内；及 一天線導體層（140)，其具有一感測平台（1401)及一連接部 201121047 (刚2)顧測平台（14〇1)係形成於該覆蓋絕緣層（岡上，該連接 部（1術)係填錢穿孔⑽)触導體層（i5G)f性連接。 I邑緣基板（1GG)可為—玻璃材質基板、—塑膠材質基板或一 具有絕緣層之發晶圓基板，其中，該具有絕緣層之⑽圓基板係 於石夕晶圓基板上沉積-層熱氧化層⑽也㈣。 夕H線通道（110)可為石夕、錯、石夕錯或三五族半導體材料的 多晶體(P〇iycrystalline)或單曰曰曰體結才冓，其巾，該奈米線通道⑴〇) .的。彳面大小為100奈米以下，更以30奈米以下為佳，另外，該奈 米線通道（110)的矩形圖式僅為示意之用，其形狀包括但不限於圓 形或三角形。 該天線導體層（140)的材料可為一鋁材質或一多晶矽材質，其 系將一待感測元件於該感測平台（1401)進行感測，以大面積天線式 電極感測區的形式來收集感測訊號，再透過該連接部（1402)將該感 <則訊號耦合至小面積的奈米線通道（110)。 因此，藉由上述之奈米線電晶體感測元件’本發明可利用該 • 天線導體層有效地隔離該奈米線通道於待測環境之外。 請參考第二A及二B圖所示’係本發明之第二實施例，其相 較於該第一實施例在於具有獨立雙閘極結構’除仍可有效地隔離 奈米線通道於待測環境之外，兩閘極可獨立施壓與調控來調整一 最佳電壓以讀取感測訊號，該奈米線電晶體感測元件包括有： 一絕緣基板(2〇〇); 一奈米線通道(210)，係形成於該絕緣基板(20〇)上； 一汲極(214)，係形成於該奈米線通道(210)之一側； 一源極（213)，係形成於該奈米線通道（210)相對該汲極（214) 201121047 之另一側； 一閘極介電層（211) ’係形成於該奈米線通道(21〇)上； 一第一閘極(212) ’係對應於該奈米線通道(21〇)之部分長度形 成於該閘極介電層（211)上； 一第二閘極(216) ’係形成於該閘極介電層（211)異於該第一閘 極（212)之一側； 一導體層（215)，係形成於該絕緣基板(200)上，並連結該第一 閘極(212); • 一覆蓋絕緣層（250) ’係覆蓋於該奈米線通道（21 〇)、該淡極 (214)、該源極（213)、該閘極介電層（211)、該第—閘極(212)、該第 二閘極(216)及該導體層（215); 一穿孔(220) ’係對應設置於該導體層（215)上，並穿設於該覆 蓋絕緣層（250)内；及 一天線導體層（240) ’其具有一感測平台（24〇 1)及一連接部 (2402)，該感測平台（2401)係形成於該覆蓋絕緣層（250)上，該連接 ^ 部（2402)係填充該穿孔(220)與該導體層（215)電性連接。 該絕緣基板(200)可為一玻璃材質基板、一塑膠材質基板或一 具有絕緣層之矽晶圓基板，其中，該具有絕緣層之矽晶圓基板係 於一矽晶圓基板上沉積一層熱氧化層（thermal oxide layer)。 該奈米線通道(210)可為矽、鍺、矽鍺或三五族半導體材料的 多晶體(polycrystalline)或單晶體結構，其中，該奈米線通道(21〇) 的剖面大小為100奈米以下，更以30奈米以下為佳，另外，該奈 米線通道(210)的矩形圖式僅為示意之用，其形狀包括但不限於圓 形或三角形。 201121047 該天線導體層(_的材料可為一銘材質或一多晶石夕材質，其 - 係、將—待感測元件於該感測平台（2衝)進行感測，以大面積天線式 €極感測區的形式來收集感測訊號，再透過該連接部⑽2)將該感 測訊號耦合至小面積的奈米線通道(21〇)。 其中’於感測作業時’本發明之第二實施例可透過改變該第 -閘極（212 )的施加偏壓來調整該奈米線通道（2丨q )之臨界電廢 (threshold voltage)，以達到依感測範圍需求之不同調整其靈敏度的 功效》 • 肖第二閘極(216)於感測作業時，係作為-讀取閘(read gate)， 可連結一外部偏壓電路（圖中未示），來給予該第二閘極(216)一較 佳電壓來讀取感測的訊號，並且不需要額外設置參考電極 (reference electrode)即可量測出待測元件的轉導特性變化。 清參考第二A及二B圖所示，係本發明之第三實施例，其類 似於該第二實施例的獨立雙閘極，而差異在於該第二閘極係一倒τ 型閘極結構，該倒T型結構可精確且直接控制奈米線通道設置位 置及大小，該奈米線電晶體感測元件包括有： •-絕緣基板(3〇〇); 二奈米線通道(310); 一汲極(314) ’係形成於該奈米線通道(310)之一侧； 一源極(313)，係形成於該奈米線通道（31〇)相對該汲極（314) 之另一側； 一閘極介電層（311) ’係形成於該奈米線通道(31〇)上； • 一倒T型閘極(316) ’係對應於該奈米線通道(31〇)之部分長度 形成於該閘極介電層（311)上’其中，該倒T型閘極(316)具有一底 201121047 和由J底垂直向上所形成之凸部，該底部相較於該凸部兩 側各夾角空間’該夾角空間分別設置有該奈米線通道(310); 上閉極（312) ’係對應於該奈米線通道(31〇)形成於該閘極介 電層（311)上； -導體層(315)’係連結該上閘極(312); 覆蓋、、邑緣層（350) ’係覆蓋於該奈米線通道（310)、該汲極 (314) „亥源極(313)、該閘極介電層pH)、該上閘極(312)201121047 VI. Description of the Invention: [Technical Field] The present invention relates to a transistor sensing element 'in particular, to a nanowire transistor sensing element having a nanowire channel as a sensing application. [Prior Art] With the advancement of semiconductor process technology and the increasing demand for biomedical analysis, one of the biomedical sensing elements with field-effect transistor type that can be miniaturized and can be prepared in large quantities has become one of the mainstream. In addition to the nano-technology, the nano-line (nano-line channel) is placed next to the gate of the field-effect transistor through a traditional top-down approach, which not only greatly improves the sensitivity of the sensing but also solves the problem. The field-effect transistor type sensing element of the bulk metal-oxide-semiconductor field-Effect Transistor (MOSFET) structure is limited by the undesirable effects such as substrate leakage current. Limitation issues. Although the above-mentioned nanowire sensing element has high response and high sensitivity to the sensing signal due to the nano characteristic, it has been confirmed to be useful for Deoxyribo Nucleic Acid (DNA), proteins, and acidity. (pH) detection application, but the sensing method mostly touches the nanowire channel itself directly or through a thin insulating layer in the substance to be tested, which will reduce the reliability of the sensing element (using Problems such as shortened lifespan, poor storage capacity, and difficulty in packaging. Therefore, 'how to perform sensing operations without touching the nanowire channel, in addition to maintaining the original high response and high sensitivity, and ensuring the reliability and storage capacity of the sensing components, has been the research and development of related sensing component manufacturers. The goal. 201121047 [Summary of the Invention] In view of the problems existing in the above-mentioned conventional nanowire sensing elements, the inventors of the present invention started research and development, in order to solve the problem or provide a better solution, and finally developed through continuous efforts and experiments. this invention. A first object of the present invention is to provide a nanowire transistor sensing component, and more particularly to a transistor sensing component having a nanowire channel as a sensing application, compared to conventional nanowire sensing. The device, the transistor sensing element of the present invention can effectively isolate the nanowire for sensing from the environment to be tested to ensure the Φ and the storage capacity of the sensing element. For the above purposes, the transistor sensing component of the present invention comprises: an insulating substrate; at least one nanowire channel formed on the insulating substrate; a drain formed in the nanowire channel a source; a source formed on the other side of the nanowire channel opposite to the drain; a gate dielectric layer formed on the nanowire channel; at least one gate corresponding to the The length of the nanowire channel is formed on the gate dielectric layer; a conductor layer is formed on the insulating substrate and is connected to the at least one gate; and a cover insulating layer covers the nanowire channel The drain, the source, the gate dielectric layer, the at least one gate and the conductor layer; a through hole is disposed on the conductor layer and penetrates the cover insulating layer; -and- An antenna conductor layer has a sensing platform and a connecting portion. The sensing platform is formed on the covering insulating layer, and the connecting portion fills the through hole and is electrically connected to the conductor layer 201121047. Therefore, with the above-mentioned nanowire transistor sensing element, the present invention can utilize the antenna conductor layer to effectively isolate the nanowire channel from the environment to be tested to ensure the reliability of the nanowire transistor sensing component. Degree and preservation ability. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to make the person skilled in the art understand the purpose of the present invention, the preferred embodiments of the present invention are described in detail below with reference to the drawings. Referring to FIGS. 1A and 1B, a first embodiment of the transistor sensing device of the present invention includes: an insulating substrate (100); a nanowire channel (110) formed in The insulating substrate (100); a drain (114) formed on one side of the nanowire channel (110); a source (113) formed in the nanowire channel (110) opposite to the The other side of the drain (114); a gate dielectric layer (111) formed on the nanowire channel (110); and a gate (112) formed on the gate dielectric layer ( 111); a conductor layer (115) formed on the insulating substrate (100) and coupled to the gate (112); a cover insulating layer (150) covering the nanowire channel (110) ), the drain (114), the source (113), the gate dielectric layer (111), the gate (112), and the conductor layer (115); • a through hole (120), correspondingly set And the antenna layer (140) has a sensing platform (1401) and a connecting portion 201121047 (just 2) Measuring platform (14〇1) Into the insulating layer to the cover (the supraspinatus, the connecting portion (operation 1) based fill perforations ⑽ money) conductive contact layer (i5G) f connected. The rim substrate (1GG) may be a glass substrate, a plastic substrate or a wafer substrate having an insulating layer, wherein the (10) circular substrate having the insulating layer is deposited on the Shihwa wafer substrate. The thermal oxide layer (10) is also (iv). The H-line channel (110) may be a polycrystalline (P〇iycrystalline) or a single 曰曰曰 结 石 石 石 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 冓 石 石 石 石 石 石 石 石 石 石 石 石 石 石 石〇) . The size of the kneading surface is less than 100 nm, and more preferably 30 nm or less. In addition, the rectangular pattern of the nanowire channel (110) is for illustrative purposes only, and its shape includes, but is not limited to, a circle or a triangle. The material of the antenna conductor layer (140) may be an aluminum material or a polysilicon material, which senses a sensing component to be sensed on the sensing platform (1401) in the form of a large-area antenna electrode sensing region. The sensing signal is collected, and the sense <then signal is coupled to the small area of the nanowire channel (110) through the connecting portion (1402). Therefore, the present invention can utilize the antenna conductor layer to effectively isolate the nanowire channel from the environment to be tested by the above-described nanowire transistor sensing element. Please refer to the second embodiment of FIG. 2 and FIG. 2B, which is a second embodiment of the present invention, which is different from the first embodiment in that it has an independent double gate structure', in addition to effectively isolating the nanowire channel. In addition to the measurement environment, the two gates can independently apply pressure and regulation to adjust an optimal voltage to read the sensing signal. The nanowire transistor sensing component comprises: an insulating substrate (2〇〇); A rice-line channel (210) is formed on the insulating substrate (20〇); a drain (214) is formed on one side of the nanowire channel (210); a source (213) is formed The nanowire channel (210) is opposite to the other side of the drain (214) 201121047; a gate dielectric layer (211) is formed on the nanowire channel (21〇); a first gate a pole (212) ' is formed on the gate dielectric layer (211) corresponding to a portion of the length of the nanowire channel (21〇); a second gate (216) is formed on the gate dielectric The layer (211) is different from one side of the first gate (212); a conductor layer (215) is formed on the insulating substrate (200) and is connected to the first gate (212); Insulation 250) 'covering the nanowire channel (21 〇), the pale pole (214), the source (213), the gate dielectric layer (211), the first gate (212), the a second gate (216) and the conductor layer (215); a through hole (220) 'correspondingly disposed on the conductor layer (215) and passing through the cover insulating layer (250); and an antenna conductor The layer (240) has a sensing platform (24〇1) and a connecting portion (2402), and the sensing platform (2401) is formed on the covering insulating layer (250), the connecting portion (2402) The through hole (220) is electrically connected to the conductor layer (215). The insulating substrate (200) may be a glass substrate, a plastic substrate or a germanium wafer substrate having an insulating layer. The germanium wafer substrate having an insulating layer is deposited on a germanium wafer substrate. A thermal oxide layer. The nanowire channel (210) may be a polycrystalline or single crystal structure of germanium, germanium, germanium or a group of three or five semiconductor materials, wherein the nanowire channel (21〇) has a cross-sectional size of 100 nm. Hereinafter, it is preferably 30 nm or less. In addition, the rectangular pattern of the nanowire channel (210) is for illustrative purposes only, and its shape includes, but is not limited to, a circle or a triangle. 201121047 The antenna conductor layer (_ material can be a Ming material or a polycrystalline stone material, which - the sensor to be sensed on the sensing platform (2 punch) for sensing, with a large area antenna The sensing region is collected in the form of a sensing region, and the sensing signal is coupled to the small-area nanowire channel (21〇) through the connecting portion (10) 2). Wherein the second embodiment of the present invention can adjust the critical electric voltage of the nanowire channel (2丨q) by changing the applied bias of the first gate (212) during the sensing operation. To adjust the sensitivity of the sensing range according to the requirements of the sensing range. • The second gate (216) of the Xiao is used as a read gate to connect an external bias circuit. (not shown), to give the second gate (216) a better voltage to read the sensed signal, and to measure the turn of the component to be tested without additionally setting a reference electrode The characteristic changes. Referring to Figures 2A and 2B, a third embodiment of the present invention is similar to the independent dual gate of the second embodiment, with the difference that the second gate is an inverted τ gate. Structure, the inverted T-shaped structure can accurately and directly control the position and size of the nanowire channel. The nanowire transistor sensing component comprises: • an insulating substrate (3〇〇); a second nanowire channel (310) a drain (314) is formed on one side of the nanowire channel (310); a source (313) is formed in the nanowire channel (31〇) opposite to the drain (314) The other side; a gate dielectric layer (311) ' is formed on the nanowire channel (31〇); • an inverted T-type gate (316) ' corresponds to the nanowire channel (31 A portion of the length of the 〇) is formed on the gate dielectric layer (311), wherein the inverted T-type gate (316) has a bottom 201121047 and a convex portion formed vertically upward from the J bottom, the bottom portion being compared with The angle space on both sides of the convex portion is respectively disposed with the nanowire channel (310); the upper closed pole (312)' corresponding to the nanowire channel (31〇) is formed on the gate dielectric (311) upper; - a conductor layer (315)' is coupled to the upper gate (312); a cover, a flange layer (350) 'covers the nanowire channel (310), the drain (314) „海源极(313), the gate dielectric layer pH), the upper gate (312)
、該倒T 型閘極(316)及該導體層（315); . $孔(32G) ’係穿設於該覆蓋絕緣層（35〇)至該導體層⑴5); 及 天線導體層（340)，其具有一感測平台（3401)及一連接部 (34〇2) 成於該覆蓋絕緣層⑽)上，該連接部(34〇2)係填充該 穿孔(320)與該導體層（315)電性連接。 該絕緣基板(300)可為一玻璃材質基板、一塑膠材質基板或一 具有絕緣層之矽晶圓基板，其中，該具有絕緣層之矽晶圓基板係 於碎日日圓基板上》儿積一層熱氧化層（thermal oxide layer) 0 該奈求線通道(310)可為秒、錯、石夕錯或三五族半導體材料的 多晶體(polycrystalline)或單晶體結構，其中，該奈米線通道(310) 的剖面大小為100奈米以下，更以30奈米以下為佳，由於奈米線 通道(310)係對應形成於該倒T型閘極(316)中的夾角空間，因此’ 透過控制蝕刻倒T型閘極(316)的時間來調整凸部高度，可達到精 確且直接控制奈米線通道(31〇)設置位置及大小，另外，該条米線 通道(310)的扇形圖式僅為示意之用，其形狀包括但不限於矩形、 圓形或三角形。 201121047 該天線導體層（340)的材料可為一鋁材質或一多晶矽材質，其 係將一待感測元件於該感測平台（3 4 01)進行感測’以大面積天線式 電極感測區的形式來收集感測訊號’再透過該連接部（3 4 02)將該感 測訊號耦合至小面積的奈米線通道(310)。 其中，於感測作業時’本發明之第三實施例可透過改變該上 閘極（312)的施加偏壓來調榮該奈米線通道（31〇)之臨界電壓 (threshold voltage) ’以達到依感測範圍需求之不同調整其靈敏度的The inverted T-type gate (316) and the conductor layer (315); . hole (32G) 'passed through the cover insulating layer (35 〇) to the conductor layer (1) 5); and the antenna conductor layer (340 ) having a sensing platform (3401) and a connecting portion (34〇2) formed on the cover insulating layer (10), the connecting portion (34〇2) filling the through hole (320) and the conductor layer ( 315) Electrical connection. The insulating substrate (300) may be a glass substrate, a plastic substrate or a germanium wafer substrate having an insulating layer, wherein the germanium wafer substrate having the insulating layer is attached to the broken Japanese yen substrate. Thermal oxide layer 0 The nematic channel (310) may be a polycrystalline or single crystal structure of a second, a wrong, a stellite or a tri-five semiconductor material, wherein the nanowire channel ( 310) The cross-sectional size is 100 nm or less, and more preferably 30 nm or less. Since the nanowire channel (310) corresponds to the angle formed in the inverted T-type gate (316), the transmission control The time of etching the inverted T-gate (316) to adjust the height of the convex portion can accurately and directly control the position and size of the nanowire channel (31〇), and the fan-shaped pattern of the rice noodle channel (310) For illustrative purposes only, shapes include, but are not limited to, rectangles, circles, or triangles. 201121047 The material of the antenna conductor layer (340) may be an aluminum material or a polysilicon material, which senses a sensing component to be sensed on the sensing platform (3 4 01) by large-area antenna electrode sensing. The zone is configured to collect the sensing signal and then couple the sensing signal to the small area of the nanowire channel (310) through the connection (3 4 02). Wherein, in the sensing operation, the third embodiment of the present invention can adjust the threshold voltage of the nanowire channel (31〇) by changing the applied bias voltage of the upper gate (312). Reaching the sensitivity of the sensing range
該倒T型閘極（316)於感測作業時，係作為一讀取閘（read ，可連結-外部偏壓電路（圖中未示）來給予該倒τ型間極(316) -較佳電壓來讀取感測的訊號’並且不需要額外設置參考電極 reference dect滅)即可量測出待測元件的轉導特性變化。 因此’藉由上述第二及三實施例的獨立雙閘極結構，本發明 可利用該第-閘極或上閘極有效隔離讀取閘（該第二閘極或該倒了 型閘極）和奈米線通道於待測環谙夕故 泮的可靠度及使用壽命。 可大幅提升電晶體感測元 案之較佳實施例，當不 然而，惟上述者僅為本發明專利申锖 i限定本發明專利申請案實施之笳囹b ^ 乾固。即凡依本發明專利申請案 »請範圍所作之均等變化與修飾等，η ^ 寻奋應屬於本發明專利申請案 L專利涵蓋範圍。 【圖式簡單說明】 第一 Α圖為本發明奈米線電 視圖。 晶體感測元件之第一實施例的頂 10 201121047 第一 β圖為第—切沿A-A，線之部分部面圖 第二A圖為本發明之第二實施_頂視圖。 第B圖為第—A圓沿B-B，線之部分剖面圖。 第三A圖為本發明之第三實施例的頂視圖。 第三B圖為第三Amc，線之部分剖面圖。 【主要元件符號說明】 (100)絕緣基板The inverted T-type gate (316) is used as a read gate (read, connectable-external bias circuit (not shown) to give the inverted-T-type interpole (316) during sensing operation - A better voltage is used to read the sensed signal 'and no additional reference electrode reference dect is needed to measure the change in the transduction characteristics of the device under test. Therefore, with the independent double gate structure of the second and third embodiments, the present invention can effectively isolate the read gate (the second gate or the inverted gate) by using the first gate or the upper gate. And the reliability and service life of the nanowire channel in the ring to be tested. The preferred embodiment of the transistor sensing device can be greatly improved, but the above is only the implementation of the patent application of the present invention. That is to say, according to the patent application of the invention, the equal change and modification of the scope of the invention, etc., η ^ 奋 奋 ing should belong to the patent application L patent coverage. [Simple description of the diagram] The first diagram is the electrical view of the nanowire of the present invention. Top 10 of the first embodiment of the crystal sensing element 2011 2011047 The first β-graph is the first cutting edge A-A, a partial portion of the line. The second A drawing is a second embodiment of the present invention. Figure B is a partial cross-sectional view of the line A-B along B-B. Figure 3A is a top view of a third embodiment of the present invention. The third B picture is the third Amc, a partial cross-sectional view of the line. [Main component symbol description] (100) Insulating substrate
(110) 奈米線通道 (111) 閘極介電層 (112) 閘極 (113)源極 (114) 汲極 (115) 導體層 (140)天線導體層 (1401) 感測平台 (1402) 連接部 (150)覆蓋絕緣層 (200)絕緣基板 (210) 奈米線通道 (211) 閘極介電層 (212) 第一閘極 (213) 源極 11 201121047 (214) 没極 (215) 導體層 (216) 第二閘極 (220)穿孔 (240)天線導體層 (2401) 感測平台 (2402) 連接部 (250)覆蓋絕緣層 (300)絕緣基板 (310) 奈米線通道 (311) 閘極介電層 (312) 上閘極 (313) 源極 (314) 汲極 (315) 導體層 (316) 倒T型閘極 (340)天線導體層 (3401) 感測平台 (3402) 連接部 (350)覆蓋絕緣層(110) Nanowire Channel (111) Gate Dielectric Layer (112) Gate (113) Source (114) Deuterium (115) Conductor Layer (140) Antenna Conductor Layer (1401) Sensing Platform (1402) The connecting portion (150) covers the insulating layer (200), the insulating substrate (210), the nanowire channel (211), the gate dielectric layer (212), the first gate (213), the source electrode 11 201121047 (214), the pole (215) Conductor layer (216) second gate (220) perforation (240) antenna conductor layer (2401) sensing platform (2402) connection portion (250) covering insulating layer (300) insulating substrate (310) nanowire channel (311 Gate dielectric layer (312) upper gate (313) source (314) drain (315) conductor layer (316) inverted T gate (340) antenna conductor layer (3401) sensing platform (3402) The connecting portion (350) covers the insulating layer