TW201129986A - System and method of pulse generation - Google Patents
System and method of pulse generationInfo
- Publication number
- TW201129986A TW201129986A TW99103108A TW99103108A TW201129986A TW 201129986 A TW201129986 A TW 201129986A TW 99103108 A TW99103108 A TW 99103108A TW 99103108 A TW99103108 A TW 99103108A TW 201129986 A TW201129986 A TW 201129986A
- Authority
- TW
- Taiwan
- Prior art keywords
- generate
- pulse
- output signal
- frequency
- particular embodiment
- Prior art date
Links
- 230000003111 delayed effect Effects 0.000 abstract 2
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00293—Output pulse is a delayed pulse issued after a rising or a falling edge, the length of the output pulse not being in relation with the length of the input triggering pulse
Landscapes
- Read Only Memory (AREA)
- Pulse Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/364,127 US8102720B2 (en) | 2009-02-02 | 2009-02-02 | System and method of pulse generation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201129986A true TW201129986A (en) | 2011-09-01 |
Family
ID=42105844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW99103108A TW201129986A (en) | 2009-02-02 | 2010-02-02 | System and method of pulse generation |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US8102720B2 (zh) |
| EP (1) | EP2392008A1 (zh) |
| JP (1) | JP5442034B2 (zh) |
| KR (1) | KR101370999B1 (zh) |
| CN (1) | CN102301423A (zh) |
| BR (1) | BRPI1007327A2 (zh) |
| TW (1) | TW201129986A (zh) |
| WO (1) | WO2010088661A1 (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11726721B2 (en) | 2020-09-09 | 2023-08-15 | Samsung Electronics Co., Ltd. | Memory device for adjusting delay on data clock path, memory system including the memory device, and operating method of the memory system |
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| US8638153B2 (en) | 2012-03-29 | 2014-01-28 | Qualcomm Incorporated | Pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width |
| CN103107799B (zh) * | 2013-01-15 | 2015-10-21 | 深圳市明微电子股份有限公司 | 一种具备驱动脉冲调节功能的功率管驱动装置 |
| US9762093B2 (en) * | 2015-10-29 | 2017-09-12 | Witricity Corporation | Controllers for wireless power systems |
| US9991777B2 (en) * | 2016-07-20 | 2018-06-05 | Texas Instruments Incorporated | Method and circuitry for generating pulse width modulated signals |
| US10530617B2 (en) | 2017-08-07 | 2020-01-07 | Micron Technology, Inc. | Programmable channel equalization for multi-level signaling |
| US10425260B2 (en) | 2017-08-07 | 2019-09-24 | Micron Technology, Inc. | Multi-level signaling in memory with wide system interface |
| US10277435B2 (en) * | 2017-08-07 | 2019-04-30 | Micron Technology, Inc. | Method to vertically align multi-level cells |
| CN109981084B (zh) * | 2017-12-27 | 2023-06-30 | 一诺仪器（中国）有限公司 | 基于fpga的窄脉冲输出系统及方法 |
| US10573370B2 (en) * | 2018-07-02 | 2020-02-25 | Micron Technology, Inc. | Apparatus and methods for triggering row hammer address sampling |
| US10348282B1 (en) * | 2018-07-31 | 2019-07-09 | Cirrus Logic, Inc. | Modulators |
| US10685696B2 (en) | 2018-10-31 | 2020-06-16 | Micron Technology, Inc. | Apparatuses and methods for access based refresh timing |
| WO2020117686A1 (en) | 2018-12-03 | 2020-06-11 | Micron Technology, Inc. | Semiconductor device performing row hammer refresh operation |
| US10957377B2 (en) | 2018-12-26 | 2021-03-23 | Micron Technology, Inc. | Apparatuses and methods for distributed targeted refresh operations |
| WO2020141516A1 (en) * | 2018-12-30 | 2020-07-09 | Proteantecs Ltd. | Integrated circuit i/o integrity and degradation monitoring |
| US11069393B2 (en) | 2019-06-04 | 2021-07-20 | Micron Technology, Inc. | Apparatuses and methods for controlling steal rates |
| US11264079B1 (en) | 2020-12-18 | 2022-03-01 | Micron Technology, Inc. | Apparatuses and methods for row hammer based cache lockdown |
| CN113721163A (zh) * | 2021-08-30 | 2021-11-30 | 江苏北斗星通汽车电子有限公司 | 程控电源的测试脉冲生成方法、系统及电子设备 |
| US11848070B2 (en) * | 2021-11-10 | 2023-12-19 | Micron Technology, Inc. | Memory with DQS pulse control circuitry, and associated systems, devices, and methods |
| CN114362727B (zh) * | 2021-12-31 | 2024-08-06 | 广州星际悦动股份有限公司 | 脉冲信号调节方法、装置、存储介质及电子设备 |
| US12125514B2 (en) | 2022-04-28 | 2024-10-22 | Micron Technology, Inc. | Apparatuses and methods for access based refresh operations |
| US12112787B2 (en) | 2022-04-28 | 2024-10-08 | Micron Technology, Inc. | Apparatuses and methods for access based targeted refresh operations |
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-
2009
- 2009-02-02 US US12/364,127 patent/US8102720B2/en not_active Expired - Fee Related
-
2010
- 2010-02-02 JP JP2011548395A patent/JP5442034B2/ja not_active Expired - Fee Related
- 2010-02-02 EP EP20100703396 patent/EP2392008A1/en not_active Withdrawn
- 2010-02-02 WO PCT/US2010/022875 patent/WO2010088661A1/en not_active Ceased
- 2010-02-02 BR BRPI1007327A patent/BRPI1007327A2/pt not_active IP Right Cessation
- 2010-02-02 CN CN2010800056295A patent/CN102301423A/zh active Pending
- 2010-02-02 KR KR20117020606A patent/KR101370999B1/ko not_active Expired - Fee Related
- 2010-02-02 TW TW99103108A patent/TW201129986A/zh unknown
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11726721B2 (en) | 2020-09-09 | 2023-08-15 | Samsung Electronics Co., Ltd. | Memory device for adjusting delay on data clock path, memory system including the memory device, and operating method of the memory system |
| TWI817184B (zh) * | 2020-09-09 | 2023-10-01 | 南韓商三星電子股份有限公司 | 記憶體系統 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20100195379A1 (en) | 2010-08-05 |
| BRPI1007327A2 (pt) | 2018-03-27 |
| CN102301423A (zh) | 2011-12-28 |
| KR20110122725A (ko) | 2011-11-10 |
| JP2012517050A (ja) | 2012-07-26 |
| KR101370999B1 (ko) | 2014-03-10 |
| US8102720B2 (en) | 2012-01-24 |
| WO2010088661A1 (en) | 2010-08-05 |
| EP2392008A1 (en) | 2011-12-07 |
| JP5442034B2 (ja) | 2014-03-12 |
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