[go: up one dir, main page]

TW201125455A - Method for manufacturing printed circuit board - Google Patents

Method for manufacturing printed circuit board Download PDF

Info

Publication number
TW201125455A
TW201125455A TW99100459A TW99100459A TW201125455A TW 201125455 A TW201125455 A TW 201125455A TW 99100459 A TW99100459 A TW 99100459A TW 99100459 A TW99100459 A TW 99100459A TW 201125455 A TW201125455 A TW 201125455A
Authority
TW
Taiwan
Prior art keywords
region
removal
copper clad
product
layer
Prior art date
Application number
TW99100459A
Other languages
Chinese (zh)
Other versions
TWI405520B (en
Inventor
Xiao-Qun Huang
Original Assignee
Foxconn Advanced Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Foxconn Advanced Tech Inc filed Critical Foxconn Advanced Tech Inc
Priority to TW99100459A priority Critical patent/TWI405520B/en
Publication of TW201125455A publication Critical patent/TW201125455A/en
Application granted granted Critical
Publication of TWI405520B publication Critical patent/TWI405520B/en

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A method for manufacturing a printed circuit board includes steps below. Firstly, an inner substrate, a first copper clad laminate, and a first adhesive layer are provided. The first copper clad laminate includes a first product region, a first non-product region, and a first blank region waited to be removed. Portion of the first removing region adjoins the first production region; other portion of the first removing region adjoins the first non-production region. Secondly, a first opening is defined along an imaginary boundary line of the first blank region and the first production region. Thirdly, a first through hole is defined in the first adhesive layer. The first through hole is corresponding to the first blank region. Fourthly, the first adhesive layer and the first copper clad laminate are stacked and laminated on the inner substrate. Fifthly, first electrically conductive circuits are formed in the first copper clad laminate. Sixthly, a second opening is defined along an imaginary boundary line of the first blank region and the first non-production region, thereby a second through hole communicating with the first through hole is defined in the first copper clad laminate and a material of the first blank region is removed.

Description

201125455 六、發明說明: 【發明所屬之技術領威】 [0001] 本發明涉及電路板‘作領域’尤其涉及一種能夠製得平 整之柔性電路板之方法。 【先前技術·】 [〇〇〇2] 印刷電路板因異有裝配密度高等優點而得到廣泛應用。 關於電路板之應用請參見文獻Takahashi,A. 〇〇ki N. Nagai, A. Akah〇Shi, H. Mukoh, A. Wajima M. Res. Lab., High density multilayer prin_201125455 VI. Description of the Invention: [Technical Leadership of the Invention] [0001] The present invention relates to a circuit board "field" particularly to a method of producing a flat flexible circuit board. [Prior Art·] [〇〇〇2] Printed circuit boards are widely used due to their high assembly density. For the application of the circuit board, please refer to the literature Takahashi, A. 〇〇ki N. Nagai, A. Akah〇Shi, H. Mukoh, A. Wajima M. Res. Lab., High density multilayer prin_

ted Circuit board jjiTAC M-880 ’ IEEE 丁tans, on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 4l8—425 [0003] 由於電子設備小型化之需求’應用於電子設備中之電路 板封裝後之尺寸變小。於電路板中不需要設置線路之區 域形成_,該凹槽用於料他封裝或者插接之電子Γ 件相互配合,從而減小整個電路板封裝所佔據之空間疋 然而,上述得凹槽於製作過程中需要於電路板之每 形成對蘭口織崎應合及祕製料㈣,從而開 口辦應之區域於電路板製作過程中容易產生闕不—致 之問題而產生褶皺,從而影響電路板產品之良率。 【發明内容】 [0004] 有鍛於此,提供—種能㈣作具有良好之平整度 之製作方法實屬必要。 電路板 [0005] 以下將以實施例說明 一種電路板製作方法。 099100459 表·單編號A0101 第4頁/共30頁 0992001007-0 201125455Ted Circuit board jjiTAC M-880 ' IEEE Ding Tans, on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 4l8-425 [0003] The need for miniaturization of electronic devices 'applies to circuit boards in electronic devices The size after packaging becomes smaller. In the circuit board, it is not necessary to provide a region for forming a line, which is used for mating or plugging the electronic components to each other, thereby reducing the space occupied by the entire circuit board package. In the production process, it is necessary to form a pair of blue-and-white woven and secret materials (4) in the circuit board, so that the area where the opening should be handled is likely to cause wrinkles in the process of manufacturing the circuit board, thereby affecting the circuit. Yield of board products. SUMMARY OF THE INVENTION [0004] It is necessary to provide a method for producing a good flatness. Circuit Board [0005] A method of fabricating a circuit board will be described below by way of embodiments. 099100459 Table·Single number A0101 Page 4 of 30 0992001007-0 201125455

[0006] — ίΦ Φ nA 埋電路板之製作方法,包括步驟:提供内層基板、第 覆鋼板及第一膠層《所述第一覆銅板包括第一產品區 域、第—非產品區域及第一去除區域。該第一去除區域 #分與第一產品區域相鄰接,第一去除區域之其他部分 與第—非產品區域相鄰接。第一覆銅板具有第一銅箔層 °所述内層基板具有第一表面。沿著第一去除區域與第 一產品區域之交線形成第一開口,使得第一去除區域與 第一產品區域相互分離。於第一膠層内形成與第一去除 區域相對應之第一通孔。依次堆疊第一膠層與第一覆銅 板於基板之第一表面,並壓合第一膠層、第一覆銅板與 内層基板。於第一覆銅板之第一辦箔層形成第一導電線 路。沿著第一去除區域與第一非產品:區域之交線形成第 二開口。所述第二開口與第一開口相互埠通’以將第一 去除區域之材料覆銅板去除,從而於第一覆銅板内形成 與第一去除區域對應之第二通孔。 【°007] 與先前技術相較,本實施例提供之電路板製作方法中, 於壓合與製作導電缚_之前,將第一覆銅板、第二覆銅 板内之去除區域與產品區域之間形成開口,去除區域與 產品區域相互分離而與非產品區域相互連通,於形成導 電線路之後再將去除區域去除,從而避免於進行壓合與 製作導電線路時由於漲縮不一致而導致之電路板之槽敵 而產生之電路板產品不良。 【實施方式】 [〇〇〇8] 下面結合附圖及實施例對本技術方案提供之電路板製作 方法作進一步說明。 099100459 表單編號A0101 第5頁/共30頁 0992001007-0 201125455 [0009] 本技術方案提供之電路板製作方法包括如下步驟: [〇〇1〇]第一步,請參閱圖1,提供内層基板110、第—覆銅板12〇 與第一膠層130。 [0011] 本實施例中,内層基板110為一覆銅板,内層基板11〇包 括内層絕緣層112及形成於内層絕緣層u 2上之内層銅箱 層111。内層基板110具有相對之第一表面113與第二表 面114。内層基板110亦可為製作有導電線路之雙層或者 多層電路基板。 [0012] 第一覆銅板120包括等一絕緣層12:2輿i形成於第一絕緣層 122上之第一銅猪層121。内層基板與第一覆銅板12〇 之層絕緣為本技術領域中常見之聚醯亞胺、聚乙稀對苯 二甲酸乙二醇酯、聚四氟乙烯、聚硫胺、聚甲基丙烯酸 曱酯、聚碳酸酯或聚醯亞胺-聚乙稀-對笨二甲酿共聚物 等材料製成。第一膠層130可為環氧樹脂或者亞克力等製 成。 [0013] 第一覆銅板120包括第一非產品區域123 '第一產品區域 124及第一去除區域125。第一非產品區域123係於此區 域内不需形成有導電線路之區域,第一產品區域124係指 而要设置導電線路之區域。該第一去除區域125係於後續 之工序中將去除之區域,以使得製成之電路板之相應位 置形成凹槽。第一去除區域125部分與第一產品區域丨24 相鄰接,其他部分與第一非產品區域123相鄰接。本實施 例中,第一去除區域125為長方形,其包括依次相連之第 一邊1251、第二邊1252、第三邊1253及第四邊1254, 099100459 表单編號A0101 第6頁/共30頁 0992001007-0 201125455 [0014] [0Q15] [0016] Ο [0017] [0018][0006] - ίΦ Φ nA buried circuit board manufacturing method, comprising the steps of: providing an inner substrate, a first steel plate and a first adhesive layer, wherein the first copper clad plate comprises a first product region, a first non-product region and a first Remove the area. The first removal area # is adjacent to the first product area, and the other part of the first removal area is adjacent to the first non-product area. The first copper clad laminate has a first copper foil layer. The inner substrate has a first surface. A first opening is formed along the intersection of the first removal region and the first product region such that the first removal region and the first product region are separated from each other. A first via corresponding to the first removed region is formed in the first adhesive layer. The first adhesive layer and the first copper clad laminate are sequentially stacked on the first surface of the substrate, and the first adhesive layer, the first copper clad laminate and the inner layer substrate are pressed. Forming a first conductive line on the first foil layer of the first copper clad laminate. A second opening is formed along the intersection of the first removal region and the first non-product: region. The second opening and the first opening communicate with each other to remove the material copper clad plate of the first removal region, thereby forming a second through hole corresponding to the first removal region in the first copper clad plate. [0071] Compared with the prior art, in the circuit board manufacturing method provided in this embodiment, before the pressing and the manufacturing of the conductive binding, the removal area between the first copper clad plate and the second copper clad plate and the product area are Forming an opening, the removal area and the product area are separated from each other and communicate with the non-product area, and the removal area is removed after forming the conductive line, thereby avoiding the circuit board caused by the inconsistent expansion and contraction when pressing and manufacturing the conductive line The board product produced by the enemy is bad. [Embodiment] [8] The circuit board manufacturing method provided by the present technical solution will be further described below with reference to the accompanying drawings and embodiments. 099100459 Form No. A0101 Page 5 / Total 30 Page 0992001007-0 201125455 [0009] The circuit board manufacturing method provided by the technical solution includes the following steps: [〇〇1〇] In the first step, referring to FIG. 1, an inner substrate 110 is provided. The first copper clad laminate 12 and the first adhesive layer 130. In the embodiment, the inner substrate 110 is a copper clad laminate, and the inner substrate 11 includes an inner insulating layer 112 and an inner copper box layer 111 formed on the inner insulating layer u 2 . The inner substrate 110 has a first surface 113 opposite to the second surface 114. The inner substrate 110 may also be a double layer or a multilayer circuit substrate on which conductive lines are formed. [0012] The first copper clad layer 120 includes an insulating layer 12: a first copper layer 121 formed on the first insulating layer 122. The inner substrate and the first copper clad layer 12 are insulated from the layer of the first copper clad 12, which is commonly known in the art as polythenimine, polyethylene terephthalate, polytetrafluoroethylene, polythioamide, polymethyl methacrylate. Ester, polycarbonate or polyimine-polyethylene - made of materials such as stupid copolymer. The first adhesive layer 130 may be made of epoxy resin or acrylic. [0013] The first copper clad laminate 120 includes a first non-product region 123' first product region 124 and a first removal region 125. The first non-product area 123 is an area in which no conductive line is formed in the area, and the first product area 124 is an area in which a conductive line is to be provided. The first removal region 125 is the region to be removed in the subsequent process so that the corresponding locations of the fabricated circuit board form a recess. The first removal region 125 is partially adjacent to the first product region 丨24, and the other portions are adjacent to the first non-product region 123. In this embodiment, the first removal area 125 is a rectangle, and includes a first side 1251, a second side 1252, a third side 1253, and a fourth side 1254 which are sequentially connected, 099100459 Form No. A0101 Page 6 / Total 30 Page 0992001007 -0 201125455 [0014] [0016] [0018] [0018]

其中,第一邊1251與第一非產品區域123相鄰接,其他三 邊均與第一產品區域124相鄰接。 第一去除區域125之形狀與欲形成電路板之凹槽橫截面之 形狀相對應,其亦可為圓形或多邊形等形狀,其至少具 有部分與第一產品區域124相鄰接。 第二步,請一併參閱圖2及圖3,於第一去除區域125與第 一產品區域124之間形成第一開口 126。 藉由衝型或者切割之方式,沿著第一去除區域125之第二 邊1 252、第三邊1253及第四邊1254形成第一開口 126, 使得第一去除區域125與第一產品區域124不相連接。第 一去除區域125之第一邊1251仍然與第一非產品區域123 相互連接。 第三步,於第一膠層130内形成與第一去除區域125對應 之第一通孔131。 藉由衝型或者切割之方式於第一膠層130内形成複數與第 一去除區域125對應之第一通孔131。優選地,第一通孔 131之橫截面之形狀與其對應之第一去除區域125形狀相 同,第一通孔131之橫截面之面積略大於第一去除區域 125之面積。 [0019] [0020] 099100459 第四步,請一併參閱圖4及圖5,依次堆疊第一膠層130與 第一覆銅板120於内層基板110之内層絕緣層112上,並 壓合内層基板110、第一膠層130與第一覆銅板120。 依次堆疊第一膠層130與第一覆銅板120於内層基板110 表單編號Α0101 第7頁/共30頁 0992001007-0 201125455 之内層絕緣層1 1 2—側,即第一表面1 1 3上,使得第一覆 銅板120之第一絕緣層122與第一膠層130相鄰,並使得 第一膠層130中之第一通孔131與第一覆銅板12〇之第一 去除區域125於垂直於内層基板11〇所在平面之方向上相 對應。 [0021] [0022] [0023] [0024] [0025] [0026] 對堆疊後之内層基板110、第一膠層130與第一覆銅板 120加熱加壓,由於第一膠層130具有黏性,從而黏結並 固化於内層基板110與第一覆銅板12〇,加壓使得内層基 板110、第一膠層130與第一覆銅板120形成平整之一整 體結構。 ... ...... .... .... ' ·' , 當内層基板110為形成有導電線路之雙層或多層基板時, 於内層基板110相對之第一表面Η 3與第二表面114均可 壓合第一膠層130與第一覆銅板丨2〇。 第五步,請參閲圖6,於内層基板11〇之内層銅箔層内 形成導電線路11 5,第一覆,铜楣;:1韵之第__銅箔層121内 形成第一導電線路127。 本實施例中,可藉由影像轉移工藝_蝕刻工藝於内層基板 110之内層銅箔層111内形成導電線路115,於第一覆銅 板120之第一銅箔層121内形成第一導電線路127。 备内層基板110為形成有導電線路之雙層或者多層基板時 ’此步驟中則不需要於内層基板110内形成導電線路。 第”步’請參閱圖7 ’提供第二覆銅板160與第二膠層170 099100459 表單編號A0101 第8頁/共30頁 0992001007-0 201125455 [0027] 第二覆銅板160與第一覆銅板120之結構相同,第二覆銅 板160由第二銅箔層161與第二絕緣層162組成,第二覆 銅板160包括第二非產品區域163、第二產品區域164及 第二去除區域165,第二去除區域165與第一去除區域 125之形狀相同並且大小相等。第二去除區域165亦為長 方形,其具有與第二非產品區域163相鄰接之第五邊1651 ,與第二產品區域164相鄰接之第六邊1652、第七邊 1 653及第八邊1 654。第二膠層170與第一膠層130之結構 相同。 ^ [0028] 第七步,請一併參閱圖9至10,於第二去除區域165與第 二產品區域164之間形成第三開口 166。 [0029] 藉由衝型或者切割之方式,沿著第二去除區域165之第六 邊1 652、第七邊1 653及第八邊1 654形成第三開口 166, 使得第二去除區域165與第二產品區域164不相連接。第 二去除區域165之第五邊1651仍然與第二產品區域164相 互連接。 Ο [0030] 第八步,於第二膠層170内之形成與第二去除區域165對 應之第三通孔171。 [0031] 藉由衝型或者切割之方式於第二膠層170内形成複數與第 二去除區域165對應之第三通孔171。優選地,第三通孔 171之橫截面之形狀與其對應之第二去除區域165形狀相 同,第三通孔171之橫截面之面積略大於第二去除區域 165之面積。 [0032] 第九步,請參閱圖10,將第二膠層170與第二覆銅板160 099100459 表單編號A0101 第9頁/共30頁 0992001007-0 201125455 [0033] [0034] [0035] [0036] [0037] 依次堆疊並壓合於第-導電線路127上,並使得第二覆銅 板160之第二絕緣層162與第二膠層ι7〇相鄰。 首先,將第二膠層170與第二覆銅板16〇依次堆疊並壓合 於第上’使得第二覆銅板16〇之第二絕緣 層162與第二膠層170相鄰,並且使得第三通孔171與第 二去除區域165於垂直於第—膠層13〇之方向上相互對應 ,並同軸設置。然後採用加熱加壓之方式第二膠層17〇及 第一覆銅板160之間壓合於第—導電線路127上。 « 第十步,請參閱圖11,於第二覆鋼板160之第二銅箔層 161内形成第二導電線路167。 採用與製作第一導電線路127相同之方法,於第二銅箔層 161内形成第二導電線路167。 第十一步,請一併參閱圖2、圖8及圖12,將第一去除區 域125與第二去除區域165去除,..從而得到具有電路板 180。 採用衝型或者切割之方式,沿著第二去除區域165之第六 邊1652、第七邊1653與第八邊1 654形成第四開口,第四 開口與第三開口 1 66與第四開口相互連通’使得第二去除 區域165與第二非產品區域163相互分離,並將第二去除 區域165去除。第二去除區域165去除後於第二覆銅板 160内形成第四通孔丨69,第四通孔169與第三通孔171相 互連通。 [0038] 099100459 沿著第一去除區域125之第二邊1252、第三邊1 253與第 四邊1 254形成第二開口,第二開口與第一開口 126相互連 表單編號A0101 第10頁/共30頁 0992001007-0 201125455 通,使得第一去除區域125與第一非產品區域123相互分 離,並將第一去除區域125去除。第一去除區域125去除 後於第一覆銅板120内形成第二通孔129,第二通孔129 與第三通孔171、第一通孔131、第四通孔169均相互連 通,形成凹槽ιοί,從而得到具有凹槽1〇1之電路板18〇 。本步驟中,由於第一去除區域125與第二去除區域165 相互對應,因此,可採用一次切割或者衝型同時形成第 二開口與第四開口。亦可先進行一次衝型或者切割形成 第四開口,然後再進行一次衝型或者切割形成第三開口 〇 。該切割方法可採用機械切割亦可採_鐳射切割。 [0039]本實施例提供之電路板製作方法,可於將第—去除區域 125與第二去除區域165去除之前,於第二導電線路η? 之-侧壓合具有形成具有通孔之膠層與具有與第一去除 W125對應之去除區域之覆銅板,並_覆銅板 製作導電線路’織再將相互對應之賴去除區域去除 ,從而可得到層數更多、凹槽深度更大之電路板。 〇 _當内層基板110為雙層或者多層電路基板時,於其相對之 兩表面均形成縣與覆銅板後,然後再將去除區域去除 ’便可得到雙面均具有凹槽之電路板。 [0041] 099100459 个只犯列捉伢之尾烙极裝作方法中,於壓合與製作導電 線路之前,將第一覆銅板、第二覆銅板内之去除區域與 產品區域之間形成開Π ’去除區域與產品區域相互分離 而與非產品區域相互連通’於形成導電線路之後再將去 除區域去除,從而避免於進行壓合與製料電線路時由 於银縮不-致而導致之電路板之_而產生之電路 表單編號Α0101 第11頁/共叩答 0992001007-0 201125455 品不良。 [0042] [0043] [0044] [0045] [0046] [0047] [0048] [0049] [0050] [0051] 099100459 综上所述,本發明確已符合發明專利之要件,遂依法提 出專利申請。惟,以上所述者僅為本發明之較佳實施方 式,自不能以此限制本案之申請專利範圍。舉凡熟悉本 案技藝之人士援依本發明之精神所作之等效修飾或變化 ,皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1係本技術方案實施例提供之内層基板、第一膠層與第 一覆銅板之示意圖。 圖2係本技術方案實施例提供之第一覆銅板形成第一開口 之示意圖。 圖3係本技術方案實施例提供之第一膠層形成第一通孔後 之示意圖。 圖4係本技術方案實施例提供之堆疊並壓合基板、第一膠 層與第一覆銅板後之示意圖。 圖5係圖4沿V -V線之剖面示意圖。 圖6係本技術方案實施例提供之於基板形成導電線路與第 一覆銅板形成第一導電線路後之示意圖。 圖7係本技術方案實施例提供之第二覆銅板與第二膠層之 示意圖。 圖8係本技術方案實施例提供之於第二覆銅板形成第三開 口後之示意圖。 圖9係本技術方案實施例提供之於第二膠層形成第三通孔 表單編號A0101 第12頁/共30頁 0992001007-0 201125455 後之示意圖。 [0052] 圖10係本技術方案實施例提供之於所述電路板上堆疊並 r 壓合第二膠層與第二覆銅板後之示意圖。 [0053] 圖1 1係本技術方案實施例提供之於第二覆銅板形成第二 導電線路後之示意圖。 [0054] 圖12係本技術方案實施例製得之電路板之示意圖。 【主要元件符號說明】 [0055] 凹槽:101 ❹The first side 1251 is adjacent to the first non-product area 123, and the other three sides are adjacent to the first product area 124. The shape of the first removal region 125 corresponds to the shape of the cross-section of the recess in which the circuit board is to be formed. It may also be circular or polygonal in shape having at least a portion adjacent to the first product region 124. In the second step, referring to FIG. 2 and FIG. 3, a first opening 126 is formed between the first removal region 125 and the first product region 124. The first opening 126 is formed along the second side 1 252, the third side 1253 and the fourth side 1254 of the first removal region 125 by punching or cutting, such that the first removal region 125 and the first product region 124 Not connected. The first side 1251 of the first removal region 125 is still interconnected with the first non-product region 123. In the third step, a first through hole 131 corresponding to the first removal region 125 is formed in the first adhesive layer 130. A plurality of first via holes 131 corresponding to the first removal region 125 are formed in the first adhesive layer 130 by punching or cutting. Preferably, the shape of the cross section of the first through hole 131 is the same as the shape of the corresponding first removal area 125, and the area of the cross section of the first through hole 131 is slightly larger than the area of the first removal area 125. [0020] In the fourth step, referring to FIG. 4 and FIG. 5, the first adhesive layer 130 and the first copper clad 120 are sequentially stacked on the inner insulating layer 112 of the inner substrate 110, and the inner substrate is pressed. 110. The first adhesive layer 130 and the first copper clad laminate 120. The first adhesive layer 130 and the first copper clad layer 120 are sequentially stacked on the inner layer substrate 110, the inner insulating layer 1 1 2 side, that is, the first surface 1 1 3, on the inner layer 110 form number Α0101 7th/to 30 pages 0992001007-0 201125455, The first insulating layer 122 of the first copper clad layer 120 is adjacent to the first adhesive layer 130, and the first through hole 131 in the first adhesive layer 130 is perpendicular to the first removed region 125 of the first copper clad laminate 12 Corresponding to the direction in which the inner substrate 11 is located. [0025] [0025] [0025] [0026] The stacked inner substrate 110, the first adhesive layer 130 and the first copper clad 120 are heated and pressurized, because the first adhesive layer 130 has viscosity Thereby, the inner substrate 110 and the first copper clad laminate 12 are bonded and cured, and the inner layer substrate 110, the first adhesive layer 130 and the first copper clad layer 120 form a flat whole structure. ........................ When the inner substrate 110 is a two-layer or multi-layer substrate on which conductive lines are formed, the inner surface of the inner substrate 110 is opposite to the first surface Η 3 The second surface 114 can press the first adhesive layer 130 and the first copper clad laminate 2〇. In the fifth step, referring to FIG. 6, a conductive line 11 5 is formed in the inner copper foil layer of the inner substrate 11 , the first cover, the copper bead; and the first conductive layer is formed in the first copper foil layer 121 Line 127. In this embodiment, the conductive traces 115 are formed in the inner copper foil layer 111 of the inner substrate 110 by the image transfer process etch process, and the first conductive traces 127 are formed in the first copper foil layer 121 of the first copper clad laminate 120. . When the inner substrate 110 is a double-layer or multi-layer substrate in which a conductive line is formed, it is not necessary to form a conductive line in the inner substrate 110 in this step. The first step is shown in FIG. 7 'providing the second copper clad plate 160 and the second rubber layer 170 099100459 Form No. A0101 Page 8 / Total 30 pages 0992001007-0 201125455 [0027] The second copper clad plate 160 and the first copper clad plate 120 The second copper clad plate 160 is composed of a second copper foil layer 161 and a second insulating layer 162. The second copper clad plate 160 includes a second non-product region 163, a second product region 164, and a second removal region 165. The second removal region 165 is identical in shape and equal in size to the first removal region 125. The second removal region 165 is also rectangular, having a fifth edge 1651 adjacent to the second non-product region 163, and a second product region 164. Adjacent to the sixth side 1652, the seventh side 1 653 and the eighth side 1 654. The second adhesive layer 170 has the same structure as the first adhesive layer 130. ^ [0028] In the seventh step, please refer to FIG. 9 together. Up to 10, a third opening 166 is formed between the second removal region 165 and the second product region 164. [0029] By way of punching or cutting, along the sixth side 1 652 of the second removal region 165, The seven sides 1 653 and the eighth side 1 654 form a third opening 166, such that the second removal zone 165 is not connected to the second product area 164. The fifth side 1651 of the second removal area 165 is still interconnected with the second product area 164. [0030] The eighth step, the formation and the second layer The third through hole 171 corresponding to the second removal region 165 is formed in the second adhesive layer 170 by punching or cutting. Preferably, the first through hole 171 corresponding to the second removal region 165 is formed. The shape of the cross section of the three-way hole 171 is the same as that of the corresponding second removal area 165, and the area of the cross section of the third through hole 171 is slightly larger than the area of the second removal area 165. [0032] In the ninth step, please refer to the figure. 10, the second adhesive layer 170 and the second copper clad plate 160 099100459 Form No. A0101 Page 9 / Total 30 pages 0992001007-0 201125455 [0034] [0036] [0037] [0037] sequentially stacked and pressed The second conductive layer 162 of the second copper clad laminate 160 is adjacent to the second adhesive layer 127. First, the second adhesive layer 170 and the second copper clad laminate 16 are sequentially stacked and pressed. On the first 'the second insulating layer 162 of the second copper clad laminate 16 and the second adhesive layer 170 Adjacent, and the third through hole 171 and the second removal region 165 correspond to each other in a direction perpendicular to the first adhesive layer 13〇, and are coaxially disposed. Then, the second adhesive layer 17 is firstly heated and pressurized. The copper clad laminates 160 are pressed onto the first conductive line 127. « In the tenth step, referring to FIG. 11, a second conductive line 167 is formed in the second copper foil layer 161 of the second cladding steel sheet 160. A second conductive line 167 is formed in the second copper foil layer 161 in the same manner as the first conductive line 127 is formed. In the eleventh step, referring to FIG. 2, FIG. 8 and FIG. 12, the first removal area 125 and the second removal area 165 are removed, thereby obtaining a circuit board 180. Forming a fourth opening along the sixth side 1652, the seventh side 1653 and the eighth side 1 654 of the second removal region 165 by means of punching or cutting, the fourth opening and the third opening 166 and the fourth opening are mutually The communication 'disconnects the second removal region 165 from the second non-product region 163 and removes the second removal region 165. After the second removal region 165 is removed, a fourth via hole 69 is formed in the second copper clad laminate 160, and the fourth via hole 169 is interconnected with the third via hole 171. [0038] 099100459 A second opening is formed along the second side 1252, the third side 1 253 and the fourth side 1 254 of the first removal region 125, and the second opening and the first opening 126 are interconnected. Form No. A0101 Page 10 / A total of 30 pages 0992001007-0 201125455 pass, so that the first removal area 125 and the first non-product area 123 are separated from each other, and the first removal area 125 is removed. After the first removal region 125 is removed, a second via hole 129 is formed in the first copper clad layer 120. The second through hole 129 and the third through hole 171, the first through hole 131, and the fourth through hole 169 are connected to each other to form a concave shape. The groove ιοί, thereby obtaining the circuit board 18〇 having the groove 1〇1. In this step, since the first removal region 125 and the second removal region 165 correspond to each other, the second opening and the fourth opening can be simultaneously formed by one cutting or punching. It is also possible to perform a punching or cutting to form a fourth opening, and then perform a punching or cutting to form a third opening 〇. The cutting method can be mechanically cut or laser cut. [0039] The circuit board manufacturing method provided in this embodiment can press the side of the second conductive line η? to form a glue layer having a through hole before the first removal region 125 and the second removal region 165 are removed. And a copper clad plate having a removal area corresponding to the first removal W125, and the copper-clad board is made of a conductive line and then the corresponding removed regions are removed, thereby obtaining a circuit board having more layers and a larger groove depth. . 〇 _ When the inner substrate 110 is a double-layer or multi-layer circuit substrate, a county and a copper clad plate are formed on opposite surfaces thereof, and then the removed region is removed to obtain a circuit board having both sides of the groove. [0041] 099100459 only in the tail-catching method of the tail-catching method, before the pressing and fabrication of the conductive line, the first copper-clad board, the second copper-clad board is removed between the removed area and the product area. 'The removal area is separated from the product area and communicates with the non-product area'. After the conductive line is formed, the removal area is removed, thereby avoiding the circuit board caused by the silver shrinkage during the pressing and the preparation of the electric circuit. _ The resulting circuit form number Α 0101 Page 11 / Total 0 0992001007-0 201125455 Poor quality. [0046] [0046] [0049] [0050] [0099] [0099] In summary, the present invention has indeed met the requirements of the invention patent, and patented according to law. Application. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing an inner layer substrate, a first adhesive layer and a first copper clad laminate provided by an embodiment of the present technical solution. FIG. 2 is a schematic view showing the first copper clad plate provided by the embodiment of the present technical solution forming a first opening. FIG. 3 is a schematic diagram of the first adhesive layer provided by the embodiment of the present technical solution after forming the first through hole. FIG. 4 is a schematic view showing the stacked and laminated substrate, the first adhesive layer and the first copper clad laminate provided by the embodiment of the present technical solution. Figure 5 is a schematic cross-sectional view taken along line V - V of Figure 4. FIG. 6 is a schematic view of the embodiment of the present invention, after the substrate is formed to form a conductive line and the first copper clad plate forms a first conductive line. FIG. 7 is a schematic diagram of a second copper clad laminate and a second adhesive layer provided by an embodiment of the present technical solution. Figure 8 is a schematic view of the second embodiment of the present invention after the second copper clad plate is formed to form a third opening. FIG. 9 is a schematic diagram showing the formation of a third via hole in the second adhesive layer according to an embodiment of the present technical solution. Form No. A0101, page 12 of 30, 0992001007-0 201125455. [0052] FIG. 10 is a schematic diagram of the embodiment of the present invention, after the second board and the second copper clad board are laminated on the circuit board. FIG. 11 is a schematic diagram of the second copper clad board after forming a second conductive line according to an embodiment of the present technical solution. [0054] FIG. 12 is a schematic diagram of a circuit board fabricated in an embodiment of the present technical solution. [Main component symbol description] [0055] Groove: 101 ❹

GG

[0056] 内層基板:110 [0057] 内層銅箔層:111 [0058] 内層絕緣層:112 [0059] 第一表面·· 113 [0060] 第二表面:114 [0061] 第一覆銅板:120 [0062] 第一銅箔層:121 [0063] 第一絕緣層:122 [0064] 第一非產品區域:1 2 3 [0065] 第一產品區域:124 [0066] 第一去除區域:125 [0067] 第一邊:1 2 51 099100459 表單編號A0101 第13頁/共30頁 0992001007-0 201125455 [0068]第二邊:1252 [0069] 第三邊:1253 [0070] 第四邊:1254 [0071] 第一開口 : 126 [0072] 第一導電線路:127 [0073] 第二通孔:129 [0074] 第一膠層:130 [0075] 第一通孔:131 [0076] 第二覆銅板:160 [0077] 第二銅箔層:161 [0078] 第二絕緣層:162 [0079] 第二非產品區域:1 6 3 [0080] 第二產品區域:164 [0081] 第二去除區域:165 [0082] 第五邊:1651 [0083] 第六邊:1652 [0084] 第七邊:1653 [0085] 第八邊:1654 [0086] 第三開口 : 166 099100459 表單編號A0101 第14頁/共30頁 0992001007-0 167 201125455 [0087] 第 二導電 線路: [0088] 第 四通孔 :169 [0089] 第 二膠層 :170 [0090] 第 三通孔 :171 [0091] 電路板: 180 ❹ 099100459 表單編號A0101 第15頁/共30頁 0992001007-0[0056] Inner substrate: 110 [0057] Inner copper foil layer: 111 [0058] Inner insulating layer: 112 [0059] First surface · 113 [0060] Second surface: 114 [0061] First copper clad: 120 First copper foil layer: 121 [0063] First insulating layer: 122 [0064] First non-product area: 1 2 3 [0065] First product area: 124 [0066] First removal area: 125 [ 0067] First side: 1 2 51 099100459 Form number A0101 Page 13 / Total 30 pages 0992001007-0 201125455 [0068] Second side: 1252 [0069] Third side: 1253 [0070] Fourth side: 1254 [0071 The first opening: 126 [0072] The first conductive line: 127 [0073] The second through hole: 129 [0074] The first adhesive layer: 130 [0075] The first through hole: 131 [0076] The second copper clad plate: [0077] Second copper foil layer: 161 [0078] Second insulating layer: 162 [0079] Second non-product area: 1 6 3 [0080] Second product area: 164 [0081] Second removal area: 165 Fifth side: 1651 [0083] Sixth side: 1652 [0084] Seventh side: 1653 [0085] Eighth side: 1654 [0086] Third opening: 166 099100459 Form number A0101 Page 14/total 30 pages 0992001007-0 167 201125455 [0087] Second conductive line: [0088] Fourth via: 169 [0089] Second adhesive layer: 170 [0090] Third via: 171 [0091] Circuit board: 180 ❹ 099100459 Form No. A0101 Page 15 / Total 30 Pages 0992001007-0

Claims (1)

201125455 七、申請專利範圍: 1 . 一種電路板製作方法,包括步驟: 提供内層基板、第一覆銅板及第一耀層,所述第一覆銅板 包括第一產品區域、第一非產品區域及第一去除區域,該 第一去除區域部分與第一產品區域相鄰接,第一去除區域 之其他部分與第一非產品區域相鄰接,所述第一覆銅板包 括第一銅猪層,所述内層基板具有第一表面; 沿著第一去除區域與第一產品區域之交線形成第一開口, 使得第一去除區域與第一產品區域相互分離; 於第一膠層内形成與第一去除區域相對應之第一通孔; 依次堆疊第一膠層與第一覆銅板於基板之第一表面,並壓 合第一膠層、第一覆銅板與内層基板; 於第一覆銅板之第一銅箔層形成第一導電線路; 沿著第一去除區域與第一非產品區域之交線形成第二開口 ,所述第二開口與第一開口相互連通,以將第一覆銅板於 第一去除區域之材料去除,從而於第一覆銅板内形成與第 一去除區域對應之第二通孔。 2 .如申請專利範圍第1項所述之電路板製作方法,其中,所 述内層基板為覆銅板,該内層基板與第一表面相對之一側 具有内層銅羯層,於所述第一覆銅板之第一銅箱層形成第 一導電線路之同時於所述内層銅箔層内形成導電線路。 3 .如申請專利範圍第1項所述之電路板製作方法,其中,所 述内層基板為形成有導電線路之雙層或者多層電路基板, 所述内層基板具有與第一表面相對之第二表面,於第一表 面壓合第一膠層時還於第二表面壓合第一膠層與第一覆銅 099100459 表單編號A0101 第16頁/共30頁 0992001007-0 201125455 板。 4 .如申請專利範圍第1項所述之電路板製作方法,其中,所 述電路板製作方法於形成第一導電線路之後還進一步包括 提供第二覆銅板與第二膠層,所述第二覆銅板包括第二產 品區域與第二非產品區域,所述第二非產品區域包括第二 去除區域,該第二去除區域部分與第二產品區域相鄰接, 第二去除區域與第一去除區域相對應,所述第二覆銅板具 有第二銅箔層; 〇 沿著第二去除區域與第二產品區域之交線形成第三開口, 使得第二去除區域與第二產品區域相互分離; 於第二膠層内形成與第二去除區域相對應之第三通孔; 依次堆疊並壓合第二膠層與第二覆銅板於所述第一導電線 路上; 於第二覆銅板之第二銅箔層内形成第二導電線路; 於形成第二開口之前或者同時,沿著第二去除區域與第二 非產品區域之交線形成第四開口,所述第四開口與第三開 Ο 口相互連通,以將第二覆銅板於第二去除區域内之材料去 除,從而於第二覆銅板内形成與第一通孔、第二通孔及第 三通孔相對應之第四通孔。 5 .如申請專利範圍第4項所述之電路板製作方法,其中,所 述第一覆銅板包括複數第一去除區域。 6 .如申請專利範圍第5項所述之電路板製作方法,其中,所 述第二覆銅板包括複數第二去除區域,複數第一去除區域 與複數第二去除區域——對應。 7.如申請專利範圍第1項所述之電路板製作方法,其中,採 099100459 表單編號A0101 第17頁/共30頁 0992001007-0 201125455 用衝型或者切割方式沿著第一去除區域與第一產品區域之 交線於第一覆銅板形成第一開口。 8 .如申請專利範圍第7項所述之電路板製作方法,其中,所 述切割方式為鐳射切割或者機械切割。 9 .如申請專利範圍第1項所述之電路板製作方法,其中,第 一通孔與第一去除區域形狀相同並同轴設置,第一通孔之 橫截面積大於第一去除區域之面積。 10 .如申請專利範圍第1項所述之電路板製作方法,其中,採 用衝型或者切割之方式沿著第一去除區域與第一非產品區 域之交線形成第二開口。 099100459 表單編號A0101 第18頁/共30頁 0992001007-0201125455 VII. Patent application scope: 1. A circuit board manufacturing method, comprising the steps of: providing an inner substrate, a first copper clad plate and a first glazing layer, wherein the first copper clad plate comprises a first product area, a first non-product area and a first removal region, the first removal region portion is adjacent to the first product region, and the other portion of the first removal region is adjacent to the first non-product region, and the first copper clad plate comprises a first copper pig layer. The inner substrate has a first surface; a first opening is formed along a line of intersection of the first removal region and the first product region, such that the first removal region is separated from the first product region; and formed in the first adhesive layer a first through hole corresponding to the removal region; sequentially stacking the first adhesive layer and the first copper clad plate on the first surface of the substrate, and pressing the first adhesive layer, the first copper clad plate and the inner layer substrate; and the first copper clad plate The first copper foil layer forms a first conductive line; a second opening is formed along the intersection of the first removal region and the first non-product region, and the second opening and the first opening communicate with each other to CCL material removed in the first removal area, thereby forming a first region corresponding to the removal of the second through-hole in the first CCL. The method of manufacturing a circuit board according to claim 1, wherein the inner substrate is a copper clad plate, and the inner substrate has an inner copper layer on a side opposite to the first surface, The first copper box layer of the copper plate forms a first conductive line while forming a conductive line in the inner layer copper foil layer. 3. The method of fabricating a circuit board according to claim 1, wherein the inner substrate is a two-layer or multi-layer circuit substrate on which a conductive line is formed, and the inner substrate has a second surface opposite to the first surface. When the first adhesive layer is pressed on the first surface, the first adhesive layer is further pressed on the second surface with the first copper-clad 099100459 Form No. A0101 Page 16 / Total 30 Page 0992001007-0 201125455. The circuit board manufacturing method of claim 1, wherein the circuit board manufacturing method further comprises providing a second copper clad plate and a second adhesive layer after forming the first conductive line, the second The copper clad laminate includes a second product area and a second non-product area, the second non-product area includes a second removal area, the second removal area portion is adjacent to the second product area, and the second removal area is first removed Corresponding to the region, the second copper clad laminate has a second copper foil layer; the crucible forms a third opening along the intersection of the second removal region and the second product region, so that the second removal region and the second product region are separated from each other; Forming a third through hole corresponding to the second removal region in the second adhesive layer; sequentially stacking and pressing the second adhesive layer and the second copper clad plate on the first conductive line; Forming a second conductive line in the two copper foil layers; forming a fourth opening along the intersection of the second removal area and the second non-product area before or at the same time as forming the second opening, the fourth opening and the The openings are connected to each other to remove the material of the second copper clad plate in the second removal region, thereby forming a fourth corresponding to the first through hole, the second through hole and the third through hole in the second copper clad plate Through hole. 5. The method of fabricating a circuit board according to claim 4, wherein the first copper clad plate comprises a plurality of first removal regions. 6. The method of fabricating a circuit board according to claim 5, wherein the second copper clad plate includes a plurality of second removal regions, and the plurality of first removal regions correspond to the plurality of second removal regions. 7. The method for manufacturing a circuit board according to claim 1, wherein the method is 099100459, the form number A0101, the 17th page, the total of 30 pages, 0992001007-0, 201125455, along the first removal area and the first The intersection of the product areas forms a first opening in the first copper clad laminate. 8. The method of fabricating a circuit board according to claim 7, wherein the cutting method is laser cutting or mechanical cutting. 9. The method of manufacturing a circuit board according to claim 1, wherein the first through hole has the same shape and is coaxially disposed with the first removal region, and the cross-sectional area of the first through hole is larger than the area of the first removal region. . 10. The method of fabricating a circuit board according to claim 1, wherein the second opening is formed along the intersection of the first removal region and the first non-product region by means of punching or cutting. 099100459 Form No. A0101 Page 18 of 30 0992001007-0
TW99100459A 2010-01-11 2010-01-11 Method for manufacturing printed circuit board TWI405520B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW99100459A TWI405520B (en) 2010-01-11 2010-01-11 Method for manufacturing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW99100459A TWI405520B (en) 2010-01-11 2010-01-11 Method for manufacturing printed circuit board

Publications (2)

Publication Number Publication Date
TW201125455A true TW201125455A (en) 2011-07-16
TWI405520B TWI405520B (en) 2013-08-11

Family

ID=45047447

Family Applications (1)

Application Number Title Priority Date Filing Date
TW99100459A TWI405520B (en) 2010-01-11 2010-01-11 Method for manufacturing printed circuit board

Country Status (1)

Country Link
TW (1) TWI405520B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103327748A (en) * 2012-03-20 2013-09-25 宏启胜精密电子(秦皇岛)有限公司 Circuit board and manufacturing method thereof
CN103732008A (en) * 2012-10-15 2014-04-16 富葵精密组件(深圳)有限公司 Piece connection circuit board and manufacturing method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200938041A (en) * 2008-02-22 2009-09-01 Unimicron Technology Corp Method for fabricating flex-rigid circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103327748A (en) * 2012-03-20 2013-09-25 宏启胜精密电子(秦皇岛)有限公司 Circuit board and manufacturing method thereof
CN103732008A (en) * 2012-10-15 2014-04-16 富葵精密组件(深圳)有限公司 Piece connection circuit board and manufacturing method thereof
TWI466603B (en) * 2012-10-15 2014-12-21 Zhen Ding Technology Co Ltd Flexible printed circuit board and method for making the same

Also Published As

Publication number Publication date
TWI405520B (en) 2013-08-11

Similar Documents

Publication Publication Date Title
TWI507099B (en) Rigid-flexible printed circuit board, method for manufacturing same, and printed circuit board module
CN205093052U (en) Multilayer board
CN103635005B (en) Rigid-flex circuit substrate, rigid-flex circuit board and manufacturing methods
CN103635007B (en) Rigid-flexible circuit substrate, rigid-flexible circuit board and manufacture method
US20140182899A1 (en) Rigid-flexible printed circuit board and method for manufacturing same
WO2010067731A1 (en) Wiring board and method for manufacturing same
JP2004140018A (en) Process for producing multilayer board, multilayer board, and mobile apparatus using it
CN102227959B (en) Wiring board and method for manufacturing same
KR20150083424A (en) Method for manufacturing wiring board
TWI519225B (en) Manufacturing method of multilayer flexible circuit structure
CN102083282B (en) Method for manufacturing printed circuit board (PCB)
TWI472273B (en) Printed circuit board and method for manufacturing same
TW201125455A (en) Method for manufacturing printed circuit board
CN104378932B (en) The preparation method and multi-layer PCB board of multi-layer PCB board
CN103779233A (en) Bearing plate manufacturing method
CN204425772U (en) Multilager base plate
WO2018163859A1 (en) Multi-layer substrate, electronic apparatus, and method for producing multi-layer substrate
TWI461135B (en) Method for fabricating circuit board
JP2010205809A (en) Multilayer printed wiring board and method of manufacturing the same
CN112867289A (en) Manufacturing method of circuit board
CN102958293A (en) Manufacturing method of circuit board with offset structure
WO2015083216A1 (en) Multilayer substrate and manufacturing method for same
CN103458605A (en) soft and hard composite circuit board and manufacturing method thereof
JP5585035B2 (en) Circuit board manufacturing method
KR200168281Y1 (en) Cover board for manufacturing multi-layer board