201124012 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及印刺電路板領域，尤其涉及一種檢測電路板 邊接頭衝型偏差之電路板製作方法。 【先前技術】 [〇〇〇2 ] 印刷電路板因具有裝配密度高等優點而得到廣泛之應用 。關於高密度互連電路板之應用請參見文獻Takahashi， A. O〇ki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880 » IEEE Trans, on Components, Packaging, and201124012 VI. Description of the Invention: [Technical Field] The present invention relates to the field of printed circuit boards, and more particularly to a method for fabricating a circuit board for detecting a tapping deviation of a board edge. [Prior Art] [〇〇〇2] Printed circuit boards have been widely used due to their high assembly density. For applications on high-density interconnect boards, see the literature Takahashi, A. O〇ki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab., High density multilayer printed circuit board for HITAC M-880 » IEEE Trans, on Components, Packaging, and
Manufacturing Technology， 1992， 15(4): 418-425。 1 . ...Manufacturing Technology, 1992, 15(4): 418-425. 1 . ...
[0003] 電路板通常具有邊接頭（俗稱金手指），用於與其他元 件相互連接。隨著電子產品與電路板尺寸之不斷減小， 對邊接頭之偏位公差要求亦越來越高。於電路板之製作 過程中於進行衝型過程中由於對位與衝型機台之偏差， 容易造成衝型後得到之邊接頭之偏位尺寸大於偏位公差 。現有技術中’對電路板邊接頭之偏位尺寸之檢測通常 採用光學檢測（A0I )，上述光學檢測需要採用精密度很 向之影像感測装置，如CCD等價格昂貴。另外，由於偏位 公差通常很小’影像檢測裝置檢測之結果準確性不高。 【發明内容】 [0004] 有鑑於此，提供—種能夠準確檢測出電路板邊接頭偏位 情況之電路板製作方法實屬必要。 098144347 表單編號A0101 第4頁/共24頁 201124012 [0005] [0006] 乂下將以實施例說明_種電路板製作方法。 種電路板製作方法，包括 電路基板―减板’所述 πσ區域/、非產品區域，所述產品區域包 、接頭區與線路區；於邊接頭區形成有邊接頭，所述 邊接頭ο括複數沿第—方向延伸之導電墊，於線路區形 Ο Ο ’於所述非產品區域形成測試線路，所述測 忒線路包括沿第一方向延伸之測試標記以及連接於測試 才75 °己相對兩側之兩電測接點，所述沿第一方向測試標記 具有靠近邊接頭區之第一端教遠離邊接頭區之第二端， 所述兩個電測接點基本沿垂直於第一方向之第二方向設 置，提供衝型模具，所述衝型模具包括苐一衝模與第二 衝模’所述第一衝模用於對所述之邊接頭區進行衝型， 所述第二衝模用於於測試標記對應位置形成測試通孔， 所述第一衝模包括用於分離邊接頭區與外產品區之第一 衝裁刀具，所述第二衝模沿第一方向具有靠近第—衝裁 刀具之第三端與遠離第一衝裁刀具第四端’第二衝模於 第二方向上之長度等於測試標記於第二方向上之長度與 兩倍偏位公差之絕對值之和，第二衝模之第三端與第一 衝裁刀具之距離小於測試標記之第二端與邊接頭區之最 小距離與偏位公差之差，第二衝模之第四端與第一衝裁 刀具之距離大於第一端與邊接頭區之最小距離與偏位公 差之和；利用衝型模具對電路基板進行衝型’以使第一 衝模於非產品區域與邊接頭區之間形成開口，並使第二 衝模於測試標記上形成測試通孔；對完成衝型之電路基 板進行電測’藉由測試兩電測接點之間之導通情況，從 098144347 表單編號Α0101 第5頁/共24頁 0982075807-0 201124012 而判定電路基板沿第一方向上之衝型 △差之要求。 偏差是否滿足偏位 [0007] [0008] 2讀術減，本技㈣案提供之電路㈣接頭區製 =法，只需於進行產㈣域之線路製料 =路，於對邊接祕進行衝型之同時對觀線路進行 於對電路基板進行電測時同時對衝型後之測試線 ^進行電測，藉由電測測試線路之導通㈣ 邊 接頭區之偏位是否滿足偏位公差之要求： 方案提供之電路板製作方法無需使用價格昂責之= =置，且於電路板之製作過料，對邊接㈣_偏 疋否滿足偏位公差進行檢測無需增加額外之制程，從 而降低之電路板之成本’提高電路板生產致率。 :實施方式】 下面結合附圖及實施例對本技術方案提祺之 方法作進一步說明。[0003] Circuit boards typically have edge connectors (commonly known as gold fingers) for interconnecting other components. As the size of electronic products and boards continues to decrease, the tolerance requirements for the edge joints are also increasing. In the process of manufacturing the circuit board, due to the deviation of the alignment and the punching machine during the punching process, the offset size of the edge joint obtained after the punching is likely to be larger than the offset tolerance. In the prior art, the detection of the offset size of the board edge connector is usually performed by optical detection (A0I), and the above-mentioned optical detection requires an image sensing device with a high precision, such as a CCD, which is expensive. In addition, since the offset tolerance is usually small, the accuracy of the result detected by the image detecting device is not high. SUMMARY OF THE INVENTION [0004] In view of the above, it is necessary to provide a circuit board manufacturing method capable of accurately detecting a misalignment of a board edge joint. 098144347 Form No. A0101 Page 4 of 24 201124012 [0005] [0006] The following will describe the method of making a board. The circuit board manufacturing method comprises the πσ region of the circuit substrate “subtracting plate”, the non-product area, the product area package, the joint area and the line area; and the edge joint area is formed with a side joint, and the edge joint includes a plurality of conductive pads extending along the first direction, forming a test line in the non-product area in the line region, the test circuit including the test mark extending in the first direction and being connected to the test only 75° Two electrical measurement contacts on both sides, the first direction test mark having a first end adjacent to the edge joint region and a second end away from the edge joint region, the two electrical measurement contacts being substantially perpendicular to the first Provided in a second direction of the direction, providing a punching die, the punching die comprising a first die and a second die, wherein the first die is used for punching the edge joint region, and the second die is Forming a test through hole at a corresponding position of the test mark, the first die comprising a first punching tool for separating the edge joint region and the outer product region, the second die having a proximity to the first punching tool in the first direction First End and away from the fourth end of the first punching tool, the length of the second die in the second direction is equal to the sum of the length of the test mark in the second direction and the absolute value of the double offset tolerance, and the third of the second die The distance between the end and the first punching tool is smaller than the difference between the minimum distance of the second end of the test mark and the edge joint region and the offset tolerance, and the distance between the fourth end of the second die and the first punching tool is greater than the first end and The sum of the minimum distance of the edge joint region and the offset tolerance; the punching die is used to punch the circuit substrate to form an opening between the non-product region and the edge joint region, and the second die is placed on the test mark Forming a test via hole; performing electrical measurement on the completed circuit substrate. 'By testing the conduction between the two electrical measurement contacts, the circuit is determined from 098144347 Form No. 1010101 Page 5 / Total 24 Page 09820075807-0 201124012 The requirement of the difference in the punching pattern of the substrate in the first direction. Whether the deviation satisfies the deviation [0007] [0008] 2 reading subtraction, the circuit provided in this technology (4) case (4) joint zone system = method, only in the production (four) domain line material = road, on the opposite side of the secret At the same time, the punching type is performed on the circuit board during the electrical measurement of the circuit substrate, and the test line after the punching type is electrically tested, and the electrical test is used to test the conduction of the line. (4) Whether the offset of the edge joint area satisfies the requirement of the offset tolerance : The circuit board manufacturing method provided by the solution does not need to use the price blame = = set, and the circuit board is made of material, and the edge (4) _ bias 满足 does not meet the offset tolerance detection without adding additional processes, thereby reducing the circuit The cost of the board 'increased the production rate of the board. Embodiments of the present invention will be further described below with reference to the accompanying drawings and embodiments.
電路板製作 [0009] 本技術方案實施例提供之一種電路板製作方 下步驟：Circuit board fabrication [0009] A circuit board fabrication method provided by an embodiment of the present technical solution is as follows:
[0010] 請參閱圖1，第一步，提供一電路基板1 〇〇， 包括產品區域110與非產品區域12〇。 電路基板100 [0011] 產，區域110係指電路基板⑽㈣成有導電線路與邊接 頭等結構之區域，電路基板100除產品區域 之其他區 之 產品區域 域疋義為非產品區域。產品區域110位於電路基板 中心位置’非產品區域丨20環繞產品區域11〇 110包括邊接頭區130與線路區140 » 098144347 表單編號A0101 第6頁/共24頁 0982075807-0 201124012 _]帛二步，於邊接頭區13〇形成包括複數導電墊m[之邊接 頭，於非產品區域120形成測試線路15〇 ^ 闕所述邊接頭區13G與非產品區域120相鄰，於邊接頭區 130形成複數基本相互平行之導電塾⑶。本實施例中， 於電路基板1〇〇所在之平面内，將與平行於導電塾i3i延 伸之方向定義為第一方向，與第一方向垂直之方向定義 為第二方向。 [0014] ❹ [0015][0010] Referring to FIG. 1, the first step is to provide a circuit substrate 1 〇〇 including a product area 110 and a non-product area 12A. The circuit board 100 is a region in which the circuit board (10) (4) has a structure such as a conductive line and a side connector, and the product area of the circuit board 100 other than the product area is a non-product area. The product area 110 is located at the center of the circuit substrate. The non-product area 丨20 surrounds the product area 11〇110 including the edge joint area 130 and the line area 140 » 098144347 Form No. A0101 Page 6 / Total 24 page 0992075807-0 201124012 _] 帛 two steps Forming a plurality of conductive pads m[the side joints in the edge joint region 13〇, forming a test line 15 in the non-product region 120. The edge joint region 13G is adjacent to the non-product region 120, and is formed in the edge joint region 130. The plurality of conductive turns (3) which are substantially parallel to each other. In the present embodiment, in a plane in which the circuit board 1 is located, a direction extending parallel to the conductive 塾i3i is defined as a first direction, and a direction perpendicular to the first direction is defined as a second direction. [0014] [0015]
請參閱圖2 ’於非產品區域120形成測試線路15Q，測試線 路150可與線路區刚之導電線路同時形成如測試線路 150可於侧得到導電線路同時朗制，測試線路15〇 可與導電塾131相連，亦可不與導電塾131相連。測試線 路150之數量不限，大於或等於一.均可。本實施例中，為 保證測試結果更加準確，於非產品區域12Q形成有兩個相 對之測試線路150。每一測試線路15〇均包括測試標記 151、兩電測接點152與兩連接線路153。 本實施例中，測試構記151之形狀為長圓形’其延伸方向 平行於導電墊Γ31之延伸方向。測試標記151具有依次連 接之第一弧邊1511、第一直邊1512、第二弧邊1513與第 一直邊1514，其中，第一弧邊1511與第二弧邊1513相對 設置並均為半圓形弧，即第一弧邊1511與第二弧邊1513 對應之圓心角為180度。本實施例中，於第二方向上之衝 型管控之偏位公差為〇.〇5毫米。第一弧邊1511與第二狐 邊1513之對應之圓之直徑為23.丨毫米。測試標記151之 寬度即第一直邊1512與第二直邊1514之間距為231毫米 098144347 。第一弧邊1511靠近導電塾131 表單編號A0101 第7頁/共24頁 第二弧邊1513遠離導 0982075807-0 201124012 電墊131。第一直邊1512與第二直邊1514平行於第一方 向5又置，並均連接於第一弧邊1511與第二弧邊1513之間 第直邊1 51 2與第二直邊1514之長度與電路板定位於 衝型模具之偏位公差相對應’通常為該偏位公差之10倍 。本實施例中，第一直邊1512與第二直邊1514之長度為 5毫米。即第一弧邊丨5丨丨之圓心與第二弧邊丨5〗3之圓心 之間距為5毫米。第一弧邊1511具有靠近導電墊131之第 一端1515，第二弧邊1513具有遠離導電墊131之第二端 1516。 [0016] [0017] [0018] 098144347 測試標記151之形狀不限於本實施例中之形狀，其中，第 _弧邊與第二弧邊亦可設置為其他曲邊或直邊，即測試 標記151之形狀亦可為長方形、橢圓形或其他形狀。 兩電測接點152用於與電測裝置接觸，從而檢測測試標記 151之導通情況。本實施例中，兩個電測接點分佈於 測試標記151之相對兩侧，關於測試標記】51之中心對稱 。又置兩電測接點15 2均為圓形，其直徑大小與測試裝置 之測試針頭之直徑相對應，其直徑通常為測試針頭直徑 之3倍。本實施例中，電測接點152之直徑均為7毫米。當 然’電測接點152之形狀並不限於圓形，其亦可為其他容 易餘刻得到之形狀，如橢圓形等。 每一連接線路153連接於一個電測接點152與測試標記 151之間。本實施例中，兩連接線路153關於測試標記 151之中心對稱設置，一個連接線路153連接於測試標記 151之第一直邊1512與一個電測接點152之間，另一個連 接線路153連接於第二直邊1514與另一個電測接點152之 表單編號A0101 第8頁/共24百 ' 0982075807-0 201124012 [0019] [0020] [0021]Ο ❹ [0022] 間。為了便於關得到連接線路153，連接線路ΐ53與測 試標記151與電測接點152均平滑連接。 ” 請參閱圖3，第三步，提供衝型模具·，衝型模具綱具 有用於對電路基板100進行衝型之第—衝模2 _⑸進行衝型之第二衝模22“ 、 本實施例巾’第-㈣210詩對邊接頭區13{)進行衝型 ，使得邊接頭區130與非產品區域12〇相互分離。 第-衝模210之形狀與電路基板1〇〇之邊接頭區13〇之形 狀相對應’其包括相互連接用於分離邊接頭區13〇與非產 品區域120之第-衝裁刀具213、第二衝裁刀具212及第 二衝裁;7具21卜第-衝裁刀傾3之延料向平行於第 二方向。第三衝裁刀具211與第二衝裁刀具212相互平行 ’第-衝裁刀具213連接於第三衝裁刀具211與第二衝裁 刀具212之間’第—衝裁刀具213之延伸方向與第三衝裁 刀具211之延伸方向相互垂直。第三衝裁4具川與第二 衝裁刀具212位於第，衝裁刀具213之同一側。第三衝裁 刀具211與第二_裁刀具212之間之距離與導電塾131區 域之寬度相等。 ° 第二衝模22G之形狀與測試標記151之形狀相對應。第二 衝模22G位於第-衝裁刀具213之—侧。本實 二衝模220包括與第—衝模21〇相對之第1弧邊221、 與第-圓弧邊221相對之第二圓弧邊222與平滑延伸於兩 圓弧邊之間之平行之兩直邊223。兩直邊223之延伸方向 平行於第—方向。第"'圓弧邊221與第H邊222均為 098144347 表單編號A0101 第9頁/共24頁 0982075807-0 201124012 半圓弧，兩圓孤邊之圓心之連線平行於兩直邊。本實施 例中，第一圓弧邊221與第二圓弧邊222之圓心之間距即 兩直邊之長度為6毫米，第一圓弧邊221與第二圓弧邊222 對應之圓之直徑即兩直邊之間距為2 3毫米。兩直邊之間 距可根據實際需要之偏位公差進行設置，只需保證兩直 邊之間距與兩倍偏位公差之和與第一直邊1512與第二直 邊1514之間距相等。第一圓弧邊221具有與最靠近第一衝 模210之第三端224，第二圓弧邊222具有與第一衝模210 相距最遠之第四端225。第二衝模220之第三端224與第 一衝裁刀具213之距離小於測試標記151之第二端151 6與 邊接頭區130之最小距離與偏位公差之差，第二衝模220 之第四端225與第一衝裁刀具213之距離大於第一端151 5 與邊接頭區130之最小距離與偏位公差之和。本實施例中 ，第一衝裁刀具213與第三端224之距離應小於測試標記 151之第一端1515與邊接頭區130之距離與偏位公差之差 並且第四端225與第一衝裁刀具213距離小於第二端1516 與導電墊131之距離與偏位公差之差。 [0023] 第四步，請一併參見圖4至圖6，利用衝型模具200對電路 基板100進行衝型，第一衝模210對產品區域110進行衝 型使得邊接頭區130與非產品區域120分離，第二衝模 220於測試標記151内形成測試通孔155。 [0024] 利用衝型模具200對電路基板100進行衝型，使得第一衝 模210於非產品區域120與邊接頭區130相鄰處形成開口 132。本實施例中，需要藉由衝型將複數導電墊131所於 之產品區域110與非產品區域120相互分離。利用第二衝 098144347 表單編號A0101 第10頁/共24頁 0982075807-0 201124012 模220於測試標記151内衝出測試通孔155。於導電墊131 衝型後，對第二方向之偏位公差有嚴格之要求，通常偏 位元公差需要小於0. 1毫米。一般要求之偏位公差為0. 05 毫米至0. 0 7毫米之間。 [0025] 由於對邊接頭區130之衝型與測試通孔155之衝型同時完 成，因此，對邊接頭區130產生之衝型偏差與測試通孔 155之偏差相同。於第一方向上偏位公差要求較低，通常 衝型機台之精度可滿足偏位公差之要求。 0 [0026] 請參見圖5，本實施例中，於進行衝型時，於平行於導電 墊131之延伸方向上，第一衝裁刀具213與第三端224之 距離應小於測試標記1 51之第一端1515與導電墊131之距 _ 離與偏位公差之差並且第四端225與第一衝裁刀具21 3之 距離小於第二端151 6與導電墊131之距離與偏位公差之差 。當形成之測試通孔155於垂直於導電墊1 31延伸方向上 不產生偏差時，測試通孔155與測試標記1 51同軸，於測 試標記151之第一直邊1512與第二直邊1 514兩側均剩餘 〇 偏位公差相等寬度，第二弧邊1513—側剩餘預定寬度， 從而兩電測接點152之間可藉由第二弧邊1513—侧剩餘寬 度之測試標記1 51相互連通。 [0027] 請參見圖6，當形成之測試通孔155於垂直於導電墊131延 伸方向上產生偏差時，測試通孔155與測試標記151轴線 相互偏離，於測試標記151之第一直邊151 2與第二直邊 1514兩側僅一側剩餘，從而兩電測接點152之間不能相互 連通。 098144347 表單編號A0101 第11頁/共24頁 0982075807-0 201124012 [0028] [0029] [0030] [0031] [0032] 請參見圖7，當第二衝模220之第四端225與第一衝裁刀具 21 3距離大於第二端151 6與導電墊131之距離與偏位公差 之與並且第三端224與第一衝裁刀具213之距離大於測試 標記151之第一端151 5與導電墊131之距離與偏位公差之 和。於進行衝型之後，使得測試通孔將測試標記 之第二弧邊1513之一側衝斷，而靠近導電墊131之第一孤 邊1 511之一侧之測試標記1 51剩餘寬度。 第五步，請參見圖4及圖6，對衝型之後之電路基板1〇〇進 行電測’測試兩個電測接點L52之間之導通情況，從而判 定邊接頭區130之衝型偏位公差是著滿足要米，從而得到 衝型偏位公差滿足要求之電路板。 對衝型之後之電路基板1〇〇進行電測β對電路基板1〇〇進 行電測可採用飛針電測或者採用與電路板相對應之治具 進行扎針測試。於進行衝型過程中，形成之開口 132將測 試線路150與導電墊131相互分離，因此，測試線路15〇 與電路基板100之產品區域110之電路之間不相互連通。 於進行電路之產品區域進行導通檢測之過程中，可一併 對兩個電測接點之間是否導通。 請參閱圖5，當兩個電測接點152之間相互導通時（即 short) ’表明導電塾131衝型後偏位之尺寸滿足偏位公 差之要求；請參閱圖6 ’當檢測個電測接點152之間相互 不導通時（即。pen)，表明邊接頭區13_型後之偏位之 尺寸不滿足偏位公差之要求。 另外’測試標記設置之形狀可根據實際製作進行設定， 098144347 表單編號A0101 第12頁/共24頁 0982075807-0 201124012 [0033] [0034]Ο ο [0035] 098144347 用於形成之測試通孔之形狀與測試標記相對應即可。如 測試標記與測試通孔之形狀可為長方形或者其他不規則 之形狀。 本技術方案提供之電路板製作方法’第一衝模210於非產 品區域120與邊接頭區130之間形成開口 132後，還可包 括對線路區140進行衝型以使得線路區與非產品區分離之 步驟。 本技術方案提供之電路板製作方法，只需於進行產品區 域之線路製作時同時製作測試線路’於對邊接頭區進行 衝型之同時對測試線路進行衝型，於對電路基板進行電 測時同時對衝型後之測試線路進行電測，藉由電測測試 線路之導通情況即可判斷邊接頭區之偏位是否滿足偏位 公差之要求’從而得到衝型偏差滿足偏位公差要求之電 路板。因此’本技術方案提供之電路板;t作方法方法無 需使用價格昂貴之影像檢螂裝置’且於電路板之製作過 程中，對邊接頭區衝:型偏差是„否滿足得位公差進行檢測 無需增加額外之制程’從而降低之‘電路板之省成本，提 高了電路板生產效率。 综上所述，本發明確已符合發明專利之要件，遂依法提 出專利申請。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本案之申請專利範圍、舉凡熟弗本 案技藝之人士援依本發明之精神所作之等效修飾或變化 ’皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1係本技術方案實施例提供之電路基板之示意圖。 表單編號A0101 第13頁/共24頁 0982075807-0 [0036] 201124012 [0037] 圖2係本技術方案實施例提供之測試線路之示意圖。 [0038] 圖3係本技術方案實施例提供之衝型模具之示意圖。 [0039] 圖4係本技術方案實施例提供之利用衝型模具對電路基板 衝型後之示意圖。 [0040] 圖5係本技術方案實施例提供之衝型偏差滿足偏位公差要 求之測試通孔與測試標記相對位置關係之示意圖。 [0041] 圖6係本技術方案實施例提供之衝型偏差不滿足偏位公差 要求之測試通孔與測試標記相對位置關係之示意圖。 [0042] 圖7係本技術方案實施例提供之衝型偏差滿足偏位公差要 求之測試通孔與測試標記另一相對位置關係之示意圖。 【主要元件符號說明】 [0043] 電路基板：100 [0044] 產品區域：11 0 [0045] 非產品區域：120 [0046] 邊接頭區：130 [0047] 導電墊：1 31 [0048] 開口 ： 132 [0049] 線路區：140 [0050] 測試線路：150 [0051] 測試標記：151 [0052] 第一弧邊：1 511 098144347 表單編號A0101 第14頁/共24頁 0982075807-0 201124012 [0053]第一直邊：1512 [0054] 第二弧邊：1513 [0055] 第二直邊：1514 [0056] 第一端：1515 [0057] 第二端：1516 [0058] 電測接點：152 [0059] 連接線路：153 〇 [0060] 測試通孔：155 [0061] 衝型模具：200 ' [0062] 第一衝模：210 [0063] 第三衝裁刀具：211 [0064] 第-* 裁刀具· 2 3· 2 [0065] ❹ 第一衝裁刀具：213 [0066] 第二衝模：220 [0067] 第一圓弧邊：221 [0068] 第二圓弧邊：222 [0069] 直邊：223 [0070] 第三端：224 [0071] 第四端：225 098144347 表單編號Α0101 第15頁/共24頁 0982075807-0Referring to FIG. 2, a test line 15Q is formed in the non-product area 120. The test line 150 can be formed simultaneously with the conductive line of the line area. The test line 150 can be obtained on the side while the conductive line is obtained. The test line 15 can be electrically conductive. The 131 is connected or not connected to the conductive crucible 131. The number of test lines 150 is not limited, and is greater than or equal to one. In this embodiment, in order to ensure more accurate test results, two opposite test lines 150 are formed in the non-product area 12Q. Each test line 15 includes a test mark 151, two electrical measurement contacts 152 and two connection lines 153. In the present embodiment, the shape of the test structure 151 is an oblong shape whose direction of extension is parallel to the direction in which the conductive pads 31 extend. The test mark 151 has a first arc edge 1511, a first straight edge 1512, a second arc edge 1513 and a first straight edge 1514 which are sequentially connected, wherein the first arc edge 1511 and the second arc edge 1513 are opposite to each other and are half The circular arc, that is, the central angle corresponding to the first arc edge 1511 and the second arc edge 1513 is 180 degrees. In this embodiment, the offset tolerance of the punching control in the second direction is 〇.〇5 mm. The diameter of the circle corresponding to the first arc edge 1511 and the second fox edge 1513 is 23. mm. The width of the test mark 151, that is, the distance between the first straight side 1512 and the second straight side 1514 is 231 mm 098144347. The first arc edge 1511 is close to the conductive crucible 131 Form No. A0101 Page 7 of 24 The second arc edge 1513 is far from the guide 0982075807-0 201124012 Electric pad 131. The first straight edge 1512 and the second straight edge 1514 are parallel to the first direction 5, and are connected between the first arc edge 1511 and the second arc edge 1513. The first straight edge 1 51 2 and the second straight edge 1514 are connected. The length corresponds to the offset tolerance of the board positioned on the die, which is typically 10 times the offset tolerance. In this embodiment, the length of the first straight side 1512 and the second straight side 1514 is 5 mm. That is, the distance between the center of the first arc edge 丨5丨丨 and the center of the second arc edge 丨5〗 3 is 5 mm. The first arc edge 1511 has a first end 1515 adjacent the conductive pad 131, and the second arc edge 1513 has a second end 1516 remote from the conductive pad 131. [0018] [0018] The shape of the test mark 151 is not limited to the shape in the embodiment, wherein the first arc edge and the second arc edge may also be set to other curved edges or straight edges, that is, the test mark 151. The shape can also be rectangular, elliptical or other shapes. The two electrical measurement contacts 152 are for contacting the electrical measuring device to detect the conduction of the test mark 151. In this embodiment, two electrical measurement contacts are distributed on opposite sides of the test mark 151, and are symmetric about the center of the test mark 51. The two electrical measuring contacts 15 2 are both circular and have a diameter corresponding to the diameter of the test needle of the test device, and the diameter is usually three times the diameter of the test needle. In this embodiment, the diameter of the electrical measurement contacts 152 is 7 mm. Of course, the shape of the electrical measuring contact 152 is not limited to a circular shape, and it may be other shapes that are easily obtained, such as an elliptical shape. Each connection line 153 is connected between an electrical measurement contact 152 and a test mark 151. In this embodiment, the two connection lines 153 are symmetrically disposed about the center of the test mark 151, one connection line 153 is connected between the first straight side 1512 of the test mark 151 and one electrical measurement contact 152, and the other connection line 153 is connected to The second straight side 1514 and the other electrical measurement contact 152 form number A0101 page 8 / total 24 hundred ' 0982075807-0 201124012 [0019] [0020] [0021] ❹ ❹ [0022]. In order to facilitate the connection of the connection line 153, the connection line ΐ53 and the test mark 151 and the electrical measurement contact 152 are smoothly connected. Referring to FIG. 3, the third step is to provide a punching die. The punching die has a second die 22 for punching the die 200 with the punching die 2 _(5). The '--fourth 210 poems are punched into the side joint region 13{) such that the edge joint region 130 and the non-product region 12 are separated from each other. The shape of the first die 210 corresponds to the shape of the side joint region 13A of the circuit substrate 1'' including the first punching cutter 213 and the second for interconnecting the side joint region 13〇 and the non-product region 120. The blanking tool 212 and the second punching; 7 has a 21-bit-punching knife tilting 3 of the material extending parallel to the second direction. The third punching tool 211 and the second punching tool 212 are parallel to each other. The first punching tool 213 is connected between the third punching tool 211 and the second punching tool 212. The direction of the first punching tool 213 extends. The extending directions of the third punching cutters 211 are perpendicular to each other. The third punching 4 and the second punching tool 212 are located on the same side of the punching tool 213. The distance between the third blanking tool 211 and the second cutting tool 212 is equal to the width of the conductive crucible 131 region. ° The shape of the second die 22G corresponds to the shape of the test mark 151. The second die 22G is located on the side of the first punching cutter 213. The second die 220 includes a first arc edge 221 opposite to the first die 21〇, a second arc edge 222 opposite to the first arc edge 221, and two parallel lines extending smoothly between the two arc edges. Side 223. The direction in which the two straight sides 223 extend is parallel to the first direction. The first "' arc edge 221 and the H edge 222 are both 098144347 Form No. A0101 Page 9 of 24 0982075807-0 201124012 A semi-arc, the line connecting the centers of the two circles is parallel to the two straight sides. In this embodiment, the distance between the center of the first arc edge 221 and the second arc edge 222, that is, the length of the two straight sides is 6 mm, and the diameter of the circle corresponding to the first arc edge 221 and the second arc edge 222 That is, the distance between the two straight sides is 23 mm. The distance between the two straight edges can be set according to the deviation tolerance of the actual needs, and only the sum of the distance between the two straight sides and the double offset tolerance is equal to the distance between the first straight edge 1512 and the second straight edge 1514. The first arcuate edge 221 has a third end 224 that is closest to the first die 210, and the second arcuate edge 222 has a fourth end 225 that is furthest from the first die 210. The distance between the third end 224 of the second die 220 and the first punching tool 213 is smaller than the difference between the minimum distance of the second end 1516 of the test mark 151 and the edge joint region 130 and the offset tolerance, and the fourth of the second die 220 The distance between the end 225 and the first blanking tool 213 is greater than the sum of the minimum distance and the offset tolerance of the first end 1515 and the edge joint region 130. In this embodiment, the distance between the first punching tool 213 and the third end 224 should be less than the difference between the distance between the first end 1515 of the test mark 151 and the edge joint region 130 and the offset tolerance, and the fourth end 225 and the first punch The distance of the cutting tool 213 is smaller than the difference between the distance between the second end 1516 and the conductive pad 131 and the offset tolerance. [0023] In the fourth step, referring to FIG. 4 to FIG. 6, the circuit substrate 100 is punched by the punching die 200, and the first die 210 punches the product region 110 so that the edge joint region 130 and the non-product region are punched. 120 is separated, and the second die 220 forms a test via 155 in the test mark 151. [0024] The circuit substrate 100 is stamped by a stamping die 200 such that the first die 210 forms an opening 132 adjacent the edge region 130 at the non-product region 120. In this embodiment, the product area 110 and the non-product area 120 of the plurality of conductive pads 131 need to be separated from each other by a punching type. Using the second punch 098144347 Form No. A0101 Page 10 of 24 0982075807-0 201124012 The die 220 punches out the test via 155 in the test mark 151. 1毫米。 After the conductive pad 131 has a strict tolerance on the second direction of the tolerance, usually the offset of the bit needs to be less than 0.1 mm. 0毫米之间。 The general tolerance of the tolerance is between 0. 05 mm to 0. 0 7 mm. [0025] Since the punching type of the edge joint region 130 and the punching pattern of the test through hole 155 are simultaneously completed, the offset of the punching type generated by the edge joint region 130 is the same as that of the test through hole 155. In the first direction, the offset tolerance is lower, and the accuracy of the punching machine usually meets the requirements of the offset tolerance. [0026] Referring to FIG. 5, in the embodiment, when the punching type is performed, the distance between the first punching tool 213 and the third end 224 should be smaller than the test mark 1 51 in the extending direction parallel to the conductive pad 131. The distance between the first end 1515 and the conductive pad 131 is the difference between the offset and the offset tolerance, and the distance between the fourth end 225 and the first punching tool 21 3 is smaller than the distance between the second end 151 6 and the conductive pad 131 and the offset tolerance Difference. When the formed test via 155 does not exhibit a deviation in a direction perpendicular to the extending direction of the conductive pad 1 31, the test via 155 is coaxial with the test mark 151, and the first straight side 1512 and the second straight side 1 514 of the test mark 151. Both sides have the same width deviation tolerance width, and the second arc side 1513-side has a predetermined width remaining, so that the two electrical measurement contacts 152 can be connected to each other by the second arc edge 1513-side residual width test mark 1 51. . Referring to FIG. 6, when the formed test via 155 is biased in a direction perpendicular to the extending direction of the conductive pad 131, the test via 155 and the test mark 151 are mutually offset from each other, and the first straight side of the test mark 151 151 2 and only one side of the second straight side 1514 remain, so that the two electrical measurement contacts 152 cannot communicate with each other. 098144347 Form No. A0101 Page 11 / Total 24 Page 0992075807-0 201124012 [0030] [0032] Referring to FIG. 7, when the fourth end 225 of the second die 220 is first punched out The distance of the cutter 21 3 is greater than the distance between the second end 151 6 and the conductive pad 131 and the offset tolerance and the distance between the third end 224 and the first punching tool 213 is greater than the first end 151 5 of the test mark 151 and the conductive pad 131. The sum of the distance and the offset tolerance. After the punching is performed, the test through hole is caused to break one side of the second arc side 1513 of the test mark, and is close to the remaining width of the test mark 151 on the side of the first one side 1 511 of the conductive pad 131. In the fifth step, referring to FIG. 4 and FIG. 6, the circuit substrate 1 after the punching type is electrically tested to test the conduction between the two electrical measuring contacts L52, thereby determining the punching deviation of the edge joint region 130. The tolerance is a circuit board that satisfies the requirements of the meter, so that the punched offset tolerance is satisfied. The circuit board 1 after the punching type is electrically measured. β is electrically measured on the circuit board 1. The flying needle can be electrically measured or the jig corresponding to the board can be used for the needle test. During the punching process, the formed opening 132 separates the test line 150 from the conductive pad 131, and therefore, the test line 15A and the circuit of the product area 110 of the circuit substrate 100 are not in communication with each other. During the conduction detection of the product area of the circuit, the conduction between the two electrical measurement contacts can be performed together. Referring to FIG. 5, when the two electrical measuring contacts 152 are electrically connected to each other (ie, short), the size of the conductive 塾131 is determined to meet the requirements of the offset tolerance; see FIG. 6 'When detecting a power When the contact points 152 are not electrically connected to each other (ie, pen), it indicates that the size of the offset after the edge joint region 13_ does not satisfy the requirement of the offset tolerance. In addition, the shape of the test mark setting can be set according to the actual production, 098144347 Form No. A0101 Page 12 / Total 24 page 0982075807-0 201124012 [0033] [0034] Ο ο [0035] 098144347 The shape of the test through hole for forming Correspond to the test mark. For example, the shape of the test mark and the test through hole may be a rectangle or other irregular shape. The circuit board manufacturing method provided by the technical solution 'the first die 210 after forming the opening 132 between the non-product area 120 and the edge joint area 130 may further include punching the line area 140 to separate the line area from the non-product area. The steps. The circuit board manufacturing method provided by the technical solution only needs to make the test line at the same time when the line of the product area is produced, and the test line is punched at the same time as the punching type of the side joint area, when the circuit board is electrically tested. At the same time, the test circuit after the hedging type is electrically tested, and the conduction state of the electrical test circuit can be used to determine whether the offset of the edge joint region satisfies the requirement of the offset tolerance, thereby obtaining a circuit board with the offset deviation meeting the offset tolerance requirement. . Therefore, the circuit board provided by the technical solution does not require the use of an expensive image inspection device, and in the process of manufacturing the circuit board, the edge joint region is punched out: the type deviation is „No, the tolerance is detected. There is no need to add additional processes to reduce the cost of the board, and the board production efficiency is improved. In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. The invention is not limited to the preferred embodiment of the present invention, and the equivalent modifications or variations made by those skilled in the art to the present invention should be covered by the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a circuit substrate provided by an embodiment of the present technical solution. Form No. A0101 Page 13 of 24 0982075807-0 [0036] 201124012 [0037] FIG. 2 is a technical solution implementation 3 is a schematic diagram of a test die provided by an embodiment of the present invention. [0039] FIG. 4 is a schematic diagram of the present technical solution. FIG. 5 is a schematic diagram showing the relationship between the test through hole and the test mark according to the deviation of the punch type deviation provided by the embodiment of the present technical solution provided by the embodiment. [0040] FIG. [0041] FIG. 6 is a schematic diagram showing the relative positional relationship between the test through hole and the test mark provided by the embodiment of the present invention, and the punching type deviation does not satisfy the deviation tolerance requirement. [0042] FIG. 7 is a punch provided by the embodiment of the present technical solution. Schematic diagram of the relationship between the test through hole and the test mark in accordance with the deviation tolerance. [Main component symbol description] [0043] Circuit board: 100 [0044] Product area: 11 0 [0045] Non-product area: 120 [0046] Side joint area: 130 [0047] Conductive mat: 1 31 [0048] Opening: 132 [0049] Line area: 140 [0050] Test line: 150 [0051] Test mark: 151 [0052] First arc Side: 1 511 098144347 Form No. A0101 Page 14 of 24 page 0982075807-0 201124012 [0053] First straight side: 1512 [0054] Second arc side: 1513 [0055] Second straight side: 1514 [0056] One end: 1515 [0057] Second end: 1516 [0058] Electrical contact: 152 [0059] Connecting line: 153 〇 [0060] Test through hole: 155 [0061] Punching die: 200 ' [0062] First die: 210 [0063] Third blanking tool: 211 [0064] -* cutting tool · 2 3· 2 [0065] ❹ First punching tool: 213 [0066] Second die: 220 [0067] First arc edge: 221 [ 0068] Second arc side: 222 [0069] Straight side: 223 [0070] Third end: 224 [0071] Fourth end: 225 098144347 Form number Α 0101 Page 15 / Total 24 page 0982075807-0