201114006 六、發明說明： 【發明所屬之技術領域】 本發明係關於-種半導體結構’特別是一種具有接觸塾結構與 保護結構的半導體結構。 ' 【先前技術】 Φ 隨著科技的發展以及半導體技術的發展，電子元件已成功地應 用於各種生/舌層面。微機電系統(Micro-electro-mechanical system， mems)技術，是利用習知的半導體的製程來製造微小的機械元件， 透過半導體技術例如電鍵、钱刻等方式，可完成具有微米尺寸的機 械元件。常見的應用有在喷墨印表機内使用的電壓控制元件，在汽 車中作為制汽車傾斜的陀螺儀，或者是麥克風中用來感測聲音的 震膜等。微機電系統技術由於可將機械結構和電子線路整合，因此 可批里製造(batch fabncatlon)，而具有低成本、高品質且高積集度等 •優點。 目刖’微機電系統是以系統晶片（system on chip，soc)的概念整 口在單一晶片上’特別是以標準互補式金氧半導體(CM0S)製程所製 備的晶片，例如在同一片晶粒(die)上同時形成微機電系統區域以及 CMOS區域。而在整合現有的CM〇s與微機電系統的製程上，可能 會產生許多_ ’例如職CM〇s _元件歧微_紐時，各 區域之間的製程可能會相互影響與干擾。 201114006 請參考第1圖，第1圖為習知微機電區域與非微機電區域之平 面示意圖。如第1圖所示，在一晶粒100上具有一微機電區域收 以及一非微機電區域102。微機電區域1〇4内設置有一微機電元件 106 ’例如振膜、馬達等；而非微機電區域1〇2則可為一邏輯區、 記憶區域朗邊電路區域，其崎置有各種半導體元件(未顯示广 例如各種主動元件或被動元件。非微機電區域1〇2之表面具有複數 個接觸塾108，使外界的訊號得以透過相對應之接觸塾ι〇8來=動 非微機電區域1〇2中的半導體元件(未顯示），或者可以驅動微機電 區域104中的微機電元件1〇6。 通常在製備微機電元件1G6時’會在完成所有的微機電元件 1〇6、半導體元相及金屬__各式料體製雜，將此系統晶 片經過至少-次_難程，崎職體（例如氫氟酸㈣）或钱 刻溶液等敍刻劑，去除微機電區域1〇4内的金屬層間介電層(imd)， 以在微機魏域KH +職錄可赋雜有帥赌構之微機電 元件106。 而在侧過私中’常會產生許多問題。例如為了使非微機電區 域1〇2中的半導體元件在银刻過程中不被損害，通常在非微機電區 域102上會覆蓋-層遮罩層(未顯示），以保護下方的漏不會被餘 刻綱去除。遮罩層通常為金屬，但是若在非微機電區域102上全 面覆蓋遮罩層，會使得各接觸墊皆電性連接在—起而產生短路 201114006 1=二絲:另一方面，若接觸墊108沒有被遮罩層所覆蓋，則 / ♦易沿著接觸墊108周圍進入非微機電區域脱*破壞内部 一牛另方面’接觸塾·若要驅動半導體元件或微機電元件106 ”電路佈局也必舰適當的考量’以避免互她路而干擾的現 象。 【發明内容】 • 於是’本發明提出了-種轉體結構，可避免各接觸塾結構之 〗-路的現象’也可避免似彳劑沿著接觸塾結構*渗人非微機電區 域’且透過各種實财式，本㈣之_麵構科接半導體元件 或微機電元件時，還可擁有絕佳的電傳導品質。 根據申請專利範圍，本發明提出了一種半導體結構。該半導體 結構包含一基底、一介電層、一接觸墊結構以及一保護結構。介電 層設置於基底上。接觸墊結構則設置於介電層中，其包含複數層第 鲁一金屬層以及複數個插塞(plug)’彼此上下電性相連，其中接觸墊結 構與基底之間不具有一接觸插塞(c〇ntact plUg)。保護結構設置於介 電層中，其包圍接觸墊結構。 根據申請專利範圍，本發明提出了另一種半導體結構。該半導 體結構包含一基底、一介電層、一接觸塾結構、一絕緣結構以及一 保護結構。介電層設置於基底上。接觸墊結構則設置於介電層中， 其包含複數層第一金屬層以及複數個插塞，彼此上下電性相連。絕 201114006 緣結構設置於基底無㈣結構之間。賴結構設置於介電層中， 其包圍接觸墊結構。 根據申請專娜圍，本㈣提出了另—種半導體結構。該半導 體結構包含-基底、-介電層、—接觸墊結構以及一保護結構。介 電層設置於基底上。接㈣結構職置於介電射，其包含複數層 第-金屬層以及複數個插塞，彼此上下電性相連，其中至少有一層 之第一金屬層的寬度與其他層之第—金顧的寬度關。保護結ς 設置於介電層中，其包圍接觸墊結構。 本發明之保賴構可較侧劑進人非微機電區域，而接觸塾 結構可驅解導體元件或微機電元件，以作為訊號之輸人與輸出。 接觸墊結構和基底電性絕緣，可具有較佳之電傳遞品質。 【實施方式】 請參考第2圖，第2圖為本發明中微機電區域與非微機電區域 之平面示意圖。為了方便描述，第2圖係沿用第i圖之符號說明。 如第2圖所示，在一晶粒100上具有一微機電區域ι〇4以及一非微 機電區域102。微機電區域104内設置有一微機電元件1〇6，例如振 膜、馬達等；而非微機電區域102貝何為一邏輯區域、記憶區域或: 周邊電路區域’其内設置有各種半導體元件(未顯示），例如各種主 動元件或被動元件。非微機電區域⑽之表面具有複數個接觸塾結 構叫，使外界的訊號得以透過相對應之接觸墊結構ιΐ4來驅動非 201114006 微機電區域102中的半導體元件(未顯示），或者可以驅動微機電區 域104中的微機電元件丨％。 請參考第3圖與第4圖’第3圖為本發明中半導體結構之平面 示意圖，其係為第2圖中區域C的放大圖。第4圖則為第3圖中沿 AA’切線之剖面示意圖。本發明之半導體結構包含一基底11〇、一介 電層112、一接觸墊結構114、一保護結構116以及一遮罩層128。 如第3圖所示，接觸墊結構114會設置於非微機電區域1〇2中，其 可以在上形成打線(wireb〇nding)等結構，外界訊號可透過接觸墊結 構114以驅動半導體元件（未顯示）或者微機電元件106。 本發明的遮罩層128雖然覆蓋在非微機電區域1〇2上，但並不 會覆蓋在接觸墊結構114上，以避免在先前技術中所述，遮罩層128 和接觸墊結構114接觸而導致短路的問題。同時，本發明為了防止 蝕刻劑122由接觸墊結構114周遭之區域進入非微機電區域1〇2， 在接觸墊結構114周圍會具有一保護結構116。 關於細部之結構介紹’請參考第4圖。接觸墊結構114以及保 濩結構116皆設置在位於基底11〇上之介電層112中。介電層112 的材質可以為氧化矽(別〇2)、四乙氧基矽烷(TEOS)、電漿增強式四 乙氧基矽烷(pETEOS)或各種層間介電層材質。 如第4圖所示，接觸墊結構114包含複數層第一金屬層ι18以 201114006 及複數個插塞(plug)120。其中，各第一金屬層118係彼此交錯設置 於介電層112中且藉由各插塞120而上下相連，而構成一堆疊(stack) 結構。亦即此等第一金屬層118為層狀結構，各插塞12〇則設置於 各第一金屬層118之間。插塞120的實施態樣可以為各自獨立之柱 狀孔洞(vias) ’或者各自獨立之金屬牆(barrier)，抑或是由複數個柱 狀孔洞或複數個金屬牆組成的圖案化(patterned)金屬層。位於各第一 金屬層118之間（即不同層）的插塞12〇的實施態樣可以相同也可 以不相同，其原則以能夠支撐並穩固此堆疊之接觸墊結構114為 主。在本發明之一較佳實施例中，各插塞12〇會形成一封閉之環狀 結構，並分別包圍各第一金屬層118之間的介電層112。如此一來， 在通入蝕刻劑122如氫氟酸時，可使得接觸墊結構114内部之介電 層112不會被移除，且各插塞120能有效上下接觸並支撐各第一金 屬層118，而形成最穩定之結構。第一金屬層118與插塞12〇包含 各種導電材質，例如金屬鎢、銘或銅等，使得各第_金屬層⑽與 各插塞120彼此電性連結。 為了確保在_時，侧劑122不會触介電層ιΐ2而破壞非 微機電區域1〇2内之元件，本發明之半導體結構還具有—保護結構 116以及-遮罩層128。遮罩層128設置於介電層112上方，覆蓋了 非微機電區域102，並曝露各接觸塾結構114與微機電區域ι〇4。遮 罩層128的材質包含各種可抗侧劑122之材f，例如當侧劑122 為氫氟酸時，遮罩層128較佳為金細s。保護結構116則設置在接 觸墊結構114之周圍，並包圍了接觸墊結構m。保護結構心向 201114006 上會接觸遮罩層128，向下則會接觸基底11〇，以形成一由上而下完 整之抗韻刻結構。若從細部來看，保護結構116包含有複數層第二 金屬層I24以及複數個保護環126。各第二金屬層m為層狀結構， 而各保護環I26則設置在各第二金屬層m之間。保護環126為一 連續的環狀結構，其材質可包含金顧、金雜、非砂(amorphous silicon)或氮化石夕㈣c〇n nitride)或其他可抗氫說酸㈣冑之侧劑 122蝕刻之材質。在本實施例中，保護結構ιι6在兩兩相鄰之各第 φ =金屬層m間，可以僅具有單一保護環⑶，或者視情況而具有 複數個保護環126，彼此平行設置於介騎ιι2巾，並共同圍繞接 觸墊結構114。保護環126的平面佈局可以是各種多邊形、圓形等 封閉結構，帛3圖之保護環126例示為方形，但並不以此為限。位 2同層或不同層之各保護j裒126之形狀可以相同也可以不同，以 月匕夠封閉圍繞接觸塾結構114，並上下實質接觸各第二金屬* 為原則。 虽接觸塾結構114與保護結構116皆由金屬所組成時，其可由 相同的金屬化製程同時形成。例如形成接餘結構1Μ之任一第一 3層118時，亦會同時形成保護裝置116同-層之第二金屬層 Z署接著在於其上形成接觸塾結構114之插塞120，也同時形鋪 ^胸/ ^保護環126。因此’利用各種金屬内連線製程，並調 U之魏層金屬線路層以及複數個連接各金屬層之插塞的句 程中，效整合祕行之半導體製程，而於此金屬内連線靠 P時形成所需之接觸墊結構m以及保護結構m。但須注 201114006 意的是’接觸塾結構114中的第一金屬層118與插塞12〇，必須和 保護結構116電性絕緣’以避免短路的現象。但若保護結構μ之 保護環I26由絕緣材料所形成，例如石夕化氮，接觸塾結構叫則可 能和此絕緣材料的保魏126接觸，但整體上仍以·絕緣為原則。 另-方面，為了避免接觸塾結構以於接受輸入或輸出之電流 訊息時’此電錢息會透過基底UG而產生漏制現象，本發明之 接觸墊結構114會和基底U〇電性絕緣。於本發明之—實施财， 本發明之躺魏構114和基底11G之邮具有接輸塞(⑽㈣ plug)。也就是說’在接觸墊結構114最下層之第一金屬層⑽通常 是半導體餘巾最先職的金屬層，即她丨㈣和基底ug之間， 並沒有接職塞或其他齡的結構，來電性連結此最下層的第一金 屬層118和基底110。在接觸塾結構114和基底ιι〇之間，僅具有 介電層112。 而於本發明另-實施财，本發明之接觸塾結構m和基底ιι〇 之間更可具有—絕緣結構。請參考第$圖，第$圖為本發明中半導 體結構之另-實施例示意圖。接觸塾結構114和基底ιι〇之間且有 -絕緣結構。縣結構可以是，例如i溝渠隔離(shaik)wtrench isolation，STI)130或其他適合之結構。淺溝渠隔離可伴隨一般金 氧半導體_S)細賴絲完成，例如在基底⑽上侧出一凹 槽(trenc聰’再填入絕緣物質像是氧化石夕。接觸塾結構m會直接 設置在淺溝渠隔離130上，並藉由淺溝渠隔離13〇來和基底⑽絕 201114006 緣。 由於淺溝渠隔離⑽等之絕緣結構可提供良好之絕緣效果，因 此在此實施例中，接觸墊結構114和淺溝渠隔離13〇之間亦可以設 置有接觸插塞m，以使接_結構114能得聰好的支樓效果。 如第5 _示’在本發明之實施例中，錢賴隔離料的絕緣 、’、口構上還可以具有-物質層132，例如—伴隨多晶♦閘極製程所製 Φ備的多晶矽層，也可以提供較好的支撐效果。 請參考第6圖，為本發明半導體結構之第三實施例示意圖。如 第6圖所示’在通入姓刻劑122時，侧齊⑴2會沿著接觸塾結構 114與保護結構116之間的縫隙而將此處的介電層ιΐ2移除。而為 了防止接觸墊結構114周圍以及下方的介電層m财被移除而造 成接觸塾結構114不穩固，本發明之各第-金屬層m的截面積， '、卩長度或見度’可以是不相同的。如第6騎示，在接觸墊結構 m中’至少有一層之第一金屬層ιΐ8的長度或寬度與其他層之第 金屬層m的長度或寬度不同。如此一來，會使得姓刻劑⑵進 接觸墊、、、。構114與保護結構116之間的途徑拉長，以避免姓刻劑 ⑵知入接觸塾結構114周圍與下方的介電層⑴並將其移除。加 寬的第-金屬層m並不限於單層，可以是多層，其也可以任意排 1田此實％例也可以和其他實施例配合，例如接觸墊結構】14 具有加寬的第-金屬層118，而和基底n〇之間同時具有淺溝渠隔 離130等之絕緣結構，如第7圖戶斤示。 201114006 圖參考第8圖，為本發财接難結構向外連接之示意 二二圖所示，接觸塾結構114還包含-金屬連線133，以作 電連接之通==和其他半導體元件(未顯示)或微機電元件106 ，接之通路。金屬連線133可以連接至非微機電區域脱中的主 ==件’或者’如第2圖所示’金屬連線133會與微機電元 之峨輸入端相連接，來鷄微機電元件1〇6。如前所述， 接觸墊、、。構m和保護結構m必須縣持電性絕緣以避免短路。 因此保護結構116對應於金屬連線133通過之處會設置有一開口 供金屬連線133通過。請參考第9圖，為本發明中金屬連線 、；一曰之第一金屬層的平面示意圖。如第9圖所示，保護結構⑽ 在第-金屬層128中會具有一開σ 134，使得金屬連線133能通過。 開口 m較佳者會設置在較下層之第二金屬層128中，例如最下層 咖口134進入非微機電 綜上而言，本發明提出了一種半導體結構，其主要包含了一接 觸塾結構以及-賴結構。賴結構可避免侧舰人非微機電區 域以破壞内部之元件；接雜結構可連接至其他半導體树或微機 電兀件’作為訊號之輸人與輸$，且透過本剌之各種實施方式， 接觸墊結構會和基底電性絕緣，藉以維持接觸势結構之電傳遞品質。 以上所述僅為本發社健實酬，凡依本發明申請專利範圍 201114006 斤做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 圖為習知微機電區域與非微機電區域之平面示意圖。 ==為本發时微機電區物_電_之平面示意圖。 第圖為本發”半導體結構之平面示意圖。 第4圖至第7圖為本發明半導體結構之實施例示意圖。 春第8圖至第9圖為本發明中接觸塾結構向外連接之示意圖。 【主要元件符號說明】 100 晶粒 102 非微機電區域 104 微機電區域 106 微機電元件 108 接觸墊 110 基底 112 介電層 114 接觸墊結構 116 保護結構 118 第一金屬層 120 插塞 122 #刻劑 124 第二金屬層 126 保護環 128 遮罩層 130 絕緣結構 131 接觸插塞 132 物質層 133 金屬連線 134 開口 13BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor structure, particularly a semiconductor structure having a contact germanium structure and a protective structure. [Prior Art] Φ With the development of technology and the development of semiconductor technology, electronic components have been successfully applied to various raw/tongue levels. The micro-electro-mechanical system (mems) technology is a process for manufacturing micro-mechanical components by a conventional semiconductor process, and a micro-sized mechanical component can be completed by means of semiconductor technology such as electric keying or money etching. Common applications include voltage control components used in inkjet printers, gyroscopes used in car tilting in automobiles, or diaphragms used to sense sound in microphones. Due to the integration of mechanical structures and electronic circuits, MEMS technology can be batch-fabricated, with the advantages of low cost, high quality and high integration. The microelectromechanical system is based on the concept of a system on chip (soc) on a single wafer, especially in a standard complementary metal oxide semiconductor (CMOS) process, for example in the same die. A MEMS region and a CMOS region are simultaneously formed on the die. In the process of integrating existing CM〇s and MEMS, there may be many _ ’s, such as CM 〇 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 201114006 Please refer to Figure 1, which is a schematic diagram of a conventional microelectromechanical region and a non-microelectromechanical region. As shown in Fig. 1, a MEMS region is received on a die 100 and a non-microelectromechanical region 102 is provided. A MEMS element 106' such as a diaphragm, a motor, etc. is disposed in the MEMS region 1-4; the non-microelectromechanical region 1 〇 2 can be a logic region, a memory region singular circuit region, and various semiconductor components are disposed thereon. (Not shown, for example, various active or passive components. The surface of the non-micro-electromechanical region 1〇2 has a plurality of contact ports 108, so that external signals can pass through the corresponding contacts 塾ι〇8 = dynamic non-micro-electromechanical region 1 The semiconductor component (not shown) in 〇2, or can drive the microelectromechanical component 1〇6 in the microelectromechanical region 104. Generally, all microelectromechanical components 1〇6, semiconductor elements are completed when the microelectromechanical component 1G6 is prepared. Phase and metal __ various materials, such as system, the system wafer through at least - times _ difficult, Saki office (such as hydrofluoric acid (four)) or money engraving solution, etc., remove the micro-electromechanical area within 1 〇 4 The inter-metal dielectric layer (imd), in the micro-machine domain KH + job record can be mixed with the gambling of the micro-electromechanical component 106. And in the side of the private 'often there will be many problems. For example, in order to make non-micro-electromechanical Semiconductor component in region 1〇2 The silver engraving process is not damaged, and a layer of a mask layer (not shown) is usually covered on the non-microelectromechanical region 102 to protect the underlying drain from being removed by the residual layer. The mask layer is usually metal, but if Full coverage of the mask layer on the non-micro-electromechanical region 102 causes the contact pads to be electrically connected to each other to generate a short circuit 201114006 1 = two wires: on the other hand, if the contact pads 108 are not covered by the mask layer, Then / ♦ easy to enter the non-micro-electromechanical area around the contact pad 108. Destroy the internal one. Another aspect 'contact 塾 · To drive the semiconductor component or the micro-electromechanical component 106 ” The circuit layout must also be properly considered to avoid mutual The phenomenon that she interferes with the road. [Summary of the Invention] • So the present invention proposes a kind of swivel structure, which can avoid the phenomenon of the contact-塾 structure, and can also prevent the seepage agent from seeping along the contact structure*. The human non-micro-electromechanical region 'and through various real-life types, the semiconductor device or the micro-electromechanical device can also have excellent electrical conduction quality. According to the scope of the patent application, the present invention proposes a semiconductor Knot The semiconductor structure comprises a substrate, a dielectric layer, a contact pad structure and a protective structure. The dielectric layer is disposed on the substrate, and the contact pad structure is disposed in the dielectric layer, and comprises a plurality of layers of the second metal The layer and the plurality of plugs are electrically connected to each other, wherein the contact pad structure and the substrate do not have a contact plug (c〇ntact plUg). The protection structure is disposed in the dielectric layer and surrounds the contact pad. According to the scope of the patent application, the present invention proposes another semiconductor structure. The semiconductor structure comprises a substrate, a dielectric layer, a contact structure, an insulation structure and a protection structure. The dielectric layer is disposed on the substrate. The pad structure is disposed in the dielectric layer, and includes a plurality of first metal layers and a plurality of plugs electrically connected to each other. The 201114006 edge structure is placed between the base (4) structures. The lamella structure is disposed in the dielectric layer that surrounds the contact pad structure. According to the application for the special area, this (four) proposed another semiconductor structure. The semiconductor structure comprises a substrate, a dielectric layer, a contact pad structure, and a protective structure. The dielectric layer is disposed on the substrate. The (4) structure is placed in a dielectric shot, which comprises a plurality of layers of a metal layer and a plurality of plugs electrically connected to each other, wherein the width of the first metal layer of at least one of the layers is the same as that of the other layers. The width is off. The protective crust is disposed in the dielectric layer that surrounds the contact pad structure. The protection structure of the present invention can enter the non-micro-electromechanical region, and the contact structure can dissipate the conductor element or the micro-electromechanical element as the input and output of the signal. The contact pad structure and the substrate are electrically insulated to have better electrical transmission quality. [Embodiment] Please refer to Fig. 2, which is a schematic plan view of a microelectromechanical region and a non-microelectromechanical region in the present invention. For the convenience of description, the second drawing is illustrated by the symbol of the i-th figure. As shown in Fig. 2, a microelectromechanical region ι 4 and a non-microelectromechanical region 102 are provided on a die 100. A microelectromechanical element 1 is disposed in the MEMS region 104, such as a diaphragm, a motor, etc.; instead of the MEMS region 102, a logic region, a memory region, or a peripheral circuit region is provided with various semiconductor components ( Not shown), such as various active or passive components. The surface of the non-microelectromechanical region (10) has a plurality of contact structures, so that external signals can be driven through the corresponding contact pad structures ι4 to drive semiconductor components (not shown) in the non-201114006 MEMS region 102, or can drive the MEMS. The microelectromechanical component 丨% in region 104. Please refer to FIG. 3 and FIG. 4'. FIG. 3 is a plan view showing the semiconductor structure of the present invention, which is an enlarged view of a region C in FIG. Fig. 4 is a schematic cross-sectional view taken along line AA' in Fig. 3. The semiconductor structure of the present invention comprises a substrate 11A, a dielectric layer 112, a contact pad structure 114, a protective structure 116, and a mask layer 128. As shown in FIG. 3, the contact pad structure 114 is disposed in the non-micro-electromechanical region 1 〇 2, which may be formed with a wireb 〇 ing structure, and the external signal may pass through the contact pad structure 114 to drive the semiconductor device ( Not shown) or microelectromechanical component 106. The mask layer 128 of the present invention, while overlying the non-microelectromechanical region 1〇2, does not overlie the contact pad structure 114 to avoid contact between the mask layer 128 and the contact pad structure 114 as described in the prior art. And the problem that caused the short circuit. At the same time, in order to prevent the etchant 122 from entering the non-microelectromechanical region 1〇2 from the region around the contact pad structure 114, the present invention has a protective structure 116 around the contact pad structure 114. About the structure of the detail section, please refer to Figure 4. Contact pad structure 114 and security structure 116 are disposed in dielectric layer 112 on substrate 11A. The material of the dielectric layer 112 may be yttrium oxide (TE 2), tetraethoxy decane (TEOS), plasma reinforced tetraethoxy decane (pETEOS) or various interlayer dielectric materials. As shown in FIG. 4, the contact pad structure 114 includes a plurality of first metal layers ι18 to 201114006 and a plurality of plugs 120. Each of the first metal layers 118 is alternately disposed in the dielectric layer 112 and connected up and down by the plugs 120 to form a stack structure. That is, the first metal layers 118 have a layered structure, and the plugs 12 are disposed between the first metal layers 118. The implementation of the plug 120 can be a separate column of vias' or separate metal barriers, or a patterned metal composed of a plurality of columnar holes or a plurality of metal walls. Floor. The embodiment of the plug 12A located between the first metal layers 118 (i.e., different layers) may be the same or different, and the principle is mainly to support and stabilize the stacked contact pad structure 114. In a preferred embodiment of the invention, each of the plugs 12A forms a closed annular structure and surrounds the dielectric layer 112 between the first metal layers 118, respectively. In this way, when the etchant 122 such as hydrofluoric acid is introduced, the dielectric layer 112 inside the contact pad structure 114 is not removed, and each plug 120 can effectively contact the first metal layer. 118, and form the most stable structure. The first metal layer 118 and the plug 12A comprise various conductive materials, such as metal tungsten, indium or copper, such that each of the first metal layer (10) and each of the plugs 120 are electrically connected to each other. In order to ensure that the side agent 122 does not touch the dielectric layer ι 2 while destroying the elements in the non-microelectromechanical region 1 在 2, the semiconductor structure of the present invention also has a protective structure 116 and a mask layer 128. The mask layer 128 is disposed over the dielectric layer 112, covering the non-microelectromechanical region 102, and exposing the contact structure 114 and the microelectromechanical region ι4. The material of the mask layer 128 includes various materials f of the anti-side agent 122. For example, when the side agent 122 is hydrofluoric acid, the mask layer 128 is preferably gold fine s. The protective structure 116 is disposed around the contact pad structure 114 and surrounds the contact pad structure m. The protective structure core contacts the mask layer 128 on 201114006 and the substrate 11〇 downwards to form a top-down complete anti-magnet structure. The protective structure 116 includes a plurality of second metal layers I24 and a plurality of guard rings 126 as seen in detail. Each of the second metal layers m has a layered structure, and each of the guard rings I26 is disposed between each of the second metal layers m. The guard ring 126 is a continuous annular structure, and the material thereof may include gold, gold, amorphous silicon or nitride nitride or other side agents 122 which are resistant to hydrogen (4). Material. In this embodiment, the protective structure ιι6 is between the two adjacent φ=metal layers m, and may have only a single guard ring (3) or, as the case may be, a plurality of guard rings 126, which are arranged in parallel with each other. The wipes collectively surround the contact pad structure 114. The planar layout of the guard ring 126 may be a closed structure of various polygons, circles, etc., and the guard ring 126 of the FIG. 3 is illustrated as a square, but is not limited thereto. The shape of each of the protection layers 同 126 of the same layer or different layers may be the same or different, and the principle of closing the contact 塾 structure 114 around the contact , structure and substantially contacting the second metal* up and down is adopted. Although the contact germanium structure 114 and the protective structure 116 are both composed of metal, they can be formed simultaneously by the same metallization process. For example, when any of the first three layers 118 of the connection structure 1 is formed, the second metal layer of the same layer of the protection device 116 is simultaneously formed, and then the plug 120 of the contact structure 114 is formed thereon. Paving the chest / ^ protection ring 126. Therefore, in the process of using various metal interconnect processes, and adjusting the U-layer metal circuit layer and the plurality of plugs connecting the metal layers, the secret semiconductor process is integrated, and the metal interconnect is supported by the metal. When P is formed, the desired contact pad structure m and the protective structure m are formed. However, note 201114006 means that the first metal layer 118 and the plug 12 in the contact structure 114 must be electrically insulated from the protection structure 116 to avoid short circuit. However, if the protective ring I26 of the protective structure μ is formed of an insulating material, such as a nitrogen-bearing nitrogen, the contact 塾 structure may be in contact with the Bao Wei 126 of the insulating material, but the whole is still based on the principle of insulation. On the other hand, in order to avoid contact with the germanium structure to accept the input or output current message, the electric charge will leak through the substrate UG, and the contact pad structure 114 of the present invention is electrically insulated from the substrate U. In the present invention, the mail of the present invention and the substrate 11G have a plug ((10) (four) plug). That is to say, 'the first metal layer (10) in the lowermost layer of the contact pad structure 114 is usually the first metal layer of the semiconductor waste, that is, between her (four) and the substrate ug, and does not have a plug or other age structure. The lowermost first metal layer 118 and the substrate 110 are electrically connected. There is only a dielectric layer 112 between the contact germanium structure 114 and the substrate ιι. In the present invention, the contact structure m and the substrate ιι of the present invention may further have an insulating structure. Please refer to Fig. $, which is a schematic view of another embodiment of the semiconductor structure of the present invention. It is in contact with the crucible structure 114 and the substrate ιι and has an -insulating structure. The county structure can be, for example, a shaik trench isolation (STI) 130 or other suitable structure. Shallow trench isolation can be accomplished with the general MOS semiconductor _S), for example, a groove on the side of the substrate (10) (trenc Cong' refilled with insulating material like oxidized stone eve. The contact 塾 structure m will be directly placed in The shallow trench isolation 130 is separated from the substrate (10) by a shallow trench isolation of 13 。 201114006. Since the insulating structure of the shallow trench isolation (10) or the like can provide a good insulating effect, in this embodiment, the contact pad structure 114 and A contact plug m may also be disposed between the shallow trench isolation 13 , so that the connection structure 114 can achieve a smart branch effect. As shown in the fifth embodiment of the present invention, the Qian Lai spacer The insulating, ', and the mouth structure may further have a material layer 132, for example, a polycrystalline germanium layer prepared by a polycrystalline ♦ gate process, which can also provide a better supporting effect. Please refer to FIG. A schematic diagram of a third embodiment of a semiconductor structure. As shown in FIG. 6 'When a surname 122 is applied, the side (1) 2 will be dielectric along the gap between the contact structure 114 and the protection structure 116. Layer ιΐ2 is removed. To prevent contact pads The dielectric layer around and under the structure 114 is removed to cause the contact structure 114 to be unstable. The cross-sectional area of each of the first metal layers m of the present invention, ', length or visibility' may be different. As shown in the sixth riding, in the contact pad structure m, 'the length or width of the first metal layer ι 8 of at least one layer is different from the length or width of the metal layer m of the other layers. Thus, the surname (2) The path between the contact pads, the structure 114 and the protective structure 116 is elongated to prevent the surname agent (2) from entering and removing the dielectric layer (1) around the underlying structure 114 and the underlying layer. The metal layer m is not limited to a single layer, and may be a plurality of layers, which may be arbitrarily arranged, or may be combined with other embodiments, for example, a contact pad structure 14 having a widened first metal layer 118, and And the substrate n〇 has the insulation structure of the shallow trench isolation 130, etc., as shown in Figure 7. 201114006 Figure 8 is a schematic diagram showing the outward connection of the difficult structure. The contact structure 114 further includes a metal connection 133 for electrical connection. And other semiconductor components (not shown) or microelectromechanical components 106, the vias. The metal wires 133 can be connected to the main == piece ' or the 'metal wire 133' shown in Figure 2 It will be connected to the input end of the micro-electromechanical element to the chicken MEMS element 1〇6. As mentioned above, the contact pad, the structure m and the protection structure m must be electrically insulated to avoid short circuit. 116 corresponds to where the metal wire 133 passes to provide an opening for the metal wire 133 to pass. Please refer to FIG. 9 , which is a plan view of the first metal layer of the metal wire in the present invention. As shown, the protective structure (10) will have an opening σ 134 in the first metal layer 128 to allow the metal wiring 133 to pass. Preferably, the opening m is disposed in the second metal layer 128 of the lower layer. For example, the lowermost layer of the coffee bean 134 enters the non-micro-electromechanical device. The present invention provides a semiconductor structure mainly comprising a contact structure and - Lai structure. The structure can avoid the non-micro-electromechanical area of the side ship to destroy the internal components; the connection structure can be connected to other semiconductor trees or MEMS parts as the input and output of the signal, and through various embodiments of the present invention, The contact pad structure is electrically insulated from the substrate to maintain the electrical transfer quality of the contact potential structure. The above description is only for the health of the company, and all the equivalent changes and modifications of the patent application scope 201114006 can be covered by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The figure is a schematic plan view of a conventional microelectromechanical region and a non-microelectromechanical region. == Schematic diagram of the micro-electromechanical region _ electricity_ at the time of this issue. The figure is a schematic view of a semiconductor structure of the present invention. Figures 4 to 7 are schematic views of an embodiment of a semiconductor structure according to the present invention. Figures 8 through 9 of the spring are schematic views of the contact structure of the contact structure being outwardly connected. [Main component symbol description] 100 die 102 non-microelectromechanical region 104 MEMS region 106 MEMS element 108 contact pad 110 substrate 112 dielectric layer 114 contact pad structure 116 protection structure 118 first metal layer 120 plug 122 #刻剂124 second metal layer 126 guard ring 128 mask layer 130 insulation structure 131 contact plug 132 material layer 133 metal connection 134 opening 13