201101319 六、發明說明： 【發明所屬之技術領域】 ::明：及一種電子儲存裝置及其資料修復 別疋涉及—種鱗發性電子儲存裝置及其資·復方法特 【先前技術】 t 型快閃記憶體因具有讀寫速度快、省電、可靠声 Ο Ο ^ M…，廣泛被應用在消費型電子產品作為儲存# 用。NAND型容恳,丨，，. 卜1减弁媒體使 憶體，炉夫*-匕3早兀（ 1 ^11 ’ MLC)快閃記 犯大幅提高儲存容量，降低成本。 成同單—記憶單元所記錄的兩個位元，分別構 低有效位;Ϊ塊中的兩個記憶頁’而形成低次位元稱為最 位元稱A: t頁⑽_，下面簡稱⑽記憶頁），高次 憶頁）1取"有效位記憶頁（MSB Pa§e，下面簡稱MSB記 以同—纟儲存，構。兩者雖具不同的記憶頁，實質上則系 Page)。^5^^單元進行記錄，被稱為配對記憶頁（Paired MSB料w丨圖為f知的MLC型快閃記憶體LSB記憶頁與 。U負的燒錄過程示意圖。具體過程如下： 高次位-)若低次位元為1 (LSB記憶頁燒錄後為狀態U)， 疋也為1 ’則記憶體單元的狀態維持在狀態U; 高次/2)、若低次位元為1 (L S β記憶頁燒錄後為狀態U)， ° "'為〇 ’則將記憶體举元從狀態u燒錄到狀捧c ; 高二欠位_),若低次位元為〇 ( 記憶頁燒錄後為狀態A)， 人凡為1 ’則記憶體單元的狀態維持在狀態A; (4)若低次位元為〇(LSB記憶頁燒錄後為狀態a)， 4 201101319 尚次位元為0 ’則將§己憶體早元從狀態Α燒錄到狀態β。 Ο ο 通常快閃記憶體在讀寫資料時，會利用錯誤修正碼 (Error Correction Code, ECC)來確保資料讀寫的正確 性。尤其高密度的快閃記憶體晶片，其需要更強的錯誤偵 測及修復的能力來支援。因為快閃記憶體在出廠時就不保 證記憶胞陣列上所有的記憶胞都是良好的，加上快閃記憶 體在使用時也有會發生記憶胞損壞或老化的現象，以及^ 讀寫資料時可能因受到干擾而造成讀寫錯誤的情形，所以 快閃記憶體廠商大多會要求控制器薇商須採用適當位 錯誤修正碼來確保存取資料的正確性。如此，錯誤的 位元，皆會被偵測出來並予以修正。但 == = =錯 = 升快_體“資::；偵 提供足夠多的冗餘位數。 〔㈣了此無法 而且，數據於快閃記憶體上存取 錯誤數據的位數超過ECC的保護 =有^會發生 據讀取錯誤的情形。 的障/兄，因而造成數 【發明内容】 本發明之主要目的在於卷一 時，仍可藉由本發明所提出之田電子儲^置的f復能力不足 =修復錯誤數據，並且能ϋ或其資料修復方 提兩資料讀寫的效率。 、據的檢查時間，以 本發明提供—+ $ 電子儲存裝置，其中，該電子儲存裝 5 201101319 置包括：儲存單元、ECC單元及錯誤修 ，快閃記憶體構成。ECC單元偏妾儲存單元 一'it力以内時’修正資料。錯誤修正單元輕接儲存 序反向資料。数目赶出紅早凡的修復能力時，依 Ο 〇 本發明提供-種電子儲存裝置 儲存裝置包含ECC單元，該_ η =札復方法電子 讀取資料是否有錯誤；包括以下步驟：檢查 元的修魏力時，依序= = = = =單 = = ===已在ECC單元的修復能力 修復數據。 、在ECC早凡的修復能力内時，201101319 VI. Description of the invention: [Technical field to which the invention belongs] :: Ming: and an electronic storage device and its data recovery are related to a kind of scaly electronic storage device and its complex method [Prior Art] t type Flash memory is widely used in consumer electronics as a storage # because it has fast read/write speed, power saving, and reliable sound Ο ^ M... NAND-type capacity, 丨,,. 卜1 弁 弁 弁 弁 弁 , , , , , , , , , , , , , , , , , , 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉 炉The same single-memory unit records two bits, respectively constructing the low-order bits; the two memory pages in the block are formed as lower-order bits called the most significant bit: A: t page (10)_, hereinafter referred to as (10) Memory page), high-order memory page) 1 fetch " valid memory page (MSB Pa§e, hereinafter referred to as MSB record with the same - 纟 storage, structure. Although the two have different memory pages, in essence, Page) . The ^5^^ unit is recorded, which is called the paired memory page (the Paired MSB material is the MLC type flash memory LSB memory page and the U negative burning process diagram. The specific process is as follows: Bit-) If the lower-order bit is 1 (state U after the LSB memory page is burned), 疋 is also 1 'the state of the memory cell is maintained at state U; high-order/2), if the lower-order bit is 1 (The state is after the LS β memory page is burned), ° "' is 〇', then the memory is moved from the state u to the shape c; the second is the lower _), if the lower bit is 〇 (A memory A is burned to state A). If the memory is 1 ', the state of the memory cell is maintained at state A; (4) If the low-order bit is 〇 (state A after the LSB memory page is burned), 4 201101319 The second-order bit is 0', then the § 己 体 早 早 早 早 早 早Ο ο Normally, when the flash memory reads and writes data, it uses the Error Correction Code (ECC) to ensure the correctness of data reading and writing. Especially high-density flash memory chips, which require stronger error detection and repair capabilities to support. Because the flash memory does not guarantee that all the memory cells on the memory cell array are good at the time of shipment, and the flash memory will also have memory cell damage or aging when used, and ^ when reading and writing data Flash memory manufacturers may require the controller to use the appropriate bit error correction code to ensure the correctness of the access data. In this way, the wrong bits will be detected and corrected. But == =================================================================================================== Protection = there will be a situation in which a read error occurs. The obstacle/brother, thus causing the number [invention] The main purpose of the present invention is that the volume of the electronic storage of the field proposed by the present invention can still be recovered by the present invention. Insufficient capacity = repair of erroneous data, and can improve the efficiency of reading and writing two data. The inspection time according to the present invention is provided by the present invention - + $ electronic storage device, wherein the electronic storage device 5 201101319 includes : Storage unit, ECC unit and error repair, flash memory structure. ECC unit is biased to the storage unit when 'it force' is corrected. The error correction unit is connected to store the reverse data. The number is driven out of the red When the repair capability is provided, the present invention provides an electronic storage device storage device including an ECC unit, and the _n = whether the electronic reading data is erroneous or not; the following steps are included: when checking the repair force of the element, sequentially = = = = = Single = = === The repair capability of the ECC unit has been fixed. In the ECC's early repair ability,
本發明針對上述之需I 失，並配合學理之運用欠及現有儲存袭置的不便與缺 扣出，電子儲存裝置以ECC單元 否；錯誤，：：料C單凡檢查從儲存單元讀取的資料是 時，‘正數i貝當數ECC單元的修復能力以内 h H± , _的錯误數目超出ECC單元的修復能 所帶“。早7°依序反向數據。如此可减小資料錯誤 如后有縣發_聽料财其功效，紐合圖式說明 【實施方式】 存裝ΐ 1 子儲存裝置之功能方塊圖。電子儲 微處理器儲存單元u。控制器1〇包含： 疋1〇2、數據緩衝區1〇3、主機介面 6 201101319 104、儲存單元介面1()5及錯誤修正單元⑽。微處理器 4控制器1G内各單元間控制命令的處理與數據的傳 =:主，介面⑽連接外部裝置，以傳輪指令與數據。 早兀；丨面105連接儲存單元U，用於和儲存單元 進行數據聽。㈣顧m 1G3㈣暫射特 ，存單元介* 1G5所接收的數據。虹單元1()2== f早凡11祕確認數據的正確性，若發現數據錯誤， Ο Ο 修，能來修復，若ECC單元1G2無法修復，則由 婁It正早兀106利用依序反向數據位的方式來修復錯誤 在寫人數據到電子儲雜置丨時，控制器1G利用主 接收外部數據，然後將接收的數據暫存於數據 緩衝£ 1〇3。虹單元102便將數據緩衝區1〇3巾的數據加 亡錯，正編碼，然後將加上ECC編碼的數據便透過儲存 早凡；丨面105傳送到儲存單元u儲存。 士而在，取數據時，控制器1〇透過儲存單元介面1〇5 存單元11中的數據，將讀取出來的數據暫存於數據 中。ECC單元1〇2偵測是否有錯誤，若有錯誤 =錯誤數據位的數目在ECC單元⑽的修復能力内，便將 ，數據予以修復。數據修復後，再透過主機介面1〇4輸 =右數據錯誤的位數超出Εα單幻⑽修復能力的範圍， 二私正單疋1〇6選擇並依序反向數據暫存器⑽中的相 1數據j立’藉此將數據的錯誤位數降至咖單元⑽可 修復的範圍來達到數據修復的功效。 第3圖疋本實施例的第一種錯誤數據修復方法示意 圖。若在數據緩衝區103暫存一筆512位的數據發生Ε(χ 7 201101319 單元102無法修復的錯誤，即錯誤數據位的數目超出了 gee 單元102的修復能力’錯誤修正單元1〇6則依序反向該數 據位’且每一次反向後’都檢查錯誤數據位的數目是否已 降至ECC單元102的修復能力内。第3圖中箭頭所指的數 據位即為反向的數據位。當數據緩衝區1〇3中的數據可以 被ECC單元102修復時’便由ECC單元1〇2將數據修復， 然後將修復後的數據透過主機介面1 〇 4輸出。 ΟThe present invention is directed to the above-mentioned need for I, and in conjunction with the use of academic owing and the inconvenience and lack of existing storage, the electronic storage device is in the ECC unit; error::: material C is checked from the storage unit When the data is correct, the number of errors in the correcting capacity of the positive ECC unit is h H±, and the number of errors in _ exceeds the repair ability of the ECC unit. “Inverted data in the order of 7°. This can reduce data errors. If there is a county issued _ listening to the money, its effect, the picture description [implementation] storage ΐ 1 sub-storage device functional block diagram. Electronic storage microprocessor storage unit u. Controller 1 〇 contains: 疋 1 〇 2, data buffer 1 〇 3, host interface 6 201101319 104, storage unit interface 1 () 5 and error correction unit (10). Microprocessor 4 controller 1G control command processing and data transmission between units = The main interface (10) is connected to the external device to transmit the command and data. The front side 105 is connected to the storage unit U for data listening with the storage unit. (4) The m 1G3 (four) temporary shooting special, the storage unit is *1G5 received Data. Rainbow unit 1 () 2 == f early 11 secret If you find the correctness of the data, if you find that the data is wrong, you can fix it. If the ECC unit 1G2 cannot be repaired, then it is correct to use the reverse data bit to fix the error in the data. When the electronic storage device is placed, the controller 1G uses the main receiving external data, and then temporarily stores the received data in the data buffer £1〇3. The rainbow unit 102 adds the data of the data buffer 1〇3 towel. The code is encoded, and then the ECC-encoded data is stored through the storage; the face 105 is transferred to the storage unit u for storage. When the data is fetched, the controller 1 is stored in the storage unit 11 through the storage unit interface. The data is temporarily stored in the data. The ECC unit 1〇2 detects whether there is an error. If there is an error=the number of error data bits is within the repair capability of the ECC unit (10), the data is repaired. After the data is repaired, the number of digits of the right data error exceeds the range of the Εα single magic (10) repair capability through the host interface 1〇4, and the second private positive single 疋1〇6 selects and sequentially reverses the data register (10). Phase 1 data The number of errors is reduced to the range that can be repaired by the coffee unit (10) to achieve the effect of data repair. Fig. 3 is a schematic diagram of the first method for repairing erroneous data in this embodiment. If a 512-bit data is temporarily stored in the data buffer 103, Ε (χ 7 201101319 Unit 102 can not repair the error, that is, the number of error data bits exceeds the repair capability of the gee unit 102. The error correction unit 1〇6 sequentially reverses the data bit 'and every time after the reverse' check Whether the number of erroneous data bits has fallen within the repair capability of the ECC unit 102. The data bits indicated by the arrows in Fig. 3 are the reverse data bits. When the data in the data buffer 〇3 can be used by the ECC unit 102 When repairing, the data is repaired by the ECC unit 1〇2, and the repaired data is output through the host interface 1 〇4. Ο
為減少修復的時間，本發明還提出第二種錯誤數據修 ^法’選擇同值的數據位進行反向，即選擇數據位均為 的數據進行反向，數據位為“丨”的不反向。同樣， 也可選擇數據位均為1的數據進行反向，數據位為 的不反向，用戶可自行定義進行操作。 第*4A、4B圖是本發明之第二種錯誤資料修復方法之示 意圖。第4A圖中，在數據緩衝區1〇3暫存一筆512位的數 據發生ECC單元1〇2無法修復的錯誤，則錯誤修正單元ι〇6 針對數據為。“〇，’的數據位依序執行反向，且每一次反向 後’ ECC早TC102都檢查是否可以修復數據。帛4a圖中 箭；戶f數據位即為反向的數據位。當數據緩衝區⑽中 單元⑽修復時，即錯誤數據位的數目 修正數撼^ 2的修设能力内’便由ECC單元102將 修正數據，然後將修正後的數據透過主機介面1G4輸出。 的數錯誤修正單元106収針對數據為“1’， 的數據位依序執行反向，並檢查是否 可修復的範圍。第4B圖中箭頭，α早70 102 仂。者勃摅頌所私數據位即為反向的數據 位田數據緩衝區103中的數據為Ε 便由ECC單元1〇2將盍*減攸作 十凡ιυζ』修復时 、據〇復，然後修復後的數據透過主 8 201101319 機介面104輸出。 為進-步減少數據修復的時間，本發明 誤數據修復方法’挑選出容易發生錯誤 的動作。 豕I態做反向 如第1圖所*，在燒錄MLC快閃記憶體Ms 記憶體單元時，當記憶體單元由狀態W 體單元的㈣“U”燒制“Ql”，因為記憶心元= 位特性，記憶體單it的狀態須由元階“ U，，經過 = 階“A”、“B”才得以燒錄到位階“c”。由於這樣的g 過程需經過較多的㈣，故容易發生沒有準確燒錄到目^ 位階的情％。如記憶體單元的狀態沒有準確燒錄到位= “C” ，而被錯誤燒錄到位階“B” ，這將造成原本 憶頁的數據應為“Γ卻變成“〇” ，從而產生錯誤數° ΟIn order to reduce the time of repair, the present invention also proposes a second error data repair method to select the data bits of the same value to be reversed, that is, the data of the selected data bits are reversed, and the data bits are "丨". to. Similarly, data with a data bit of 1 can be reversed, and the data bits are not inverted. The user can define the operation. The *4A, 4B drawings are schematic views of the second error data repairing method of the present invention. In Fig. 4A, in the data buffer 1〇3, a 512-bit data is temporarily stored and an error cannot be repaired by the ECC unit 1〇2, and the error correcting unit ι6 is for data. “〇,' the data bits are reversed in sequence, and each time the reverse is reversed, 'ECC early TC102 checks if the data can be repaired. 箭4a in the arrow; the household f data bit is the reverse data bit. When the data buffer When the unit (10) in the area (10) is repaired, that is, the number of error data bits is corrected within the repair capability of the number 2, the correction data is read by the ECC unit 102, and then the corrected data is output through the host interface 1G4. Unit 106 receives the data bits for the data "1', sequentially performs the reverse, and checks if the repairable range. In the arrow in Fig. 4B, α is 70 102 早. The private data bit of the Burgundy data is the reverse data. The data in the data field buffer 103 is Ε, and the ECC unit 1〇2 reduces the 盍* to 十 υζ υζ υζ ” ” ” ” ” The subsequent data is output through the main 8 201101319 machine interface 104. In order to further reduce the time for data repair, the erroneous data repair method of the present invention picks out an action that is prone to error. The 豕I state is reversed as shown in Fig. 1. When the MLC flash memory Ms memory unit is programmed, when the memory cell is "Q" by the (4) "U" of the state W body unit, because the memory heart Element = bit characteristic, the state of the memory single it must be burned to the level "c" by the meta-order "U, after the = "A", "B". Since such g process needs to go through more (4) Therefore, it is easy to occur if there is no accurate burning to the target level. If the state of the memory unit is not accurately burned to the bit = "C", and the error is burned to the level "B", this will cause the original page to be recalled. The data should be "Γ" but become "〇", resulting in a number of errors °
根據以上，本發明提出第三種錯誤修復方法。第5圖 是本發明之第三種錯誤資料修復方法之示意圖。錯誤修正 單元106針對數據緩衝區103中較容易發生錯誤的數據型 態（Data Pattern)作反向的動作。若數據緩衝區1〇3中 的數據為LSB §己憶頁的數據’而發生gee無法修復的情況， 控制器10便將LSB記憶頁所對應的MSB記憶頁中的數據讀 到數據緩衝區103中，如第5圖所示’對比LSB記憶頁= MSB記憶頁，找出對應位皆為“〇”的數據位（亦即上述容 ^發生錯誤的數據型態），再將這些數據位依序反向，並在 每次反向動作後執行檢查。第5圖中箭頭所指方向即為反 向的數據位。若ECC單元1〇2檢查到數據緩衝區1〇3中的 數據能夠修復時，便由ECC單元1〇2將數據修復，然後將 修復的數據透過主機介面104輪出。如此，可大大減少作 9 201101319 業的時間。 復數’ ί發明為利用依序反向相關數據位，再体 復數據的方法。當數據_ =修 的情況，則將數據依序 ㈣據發生ECC ”、、去修復 1或谷易發生錯誤的數據 2 查可修復時:便由财單元啲^右'4 π太二：ί僅，本發明的較佳可行實施例，非因此即局 Ο ^所丄的心利㈣，故舉凡運用本發明說明書及圖示内 ♦ >結構變化’均同理包含于本發明的範圍内。 【圖式簡單說明】 第1圖 $知的MLC型快閃記憶體u s己憶頁的燒錄過程之示意图·，According to the above, the present invention proposes a third error repairing method. Fig. 5 is a view showing the third error data repairing method of the present invention. The error correction unit 106 performs a reverse operation on the data pattern of the data buffer 103 which is more prone to error. If the data in the data buffer 1〇3 is the data of the LSB §Recall page, and the gee cannot be repaired, the controller 10 reads the data in the MSB memory page corresponding to the LSB memory page to the data buffer 103. In the figure, as shown in Figure 5, compare the LSB memory page = MSB memory page, find the data bits whose corresponding bits are "〇" (that is, the data type in which the above error occurs), and then press these data bits. The order is reversed and the check is performed after each reverse action. The direction indicated by the arrow in Figure 5 is the reverse data bit. If the ECC unit 1〇2 checks that the data in the data buffer 1〇3 can be repaired, the data is repaired by the ECC unit 1〇2, and then the repaired data is rotated through the host interface 104. In this way, the time for the 9 201101319 industry can be greatly reduced. The complex ' ̄ invention is a method of reusing the data by sequentially inverting the relevant data bits. When the data _ = repair, then the data in order (four) according to ECC", to repair 1 or valley error data 2 can be repaired: by the financial unit 右 ^ right '4 π too two: ί However, the preferred embodiments of the present invention are not intended to be inconsistent with each other, and therefore, it is within the scope of the present invention to apply the present invention and the structural changes in the drawings. [Simple description of the drawing] Fig. 1 Schematic diagram of the burning process of the MLC-type flash memory us
記憶頁與MSBMemory page with MSB
第2圖：本發明冑子儲存裝f之功能方塊圖； f 3圖：本發明的第—種錯錄據修復方法之示意圖； 第4A、4B圖：本發明之第二種錯誤資料修復方法之示 第5圖.本發明之第三種錯誤資料修復方法之示意圖 【主要元件符號說明】 1 :電子儲存裝置 10 :儲存襄置控制器 101 :微處理器 102 : ECC 單元 103 :數據緩衝區 2011013192 is a functional block diagram of the storage device f of the present invention; FIG. 3 is a schematic diagram of a method for repairing the first error recording data of the present invention; FIG. 4A and FIG. 4B are diagrams showing a second error data repairing method of the present invention. Fig. 5 is a schematic diagram of a third error data repairing method of the present invention. [Main component symbol description] 1: Electronic storage device 10: Storage device controller 101: Microprocessor 102: ECC unit 103: Data buffer 201101319
104 :主機介面 105 :儲存單元介面 106 :錯誤修正单元 11 :儲存單元 11104: Host interface 105: Storage unit interface 106: Error correction unit 11: Storage unit 11