201106385 六、發明說明： 【發明所屬之技術領域】 本發明係關於片形電阻器、尤其關於低電阻器之片形 電阻器和其製造方法。 【先前技術】 最近’因保護過電流對多功能之攜帶機器造成衝擊等 ’多使用電流偵測用之低電阻値之片形電阻器。在此，因 其電阻器之大小’電阻値爲相同，可以檢測至更大的電流 値，故要求增大額定電力。依此，藉由其要求，增大其電 阻器之自行發熱。然後，產生對其電阻器之保護膜且其電 阻器安裝後之印刷配線板等造成損傷之不佳狀況。 因此’ JP-2 006-3 1 3 763 -A係以直接熱擴散在陶瓷基板 1上接合電阻體2，補強零件之機械性強度。 再者’在JP- 1 1 -97203-A揭示有藉由在陶瓷基板藉由 使用銀塡料等之活性化金屬法一體接合電阻體。 並且，在JP-9-320802-A中，也提案適用藉由含有二 氧化矽之無機黏接劑，將電阻箔貼在陶瓷基板之技法的電 阻器。 【發明內容】 發明之槪要 〔發明所欲解決之課題〕 但是，在上述JP-2006-313763-A中，在陶瓷基板接合 201106385 電阻金屬板或箔之時，在高溫 960〜980 °C ，氧濃度爲 5 Oppm以下之雰圍，藉由熱擴散接合係假設有量產設備也 成爲大規模的問題。並且，因將電阻値之調節在電阻器之 寬度之容許範圍內調節切斷寬度，故難以容易機械性切斷 電阻金屬板和陶瓷。再者，在上述高溫之處理中，也有電 阻金屬板之電特性惡化之情形。 再者，JP-U-972 03-A適用於將電阻金屬板或箔接合 於陶瓷基板之時，適用使用銀塡料之活性化金屬法。此時 ，雖然無記載與JP-2006-3 1 3 763-A相同之具體溫度等之條 件，但假設被曝露於8 0 0 °C左右之溫度的情形。依此，有 與JP-2006-313763-A相同之問題。 並且，在JP-9-32〇8 02-A中，從基板之上面至側面， 經以二氧化矽爲主成分之無機黏接劑設置有電阻箔。然後 ，敘述電阻値之調節藉由雷射修整而形成開口來執行。但 是’在該態樣中，假設當以電阻値之調節在電阻箔形成開 口時’則在其部份產生電流集中，以致電阻器之壽命特性 降低。 因此，本發明係爲了解決上述問題點而所硏究出，其 課題在於提供可以檢測更大之電流，提升高電性耐久性， 和獨立自主性之機械性強度的低電阻之片形電阻器。在此 ，使本片形電阻器持有上述獨立自主性，係指保有爲了要 藉由搭載機安裝本片形電阻器的充分機械性強度，再者， 高電性耐久性係指即使大電流也充分通用。因此，即使於 通大電流之時’亦可以取得降低其電阻器之表面溫度之基 -6- 201106385 板或電阻膜，和一面更縮小體積一面具有獨立自主性之電 阻層構造之低電阻的片形電阻器。 再者，本發明之其他課題係貼合基板和電阻層，使用 端面電極或依所需設置有保護膜之帶狀者，因增強本電阻 器之電性耐久性，故不在電阻層設置由於修整痕所產生之 電流集中部，取而代之，係藉由調整帶狀之長邊方向的切 斷寬度而因應電阻値在事先所設定之寬度切斷，則可以利 用容易且快速之方法製造出高精度之本電阻器。 〔用以解決課題之手段〕 本發明之申請專利範圍第1項的低電阻之片形電阻器 ，爲用以解決上述課題，其主旨爲：由分別在基板表背兩 面形成電阻層，在其表背兩面之中央部形成保護膜，並在 上述電阻層上之上述保護膜之兩側配置表電極和背電極， 並且在上述基板、電阻膜及表背電極之兩端形成端面電極 者所構成，上述基板爲在內部分散陶瓷粉之絕緣樹脂或橡 膠製，而且將上述電阻層設爲金屬板或金屬箔中之任一者 〇 在此，就以上述電阻層之金屬板或金屬箔而言，有錳 、鎳鉻、鐵·鉻·鋁之單體或該些合金。其中，金屬板係 指O.lmm以上，金屬箔爲低於0.1mm。該係藉由所期待之 電阻値，設定以低電阻金屬板之種類所特定之體積電阻率 和其厚度。依此，如此一來藉由電阻膜之厚度可考慮各種 板和箔。再者，就以在內部分散基板之陶瓷粉的絕緣樹脂 201106385 或橡膠而言’除丙烯酸系樹脂之外，還有從環氧系樹脂、 氯丁橡膠、丁基橡膠、氨基甲酸乙酯橡膠、丁腈橡膠、苯 乙烁·丁二烯橡膠、聚酯系樹脂、聚氯乙烯、聚氨酯樹脂 、砂氧樹脂、苯酚樹脂、醯胺系樹脂、醯亞胺系樹脂、纖 維質樹脂、ABS樹脂中選擇一個以上。並且，上述電阻層 使用錳、鎳鉻、鐵.鉻.鋁之單體或該些合金。並且，作 爲保護膜之原料’可考慮環氧樹脂、聚醯亞胺樹脂、矽氧 樹脂等，表電極係在電阻層上從下依序藉由例如電鍍以鍍 銅、鍍鎳、鍍錫膜所形成，在端面電極，從下在依據例如 濺鑛法所構成之鎳鉻膜或導電性樹脂糊所產生之膜上藉由 電鍍法由鍍銅、鍍鎳、鍍錫膜所構成。 上述本發明之申請專利範圍第3項的低電阻之片形電 阻器之製造方法，係在內部分散陶瓷粉之帶狀絕緣樹脂或 橡膠製基板之表背兩面疊層由金屬板或金屬箔所構成之電 阻層’且在該疊層之帶狀之表背兩面之長邊方向中央部形 成保護膜，並在該保護膜之兩側之上述電阻層上形成表電 極和背電極，並且在上述基板、電阻膜及表背電極之兩端 形成端面電極之後，能夠在上述帶狀之長邊方向交叉而切 斷成特定寬度。 該發明爲申請專利範圍第1項之低電阻之片形電阻器 之製造方法，其特徵爲適用在帶狀基板之表背兩面形成電 阻層和保護膜，然後將在該些兩側形成有表背電極和端面 電極之帶狀者，在長邊方向交叉而切斷成事先所設計之長 度（特定寬度）之技法。 -8- 201106385 作爲本發明之其他方法之申請專利範圍第4項，係上 述申請專利範圍第3項中，在上述帶狀之絕緣樹脂或橡膠 製基板疊層上述電阻層之方法，爲加熱上述金屬板或金屬 箔中之任一者的電阻層而貼在上述基板之方法，而且藉由 較在後工程中製作出之保護膜所處的中央部更大加壓的輥 軋，疊層上述所疊層之帶狀的長邊方向兩端部。 該發明係藉由將所疊層之長邊方向兩端部加壓較中央 部大，使較疊層體之兩端側更向內部方向一體化》 作爲本發明之另外方法之申請專利範圍第5項，係上 述申請專利範圍第3項中，在上述帶狀之絕緣樹脂或橡膠 製基板疊層上述電阻層之方法，爲加熱上述金屬板或金屬 箔中之任一者的電阻層而貼在上述基板之方法，而且藉由 較其兩端更大加壓的輥軋，疊層在上述所疊層之帶狀的後 工程中產生之保護膜所處之長邊方向之中央部。 該發明係藉由將所疊層之長邊方向之中央部加壓較兩 端部大，使兩端側較疊層體之中央部更充分一體化。 再者，就以本發明之申請專利範圍第2項而言，係由 在電阻層之表背兩面之中央部形成基板，在上述基板之兩 端的上述電阻層上，配置表電極和背電極，並且在上述電 阻層和基板之兩端形成端面電極者所構成，上述基板爲在 內部分散陶瓷粉之絕緣樹脂或橡膠製，而且將上述電阻層 設爲金屬板或金屬箔中之任一者。 上述申請專利範圍第2項之發明係申請專利範圍1之 基板和電阻層相反，而且其基板亦具有保護膜之功能，較 -9 - 201106385 申請專利範圍第1項之構成更爲單純化。 上述申請專利範圍第2項之本發明的低電阻之片形電 阻器之製造方法’其特徵爲：在金屬板或金屬箔之任一之 帶狀電阻層之表背兩面之長邊方向中央部，加熱上述電阻 層’而貼上內部分散陶瓷粉之絕緣樹脂或橡膠製基板，在 上述基板之兩側之上述電阻層上形成表電極和背電極，並 且於在上述電阻層和基板兩端形成端面電極之後，能夠在 上述帶狀之長邊方向交叉而切斷成特定寬度。 該申請專利範圍第6項爲該申請專利範圍第2項之低 電阻之片形電阻器之製造方法。 〔發明效果〕 本發明之特徵係亦可以檢測更大之電流，提升高電性 耐久性和獨立自主性之機械性強度，並且於電流通電時降 低低電阻之片形電阻器之保護膜或基板上之表面溫度。爲 了達到其效果，本發明之基板適用在內部分散陶瓷粉之絕 緣樹脂或橡膠製之絕緣樹脂。並且，可以迴避以往電阻層 在整修溝間集中電流而成爲降低適用其絕緣樹脂之低電阻 之片形電阻器之電性耐久性之主要原因，並且以迅速且容 易之方法製造出。 【實施方式】 將低電阻之片形電阻器以設爲薄厚度之小型之低電阻 爲前提，並且使此持有獨立自主性而提升機械性強度，以 -10- 201106385 達到提升耐久性。 再者，在該發明方法中，貼合帶狀基板和電阻層，將 在此設置保護膜和表背電極及端面電極者，或是在電阻層 和基板設置表背電極和端面電極者，在其帶狀之長邊方向 交叉而以特定寬度切斷而製造出。 〔實施例1〕 針對本發明之低電阻之片形電阻器之構成，以下說明 〇 第1圖（a )和（b )係以體積比7比3分散屬於陶瓷 粉之一種的氧化鋁粉於環氧樹脂中之絕緣基板之長條物之 斜視圖，和其橫剖面圖。在該些圖中，於厚度0.3 mm、寬 度4.3 mm之帶狀之數m程度之基板1之表背兩面，疊層 有厚度0.05mm、寬度6.3mm之帶狀的數m左右之長度的 電阻層2之鐵•鉻•鋁合金製之金屬板。在該電阻膜之上 下兩側之中央部長邊方向，利用網版印刷法將環氧樹脂之 保護膜3形成10/zni左右之厚度，在上下之保護膜3之兩 側之電阻層2上經設置在基板1和電阻層2之端部之端面 電極4-2，分別聚合表背電極4-1、4-3。 並且，上述各層狀之長條物係切斷成第1圖（a)所 示之3 _ 2mm而完成本發明之低電阻之片形電阻器。 並且，如第7圖之曲線圖所示般，表示使本發明之低 電阻之片形電阻器通電相當於0.5W、1W、1.5W、2W之 各電力的電流之時，所產生之電阻器之保護膜表面之溫度 -11 - 201106385 在內部分散陶瓷粉之絕緣樹脂或橡膠製之絕緣 時（A )，和作爲以往品的在內部不分散陶瓷 脂或橡膠製之絕緣樹脂基板之時（B )有所差 結果，可知通電相當於上述各電力之電流之時 表面溫度，較以往之陶瓷基板本發明之基板中 的陶瓷粉則具有耐熱釋放之效果。 接著，針對本發明之低電阻之片形電阻器 ，記載如下。 實施例1 -1 第3圖（a)和（b)之1〜4爲表示上述 第1圖之低電阻之片形電阻器之製造程序的一 和其橫剖面圖。 圖（a) -1、 （b) -1爲在環氧系樹脂之中 化鋁粉之絕緣板1，圖（a) -2、（b) -2係在 電阻層之鐵•鉻•鋁合金製金屬板，在150°C产 後在2hPa〜3hPa之範圍加壓而予以輥軋，在 b ) -3中，又在上下中央部網版印刷上述環 1 5 0°C〜2 5 0 °C之溫度烘烤，在（a ) -4、 （ b ). 端部依序浸漬在鉻•鎳製之溶液中而予以烘烤 (a) -4所不般在長邊方向交叉裁斷加工成決 阻値之寬度’例如每3.0 m m〜3 . 3 m m。 實施例1-2 樹脂基板之 粉之絕緣樹 異。藉由其 之保護膜之 混入有分散 之製造方法 實施例1之 部分斜視圖 分散混合氧 其表背貼上 - 200°C加熱 (a)-3、( 氧樹脂而以 .4中，將兩 ，最後，如 定成特定電 -12- 201106385 第4圖所示之實施例爲上述（實施例1 - 1 )之變形例 〇 該實施例與（實施例1-1)不同的是於在絕緣基板1 加熱電阻膜2而予以輥軋之時’使兩端部較寬度方向之中 央部強壓，即是中央部以1 5 h P a ’兩側以3 h P a加壓而予以 輥軋。 實施例1-3 第5圖所示之實施例係表示與上述（實施例1-1)或 (實施例1 -2 )又另外的變形例。 該實施例與（實施例1-〗）或（實施例1-2)不同的是 於在絕緣基板加熱電阻層2而予以輥軋之時，與上述（實 施例1-2 )相反在寬度方向之兩端部以1.5hPa，在中央部 以3hPa加壓而予以輥軋。 實施例2 第2圖（a )和（b )爲與上述實施例不同之電阻器， 在同圖中，以電阻層2而言，係在厚度〇_lmm、寬度 6.3mm之帶狀之數m左右之大小之鐵•鉻·鋁合金製之金 屬板之上下中央部，疊層將陶瓷粉分散於環氧樹脂之中的 絕緣基板1。 並且，在上下基板之上下兩側，經位於電阻層2之兩 端部的端面電極4-2於上下具有表和背之各電極。 -13- 201106385 實施例2-1 第6圖所示之實施例爲上述實施例2之製造方法。 鐵.鉻•鋁合金製金屬板之電阻層2之表背中央部， 在150°C〜200°C加熱以體積比7:3將氧化鋁粉分散混合至 > 環氧系樹脂中之絕緣基板1，並予以輥軋而疊層，且在其 基板之兩側之電阻層之上下網版印刷表和背電極4-1和4-3，在150 °C〜250 °C加熱後將長條之兩端部依序浸漬至鉻 •鎳製之溶液中而予以烘烤，最後如（b ) -4圖所示般， 以3.0mm〜3.3mm之寬度予以裁斷加工。 〔產業上之利用可行性〕 作爲低電阻之片形電阻器被利用。 【圖式簡單說明】 第1圖（a)和（b)爲製造本發明之低電阻之片形電 阻器之一部分帶狀之槪略斜視圖和其橫剖面圖。 第2圖（a)和（b)爲製造與第1圖不同之實施例的 低電阻之片形電阻器的一部分帶狀之槪略斜視圖和橫剖面 圖。 第3圖（a) -1〜4及（b) -1〜4爲表示第1圖之低電 阻之片形電阻器之製造程序的說明圖。 第4圖（a) -1〜4及（b) -1〜4爲表示與第3圖不同 之製造程序的說明圖。 第5圖（a) -1〜4及（b) -1〜4爲表示與第3圖或第 -14- 201106385 4圖不同之低電阻之片形電阻器之製造程序的說明圖。 第6圖（a) -1〜3及（b) -1〜4爲表示第2圖之低電 阻之片形電阻器之製造程序的說明圖。 第7圖爲比較使用本發明之絕緣基板和以往品之絕緣 基板之電阻器的表面溫度之曲線圖。 【主要元件符號說明】 1 :絕緣基板 2 :電阻層 3 :保護膜 4-1 :表電極 4_2 :端面電極 4-3 :背電極 -15-201106385 VI. Description of the Invention: [Technical Field] The present invention relates to a chip resistor, particularly a chip resistor of a low resistor, and a method of fabricating the same. [Prior Art] Recently, a low-resistance chip resistor for current detection has been used because of the protection against overcurrent and the impact on a multi-functional portable device. Here, since the size of the resistor 'resistance 値 is the same, a larger current 可以 can be detected, so it is required to increase the rated power. Accordingly, by its request, the self-heating of its resistor is increased. Then, a poor condition in which the protective film of the resistor is applied and the printed wiring board after the resistor is mounted is damaged. Therefore, JP-2 006-3 1 3 763 -A bonds the resistor 2 to the ceramic substrate 1 by direct thermal diffusion to reinforce the mechanical strength of the component. Further, JP-A 1 -97203-A discloses that a resistor is integrally bonded to a ceramic substrate by an activated metal method using a silver crucible or the like. Further, in JP-9-320802-A, a resistor of a technique in which a resistor foil is attached to a ceramic substrate by an inorganic binder containing ruthenium oxide is also proposed. SUMMARY OF THE INVENTION [Problem to be Solved by the Invention] However, in the above-mentioned JP-2006-313763-A, when a ceramic substrate is bonded to a resistive metal plate or foil of 201106385, at a high temperature of 960 to 980 ° C, An atmosphere having an oxygen concentration of 5 Oppm or less is assumed to have a mass production problem by a thermal diffusion bonding system. Further, since the adjustment of the resistance 値 is adjusted within the allowable range of the width of the resistor, it is difficult to mechanically cut the resistance metal plate and the ceramic. Further, in the above high temperature treatment, the electrical characteristics of the resistive metal plate may be deteriorated. Further, when JP-U-972 03-A is suitable for bonding a resistive metal plate or foil to a ceramic substrate, an activated metal method using a silver ruthenium material is suitable. At this time, although the conditions of the specific temperature and the like which are the same as those of JP-2006-3 1 3 763-A are not described, it is assumed that the temperature is exposed to a temperature of about 80 °C. Accordingly, there is the same problem as JP-2006-313763-A. Further, in JP-9-32〇8 02-A, a resistor foil is provided from the upper surface to the side surface of the substrate via an inorganic binder mainly composed of cerium oxide. Then, the adjustment of the resistance 値 is performed by laser trimming to form an opening. However, in this case, it is assumed that when the opening of the resistor foil is formed by the adjustment of the resistance ’, current concentration is generated in the portion thereof, so that the life characteristics of the resistor are lowered. Accordingly, the present invention has been made in order to solve the above problems, and an object thereof is to provide a low-resistance chip resistor capable of detecting a larger current, improving high electric durability, and independent mechanical strength. Here, the above-mentioned independent autonomy of the sheet-shaped resistor means that sufficient mechanical strength for mounting the sheet-shaped resistor by the mounting machine is maintained, and further, high-electricity durability means that even a large current is used. Fully versatile. Therefore, even when the current is large, a base--6: 201106385 plate or a resistive film which lowers the surface temperature of the resistor can be obtained, and a low-resistance sheet shape having a self-consistent resistance layer structure on the side of a smaller volume side can be obtained. Resistor. Further, another subject of the present invention is to laminate a substrate and a resistive layer, and to use an end surface electrode or a strip having a protective film as required, and to enhance the electrical durability of the resistor, it is not disposed in the resistive layer due to trimming. Instead of changing the cutting width in the longitudinal direction of the strip and adjusting the width of the resistor 値 at a predetermined width, the current concentration portion generated by the trace can be manufactured with high precision by an easy and rapid method. This resistor. [Means for Solving the Problem] The low-resistance chip resistor according to the first aspect of the present invention is to solve the above problems, and the object of the invention is to form a resistive layer on each of the front and back surfaces of the substrate. A protective film is formed on a central portion of both sides of the front surface, and a surface electrode and a back electrode are disposed on both sides of the protective film on the resistive layer, and an end surface electrode is formed on both ends of the substrate, the resistive film, and the front and back electrodes. The substrate is made of an insulating resin or a rubber in which ceramic powder is dispersed, and the resistor layer is made of a metal plate or a metal foil, and the metal plate or the metal foil of the above-mentioned resistance layer is used. There are monomers of manganese, nickel chromium, iron · chromium · aluminum or these alloys. Wherein, the metal plate means O.lmm or more, and the metal foil is less than 0.1 mm. The volume resistivity specified by the type of the low-resistance metal plate and the thickness thereof are set by the expected resistance 値. Accordingly, various plates and foils can be considered by the thickness of the resistive film. In addition, the insulating resin 201106385 or the rubber which disperses the ceramic powder of the substrate internally includes, in addition to the acrylic resin, an epoxy resin, a neoprene rubber, a butyl rubber, a urethane rubber, Nitrile rubber, styrene-butadiene rubber, polyester resin, polyvinyl chloride, polyurethane resin, sand oxide resin, phenol resin, guanamine resin, quinone imine resin, cellulosic resin, ABS resin Choose more than one. Further, the above resistance layer is made of a monomer of manganese, nickel chromium, iron, chromium, aluminum or these alloys. Further, as a raw material of the protective film, an epoxy resin, a polyimide resin, a silicone resin, or the like can be considered, and the surface electrode is plated on the resistive layer by, for example, electroplating to form copper, nickel plating, or tin plating film. The formed end face electrode is formed of a copper plating, a nickel plating, and a tin plating film by a plating method from a film produced by a nickel-chromium film or a conductive resin paste composed of, for example, a sputtering method. The method for manufacturing a low-resistance chip resistor according to the third aspect of the invention of the present invention is to laminate a metal plate or a metal foil on the front and back sides of a strip-shaped insulating resin or a rubber substrate in which ceramic powder is internally dispersed. Forming a resistive layer' and forming a protective film at a central portion in the longitudinal direction of both sides of the strip-shaped back surface of the strip, and forming a surface electrode and a back electrode on the resistive layer on both sides of the protective film, and After the end faces are formed at both ends of the substrate, the resistive film, and the front and back electrodes, they can be cut into a specific width in the longitudinal direction of the strip shape. The invention is a method for manufacturing a low-resistance chip resistor according to claim 1, which is characterized in that a resistive layer and a protective film are formed on both sides of the front and back of the strip substrate, and then a table is formed on both sides of the strip substrate. A technique in which the strips of the back electrode and the end surface electrode are cut in the longitudinal direction and cut into a previously designed length (specific width). In the fourth aspect of the invention, in the third aspect of the invention, the method of laminating the resistive layer on the strip-shaped insulating resin or rubber substrate is to heat the above a method of attaching a resistive layer of any one of a metal plate or a metal foil to the above-mentioned substrate, and laminating the above by a more pressurized rolling at a central portion of the protective film produced in the subsequent work Both ends of the strip shape in the longitudinal direction are laminated. According to the invention, the both end portions in the longitudinal direction of the laminate are pressed to be larger than the central portion, so that the both end sides of the laminate are more integrated in the inner direction, and the patent application scope is another method of the present invention. According to a third aspect of the invention, in the third aspect of the invention, the method of laminating the resistive layer on the strip-shaped insulating resin or rubber substrate is to heat the resistive layer of any one of the metal plate or the metal foil. In the method of the above-mentioned substrate, the center portion in the longitudinal direction in which the protective film is formed in the laminated strip-shaped post-engineering process is laminated by rolling with a larger pressure at both ends. According to the invention, the central portion in the longitudinal direction of the laminate is pressed more than the both end portions, and the both end sides are more fully integrated with the central portion of the laminate. Further, in the second aspect of the patent application scope of the present invention, the substrate is formed at a central portion of the front and back surfaces of the resistive layer, and the surface electrode and the back electrode are disposed on the resistive layer at both ends of the substrate. Further, the electrode layer is formed by forming an end surface electrode at both ends of the resistor layer and the substrate. The substrate is made of an insulating resin or a rubber in which ceramic powder is dispersed, and the resistor layer is either a metal plate or a metal foil. The invention of the second aspect of the above-mentioned patent application is the reverse of the substrate and the resistance layer of the patent application range 1, and the substrate also has the function of a protective film, which is more simplistic than the composition of the first item of the patent application -9 - 201106385. The method for producing a low-resistance chip resistor of the present invention according to the second aspect of the invention is characterized in that: in the central portion of the longitudinal direction of the front and back surfaces of the strip-shaped resistive layer of either of the metal plate or the metal foil a heating resin or a rubber substrate on which the internal resistance ceramic layer is heated, a surface electrode and a back electrode are formed on the resistance layer on both sides of the substrate, and formed on both ends of the resistance layer and the substrate After the end surface electrode, it can be cut into a specific width in the longitudinal direction of the strip shape. The sixth aspect of the patent application is a method of manufacturing a low-resistance chip resistor of item 2 of the patent application. [Effect of the Invention] The present invention is also capable of detecting a larger current, improving the mechanical strength of high electrical durability and independent autonomy, and lowering the protective film or substrate of the low-resistance chip resistor when the current is energized. Surface temperature. In order to achieve the effect, the substrate of the present invention is suitably used as an insulating resin for internally dispersing ceramic powder or an insulating resin made of rubber. Further, it is possible to avoid the fact that the conventional resistive layer concentrates current between the trimming grooves and becomes a factor for lowering the electrical durability of the low-resistance chip resistor to which the insulating resin is applied, and is manufactured quickly and easily. [Embodiment] A low-resistance chip resistor is premised on a small-sized low-resistance of a thin thickness, and this has an independent autonomy to improve the mechanical strength, and the durability is improved by -10-201106385. Furthermore, in the method of the present invention, the strip substrate and the resistive layer are bonded, and the protective film, the front and back electrodes, and the end surface electrode are provided here, or the back surface electrode and the end surface electrode are provided on the resistive layer and the substrate. The strip shape has a long side direction and is cut at a specific width to be manufactured. [Embodiment 1] The composition of the low-resistance chip resistor of the present invention will be described below. Fig. 1 (a) and (b) are dispersions of alumina powder belonging to one type of ceramic powder at a volume ratio of 7 to 3. An oblique view of a strip of an insulating substrate in an epoxy resin, and a cross-sectional view thereof. In these figures, a resistor having a length of about several m in thickness of a strip having a thickness of 0.05 mm and a width of 6.3 mm is laminated on both the front and back sides of the substrate 1 having a thickness of 0.3 mm and a width of 4.3 mm. Layer 2 iron • Chromium • Aluminum alloy sheet. On the upper side of the upper and lower sides of the resistive film, the protective film 3 of the epoxy resin is formed into a thickness of about 10/zni by screen printing, and is formed on the resistive layer 2 on both sides of the upper and lower protective films 3. The end surface electrodes 4-2 provided at the end portions of the substrate 1 and the resistance layer 2 are respectively polymerized to the front and back electrodes 4-1 and 4-3. Further, each of the above-mentioned layered elongated strips is cut into 3 _ 2 mm as shown in Fig. 1(a) to complete the low-resistance chip resistor of the present invention. Further, as shown in the graph of Fig. 7, the resistor is generated when the low-resistance chip resistor of the present invention is energized with a current corresponding to each of 0.5W, 1W, 1.5W, and 2W. Temperature of the surface of the protective film -11 - 201106385 When the insulating resin of the ceramic powder or the insulation of the rubber is dispersed (A), and when the insulating resin substrate made of ceramic grease or rubber is not dispersed inside the conventional product (B) As a result of the difference, it is understood that the surface temperature at which the current is equivalent to the current of each of the above-described electric powers has an effect of releasing heat compared with the ceramic powder in the substrate of the present invention. Next, the low-resistance chip resistor of the present invention will be described below. Embodiment 1 - 1 FIGS. 3(a) and 1(b) are a cross-sectional view showing a manufacturing procedure of the low-resistance chip resistor of the first drawing. Fig. (a) -1, (b) -1 are insulating sheets 1 of aluminum powder in an epoxy resin, and Figs. (a) - 2, (b) - 2 are iron and chromium in the resistive layer. The alloy metal plate is pressed and pressed in the range of 2hPa to 3hPa after being produced at 150 ° C, and in the b) -3, the ring is printed on the upper and lower central portions 150 ° C ~ 2 5 0 Baking at a temperature of °C, in the (a) -4, (b). The end is sequentially immersed in a solution made of chromium and nickel and baked (a) -4 is not cut in the long-side direction. The width of the barrier is 'for example, every 3.0 mm to 3. 3 mm. Example 1-2 Insulation of a resin substrate. By the method of the dispersion of the protective film, the partial oblique view of the embodiment 1 is dispersed and mixed with oxygen, and the back surface is attached with -200 ° C heating (a) -3, (oxygen resin to .4, two Finally, the embodiment shown in FIG. 4 is a modification of the above (Embodiment 1-1). This embodiment is different from (Example 1-1) in insulation. When the substrate 1 is heated and rolled, the both end portions are strongly pressed at the center portion in the width direction, that is, the center portion is pressed at a pressure of 3 h Pa for both sides of 15 h P a ', and is rolled. Embodiment 1-3 The embodiment shown in Fig. 5 shows still another modification with the above (Embodiment 1-1) or (Embodiment 1-2). This embodiment and (Embodiment 1-) or (Example 1-2) When the insulating substrate was heated and rolled by the insulating layer 2, it was 1.5 hPa at both ends in the width direction as opposed to the above (Example 1-2). 3hPa is pressed and rolled. Embodiment 2 Figs. 2(a) and (b) are resistors different from the above embodiment. In the same figure, in the case of the resistive layer 2, it is thick. 〇_lmm, a strip of a width of 6.3 mm, a strip of iron, a chrome, an aluminum alloy, a metal plate, a lower central portion, and an insulating substrate 1 in which ceramic powder is dispersed in an epoxy resin. On the upper and lower sides of the upper and lower substrates, the end electrodes 4-2 located at both ends of the resistive layer 2 have electrodes on the top and bottom of the top and bottom. -13- 201106385 Example 2-1 Implementation shown in Fig. 6 For example, the manufacturing method of the above embodiment 2. The central portion of the front and back of the resistive layer 2 of the iron plate of iron, chromium, and aluminum alloy is heated at 150 ° C to 200 ° C to disperse and mix the alumina powder at a volume ratio of 7:3. To the insulating substrate 1 in the epoxy resin, which is laminated by rolling, and the screen printing table and the back electrodes 4-1 and 4-3 are over 150 on the resistive layers on both sides of the substrate, at 150 After heating at °C~250 °C, the two ends of the strip are sequentially immersed in a solution made of chromium/nickel and baked. Finally, as shown in (b) -4, 3.0mm~3.3mm Width is cut and processed. [Industrial use feasibility] It is used as a low-resistance chip resistor. [Simplified illustration] Figure 1 (a) And (b) is a schematic oblique view of a portion of the strip resistor of the low resistance of the present invention and a cross-sectional view thereof. Fig. 2 (a) and (b) are manufacturing different from the first embodiment. A portion of the low-resistance chip resistor of the example is taken as a diagonal oblique view and a cross-sectional view. Fig. 3 (a) -1 to 4 and (b) -1 to 4 are low resistances of Fig. 1 4(a) - 1 to 4 and (b) - 1 to 4 are explanatory views showing a manufacturing procedure different from that of Fig. 3. Fig. 5 (a) - 1 to 4 and (b) - 1 to 4 are explanatory views showing a manufacturing procedure of a chip resistor having a low resistance different from that of Fig. 3 or Fig. 14-201106385. Fig. 6 (a) - 1 to 3 and (b) - 1 to 4 are explanatory views showing a manufacturing procedure of the chip resistor of the low resistance shown in Fig. 2. Fig. 7 is a graph comparing the surface temperatures of resistors using the insulating substrate of the present invention and the insulating substrate of the prior art. [Explanation of main component symbols] 1 : Insulating substrate 2 : Resistive layer 3 : Protective film 4-1 : Surface electrode 4_2 : End surface electrode 4-3 : Back electrode -15-