201040926 六、發明說明： - 【發明所屬之技術領域】 . 本案提出一種用於顯示裝置的驅動電路及其驅動方法，特別 是用於場序色彩(field sequential color)技術的液晶顯示裝置的驅動 電路及其驅動方法。 【先前技術】 ❾ 傳統上，薄膜電晶體液晶顯示裝置(Thin-Film-Transistor Liquid201040926 VI. Description of the invention: - [Technical field to which the invention pertains] The present invention proposes a driving circuit for a display device and a driving method thereof, particularly a driving circuit for a liquid crystal display device for field sequential color technology And its driving method. [Prior Art] ❾ Traditionally, thin film transistor liquid crystal display device (Thin-Film-Transistor Liquid
Crystal Display ’ 簡稱 TFT-LCD)皆需要彩色濾光片（c〇i〇r fllter)，來 產生紅(R)、綠(G)、藍(B)三原色。當白光背光源的光穿過彩色濾 光片後，整個光強度被滤掉或吸收掉約70%的光，所以光通過彩 色濾光片的光利用率僅約30%，造成大量的電能損耗。同時，由 於彩色濾光片較低的色彩純度，造成較窄的色域(c〇1〇r gamma domain) ° 〇 目前新興的場序色彩(field sequential c〇1〇r，簡稱FSC)技術由 於不需要彩色遽光片’所以可以消耗非常低的電能。另一方面， 傳統的液晶齡裝置巾的每-晝素必須包含3個次晝素，其分別 需RGB二種顏色的彩色濾光片，但若採用FSC技術，則每一晝素 不必再包含3個次晝素，因此在製作TFT時，晝素便可以輕易地 達到3倍㈣細度’可應用於可攜式峨示產品它高密度畫 素(highPixelPerlnch，簡稱高m)的顯示產品。Crystal Display' (TFT-LCD) requires a color filter (c〇i〇r fllter) to produce three primary colors of red (R), green (G), and blue (B). When the light of the white light backlight passes through the color filter, the entire light intensity is filtered out or absorbs about 70% of the light, so the light utilization rate of the light passing through the color filter is only about 30%, causing a large amount of power loss. . At the same time, due to the lower color purity of the color filter, a narrow color gamut (c〇1〇r gamma domain) is caused. 〇 The current field sequential c〇1〇r (FSC) technology is due to No color enamel is required' so it can consume very low power. On the other hand, the traditional liquid crystal age device towel must contain 3 secondary halogens, which respectively require RGB color filters of two colors, but if FSC technology is used, each element does not need to be included. 3 secondary halogens, so when making TFTs, the halogen can easily reach 3 times (four) fineness' can be applied to the display products of high-density pixels (high-meter pixels).
FSC技術通吊使用RGB三種顏色的發光二極體①幽 mitting Diode簡稱LED)做為背光源，此RGB三種顏色的LED 3 201040926 輪流閃亮，利用視覺暫留來混光，以顯示出各種顏色。舉例來說，The FSC technology uses a RGB three-color light-emitting diode (LED) to be used as a backlight. The RGB three-color LED 3 201040926 turns flashing, using visual persistence to mix light to display various colors. . for example,
• 若以往為60 Hz的顯示方式，即每1/60秒顯示一晝面，採用FSC - 技術則必須使用180 Hz的顯示方式，即每1/180秒就必須顯示一 晝面。因此，此時便往往會發生液晶反應速度不夠快的情況，而 嚴重影響到晝面品質。 因此，目前亟需新的技術或方法來解決液晶反應速度不夠快 的問題。本發明團隊經深入研究分析，及無數次實驗及改良，終 〇 於開發城新的電路結構及其驅動方法，並經多次驗證，能有效 解決上述問題，滿足FSC快速顯示晝面的要求。 【發明内容】 本發明提供-種用於顯示裝置的驅動電路，具有縮短掃描 時間’以加快液晶反應速度，並減少電力損耗的優點。 本案提供一種顯示裝置之晝素結構，其包括：一、 Ο 第—資料線;一畫素電晶體’分別電性連接: 弟貝枓線與一驅動電路，其中該驅動電路包含： 二電極端及一第，端，其中該第-電晶體 包括-閘極、—第—電極端及—第二電極端，其中 -電曰曰體的該職電連賴f 1 極端分別與該第一電Μ 〃料―和該第二電 接Ή锋 Β⑽的該第二電極端及該第二_線電連 钱，以及-第_電容，具有 天电連 容的該第一端法过楚_ 弟一鸲，其中該第一電 端和該红端分別與該第一電晶體的該第二電極端及 4 201040926 該第二閘極線電連接。 • 根據上述構想，其中該晝素電晶體包括—閘極、一★ •極端及一第二電極端，其中該晝素電晶體的該閘極斑第電 體的該第二電極端電連接，該晝素電晶體的該第一電晶 端分別電連接該第一資料線和一液晶電容。 ^第二電極 根據上述構想，其中所述的晝素結構更包括一 ο ”第-端及-第二端，其中該儲存電容的該第―端子 素電晶體的該第二電極端電連接。 晝 根據上述構想，其中該儲存電容的該第二端與該 體的該閘極電連接。 ’、—電晶 根據上述構想，其中該液晶電容具有一第一端及 〇 其與====軸編-綱極， 本案另提供一種用於顯示裝置的 一第-閘極線、—第二/轉電路’該顯示裝置包括 該查辛電s η* ρ、，‘、$二祕線及-畫素電晶體， 二閘極線、觀：P⑽㈣料祕線、該第 動電路包括.莖？ v 4晝素電晶體的朗極電連接，該驅 =:二-控制單•儲存單二二:： B年兮^該第一閘極線被去能，而該第二閘極線被致浐 時，動電路透過該儲存單元將第二閘極線!之：= 5 201040926 升該泵電壓大小，並利用該提昇後之電壓開啟該晝素電晶體；以 及-第二控制單元，在一第三時間内，當該第二閘極線被去能， .而該第三_線被致能時，該第二控制單元將該第二閘極線之電 壓拉回至去能電壓。 、 根據上述構想，其中於該第三時間内，該第二控制單元對 該儲存單元之泵電壓進行放電。 根據上述構想’其中於該第一時間内，該第一控制單元 0 時開啟該晝素電晶體。 、根據上述構想，其中於該第一時間内，該第一控制單元用 =開啟該畫素電晶體之電壓大致等於該第—閘極線上之致能電 一根據上述構想’其中於該第一時間内，該資料線上之一第 一晝素資料訊號經由該晝素電晶體寫人該畫素電極。 〇 根據上述構想，其中於該第二時間内，該資料線上之 素資料職經由該晝素電晶體寫人該畫素電極。 其具Γϋ述構Γ其帽第—控解元包含—第—電晶體， 之該閘極“該第；=端及’且該m體 晶體之該第H /極端電連接於該第1極線，而該第一電 以—電極端電連接該晝素電晶體之該閘極。 端盘i康上述構想’其巾該儲存單元為—電容，其呈有一第- 為與一第二端，日甘分姑 /、/、,乐 的該第二電極端㈣第二端分別電連接該第—電晶雜 其具有-閘極述構二f中，二控制單元包含—第二電晶體， 电極端及一第二電極端，且該第二電晶體 6 201040926 之該間極電連接該第三閘極線，而該第二電晶體的該第一和該第 二電極端分職連接該電容之該第1和該第二端。 ，據上述構想，其中於該第三時間内，該第二電晶體將打 開，並對該電容進行放電。 Ο Ο 本案又提供-_於顯稀置的驅動方法，該顯示裝置包括 :_線、—第二閘極線、—第三閘極線、—資料線、一晝 ，電:體及-儲存單元，該晝素電晶體具有一閘極，其具有一間 ’以及具有—第—和第二電極端分職連接該資料線和一 包括:於一第一時間内，致能該第一開極線， 將該晝素電晶體打開，並_儲存單元預充—絲壓；於—第二 =内，去能該第-閘極線，致能該第二閘極線，將該第二_ 細麵…、，細觸後之電壓 該晝素電晶體；以及於—第三時間内，去能該第二間極線， 致戒該第三閘極線，將該第二閘極線之電壓拉回至去能電壓。 根據上述構想，其中所述的方法更包含於該第—時間内， 猎由該貧料線，_晝素電極寫人-第-晝素資料。 根ί上述構想’射所述的方法更包含於該第二時間内， 曰邊貝料線，對該畫素電極寫入一第二晝素資料。 根據上述構想’其中所述的方法更包含於 該儲存單战行觀，簡_二_狀電綠目每 根據上述構想’其中該儲存單元電連接該第 緣 藉由該儲存單元以提昇該第二閑極線上之致能電壓。線並 根據上述構想’其中於該第一時間内，用以開啟該 Β曰體之電壓大致等於該第—閘極線上之致能電壓。 ,、 201040926 _根據上述構想，其中該第一閘極線相鄰於該第二閘極線， • 該第二閘極線相鄰於該第三閘極線。 . 本案得藉由下列詳細說明，俾得更深入之了解。 【實施方式】 [第一實施例] 本實施例提供-種可用於液晶顯示裝置的一種驅動電路，又 0 稱泵電路或閘極電壓調整電路，其能縮短顯示農 播 間或增加液晶反應速率，以大幅提升顯示農置的畫面顯示品質。 請參照圖1，其為本發明第一實施例之畫素結構示意圖。晝素結構 13中包含有一驅動電路，即一泵電路__ circuit)10。泵電路 ⑽適用於顯示裝置(例如液晶顯示器等，圖未示)之畫素結構，較 佳者’其適用於一場序色彩顯示器之晝素結構。栗電路包括第 控制單7L 11及第二控制單元12，栗電路1〇與顯示裝置中的第 ❹-閘極線G】、第二閘極線〇2、第三閘極線 的閉極電連接。在本實施例中，第二閑極料舆第三閉=； 可為相鄰的閘極線’也可為不相鄰的閘極線，例如：間隔一條以 上閘極線等。 ’、 请參照圖2 ’其為本發明一實施例之驅動電壓的時序示意圖。 树明第-實施例中，钱路1G於晝素結構13中之驅動方^和 刼作原理將說明如下。請參照圖i與圖2，首先，在第一時間以 内’當第-閘極線Gl由去能(disable〇rtum_〇ff)狀態被驅動至致能 201040926 (enable or tum-on)狀態時，例如第一閘極線G!之電壓準位由Vgl 提昇至Vgh電壓準位時，亦即在第一時間T1第一閘極線&接收 來自一閘極驅動器(圖未示)之致能訊號。此時，泵電路1〇的第一 控制單元11將晝素電晶體TFTP的閘極電壓Vg由原先的第一電壓• If the display mode is 60 Hz in the past, that is, every 1/60 second is displayed, the FSC-technology must use the 180 Hz display mode, that is, every 1/180 second must display a face. Therefore, at this time, the liquid crystal reaction speed is not fast enough, and the quality of the kneading surface is seriously affected. Therefore, there is a need for new technologies or methods to solve the problem that the liquid crystal reaction speed is not fast enough. After in-depth research and analysis, and numerous experiments and improvements, the team of the invention finally developed the new circuit structure and its driving method in the development city, and after repeated verification, it can effectively solve the above problems and meet the requirements of FSC fast display. SUMMARY OF THE INVENTION The present invention provides a driving circuit for a display device which has the advantage of shortening the scanning time 'to speed up the liquid crystal reaction speed and reducing power loss. The present invention provides a pixel structure of a display device, comprising: a Ο first-data line; a pixel transistor respectively electrically connected: a bismuth line and a driving circuit, wherein the driving circuit comprises: two electrode ends And a first end, wherein the first transistor includes a gate, a first electrode terminal, and a second electrode terminal, wherein the electrical system of the electric body is connected to the first terminal 〃 ― ― 和 和 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― The first electrical terminal and the red terminal are electrically connected to the second electrode end of the first transistor and the second gate line of the 4201040926, respectively. According to the above concept, wherein the halogen transistor comprises a gate, a terminal, and a second electrode terminal, wherein the second electrode terminal of the gate electrode of the halogen transistor is electrically connected, The first transistor end of the halogen crystal is electrically connected to the first data line and a liquid crystal capacitor, respectively. The second electrode is in accordance with the above concept, wherein the halogen structure further includes a first end and a second end, wherein the second electrode end of the first terminal transistor of the storage capacitor is electrically connected. According to the above concept, the second end of the storage capacitor is electrically connected to the gate of the body. The electric crystal capacitor has a first end and a 与 and ==== Axis--------------------------------------------- - pixel transistor, two gate lines, view: P (10) (four) material secret line, the first moving circuit including. stem? v 4 halogen crystal crystal of the pole pole electrical connection, the drive =: two - control list • storage single two Two:: B years 兮 ^ The first gate line is de-energized, and when the second gate line is turned on, the moving circuit transmits the second gate line through the storage unit!: = 5 201040926 liter the pump a voltage magnitude, and using the boosted voltage to turn on the halogen transistor; and - a second control unit, in a third time, When the second gate line is deenergized, and the third _ line is enabled, the second control unit pulls the voltage of the second gate line back to the de-energized voltage. According to the above concept, During the third time, the second control unit discharges the pump voltage of the storage unit. According to the above concept, the first control unit 0 turns on the halogen transistor during the first time. The above concept, wherein in the first time, the first control unit uses the voltage to turn on the pixel transistor to be substantially equal to the enabling current on the first gate line according to the above concept, wherein in the first time The first elementary data signal on the data line is written by the elemental electrode via the halogen crystal. 〇 According to the above concept, in the second time, the data of the data line is via the element The crystal is written by the pixel electrode. The device has a structure in which the cap-control element includes a first-electrode, and the gate "the first; the end and the end" and the H-th of the m-body crystal Extremely electrically connected to the first pole line, and the first An electrical terminal electrically connected to the day of the pixel transistor gate. The above-mentioned concept of the end disk i Kang 'the storage unit is a capacitor, which has a first - and a second end, the second end of the second electrode end (four) of the Japanese, respectively Connecting the first electro-optic crystal having the - gate description two f, the second control unit includes a second transistor, an electrode end and a second electrode end, and the second transistor 6 201040926 is electrically connected The third gate line is connected, and the first and second electrode ends of the second transistor are connected to the first and second ends of the capacitor. According to the above concept, in the third time, the second transistor will be turned on and the capacitor will be discharged. Ο Ο This case provides -_ display driving method, the display device includes: _ line, - second gate line, - third gate line, - data line, one 昼, electricity: body and - storage Unit, the halogen transistor has a gate having a 'and a first- and second electrode ends for joining the data lines and one comprising: enabling the first opening in a first time a polar line, the halogen crystal is turned on, and the storage unit is pre-charged-wire-pressed; in the second==, the first gate line is enabled, the second gate line is enabled, and the second _ fine surface..., the voltage after the fine touch of the halogen crystal; and in the third time, the second electrode line is removed, the third gate line is terminated, and the second gate line is The voltage is pulled back to the de-energized voltage. According to the above concept, the method described above is further included in the first time, and the human-deuterogen data is written by the lean line and the 昼-element electrode. The method described above is further included in the second time, the edge of the bead line, and a second halogen material is written to the pixel electrode. According to the above concept, the method described therein is further included in the storage single battle view, and each of the storage units is electrically connected to the first edge by the storage unit to enhance the first The enabling voltage on the two idle lines. The line is in accordance with the above concept, wherein during the first time, the voltage for turning on the body is substantially equal to the enable voltage on the first gate line. , 201040926 _ According to the above concept, wherein the first gate line is adjacent to the second gate line, • the second gate line is adjacent to the third gate line. The case can be further explained by the following detailed explanation. [Embodiment] [First Embodiment] This embodiment provides a driving circuit which can be used for a liquid crystal display device, and a pump circuit or a gate voltage adjusting circuit, which can shorten the display of the agricultural broadcasting room or increase the liquid crystal reaction rate. In order to greatly improve the display quality of the display of the farm. Please refer to FIG. 1, which is a schematic diagram of a pixel structure according to a first embodiment of the present invention. The halogen structure 13 includes a driving circuit, that is, a pump circuit __circuit 10 . The pump circuit (10) is suitable for a pixel structure of a display device (e.g., a liquid crystal display or the like, not shown), and is preferably applied to a pixel structure of a sequential color display. The pump circuit includes a first control unit 7L 11 and a second control unit 12, and a closed circuit of the first gate-gate line G, the second gate line 〇2, and the third gate line in the display device connection. In this embodiment, the second idler 舆 third closed =; may be adjacent gate lines ' or non-adjacent gate lines, for example, one upper gate line or the like. Referring to Figure 2, there is shown a timing diagram of a driving voltage according to an embodiment of the present invention. In the first embodiment of the present invention, the driving principle and the principle of the driving of the money path 1G in the halogen structure 13 will be explained as follows. Referring to FIG. 1 and FIG. 2, first, when the first gate line G1 is driven to the enable 201040926 (enable or tum-on) state by the disable 〇 rtum_〇 ff state within the first time For example, when the voltage level of the first gate line G! is raised from Vgl to the Vgh voltage level, that is, at the first time T1, the first gate line & receiving from a gate driver (not shown) Can signal. At this time, the first control unit 11 of the pump circuit 1 turns the gate voltage Vg of the halogen transistor TFTP from the original first voltage.
Vi(即低電壓)驅動至第二電壓％ (即高電壓），第二電壓％與第一 電壓％之壓差大致上約略相等於Vgh與Vgi之壓差，亦即於第一 ΟVi (ie, low voltage) is driven to the second voltage % (ie, high voltage), and the voltage difference between the second voltage % and the first voltage % is approximately equal to the voltage difference between Vgh and Vgi, that is, the first Ο
時間τι内，晝素電晶體TFTp之閘極所接收到閘極電壓、將大致 等於第一閘極線Gl上之致能電壓；此時畫素電晶體TFTp將被打 開(turn on)，而資料線〇1上的資料訊號將被寫入至晝素電極e， 這時寫入至晝素電極E的資料訊號，實則為晝素結構13的上一個 晝素的資料訊號。另-方面’在第—時間T1 n電路ι〇亦透 過其内部之—儲存單元預充一泵電壓Vpump，其中該儲存單元可以 例如是—電容(圖未示）。 接著’在第二時間T2内，當第〜_料被去能(disable)， 而第二_! G姻被錄(_)，神第二_線&接收來 =開極驅動器之-致能電壓，此_路㈣透過其内之該儲 了之輕她將第二閉極線仏上之電壓由第二電壓％拉升 τΓΓΓ，並且泵電路1G透過該儲存單元而與晝素電晶體 p的閘極電連接，而晝素電晶體％之_接收到之問極電 g'、對應地由第二電壓％拉升至第三電壓 ^v2拉歧第三賴％之增幅_略料泵輕巾 小。此時畫素電晶體TFTp亦將維持在打開狀態，而資料：上 9 201040926 的資料訊號將持續被寫入至畫素電極E，這時(第二時間T2内)寫 ^ 入至畫素電極Ε的資料訊號’則為晝素結構13實際真正的資料訊 -號。雖然，第一時間Τ1内，所寫入的是畫素結構13的上一個畫 素的資料訊號(稱第一晝素資料訊號），但由於Ή的時間很短，在 第二時間T2時，該晝素便得獲得真正的資料訊號(第二畫素資料 訊號)。換言之，本發明泵電路1〇之另一特色即其將使晝素電晶體 TFTp於兩相鄰之致能時間(Τ1和Τ2)内皆被開啟，並先後使畫素電 〇極E寫人-第—晝素資料訊號與—第二晝素資料訊號。 然後’在第三時間丁3内，當第二閘極線g2被去能，而第三 閘極線G3接著被致能，即第三閘極線&接收來自閘極驅動器之 一致旎電壓，此時泵電路10接收閘極線上之致能電壓，並藉 由其内之第二控制單元12將對泵電路1〇裡的儲存單元的聚電壓 進行放電，並將素電晶體TFTp的閘極電壓、以及第二閘極線& 上之電壓由第三電壓V3拉回到第一電壓v ❹ 凊參照圖1〜3’其中圖3為本實施例之顯示裝置的驅動方法流 程圖。首先在步驟21中，於一第一時間内，致能該第一閘極線， 將該晝素電晶體打開’並對縣電路内之__儲存單元預充一栗電 壓。接著在步驟22中’於-第二時間内，去能該第一閘極線，致 能該第二閘極線，將該第二閘極線上之致能電壓再提昇該果電壓 之大小，並利用該提昇後之電壓開啟該晝素電晶體。然後在步驟 23中’於-第三時間内，去能該第二閑極、線，致能該第三閘極線， 將該第二閘極線之電壓拉回至去能電壓。 201040926 本實施例所提^的泵電路及其购方法巾，其祕驅動晝素 '電晶體TFIp並使晝素電晶體TFTp S入真正資料訊號的閘極電壓 "、將由原來°认的第二電麗V2再增加泵電壓至第三縣V3，所 以能快速地開啟(或導通)晝素電晶體TFTp，並對應地使得晝紊液 晶更快速地被驅_所要驗置，故能縮短液晶反應時間。對於 採用FSC技術或顯示高速動晝等必須以高頻(例如：⑽Hz)顯示 旦面’而產生液晶反應速度不足，造成畫面出現殘影，而嚴重影 響畫面品⑽問題’本實施例峨出的泵電路能有效解決此一問 題。 本實關中的栗電路可由本領域技術人員做適當的設計，以 執行本實施射的驅財法。在接下來的實施射，將提供一種 驅動電路，也可用麵行本實施辦的驅動方法。 [第二實施例] 〇 請參照圖4，其為本發明第二實施例之晝素結構示意圖。此畫 素結構觸包含有—驅動電路(峨路)，該鷄電路較佳地可適Within time τι, the gate of the TFT120 of the halogen crystal receives the gate voltage, which will be substantially equal to the enable voltage on the first gate line G1; at this time, the pixel transistor TFTp will be turned on, and The data signal on the data line 将1 will be written to the halogen electrode e. At this time, the data signal written to the halogen electrode E is actually the data signal of the previous element of the halogen structure 13. In another aspect, the first time T1 n circuit ι is also pre-charged by a storage unit Vpump, wherein the storage unit can be, for example, a capacitor (not shown). Then 'in the second time T2, when the first ~ material is disabled, and the second _! G marriage is recorded (_), God second _ line & receive = open drive - The voltage, the _lu (4) through which the stored light is light, the voltage of the second closed-pole line is pulled up by the second voltage %, and the pump circuit 1G is transmitted through the storage unit with the halogen crystal The gate of p is electrically connected, and the 昼 电 电 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 g g g g g g g g g g g g g g g g g g g g g g g g The pump has a small towel. At this time, the pixel TFTp will remain in the open state, and the data signal of the upper 9 201040926 will continue to be written to the pixel electrode E, at which time (the second time T2) is written to the pixel electrodeΕ The information signal 'is the actual real information number of the structure of the Alizarin. Although, in the first time Τ1, the data signal of the previous pixel of the pixel structure 13 is written (referred to as the first pixel data signal), since the time of the Ή is very short, at the second time T2, The element will have to obtain a real data signal (second pixel information signal). In other words, another feature of the pump circuit 1 of the present invention is that it will enable the halogen TFT TFTp to be turned on in two adjacent activation times (Τ1 and Τ2), and successively make the pixel electric bucker E write - The first - 昼 资料 data signal and the second 昼 资料 data signal. Then 'in the third time D3, when the second gate line g2 is deenergized, and the third gate line G3 is then enabled, that is, the third gate line & receives the uniform 旎 voltage from the gate driver At this time, the pump circuit 10 receives the enable voltage on the gate line, and discharges the poly voltage of the storage unit in the pump circuit 1 by the second control unit 12 therein, and the gate of the transistor TFTp The voltage of the pole and the voltage on the second gate line & are pulled back to the first voltage v by the third voltage V3. Referring to FIG. 1 to FIG. 3, FIG. 3 is a flowchart of the driving method of the display device of the embodiment. First, in step 21, the first gate line is enabled, the halogen crystal is turned on, and the storage unit in the county circuit is precharged with a voltage. Then in step 22, in the second time, the first gate line is enabled, the second gate line is enabled, and the enable voltage of the second gate line is further increased by the voltage. And using the boosted voltage to turn on the halogen transistor. Then, in step 23, in the third time, the second idle pole, the line is enabled, the third gate line is enabled, and the voltage of the second gate line is pulled back to the de-energized voltage. 201040926 The pump circuit and the method for purchasing the same according to the embodiment, the secret driving the crystal TFIp and the gate voltage of the halogen crystal TFTp S into the real data signal, will be recognized by the original The second electric V2 increases the pump voltage to the third county V3, so it can quickly turn on (or turn on) the halogen TFT TFTp, and correspondingly make the 昼 液晶 liquid crystal faster to be driven, so the liquid crystal can be shortened. Reaction time. For the use of FSC technology or display high-speed moving, etc., it is necessary to display the surface of the wafer at a high frequency (for example, (10) Hz), and the liquid crystal reaction speed is insufficient, resulting in image sticking, which seriously affects the problem of the screen product (10). The pump circuit can effectively solve this problem. The circuit of the chest in the actual implementation can be appropriately designed by those skilled in the art to perform the method of driving the money. In the next implementation, a driving circuit will be provided, and the driving method of the implementation will be available. [Second Embodiment] Referring to Figure 4, there is shown a schematic view of a structure of a halogen in accordance with a second embodiment of the present invention. The pixel structure touch includes a driving circuit (the circuit), and the chicken circuit is preferably adapted
=場序色麵败細構，但撕域。本實施例中的 旦素結構應包括第一閘極線G1、第一資料線D 邱、第二電晶體邱及第,C1。其中，電= :第第二電:™各— t 一第二電極端(例如祕），而第—電容C1則包括第-端及第」 0 201040926 上述的第電曰曰體TFTl的閘極和其第一電極端皆與第一間極 ,糾電連接。第二電晶贿2的第—電極端則與第―電晶體 的第二電極端電連接。 本實施例的驅動電路還可包括第二閘極線g2，苴盘第一電容 C!的第二端及第二電晶體的第二電極端皆電連接。本實施例的驅 動電路還可包括晝素電晶體TFTp，其具有一閘極一第一電極端 (例如源極)及-第二電極端(例如汲極)。晝素電晶體叫的第— 〇電極端與第-資料線Dl電連接。晝素電晶體％的閑極與第_ 電晶體TFT】的第二電極端及第二電晶體TFT2的第一電極端電連 接。所以第-電晶體TFTl的第二電極端經由晝素電晶體I%而 與第-=貝料線D!電連接。本實施例的晝素結構1〇〇還可包括儲存 電容cs及液晶電容Clc，其皆具有第一端及第二端。儲存電容& 及液晶電容cLC的第-端皆與晝素電晶體TFTp的第二電極端或晝 〉素電極E電連接。而第二閘極、線&則透過第一電容&而與畫素 電晶體TFTP之閘極電連接。另夕卜，本實施例的晝素結構還可包括 第三閘極線&，其與儲存電容Q的第二端及第二電晶體丁^^的 閘極皆電連接。在本實施射，f三_線&係與第二閉極線 G2相鄰，而第二閘極線(¾與第一閘極線&相鄰，但在其它實施 例中將可不以此為限。 請同時參考圖4及圖5,其中圖5為本實施例之驅動電壓的時 序示意圖。當在T1時間内，第一閘極線Gl接收來自—閘極驅動 器(圖未示)之一高電壓Vgh(或致能電壓），其它閘極線則接收來自 12 201040926 該閘即驅動器之一低電壓vgl (或去能電壓），使得第一電晶體丁印 - 導通’所以電流會流過第—電晶體TFTi的第二電極端，再流到第 ./電容Cl的第—端，進行充電’產生栗電量Qpu<故當第一閘 極線G!的電壓Vg⑴拉高為高電壓、時，第二間極線&因電性 連接於第-電容的第二端’故其將受第—電容q触合效應影 響，其電壓Vg(2)於T1時間内最後將變為低電壓v担加上泵電壓 Vpump ’ 即 v g (2)= Vgl + Vpump (其中 vpump = Qpump x c D。同時，在 〇 T1時間内，當第一電晶體TFT\開啟後，晝素電晶體tftp的閘極 端將透過第一電晶體TFT!而接收到第一閘極線之電壓，故此 時電晶體TFTP的閘極電壓Vg將被拉升’且晝素電晶體tftp亦 將被打開(導通）’而資料線D1上的資料訊號將被寫入至晝素電極 E，這時寫入至晝素電極E的資料訊號，實則為晝素結構1〇〇的上 一個晝素的資料訊號。 在T1時間結束後的T2時間内，第二閘極線G2接收來自閘極 〇 驅動器的一高電壓vgh(致能電壓），其它閘極線則接收低電壓Vgl， 而這時第二閘極線G2上之電壓將因第一電容（^之耦合效應而被 拉升泵電壓Vpump之大小，畫素電晶體TFTP透過第一電容Q而電 連接第二閘極線G2之電壓，故晝素電晶體TFTP將繼續維持在導 通(On)狀態，而資料線D!上的資料訊號將持續被寫入至晝素電極 E’這時寫入至晝素電極E的資料訊號，則為晝素結構100實際真 正的資料訊號。另一方面，在T2時間内，第一電晶體TFT】及第 二電晶體TFTJW#呈關閉(Off)狀態。在此特別說明的是，由於第 13 201040926 二閘極線G2的電壓Vg(2)，於T1時間透過第一電容Cl已被拉升 - 至Vgi+ VPumP，故在T2時間當對第二閘極線G2提供一高電壓 - Vgh(致能電壓)時，第二閘極線G2的電壓vg(2)將為Vgh加上原先已 拉升的 Vgl 丁 Vpump ’即 v g (2)= Vgl + Vgh +Vpump。換言之，此時第 二閘極線G2係以vg (2户Vgl + Vgh +Vpump之電壓來驅動晝素電晶 體TFTp之閘極，而非像傳統習知技術係以Vg (2)= Vgl + Vgh之電 壓驅動之。由於，本實施例中，驅動晝素電晶體的閘極之電壓較 ❹習知技術的閘極電壓來得高(即比習知技術多了泵電壓Vpump)，所 以可以使晝素電晶體TFTp更快被開啟，如此一來液晶電容Clc内 之液晶將更快速地被驅動到所要的位置，故可以加快液晶反應速 度，縮短閘極線所需掃描時間。另外，在T2時間内，其它閘極線 的電壓則接收低電壓Vgl。雖然，第一時間T1内，所晝素結構100 之晝素電極E所寫入的是上一個晝素的資料訊號，但Ή的時間很 〇 短，在第二時間T2時，便迅速寫入該晝素真正的資料訊號。 在Τ2日^間結束後的Τ3時間内，第三閘極線&接收高電壓 Vgh，其匕閘極線則接收低電壓乂切。此時，第一電晶體TFT!及畫 素電晶體TFTp是呈關閉(〇植態，而第二電晶體TFT2則導通(On 狀〜、）所以第^谷心内儲存的栗電量Qp，會經由第二電晶體 TF T2的第-電極端及第二電極端放電’而使得第二問極線&上之 電壓可以贿降到原先的低電壓Vgl，如圖5所示。 &合上述’本發明所提出的驅動電路，能使用以驅動畫素電 b曰體的閉極電壓比先前技術增加—I電壓，所以能使畫素電 14 201040926 sa體TFTp更快被開啟’進而液晶更快速地被馬區動到所要的位置， 故能加快晝面顯示速度’驗每—閘歸的掃描訊號所需的致能 時間。因此，當顯示器採用FSC技術’而晝面播放頻率增加3倍 時’使用本發明的驅動電路’仍能使液晶快速驅動到所要的位置， 尤其對須要播放動態畫面的液晶電視而言，更可有效地突破習知 技術瓶頸，解決習知技術液晶反應速度不夠快的問題。 〇 【圖式簡單說明】 圖1為本發明第一實施例之驅動電路的示意圖。 圖2為本發明第一貫施例之驅動電麗的時序示音圖。 圖3為本發明第-實施例之顯示裝置的驅動方法的流程圖。 圖4為本發明第二實施例之驅動電路的示意圖。 圖5為本發明第二實施例之驅動電壓的時序示意圖。= Field sequence color surface is fine, but tearing the field. The denier structure in this embodiment should include a first gate line G1, a first data line D, a second transistor, and a first, C1. Wherein, the electric =: the second electric: TM each - t a second electrode end (such as secret), and the first capacitor C1 includes the first end and the first 0 0 201040926 the gate of the first electric body TFT1 And the first electrode end thereof is connected to the first interpole, and is electrically connected. The first electrode end of the second electro-brass 2 is electrically connected to the second electrode end of the first transistor. The driving circuit of this embodiment may further include a second gate line g2, and the second end of the first capacitor C! of the disk and the second electrode end of the second transistor are electrically connected. The driving circuit of this embodiment may further include a halogen transistor TFTp having a gate - a first electrode terminal (e.g., a source) and a second electrode terminal (e.g., a drain). The first electrode terminal of the halogen crystal is electrically connected to the first data line D1. The idle electrode of the pixel transistor % is electrically connected to the second electrode terminal of the _ transistor TFT and the first electrode terminal of the second transistor TFT2. Therefore, the second electrode terminal of the first transistor TFT1 is electrically connected to the first-bead line D! via the halogen transistor I%. The halogen structure 1〇〇 of the embodiment may further include a storage capacitor cs and a liquid crystal capacitor Clc, each of which has a first end and a second end. The first ends of the storage capacitor & and the liquid crystal capacitor cLC are electrically connected to the second electrode terminal of the halogen transistor TFTp or the 〉-electrode electrode E. The second gate, line & is electrically connected to the gate of the pixel TFT TFT through the first capacitor & In addition, the pixel structure of this embodiment may further include a third gate line & which is electrically connected to the second end of the storage capacitor Q and the gate of the second transistor. In the present embodiment, f three-wire & is adjacent to the second gate line G2, and the second gate line (3⁄4 is adjacent to the first gate line & but in other embodiments may not Please refer to FIG. 4 and FIG. 5 simultaneously, wherein FIG. 5 is a timing diagram of the driving voltage of the embodiment. When the time is T1, the first gate line G1 receives the gate driver (not shown). One of the high voltage Vgh (or enable voltage), the other gate line receives a low voltage vgl (or de-energized voltage) from the driver of 12 201040926, so that the first transistor is printed - turned on 'so the current will Flowing through the second electrode end of the first transistor TFTi, and then flowing to the first end of the ./capacitor C1, charging "generating the pump power Qpu<; when the voltage Vg(1) of the first gate line G! is pulled high Voltage, time, the second electrode line & is electrically connected to the second end of the first capacitor', so it will be affected by the first capacitor q contact effect, and its voltage Vg(2) will eventually change in T1 time. For the low voltage v, add the pump voltage Vpump ' ie vg (2) = Vgl + Vpump (where vpump = Qpump xc D. At the same time, in 〇T1 time, when After the first transistor TFT\ is turned on, the gate terminal of the halogen transistor tftp will pass through the first transistor TFT! and receive the voltage of the first gate line, so that the gate voltage Vg of the transistor TFTP will be pulled up. 'And the crystal transistor tftp will also be turned on (conducted)' and the data signal on the data line D1 will be written to the pixel electrode E. At this time, the data signal written to the pixel electrode E is actually a halogen structure. The data signal of the previous element of 1〇〇. During the T2 time after the end of the T1 time, the second gate line G2 receives a high voltage vgh (enable voltage) from the gate 〇 driver, and the other gate lines Receiving the low voltage Vgl, and at this time, the voltage on the second gate line G2 is pulled up by the pumping voltage Vpump due to the coupling effect of the first capacitor (the coupling effect of the pixel TFT VP through the first capacitor Q) The voltage of the second gate line G2, the halogen TFT TFTP will continue to be in the on state, and the data signal on the data line D! will continue to be written to the pixel electrode E'. The data signal of the electrode E is the actual real data signal of the halogen structure 100. On the one hand, in the T2 time, the first transistor TFT] and the second transistor TFTJW# are in an off state. Specifically, the voltage Vg(2) of the second gate line G2 of the 13th 201040926 is shown. After the first capacitor C1 has been pulled up to Vgi+ VPumP at time T1, when the second gate line G2 is supplied with a high voltage - Vgh (enable voltage) at time T2, the second gate line G2 The voltage vg(2) will be Vgh plus the previously pulled Vgl Vpump 'vg (2) = Vgl + Vgh + Vpump. In other words, at this time, the second gate line G2 drives the gate of the pixel transistor TFTp with a voltage of 2g Vgl + Vgh + Vpump instead of Vg (2) = Vgl + as in the conventional technique. The voltage of Vgh is driven. Since, in this embodiment, the voltage of the gate of the driving pixel transistor is higher than that of the conventional technology (that is, the pump voltage Vpump is larger than the prior art), The halogen TFT TFTp is turned on faster, so that the liquid crystal in the liquid crystal capacitor Clc will be driven to the desired position more quickly, so that the liquid crystal reaction speed can be accelerated and the scanning time required for the gate line can be shortened. In addition, at T2 During the time, the voltage of the other gate lines receives the low voltage Vgl. Although, during the first time T1, the pixel electrode E of the pixel structure 100 is written with the data signal of the previous pixel, but the time is Very short, in the second time T2, the real data signal of the element is quickly written. In the Τ3 time after the end of the 2nd day, the third gate line & receives the high voltage Vgh, its gate The pole line receives the low voltage tangent. At this time, the first transistor TFT! and the pixel The TFT TFTp is turned off (the 电 implanted state, and the second transistor TFT2 is turned on (On ～), so the chestnut amount Qp stored in the first valley is passed through the first electrode end of the second transistor TF T2 And the discharge of the second electrode end', so that the voltage on the second interrogation line & can be reduced to the original low voltage Vgl, as shown in Fig. 5. <The above-mentioned drive circuit proposed by the present invention can be used In order to drive the pixel's closed-pole voltage, the I-voltage is increased compared with the prior art, so that the pixel TFT 14 201040926 sa TFTP can be turned on faster, and the liquid crystal is moved to the desired position more quickly by the horse. Therefore, it is possible to speed up the display speed of the kneading surface to check the enable time required for the scanning signal of each gate. Therefore, when the display adopts the FSC technology and the side playing frequency is increased by 3 times, the 'drive circuit using the invention' can still be used. Quickly drive the liquid crystal to the desired position, especially for LCD TVs that need to play dynamic pictures, it can effectively break through the bottleneck of the prior art, and solve the problem that the liquid crystal reaction speed of the conventional technology is not fast enough. 〇 [Simple description] Figure 1 is the main BRIEF DESCRIPTION OF THE DRAWINGS Fig. 2 is a timing diagram of a driving device according to a first embodiment of the present invention. Fig. 3 is a flow chart showing a driving method of a display device according to a first embodiment of the present invention. Fig. 4 is a schematic view showing a driving circuit of a second embodiment of the present invention. Fig. 5 is a timing chart showing a driving voltage according to a second embodiment of the present invention.
D 【主要元件符號說明】 1〇 :泵電路 11 :第一控制單元 12 :第二控制單元 13、100 :晝素結構 2卜22、23 :方法步驟 Ci、Cs、Οχ :電容 D!:資料線 15 201040926D [Description of main component symbols] 1〇: Pump circuit 11: First control unit 12: Second control unit 13, 100: Alizarin structure 2 Bu 22, 23: Method steps Ci, Cs, Οχ: Capacitance D!: Data Line 15 201040926
Gi、G2、G3 :閘極線 TFT!、TFT2、TFTp :薄膜電晶體 ， Vg(l)、Vg(2)、Vg(3):閘極線電壓 V_ :共用電極 Vg :閘極電壓 Vgh :高電壓 Vgl :低電壓 O vpump:泵電壓 ❹ 16Gi, G2, G3: gate line TFT!, TFT2, TFTp: thin film transistor, Vg(l), Vg(2), Vg(3): gate line voltage V_: common electrode Vg: gate voltage Vgh: High voltage Vgl: low voltage O vpump: pump voltage ❹ 16