TW201044632A - Light emitting diode and method for producing the same, and lamp - Google Patents

Abstract

The present invention relates to, for example, a light emitting diode, wherein a compound semiconductor layer including at least a light emitting layer is laminated on a heatsink substrate (substrate), said light emitting diode has a tip structure where an upper side of said compound semiconductor layer is a light-emitting face, said heatsink substrate includes a base material and a buried part enclosed by said base material, and said base material is made of a material, the thermal expansion coefficient of which is smaller than that of said buried part. According to the present invention, a light emitting diode which is excellent in heat radiation and workability of the substrate, capable of preventing, for example, damage, such as a crack, from being caused in a semiconductor layer in a manufacturing process, capable of applying high Current with a high luminous efficiency and also with excellent yield, and a method for producing such light emitting diode as well as a lamp, can be provided.

Description

201044632 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a light-emitting diode, a method of manufacturing the same, and a lamp. The present application claims priority based on Japanese Patent Application No. 2009-075773, filed on Jan. [Prior Art] A light-emitting diode (LED) which previously emits visible light of red, orange, yellow or yellow-green, for example, has aluminum gallium indium phosphide (combined as (AlxGarxhlimP; 0SXS1, 0; YS1) A compound semiconductor LED having a light-emitting layer formed of such a light-emitting layer, for example, a compound semiconductor layer having a light-emitting layer of a composition of (AlxGauhlnuP (O^X^1, 0<Y^1)), which is usually formed by light emission The light emitted from the layer is optically opaque, and mechanically, does not have such a degree of strength as a material composed of a material such as gallium arsenide (GaAs). Thus, recently, based on a visible LED that obtains higher brightness. For the purpose of improving the mechanical strength of the element, it is disclosed that the support material (substrate) composed of a material that transmits or reflects light and has excellent mechanical strength is rejoined after removing the substrate material that is opaque to the light that emits light. A technique of forming a junction type LED in the compound semiconductor layer (see, for example, Patent Documents 1 to 7). In the cited document 4, a substrate is used in which a substrate composed of Si and GaP is used. In the cited document 6, it is disclosed that a substrate made of a metal material is used. In recent years, in the field of packaging technology of the above-described light-emitting diode, a popular one is a package that emphasizes heat dissipation and high current resistance. [Patent Document 1] Japanese Patent Laid-Open No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. JP-A-2001-339100 [Patent Document 5] Japanese Laid-Open Patent Publication No. 2001-57 44 No. 1 [Patent Document 6] JP-A-2007-8 1 0 1 0 [Patent Document 7] JP-A-2006-32952 SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] In the light-emitting diodes of the above-mentioned respective patent documents, the development of the bonding technique of the substrate increases the degree of freedom in designing the substrate, and it is proposed to apply a high current. a metal substrate, a ceramic substrate, a composite substrate, or the like having high heat dissipation properties. However, since the substrate having high heat dissipation property has a large difference in thermal expansion coefficient from a semiconductor layer including a light-emitting layer, the substrate is bonded and In the heat treatment process, the semiconductor layer is broken, resulting in a problem of a decrease in yield. Further, in the above-described light-emitting diode, when the substrate is made of a metal material having high heat dissipation such as copper, aluminum, gold or silver, Since it is a soft and viscous material, burrs are generated in the process of cutting the wafer into wafer units, and the life of the cutting tool is shortened, etc., which is difficult to accurately cut off the yield. The present invention has been made in view of the above problems, and an object thereof is to provide a substrate which is excellent in heat dissipation and workability, and which can prevent damage such as cracks on a semiconductor layer during a manufacturing process, and can apply a high current 'with high luminous efficiency. , and excellent light-emitting diodes. Further, an object of the present invention is to provide a method for producing a light-emitting diode having the above-described light-emitting diode having high luminous efficiency at a high yield and at a low cost. Further, it is an object of the invention to provide a lamp using the above-described light-emitting diode of the present invention. (Means for Solving the Problems) In order to solve the above problems, the inventors of the present invention have actively reviewed the results and found that a substrate having a thermal expansion coefficient substantially equal to that of a compound semiconductor layer including a light-emitting layer and having excellent workability of 0 is bonded to the compound semiconductor layer, thereby preventing Cracking or the like is generated on the compound semiconductor layer. Further, it has been found that the substrate is formed into a dimensional structure composed of the base portion and the embedded portion, and is formed of a material having excellent heat dissipation properties, whereby a larger current can be applied to the light-emitting diode, and luminous efficiency is further improved. Thus the present invention has been completed. That is, the present invention relates to the following. π] a light-emitting diode having a wafer structure in which a compound semiconductor layer containing at least a light-emitting layer is laminated on a substrate, and an upper surface side Q of the compound semiconductor layer is a light-emitting surface, wherein the substrate is made of a substrate portion And an embedded portion surrounded by the base portion, wherein the base portion is made of a material having a thermal expansion coefficient smaller than that of the embedded portion. [2] The light-emitting diode according to [1] above, wherein the substrate portion and the embedded portion of the substrate are made of different metal materials. [3] The light-emitting diode according to [1] or [2] above, wherein a difference in thermal expansion coefficient between the base material portion and the compound semiconductor layer is within ±1.5 ppm/K. [4] The light-emitting diode according to any one of [1] to [3] wherein the thermal conductivity of the substrate of the base 201044632 is 20 0 W/m.K or more. [5] The light-emitting diode of any one of the above [1] to [4] wherein the substrate portion is composed of a group or tin' or an alloy material thereof. [6] The light-emitting diode according to any one of [1] to [5] wherein the buried portion is made of a material containing at least one or more elements selected from the group consisting of gold, silver, copper or aluminum. [7] The light-emitting diode according to [6] above, wherein the embedded portion comprises a plating layer selected from at least one of elements of gold, silver 'copper or aluminum. [8] The light-emitting diode according to any one of [1] to [7] wherein the recessed portion is formed in the base portion, and the embedded portion is provided in the recess. [9] The light-emitting diode according to any one of [1] to [8] wherein the thickness of the buried portion is 70% or more of the thickness of the base portion. [10] The light-emitting diode according to any one of [1] to [7] wherein a through portion is formed in the base portion, and the embedded portion is provided in the through portion.

[11] The light-emitting diode according to any one of [1] to [10] wherein the light-emitting layer included in the compound semiconductor layer is made of a material containing AlGalnP q or AlGaAs. [12] The light-emitting diode according to any one of [1] to [1], wherein the substrate is formed into a square shape having a length of 500 or more on each side in plan view. [13] The light-emitting diode according to any one of [1], wherein the compound semiconductor layer is formed by laminating at least a p-type semiconductor layer, a light-emitting layer, and an n-type semiconductor layer on the substrate. . [14] The light-emitting diode according to [13] above, wherein a layer of an n-type electrode 201044632 of a negative electrode is further provided on the n-type semiconductor layer of the compound semiconductor layer, and the substrate is a positive electrode and is interposed between the electrodes Apply power with a density of 0.5 W / mm 2 or more. [15] The light-emitting diode according to any one of [1] to [14] wherein the substrate and the compound semiconductor layer are joined by a metal bonding layer. [16] The light-emitting diode according to any one of [1] to [14] wherein the substrate and the compound semiconductor layer are directly bonded to each other. [17] A method of producing a light-emitting diode, comprising: forming a layered body, forming a compound semiconductor layer containing at least a light-emitting layer 0 on a substrate for a buildup, and having the compound semiconductor layer provided thereon 2, after forming a second electrode having an ohmic property on the semiconductor layer, the build-up bonding layer covers the second electrode to form a laminated body; and the process of bonding the laminated body and the substrate is utilized by at least a portion of the substrate portion The uranium engraving method forms a concave portion or a penetrating portion, and an embedded portion is formed inside the concave portion or the penetrating portion to form a substrate, and then the bonding layer and the substrate are joined to each other by bonding the bonding layer of the laminated body to the substrate; In the process of the first electrode, the stacking-based Q-plate is peeled off from the compound semiconductor layer, and the light-extracting surface of the first semiconductor layer included in the compound semiconductor layer is exposed, and then a first electrode is formed on the light-extracting surface. And the process of dividing into component units by dividing the compound semiconductor layer and the bonding layer into a plurality of a dividing groove formed between the plurality of compound semiconductor layers is cut at a position of a base portion in the substrate and divided into element units; and the base portion is made of a material having a thermal expansion coefficient smaller than that of the embedded portion Composition. [18] A method of manufacturing a light-emitting diode, comprising: forming a semiconductor layer forming process by forming at least an n-type half 201044632 conductor layer, a light-emitting layer, and a p-type semiconductor layer on a laminated substrate; The compound formation process of the compound is performed by forming a p-type ohmic electrode on the P-type semiconductor layer of the compound semiconductor layer, and then laminating the P-type ohmic electrode to form a laminate; the substrate is formed by at least the substrate portion. After forming a concave portion by an etching method, an embedded portion is formed inside the concave portion or the penetrating portion to form a bonding process, and the compound semiconductor layer and the substrate are bonded by bonding the bonding layer and the front surface side of the laminated body. Removing the n-type semiconductor layer provided in the compound semiconductor layer from the layer for the deposition layer from the compound semiconductor layer; forming an n-type electrode layer on the n-type semiconductor layer; and dividing the process After the chemical layer and the bonding layer are divided into a plurality of layers, the compound layer is formed along the compound semiconductor layer Breaking points between the groove cross cut at the position of the base member portion; the base portion is constituted by a thermal expansion coefficient smaller than that of the former material. [19] The method for producing a light-emitting diode according to the above [18], wherein the plate forming process is performed by using a plating method to form the embedded portion in the concave portion of the base material portion. [20] The method for producing a light-emitting diode according to the above [18] or [19], wherein the substrate forming process is made of molybdenum or tungsten or the alloy substrate. [21] The light-emitting diode method according to any one of [18], wherein the substrate forming process is formed of a material including at least any one or more elements selected from the group consisting of gold and silver: the embedded portion: a conductor a layer; the substrate is covered by a substrate, or a substrate is formed by a substrate; the substrate is removed; and the light is taken out of the plate, and the light is taken out of the substrate to semi-conduct the base in the embedded portion of the plurality of plates. The internal shape method, wherein the material is formed by the manufacturer, copper or aluminum 201044632 [22] The method for manufacturing the light-emitting diode according to the above [18] to [21], wherein the electrode forming process and the foregoing dividing process are provided In the roughening process, the light extraction surface of the n-type semiconductor layer is roughened. [23] A light-emitting diode obtained by the method of any one of the above [17] to [22]. [24] A lamp comprising the light-emitting diode according to any one of the above [1] to [16] or [23]. (Effect of the Invention) According to the light-emitting diode of the present invention, the compound semiconductor layer containing at least the light-emitting layer is laminated on the substrate, and the substrate is composed of the base portion and the embedded portion surrounding the base portion, and The material has a thermal expansion coefficient smaller than that of the embedded portion, and both the workability and heat dissipation of the substrate can be considered. Thereby, it is possible to prevent the occurrence of cracks and the like on the compound semiconductor layer in the manufacturing process, and it is possible to manufacture a light-emitting diode which has an improved yield and can apply a high current and has high light-emitting efficiency. Further, the method for producing a light-emitting diode according to the present invention includes: a laminate in which a compound semiconductor layer and a bonding layer are laminated on a substrate for lamination, and a substrate formed on the substrate; a process of bonding the compound semiconductor layer and the substrate to the substrate formed by the recessed portion or the embedded portion of the inside of the through portion; and removing the laminated substrate from the compound semiconductor layer to expose the light extraction surface of the first semiconductor layer; a process of cutting a portion of the substrate portion in the substrate along a dividing groove formed between the plurality of compound semiconductor layers; and a material having a thermal expansion coefficient of the substrate portion smaller than that of the embedded portion, thereby It is possible to manufacture a light-emitting diode which is capable of preventing damage such as cracks in the compound semiconductor layer, improving the yield, and having excellent heat dissipation properties of the substrate. Thereby, the light-emitting diode which is applied and excellent in luminous efficiency can be manufactured with high manufacturing efficiency. Further, since the lamp of the present invention uses the above-described illuminator of the present invention, it has excellent luminescent properties. [Embodiment] [Embodiment for Carrying Out the Invention] Hereinafter, a polar body, a method for manufacturing the same, and a lamp according to embodiments of the present invention will be described with reference to the drawings. 1A is a cross-sectional schematic view of an O-electrode according to the present embodiment, and FIG. 1B is a plan view of FIG. 1A, and FIG. 10 is a process diagram for explaining a method of manufacturing a light-emitting diode: FIG. A schematic cross-sectional view of a light-emitting lamp formed by a diode of a form. In addition, in the following description, the pattern of the light-emitting diode, the method of manufacturing the same, and the like are shown, but the sizes, thicknesses, and dimensions of the drawings are the same as those of the actual light-emitting diodes and the like. [Light Emitting Diode] 0 The light-emitting diode A of the example shown in FIGS. 1A and 1B is composed of a base and an embedded portion 3 surrounded by the base portion 2, and is formed by a matrix of the diode A. The heat dissipation substrate (substrate) 1, the bonding layer 4 disposed on the upper surface 2a of the dispersion 1 , the semiconductor layer 11 disposed on the upper side of the bonding layer 4, the n layer 9 disposed on the upper and lower sides of the compound semiconductor layer 11, and the 欧姆-type ohmic electrode 5 strategic composition. Further, the base portion 2 on which the heat-dissipating substrate 1 is formed by the light-emitting two is composed of a material having a thermal expansion coefficient smaller than that of the buried material.

Here, the compound semiconductor layer 11 is a layered germanium-type semiconductor layer I, a high-current diode light-emitting two-light-emitting second diagram, and the relationship between the portions of the eleventh two-pole system is a light-emitting thermal substrate compound type electrode body A. The portion 3; the light-emitting -11 - 201044632 layer 7 and the n-type semiconductor layer 8 are formed. The upper surface of the compound semiconductor layer 11 is a light extraction surface 1U for taking out light from the light-emitting layer 7 to the outside, and an n-type electrode layer 9 is formed on the light extraction surface 11a. Further, the light extraction surface 11a is roughened by etching or the like, but the detailed illustration is omitted, whereby the light extraction efficiency of the light-emitting diode A is further improved. The n-type electrode layer 9 is in ohmic contact with the n-type semiconductor layer 8 of the compound semiconductor layer 11, and becomes the negative electrode of the compound semiconductor layer 11. In general, when an electrode is provided in a semiconductor element such as a light-emitting diode, as the n-type ohmic electrode provided in the n-type compound semiconductor, for example, AuGe or AuSi can be used. Further, as the P-type ohmic electrode provided in the P-type compound semiconductor (see the p-type ohmic electrode 5 in Figs. 1A and 1B), AuBe or AuZn or the like can be used. The layer structure and material of the n-type electrode layer 9 shown in FIGS. 1A and 1B are not particularly limited, but it is preferable to use a metal material containing gold (Au) in consideration of wire bonding. Preferably, it is preferable to use AuGe or AuSi as described above. Further, as the n-type electrode layer 9, for example, a barrier metal such as Ti or Pt is formed on the electrode material having ohmic characteristics as described above, and Au is further formed thereon. There is no limitation on the formation method at this time, and a conventional vapor deposition method or sputtering method or the like can be employed. Further, the film thickness of each layer is not particularly limited, but from the viewpoints of controllability of film thickness and productivity (cost), it is preferable that the ohmic electrode material (AuGe or AuSi) is in the range of 0.1 to 0.5, and the barrier metal is 〇.1~〇.5/zm range, the Au layer is in the range of 1~3 "m. In order to uniformly spread the current on the compound semiconductor layer 11 including the light-emitting layer 7, the n-type electrode layer 9 is preferably adapted to the shape of the compound semiconductor layer 11 and the shape of the compound semiconductor layer 11, and the n-type electrode layer 9 is adapted. The arrangement form and shape are not particularly limited, and the conventional techniques can be applied. Further, an n-type semiconductor layer 8 of a contact layer for reducing the resistance at the time of ohmic contact is disposed between the n-type electrode layer 9 and the light-emitting layer 7. Further, 'between the π-type electrode layer 9 and the compound semiconductor layer 11 (n-type semiconductor layer 8)' may be provided for planarly diffusing the driving current supplied from the n-type electrode layer 9 to the entire compound semiconductor layer 11 The current diffusion layer 'or vice versa' is used to limit the current blocking layer or current confinement layer in the region where the driving current flows. In addition, the n-type electrode layer 9 of the example shown in FIG. 1 and FIG. 1 has a shape in which four branches are formed in a cross shape in a central portion of a substantially circular shape, but are not limited to such a shape. The diffusion of the current to the compound semiconductor layer 11 can be considered, and the shape thereof is suitably employed. As shown in Fig. 1 and Fig. 1, a Ρ-type ohmic electrode 5 is formed in contact with the lower side of the compound semiconductor layer 亦, that is, the lower side of the Ρ-type semiconductor layer 6. Further, the detailed illustration is omitted, and the p-type ohmic electrode 5 is formed into a circular shape, which is in contact with the lower side of the Ρ-type semiconductor layer 6, and is provided at a predetermined interval, and is illustrated in the example. The four corners of the light-emitting diode are located at four places in total. The material of the p-type ohmic electrode 5 can be, for example, various structures such as a laminated film composed of an Au Be alloy film and an Au film, and is provided by a conventional means well known in the art. Further, in order to uniformly diffuse the current on the compound semiconductor layer 11 including the light-emitting layer 7, it is preferable to conform the arrangement and shape of the compound semiconductor layer 11 to the P-type ohmic electrode 5, and to configure the p-type electrode layer 5. The form and shape are not particularly limited, and the conventional techniques can be applied. Further, in general, the arrangement and shape of the P-type ohmic electrode 5 and the n-type electrode layer 9 are preferably a combination in which a current is uniformly flowed in a region where the light-emitting layer 7 is easily taken out. Here, for example, disposing the ytterbium type ohmic electrode 5 directly under the n-type electrode layer 9 is liable to cause current concentration, which is not preferable. Next, as shown in Fig. 1, a bonding layer 4 is disposed on the lower side of the compound semiconductor layer 1 1 , that is, on the lower side of the P-type semiconductor layer 6 to cover the P-type ohmic electrode 5 described above. In the example shown in FIG. 1A, the bonding layer 4 has a light-transmitting thin film layer 4a, a reflective layer 4b, a barrier layer 4c, an Au layer 4d, and a metal bonding layer 4e arranged in this order from the compound semiconductor layer 11 side. The laminated film of each layer and the metal bonding layer 4e are bonded to the heat dissipation substrate 1. Further, in the configuration shown in Fig. 1A, the tip end of the P-type ohmic electrode 5 is covered by the light-transmitting thin film layer 4a constituting the bonding layer 4. Since the light-emitting diode A of the present embodiment is provided with the bonding layer 4', it can be surely bonded to the compound semiconductor layer 11 and the heat-dissipating substrate 1' with low contact resistance, and the light generated by the light-emitting layer 7 is reflected to the light extraction surface 11a side. . Further, the bonding layer 4 is electrically connected to the compound semiconductor layer 11 and the heat dissipation substrate 1 by the light-transmitting film layer 4a and the metal bonding layer 4e, whereby the heat-dissipating substrate 1 serves as a take-out electrode on the positive electrode side. Further, the bonding layer 4, the heat dissipation substrate 1 and the n-type electrode layer 9 are arranged on the opposite side in the thickness direction of the compound semiconductor layer. Thus, the light-emitting diode of the present embodiment forms a light-emitting diode of a so-called upper and lower electrode structure. Since the bonding layer 4 used in the light-emitting diode A is bonded to the heat-dissipating substrate 1 and the compound semiconductor layer 11 on the positive electrode side, it is preferably made of a material having a low electrical resistance. Further, it is considered that the stress bonding layer 4 of the compound semiconductor layer 11 is preferably a metal bonding layer 4e composed of a material which can be bonded to the heat dissipation substrate 1 at a low temperature as compared with -14 to 201044632. Further, in the light-emitting diode A of the present embodiment, it is preferable to form the bonding layer 4 with a high reflectance from the viewpoint of achieving high luminance. Therefore, it is preferable to provide the reflective layer 4b composed of a reflective material on the bonding layer 4, and the light-transmitting thin film layer 4a composed of the light-transmitting conductive material may be combined by a conventional method. The light transmissive film layer 4a is a layer for preventing reaction and diffusion between the compound semiconductor layer 11 and the reflective 0 layer 4b. Such a light-transmitting thin film layer 4a can be made of, for example, ITO (indium tin oxide), SiCh (yttria), Ti〇2 (titanium oxide), or SiN (tantalum nitride), and the refractive index difference of the light-transmitting conductive material. It is composed of an oxide film or a nitride film which functions as a so-called cold mirror. Further, the light transmissive film layer 4a may be a multilayer film of the above materials. Further, from the viewpoint of obtaining high reflectance, the light-transmitting thin film layer 4a is also suitably made of a material such as white Al2?3 (alumina) or A1N (aluminum nitride), or may be used in combination with various materials. The thickness of the light-transmitting thin film layer 4a is preferably, for example, about 10 to 500 nm, more preferably about 30 to 200 nm. The reflective layer 4b is made of, for example, Ag, Au, Pt, Al, or Cu, for the compound semiconductor layer U. The emitted light has a reflective film made of a metal material having high reflection characteristics, and is reflected toward the compound semiconductor layer 11 side and is emitted from the compound semiconductor layer 11 and transmitted through the light-transmitting thin film layer 4a toward the heat-dissipating substrate 1 side. Further, the material of the reflective layer 4b depends on the light-emitting wavelength of the compound semiconductor layer U (light-emitting layer 7), and the above materials may be used alone or the above materials may be used as an alloy material. -15- 201044632 The thickness of the reflective layer 4b is, for example, preferably about 100 to 800 nm, more preferably about 200 to 500 nm. In the present embodiment, the bonding layer 4 including the reflective layer 4b having the above-described structure and the light-transmitting thin film layer 4a is provided between the compound semiconductor layer 包含 including the light-emitting layer 7 and the heat-dissipating substrate 1, and a light-emitting diode can be obtained. The excellent effect of brightness enhancement of A. The reflectance of the bonding layer 4 having such a reflection structure is, for example, preferably 90% or more. The barrier layer 4c is formed to prevent interdiffusion of constituent elements of the reflective layer 4b and constituent elements of the Au layer 4d and the metal bonding layer 4e which will be described later. As the barrier layer 4c, for example, a conventionally known barrier metal such as Mo (molybdenum), W (tungsten), titanium (Ti), chromium (Cr) or Pt (platinum) can be used. Further, the thickness of the barrier layer 4c is, for example, preferably about 50 to 500 nm, more preferably about 100 to 300 nm.

The Au layer 4d is a layer of a contact layer when the heat dissipation substrate 1 is bonded by the metal bonding layer 4e described later, and is composed of Au having a low contact resistance. Further, for example, a layer composed of another metal material having a low contact resistance may be provided instead of the Au layer 4d. The thickness of the Au layer 4d is, for example, preferably about 100 to 1000 nm, more preferably about 200 to 500 nm. The metal bonding layer 4e is a layer joined to the heat dissipation substrate 1, and as described above, is composed of a material which can be bonded at a low temperature. Therefore, the metal bonding layer 4e is preferably made of an au-based eutectic metal material and a solder material which are chemically stable and have a low melting point. As the material for forming such a metal bonding layer 4e, for example, in addition to AuSn, an alloy such as Auln, AuGe, AuSi, and a general solder material is preferably a metal material having a eutectic composition having a low melting point. The thickness of the metal bonding layer 4e is, for example, preferably about 300 to 2,000 nm to 16 to 2010,446,32, more preferably about 500 to 1,500 nm. The overall thickness of the bonding layer 4 having the above configuration is not particularly limited, and may be appropriately set, for example, depending on the number and material of the combination layers. Further, the method of bonding the bonding layer 4 (metal bonding layer 4e) and the heat dissipation substrate 1 is not particularly limited, and for example, a conventional technique such as diffusion bonding, bonding using an adhesive, or a room temperature bonding method may be employed, and the device configuration may be considered. Appropriate choice. Further, in the light-emitting diode A of the present invention, the structure of the base portion 2 of the heat-dissipating substrate 1 and the P-type semiconductor layer 6 of the compound semiconductor layer 11 may be directly bonded without the above-described connection layer 4. However, in such a configuration, in order to improve the ohmic contact between the heat-dissipating substrate 1 serving as the P-side electrode and the P-type semiconductor layer 6, it is preferable to provide the P-type ohmic electrode 5 as described above. Next, the heat dissipation substrate (substrate) 1 is composed of the base member 2 and the embedded portion 3 surrounding the base portion 2, and is a base of the light-emitting diode A of the present embodiment. Further, in the light-emitting diode A of the present invention, the base material portion 2 is composed of a material having a thermal expansion coefficient smaller than that of the embedded portion 3. ^ The inventor of the case, etc., in order to achieve excellent heat dissipation and processability

Q The substrate of the light-emitting diode was obtained with good yield and was actively reviewed. Thus, it has been found that a heat dissipating substrate 1 having a thermal expansion coefficient substantially equal to that of the compound semiconductor layer 包含 including the light-emitting layer 7 and excellent in workability is bonded to the compound semiconductor layer 11, and cracking or the like can be prevented from occurring in the compound semiconductor layer 11. Further, it has been found that the heat dissipation substrate 1 is formed into a three-dimensional structure composed of the base portion 2 and the embedded portion 3, and is composed of a material having excellent heat dissipation characteristics, "a larger current can be applied to the light-emitting diode A, and luminous efficiency is obtained. More improved. The base portion 2 and the embedded portion 3 of the heat dissipation substrate 1 are preferably made of different metal materials of -17-201044632. Further, the difference in thermal expansion coefficient between the base material portion 2 of the heat dissipation substrate 1 and the compound semiconductor layer 1 1 described later is preferably within ±1.5 ppm / K. Further, it is preferable that the heat dissipation substrate 1 has a heat conductivity of 200 W/m·K or more. A higher thermal conductivity should be used' and it is preferred to use a metal material up to a range of 400 W/m · K. The inventors of the present invention have obtained positive results from the substrate structure satisfying the above characteristics. It has been found that all of the above conditions are unsuitable for any of the above conditions, and it is suitable for the above conditions by forming a composite structure using a part of the metal material. The light-emitting diode A' of the present invention first selects a metal having a thermal expansion coefficient close to that of the III-V compound semiconductor forming the compound semiconductor layer 11 as a material of the base portion 2, and selects a metal having a thermal conductivity higher than that of the base portion 2 as a material. The materials of the embedded portion 3 are combined. By forming the above-described structure of the heat dissipation substrate 1, it is possible to obtain a substrate which is suitable for the above-described conditions and which is most suitable for a light-emitting diode. As a suitable example, for example, a compound semiconductor composed of a composition of an AlGalnP system has a thermal expansion coefficient of about 5.3 ppm/K. Therefore, as a metal material constituting the base portion 2 of the heat dissipation substrate 1, molybdenum (Mo: thermal expansion coefficient = 5.1 ppm / K) 'Tungsten (W: thermal expansion coefficient = 4.3 ppm / K) or these alloys. Further, the difference between the thermal expansion coefficient of the base material portion 2 constituting the heat dissipation substrate 1 and the semiconductor material is preferably in the range of ±1.5 ppm, and more preferably in the range of ±1 ppm. Further, the thermal conductivity of the embedded portion 3 is preferably 200 W/m·K or more, and more preferably 23 W/m·K or more. The base portion 2 is formed by etching or the like on a metal plate made of the above material. Concave portion 21. The shape of the concave portion 21 as viewed in plan is not particularly limited to -18-201044632, and may be applied regardless of the square shape or the hexagonal shape. However, in order to ensure uniform heat dissipation, it is preferable to have a symmetrical shape in all directions, and therefore it is preferably a circular shape. . Further, the cross-sectional shape of the concave portion 21 is, for example, a scorpion shape, and is not particularly limited. Further, as shown in Figs. 1A and 1B, one concave portion 21 may be provided for each wafer of the light-emitting diode A, but a plurality of them may be provided. Further, the depth of the concave portion is not particularly limited. For example, the penetration portion may be formed to penetrate the base portion in the thickness direction, and the base portion may be formed in a slightly cylindrical shape, but by forming the concave portion 21 which retains the thin bottom portion. It is preferable to make the process of forming the embedded portion 3 by the plating treatment simple. In this case, the position at which the bottom portion is left in the thickness direction of the base portion 2 may be, for example, any of the upper surface 2a side, the lower surface 2b side, or the vicinity of the center, but from the viewpoint of minimizing the thermal expansion stress, it is preferably The bottom portion is left on the upper side 2a of the bonding with the compound semiconductor layer 11. The embedding portion 3 is disposed so as to be surrounded by the base portion 2, and is formed so as to be embedded in the entire concave portion 2 of the base portion 2 in the examples shown in Fig. 1 and Fig. 1B. Further, the 'embedded portion 3 may be made of a metal having a thermal conductivity of up to 23 OW/m. K or more, for example, may be selected from silver (Ag: thermal conductivity = 420 W / m. K ) copper (Cu: thermal conductivity = 398 w/m·K) A material composed of at least one element of gold (Au: thermal conductivity = 320 W/m·κ) or aluminum (A1: thermal conductivity = 236 W/m. K). Further, the embedding portion 3 may be an alloy material composed of a plurality of elements selected from the above-described halogen, or a plating layer containing at least one element selected from the above elements. The ratio of the thickness of the embedded portion 3 of the heat dissipation substrate 1 to the thickness of the base portion 2 is preferably -19 - 201044632 of 70% or more. By forming the ratio of the thickness of the embedded portion 3 to the entire thickness of the base portion 2, it has excellent heat dissipation properties, and the light-emitting diode A having excellent workability when divided into unit units can be realized. Here, when the embedded portion 3 is formed by forming the penetrating portion so as to penetrate the base portion 2 in the thickness direction, the ratio of the thickness of the embedded portion 3 to the thickness of the base portion 2 is 100%. In the case where the embedding portion of the heat dissipating substrate is formed by the plating treatment method, it is preferable to retain the bottom portion of the base material portion, and the ratio of the thickness of the embedding portion 3 to the thickness of the base portion 2 is 99% or less. In the heat dissipation substrate 1, at least a part of the side surface region of the light-emitting diode A as a wafer unit is formed of the metal forming the base portion 2, and the inner region of the heat dissipation substrate 1 and the central portion of the lower surface 1b are formed to form the embedded portion 3. The above metal is composed. The metal material forming the base portion 2 is a hard metal. However, since it is a metal which is easy to be processed by the cutting process, it is disposed on the side surface of the wafer of the light-emitting diode A. Further, since the base portion 2 surrounds the embedded portion 3, the thermal expansion property of the entire light-emitting diode A is substantially determined by the physical properties of the metal material forming the base portion 2. Further, in terms of heat conduction characteristics, good characteristics can be obtained by forming a metal material provided in the buried portion 3 inside the heat dissipation substrate. Further, the thickness of the heat dissipation substrate 1 is preferably in the range of 30 to 300 μm, more preferably in the range of 50 to 150 μm. Further, in the present embodiment, it is preferable that the thickness of the base material portion 2 is maintained in the same range as the thickness of the entire heat dissipation substrate 1. By maintaining the thickness of the entire heat-dissipating substrate 1 and the thickness of the base material portion 2 in the above range, it is possible to secure the heat dissipation characteristics of the wafer and the heat dissipation characteristics of the embedded portion 3 from -20 to 201044632, and the manufacturing method described later. In the splitting process, components can be easily divided. When the thickness of the entire heat-dissipating substrate 1 and the thickness of the base portion 2 are less than 30/zm, the strength is insufficient. Further, when the thickness exceeds 300 μm, the splitting property in the dividing process is lowered, and the wafer is changed. Difficulties. Further, as shown in FIG. 1A, the embedded portion 3 embedded in the base portion 2 can have the exposed surface and the surface of the base portion 2 be flush with each other. Further, the heat-dissipating substrate 1 is formed into a square shape by a plane having a length of 500 Å/zm or more on each side, and a good shape can be obtained from the case where the compound semiconductor layer 11 is provided in a similar shape to form the light-emitting diode A. From the viewpoints of heat dissipation and luminescence characteristics, and ease of division processing in the manufacturing process, etc., it is preferable. The heat-dissipating substrate can be used with the size of the light-emitting diode, and a large-sized light-emitting diode having a length of 10 mm on each side can be used. Next, the compound semiconductor layer 11 is a compound semiconductor layered structure having a pn junction structure including the light-emitting layer 7, and is a pattern cross-sectional view as illustrated in FIG. 1A, which sequentially laminates the P-type semiconductor layer 6, the light-emitting layer 7, and η. The semiconductor layer 8 is formed. The compound semiconductor layer 11 described in the present embodiment will be described in detail in a production method to be described later, and is a layer previously formed on the epitaxial growth substrate 30 (see Figs. 2 to 3). The light-emitting diode A is bonded to the upper surface 2a of the heat dissipation substrate 1 (base material portion 2) via the bonding layer 4, and the P-type semiconductor layer 6 included in the compound semiconductor layer 11 formed in advance is bonded. The compound semiconductor layer 11 may also be composed of any conductive compound semiconductor of an n-shape or a p-type. However, in the present invention, particularly, it is suitable to use the light-emitting layer-21-201044632, and the light-emitting efficiency is excellent, and the substrate bonding technique has been established as a general formula. (AlxGai.x) Ylni.YP (a group III-V compound semiconductor in which 'X and Y systems respectively satisfy 0SXS1, and 〇<YS1 number). Further, the element structure of the present embodiment can be used for the compound semiconductor layer having the light-emitting layer of AlxGauxAs (here, X system satisfies the number of 0SXS1) in which red and infrared light are obtained. The compound semiconductor layer 11 is specifically the structure described below. The P-type semiconductor layer 6 has a p-type 0 characteristic of doping Mg or Zn or the like in a predetermined amount, for example, a P-type contact layer composed of GaP. As a raw material for doping Mg, for example, a conventional dicyclopentadienyl magnesium (bis-(C5H5)2Mg) or the like can be used. Further, in the present invention, in order to further improve the brightness, the above-described GaP is preferably used for the p-type semiconductor layer 6. However, for example, a group III-V compound semiconductor crystal such as AlGaAs or AlGalnP may be used without any limitation. Further, the thickness of the P-type semiconductor layer 6 is preferably in the range of 0.5 to 20/m, more preferably in the range of 1 to 10/zm. When the thickness of the p-type semiconductor layer 6 is in this range, it becomes a film having good crystallinity, and the light-emitting efficiency of the light-emitting layer 7 to be described later is improved, and the light-emitting characteristics of the light-emitting diode A are improved. The light-emitting layer 7 is provided on the p-type semiconductor layer 6, and is sequentially laminated from the side of the P-type semiconductor layer 6, for example, having a P-type characteristic of doping Mg or Zn, and the like (8: + 7 〇 & .. 〇..5111..5? and (eight1..5〇3..5)..5111..5? The film consists of a P-type cladding layer 7c; interactively with 10 pairs of layers by Doped (into 1. 2 2 & 0.8). 5111..5? The formation of the well layer and the composition of (human 1..7〇&.3)..5111..5? a plurality of well layers 7b formed by the barrier layer; and an n-type cladding layer-22-201044632 7a composed of (AluGao.Bh.sIno.sP) doped with Si or Te, etc. Thus, a conventional light-emitting layer 7 (multiple well layer 7b) having a structure of a plurality of well layers or the like is formed, and becomes a barrier of (AlxGauhlimPC here, X and Y are respectively satisfying the number of 0SXS1, and 〇<YS1) The structure of the barrier layer and the well layer can be appropriately determined in such a manner that a desired emission wavelength can be obtained. Further, barriers for forming the P-type cladding layer 7c, the n-type cladding layer 7a, and the multiple well layer 7b are formed. Layer composition, thickness and carrier concentration, etc. In addition, in the light-emitting diode of the present embodiment, a layer structure in which the polarities of the n-type and p-type are replaced may be formed in the light-emitting diode of the present embodiment. The light-emitting layer of the light-emitting diode of the present embodiment is provided. 7. The structure has a so-called ρη junction type double heterojunction structure composed of a P-type cladding layer 7c, a multiple well layer 7b, and an n-type cladding layer 7a. The light-emitting layer 7 is enclosed as a carrier for radiation recombination. Therefore, a conventional structure such as a double heterogeneous (DH: Double Hetero) structure or a multiple quantum well structure can be applied. The above multiple well layers 7b' can also be composed of any conductive compound semiconductor of an n-shape or a p-shape. The light-emitting layer 7 of the form is a structure including the multiple well layers 7b having the multiple well structure having the above-described structure. However, the light-emitting structure is not limited thereto. For example, in addition to the above-described multiple well structure, a single quantum well may be used ( SQW) structure, but in order to obtain excellent light emission, it is more preferably a multiple quantum well structure. Further, as a material of the light-emitting layer 7, not only one of the above examples, Gal n may be used. Other materials conventionally known, such as the N-series or the A1G a As-based, but the material of the substrate for lamination used in the manufacturing method described later is preferably selected from the substrate of the laminated layer, preferably selected from -23 to 201044632. The light-emitting layer 7 composed of the above materials may be formed, for example, on the surface of a single crystal substrate such as a lattice-matched III-V compound semiconductor such as Ga As, or may be added to the structure of the light-emitting layer. The functional layer of the prior art is provided, for example, by providing a contact layer, a current diffusion layer, a current blocking layer, a reflective layer, and the like. In the case where the light-emitting layer 7 is configured to have a multiple well structure as described above for the multiple well layer 7b, it is preferable to maintain the film thickness of the barrier layer in the range of 10 to 100 nm, and to maintain the film thickness of the well layer at 10 to 100 nm. The scope. Further, the overall film thickness of the multi-well heavy well layer 7b is preferably maintained in the range of 100 to 2000 nm. Further, the film thickness of the p-type cladding layer 7c is preferably maintained in the range of 200 to 2 OOOnm, and the film thickness of the n-type cladding layer 7a is preferably maintained in the range of 200 to 2000 nm. Further, as the entire thickness of the light-emitting layer 7, the film thickness is preferably maintained in the range of 500 to 1,500 nm. By maintaining the thickness of each of the light-emitting layer 7 and the respective layers constituting the light-emitting layer 7 in the above range, the light-emitting layer 7 having excellent crystallinity and excellent light-emitting efficiency can be obtained. The n-type semiconductor layer 8 is provided on the light-emitting layer 7 and has an n-type characteristic of doping Si, Te or Sn quantitatively, for example, an n-type contact layer composed of doped Si (AluGao. + .sInuP) As a raw material for doping Si, for example, dioxane (ShH6) or the like can be used. The thickness of the n-type semiconductor layer 8 is preferably maintained in the range of 100 to 8000 nm, more preferably in the range of 500 to 300 nm. When the thickness of the layer 8 is in this range, it becomes a film having good crystallinity, and the light-emitting efficiency of the light-emitting layer 7 is improved, and the light-emitting characteristics of the light-emitting diode are improved. The light-emitting diode of the present embodiment described above is as described above. A, by cooling in the heat-24-

201044632 The composite layer 11 including at least the light-emitting layer 7 is laminated on the upper surface 2a of the substrate 1. The heat dissipation substrate 1 is composed of the base portion 2 and the base portion 2, and the base portion 2 is buried by the thermal expansion coefficient. The material can be configured to take care of the processability and dispersion of the heat-dissipating substrate 1, and can prevent damage on the compound semiconductor layer 11 during the manufacturing process, and can provide a light-emitting light with high yield and high luminous efficiency. Polar body A. In the light-emitting diode A of the present embodiment, when the heat-dissipating substrate 1 of the positive electrode and the electrode of the n-type electrode layer 9 serving as the negative electrode are applied with high-density electric power of 〇5 W/mm 2 or more, the substrate 1 may be used. And effectively obtain heat dissipation. Therefore, the effect of greatly improving the luminance of the illuminating light is obtained. [Manufacturing Method of Light Emitting Diode] Next, an example of the method of the light emitting diode will be described with reference to Figs. 2 to 10 . The method for producing the light-emitting diode A of the present invention includes forming a semiconductor compound layer 11 including at least a hair compound semiconductor layer 11 on a plate (see FIG. 2 and the like), and a second semiconductor layer in the compound semiconductor layer 11 After forming the P-type ohmic i-electrode 5 on the surface 6 , the layered bonding layer 4 covers the p-type ohmic electrode layered body 40; and at least a part of the substrate portion 2 is formed with a concave portion (see the symbol of FIG. 1 and the like). 21) or the penetration portion, or the inside of the penetration portion, the buried portion 3 is formed to form the heat dissipation plate: after referring to the symbol 1) of FIG. 4B and the like, the laminated body layer 4 and the upper surface 2a side (one surface side) of the heat dissipation substrate 1 are bonded, and The embedded portion 3 surrounded by the semiconductor is small in heat. By forming a crack flow and having a PI electrode provided in the base layer 7 for manufacturing the laminated light-emitting layer 7 by the A of the heat-dissipating body A (the second step is formed by etching in the concave substrate) Bonding of 40: a process of bonding the layer -25-201044632 layer 40 and the heat dissipation substrate 1; peeling the layered substrate 30 from the compound semiconductor layer 11 to form the n-type semiconductor layer (first semiconductor layer) of the compound semiconductor layer 11 After the light extraction surface 11a of 8 is exposed, a process of forming an n-type electrode layer (first electrode) 9 on the light extraction surface 11a; and dividing the compound semiconductor layer 1 1 and the bonding layer 4 into plural numbers, The breaking groove lib formed between each of the plurality of compound semiconductor layers 11 is cut at a position of the base portion 2 in the heat dissipation substrate 1 to be divided into component units; the base portion 2 is ratio of thermal expansion coefficient In the method of manufacturing the light-emitting diode A of the embodiment described in the present embodiment, the semiconductor layer forming process includes at least a layer η on the layered substrate 30. type The conductor layer 8, the light-emitting layer 7, and the p-type semiconductor layer 6 are formed to form the compound semiconductor layer 11; the layer formation process is performed after the p-type ohmic electrode 5 is formed on the germanium-type semiconductor layer 6 of the compound semiconductor layer 11, and the build-up layer 4 is laminated. The layered body 40 is formed by covering the p-type ohmic electrode 5; the substrate forming process is such that the recessed portion 21 is formed by etching at least a part of the base portion 2, and the embedded portion 3 is formed by the plating method inside the recessed portion 21 The bonding process is performed by bonding the bonding layer 4 of the laminated body 40 and the upper surface 2a side of the heat dissipation substrate 1 to bond the compound semiconductor layer 11 and the heat dissipation substrate 1; the removal process is performed from the compound semiconductor layer. 11 peeling the laminated substrate 30 to expose the light extraction surface 11a of the n-type semiconductor layer 8; and forming an n-type electrode layer 9 on the n-type semiconductor layer 8 provided in the compound semiconductor layer 11; and a dividing process After dividing the compound semiconductor layer 11 and the bonding layer 4 into a plurality of layers, the heat-distributing substrate 1 is formed in the heat-dissipating substrate 1 along the dividing trench lib formed between the plurality of compound semiconductor layers 11 The position of the base material portion 2 is cut, and the base material portion 2 is formed of a material having a thermal expansion coefficient smaller than that of the embedded portion 3. Further, in the embodiment, the electrode forming process is between the electrode forming process and the dividing process. A roughening process for roughening the light extraction surface 11a of the n-type semiconductor layer 8 is provided. Hereinafter, each process of the method of manufacturing the light-emitting diode of the present embodiment will be described with reference to the drawings. As shown in FIG. 2, the semiconductor layer forming process is performed by sequentially laminating the n-type semiconductor layer 8, the light-emitting layer 7, and the p-type semiconductor layer 6 on the laminated substrate 30 on which the semiconductor crystal can be epitaxially grown. Compound semiconductor layer 11. Specifically, first, a layered substrate 30 composed of a GaAs single crystal having a doped Si and having a GaAs single crystal having a surface inclined by 15° from the (100) plane is prepared. Then, as shown in Fig. 2, the n-type semiconductor layer 8, the light-emitting layer 7, and the p-type semiconductor layer 6 are sequentially laminated on the build-up substrate 30 to form the compound semiconductor layer 11. Here, as a material of the layered substrate 30 for crystal growth of a semiconductor, in addition to the above-described Ga As single crystal, for example, sapphire (α - AhCh single crystal), tantalum carbide (SiC), gallium phosphorus (for example) can be appropriately selected. GaP), GaN, etc., a substrate material capable of crystallizing a group III-V semiconductor on the surface epitaxial growth. Further, the size of the laminated substrate 30 is usually 2 to 3 or less in diameter, and a plurality of compound semiconductor layers are formed thereon. However, the present invention is not limited thereto. For example, a circular shape having a diameter of 4 to 6 Å may be used. Or a larger substrate such as a rectangular substrate. In the present embodiment, as a semiconductor layer forming process, a buffer layer (not shown) made of GaAs doped with an n-type characteristic of Si is formed on the laminated substrate 30 of -27-201044632, and is sequentially arranged thereon. Lamination: an n-type semiconductor layer 8, which is composed of doped Si (AluGao. + .sIno.sP); an illuminating layer 7, which will be composed of doped Si having an n-type characteristic (AluGao. + .sIn^P) The n-type cladding layer 7a is alternately composed of 10 pairs of layers which are undoped (eight1..2〇&.8).5111..5? ).7).3).5111..5? The multiple well layers 7b formed by the barrier layer and the p-shaped characteristics of doped Mg are obtained by (Al〇.7Ga〇.3)Q a second cladding layer composed of .5In(».5P and a cladding layer 7 composed of a film of (8.1.5〇3..5)..5111..5? And a P-type semiconductor layer 6 which is composed of GaP doped with Mg and having p-type characteristics (see also FIG. 1A). The n-type semiconductor layer 8' luminescent layer 7 and 构成 constituting the compound semiconductor layer 11 The method of growing the semiconductor layer 6 is not particularly limited, and By sputtering, MOCVD (organic metal chemical vapor deposition), HVPE (hydride vapor phase growth), ΜΒΕ (molecular line epitaxial growth) or LPE (liquid phase epitaxy), etc. In the preferred growth method, the MOCVD method is used from the viewpoint of film thickness controllability and mass productivity. In the present embodiment, a buffer layer composed of the above composition and an n-type semiconductor are formed. In the layers of the layer 8, the light-emitting layer 7, and the p-type semiconductor layer 6, trimethylaluminum ((CH3; hAl), trimethylgallium ((CH〇3Ga), and trimethylindium ((CH3)) can be used as a raw material. 3In), etc., a reduced-pressure organometallic chemical vapor deposition method (MOCVD method) of a group III constituent element, and each layer is formed on the laminated substrate 30" as a doping when forming the p-type cladding layer 7c and the p-type semiconductor layer 6 For the Mg raw material, as described above, dicyclopentadienylmagnesium (bis-(C5H5)2Mg) or the like can be used. -28- 201044632 Further, the Si raw material doped when the n-type semiconductor layer 8 and the n-type cladding layer 7a are formed can be used. Use dioxane (ShH6), etc. Further, as a raw material of the group V constituent element, phosphine (PH3) can be used. Or 胂 (AsH〇, etc.) As the growth temperature at the time of forming the compound semiconductor layer 11, the P-type semiconductor layer 6 composed of, for example, GaP may be in the range of 70 〇 to 780 ° C, and preferably 75 ° ° C. Further, the other layers, i.e., the growth temperature of each of the layers including the n-type semiconductor layer 8, the light-emitting layer 7, and the buffer layer may be about 700 to 780 ° C, and preferably about 70 ° C. Here, the buffer layer composed of GaAs can form a carrier concentration of about l.lxl〇18cnT3~5xl〇i8cnT3 to the same extent as the single crystal substrate, and the film thickness is formed. Also, by (eight 1. 5 〇 & 〇. 5). .5111. The 11-type semiconductor layer 8 composed of .5? can form a carrier concentration of about 0.1 x 1018 cm_3 to 5 x 1018 cm_3, and the film thickness is formed to a degree of 1 to 8 /z m. Further, the n-type cladding layer 7a constituting the light-emitting layer 7 can have a carrier concentration of about lxl017cm_3 to 30xl17cm-3, and a film thickness of about 0.1 to 2/zm. The multiple well layers 7b are undoped and the film thickness can be formed to a degree of 0.2 to 2 μm. The p-type cladding layer 7c can form a carrier concentration of about lxl 〇l7Cm_ 3~20xl7cnT 3 and a film thickness of 0.1 to 3 degrees from m. Further, the P-type semiconductor layer 6 can form a carrier concentration of about 0.5 x 1018 cm -3 to 5 x 1018 cm_3' to a thickness of 0.5 to 20 μm. When the thickness of the p-type semiconductor layer 6 is small, the current diffusion is insufficient, and the current cannot be uniformly supplied to the light-emitting layer 7, and the light-emitting efficiency is lowered. In addition, in the case of forming an unnecessary thick film, there is a case where the cost becomes high, and the growth of the layer becomes difficult in the technique -29-201044632. Further, when the carrier concentration of the p-type semiconductor layer 6 is low, current diffusion becomes insufficient. When the cell is over-tube, there is a problem that the crystal quality is lowered. "Laminar forming process" The laminated body forming process is as shown in FIGS. 3A and 3B, after the p-type ohmic electrode 5 is formed on each p-type semiconductor layer 6 of the compound semiconductor layer 11, and the build-up bonding layer 4 is covered to cover the foregoing. The p-type ohmic electrode 5 forms a layered body 40. Specifically, as shown in FIG. 3A, first, a laminated film composed of an Au Be alloy film and an Au film is sequentially laminated on the p-type semiconductor layer 6 by photolithography, and patterned by p-forming. Type ohmic electrode 5. At this time, the p-type ohmic electrode 5 is formed in a circular shape, for example, and is preferably formed on the P-type semiconductor layer 6 at a predetermined interval from the viewpoint of current diffusion. Further, mirror processing is performed on the P-type semiconductor layer 6 in advance, and it is preferable from the viewpoint of obtaining good contact between the p-type semiconductor layer 6 and the P-type ohmic electrode 5 and the bonding layer 4. Next, as shown in Fig. 3B, the bonding layer 4 is further formed on each of the compound semiconductor layers 11. Specifically, first, a light-transmitting thin film layer 4a made of ITO or the like is formed to cover the P-type ohmic electrode 5 formed on the p-type semiconductor layer 6 of the compound semiconductor layer 11. Then, a bonding layer 4b made of Ag or the like, a barrier layer 4c made of Mo or the like, an Au layer 4d, and a metal bonding layer 4e made of an AuSn material or the like are sequentially laminated thereon to form a bonding layer 4. . As a method of forming the respective layers constituting the bonding layer 4, the previously known method can be employed without any limitation. -30-201044632 _ The P-type ohmic electrode 5 and the bonding layer 4 are laminated on each of the compound semiconductor layers 11 formed on the build-up substrate 30 by the above-described procedure to form the laminated body 40. "Substrate forming process" The substrate forming process is as shown in FIGS. 4A and 4B. After at least a part of the base portion 2 is formed into a recess 21 by etching, the embedded portion 3 is formed inside the recess 21, thereby forming a substrate. Heats the substrate 1. Specifically, first, the metal Mo block is subjected to a rolling treatment, and the obtained rolled plate is punched by a pressure machine to obtain a flat substrate portion 2. At this time, as a rolling treatment method of the metal Mo, the previously known method can be used without any limitation. Next, as shown in Fig. 4A, the concave portion 21 is formed on the lower surface 2b of the base material portion 2. In the case of the light-emitting diodes a shown in Figs. 1A and 1B, the concave portion 21 is formed in a circular cross section. In this case, as a method of processing the base portion 2, for example, in addition to an etching method and a mechanical processing method, a conventional technique such as a hole processing method for high-output laser can be applied, but a suitable amount of Q is produced and low. From the viewpoint of cost and the like, an etching method is preferably employed. Next, as shown in Fig. 4B, the embedded portion 3 is formed by embedding a Cu material inside the concave portion 21 formed on the lower surface 2b side of the base portion 2. Specifically, the embedded portion 3 is formed by embedding a Cu material in the concave portion 21 by, for example, a plating method or a printing method. In this case, the method of forming the embedded portion 3 is not particularly limited. However, from the viewpoint of mass productivity, the plating method is preferably employed. In particular, from the viewpoint of high processing speed and improved productivity, it is more preferable to use electrolysis. Mining method. Further, a method of forming a plating material by embedding a Cu material in the concave portion 21 of the base material portion 2 and forming the embedded portion 3 from -31 to 201044632 to form a plating portion to the lower surface 2b may be employed. Alternatively, other metal materials which are more stable, such as Au, Ag, Ni, pt or Cu, cover the lower surface 2b of the substrate portion 2 and the surface of the embedded portion 3. Further, from the viewpoint of obtaining good bonding properties in a bonding process to be described later, it is preferable to subject the surface to mirror processing in accordance with the surface state of the embedded portion 3. Further, in addition to the Cu material, the process can be simplified by imparting a eutectic metal for die bonding. In the substrate forming process of the present embodiment, the substrate portion 2 〇 uses the Mo material ′ and the Cu material is used as the embedded portion 3, but the invention is not limited thereto. For example, as the base material portion 2, w which has a characteristic of a thermal expansion coefficient similar to that of the Mo material or an alloy material of Mo and W may be used as described above. Further, the embedding portion 3 may be formed of a material containing at least one or more elements selected from the group consisting of Au, Ag, Cu, or A1, and may be appropriately selected and used. In the substrate forming process before the bonding process to be described later, the Q example in which the recessed portion 21 is formed in the base portion 2 and the embedded portion 3 is provided will be described, but the present invention is not limited thereto. For example, a method of forming the embedded portion 3 by forming the concave portion 21 on the lower surface 2b after joining the laminated body 40 and the upper surface 2a of the base portion 2 in the joining process may be employed. In this case, for example, after the bonding layer 4 of the laminated body 40 and the upper surface 2a of the base material portion 2 are joined in the lamination process, the removal process and the electrode formation process described later are performed, and the separation process is performed. Before the element is divided, the concave portion 21 is formed on the lower surface 2b of the base portion 2 by an etching method. Then, a Cu material is buried inside the recess 21, and a plating process is performed to provide the embedding portion 3, thereby forming a method of disposing the heat dissipating substrate 1. -32- 201044632 Further, in the process of forming the recessed portion 21 in the base portion 2 and providing the embedded portion 3, as described above, it is necessary to perform position adjustment while being carried out before or after the joining process to embed The position of the portion 3 corresponds to the position of the compound semiconductor layer 11. In the bonding process, as shown in Fig. 5, the compound semiconductor layer 11 and the heat dissipation substrate 1 are bonded by bonding the bonding layer 4 of the laminated body 40 to the upper surface 2a of the heat dissipation substrate 1 on the surface side. Specifically, as shown in FIG. 5, for example, the metal bonding layer 4e of the bonding layer 4 of the laminated body 20 and the upper surface 2a of the heat dissipation substrate 1 are bonded by AuSn eutectic bonding, and the surface is stabilized based on the upper surface 2a. From the viewpoint of improving the bonding property, it is preferable to form Pt or Ni or the like in advance on the upper surface 2a by a sputtering method, a vapor deposition method, a plating method, or the like. When the AuSn eutectic bonding is performed as described above, the substrate (the laminate 40 and the heat dissipation substrate 1) may be first introduced into the substrate bonding apparatus, and evacuated to a pressure of 3×1 (T 5 Pa or less). The temperature is heated to about 400 ° C, and a load of about 100 g/cm 2 is applied to perform eutectic bonding. Thereby, an ohmic contact is formed between the bonding layer 4 and the heat dissipation substrate 1 , and the laminated body 40 is integrally formed (the compound semiconductor layer) 11) and the heat dissipation substrate 1. In the present embodiment, the example in which the compound semiconductor layer 11 and the heat dissipation substrate 1 are bonded by the eutectic bonding of the bonding layer 4 and the heat dissipation substrate 1 is described. However, the present invention is not limited thereto. For example, the bonding of the compound semiconductor layer 1 1 to the heat dissipation substrate 1 may be carried out by any conventional method such as a heating press method or an adhesive without any limitation. -33 - 201044632 "Removing the process" The process is removed as shown in Fig. 6A and As shown in FIG. 6B, the laminated substrate 30 and the buffer layer (not shown) are peeled off from the compound semiconductor layer 11, and the light extraction surface 11a of the n-type semiconductor layer 8 is exposed. The method of omitting the buffer layer of the pattern and the substrate 30 for lamination may be performed by any conventional technique such as a mechanical honing method, an etching method using an ammonia etchant, or a laser scatter method without any limitation. From the viewpoint of productivity, it is preferable to use an etching method. Specifically, as shown in FIG. 6B, the layered substrate 30 composed of a single crystal of GaAs is removed by using an etchant such as ammonia or hydrogen peroxide. The buffer layer exposes the interface between the n-type semiconductor layer 8 and the buffer layer, that is, the light extraction surface 11a is exposed. "Electrode forming process" The electrode forming process is as shown in Fig. 7, and is on the light extraction surface 11a of the n-type semiconductor layer 8. Then, an AuGe/Ni alloy film having a thickness and an Au film having a thickness are deposited by vacuum deposition, and then patterned by a general photolithography method to form an n-type electrode layer 9. Further, an n-type electrode layer is formed. 9 is not limited to the layer structure described above, and may be formed using other materials, and may be formed by, for example, a sputtering method or a vapor deposition method. "Roughening Process j The roughening process is to form the n-type semiconductor layer 8 The light extraction surface iia is roughened. The method of roughening the light extraction surface 11a can be used without any limitation, and the method previously employed in the field is used. "Split Process" The division process is as shown in Figs. 8 to 10, and the compound is removed by etching. -34- 201044632 After at least a part of the semiconductor layer 11 is divided into a plurality of portions, the breaking groove lib ' exposed along the surface of the heat dissipation substrate 1 is cut by a dicing saw or the like on the base portion 2 of the heat dissipation substrate 1. The wafer is cut into element units as the light-emitting diode A. Then, the wafer (element) is cleaned after the division to remove the deposits generated during the cutting. Further, the substrate on which the heat-dissipating substrate 1 is formed is formed. In the forming process, the Cu plating layer formed on the lower surface 2b of the base material portion 2 and the surface of the embedded portion 3 is removed. Then, as shown in Fig. 9, the breaking groove lib formed between the plurality of compound semiconductor layers 11 is cut at the position of the base portion 2 of the heat dissipation substrate 1 by, for example, using a dicing saw. By performing such a division process, a four-corner shape having a side length of 500 or more as shown in FIG. 10 (see also FIG. 1A and FIG. 1B) is obtained (the example shown in FIG. 1B is a square shape). a plurality of light-emitting diodes A. Here, in the method for producing the light-emitting diode A of the present invention, the base material portion 2 is made of a material having a thermal expansion coefficient smaller than that of the embedded portion 3. In the above-described singulation process, since the position at which the heat-dissipating substrate 1 is cut becomes the position of the base material portion 2 excellent in workability, no stress is generated on the compound semiconductor layer 11, and the cutting process can be easily performed. As a result, damage or the like is not caused on the compound semiconductor layer 11, so that the light-emitting diode A having high light-emitting efficiency can be produced at a high yield. As described above, the method of manufacturing the light-emitting diode A of the present embodiment includes a bonding process, and the laminated body 40 formed by laminating the compound semiconductor layer 11 and the bonding layer 4 on the laminated substrate 30 is provided. The material portion 2 and the heat dissipation substrate 1 formed in the embedded portion 3 formed in the recess portion 21 (or the penetration portion) of the base portion 2 - 35 - 201044632, thereby bonding the compound semiconductor layer 11 and the heat dissipation substrate 1; In the process, the laminated substrate 30 is peeled off from the compound semiconductor layer 11, and the light extraction surface 11a of the n-type semiconductor layer 8 is exposed; and the dividing process is performed along a dividing groove formed between the plurality of compound semiconductor layers 11 Lib is cut at the position of the base material portion 2 in the heat dissipation substrate 1, and the base material portion 2 is made of a material having a thermal expansion coefficient smaller than that of the embedded portion 3. Therefore, damage such as cracking in the compound semiconductor layer 11 can be prevented. The light-emitting diode A having improved yield and excellent heat dissipation properties of the heat-dissipating substrate 1 is obtained. Thereby, the light-emitting diode A which can apply a high current and is excellent in luminous efficiency can be manufactured with high manufacturing efficiency. [Light Emitting Diode Lamp] Using the light emitting diode of the present invention, the lamp can be constructed by means well known to those skilled in the art. As such a lamp, it can be used for a general-purpose projectile type, a side view type for a portable machine, a top view type for a display, and the like. For example, in the case of assembling the upper and lower electrode type light-emitting diodes A in the top view type, the n-electrode terminal 84 or the p-electrode terminal which is provided on the surface of the fixing substrate 85 can be used. In one of the examples of 83, the side of the heat-dissipating substrate 1 of the light-emitting diode is placed next to the electrode terminal 83, and the n-type electrode layer 9 of the light-emitting diode A is bonded to the n-electrode terminal by the wire 86. 84. Then, a top view type light-emitting diode lamp (lamp) 80 as shown in Fig. 11 can be produced by molding the periphery of the light-emitting diode 以 with a molding resin 81 made of a transparent resin. In the light-emitting diode lamp 80 shown in FIG. 1 (see also FIGS. 1A and 1B), the voltage applied between the P electrode terminal 83 and the n electrode terminal 84 via the above configuration is passed through the negative electrode. Side n-type electrode layer 9 and positive side -36-

G 201044632 The heat-dissipating substrate 1 is applied to the compound semiconductor layer 11 to cause the light to be emitted, and then the light emitted from the light-emitting layer 7 is taken out toward the light-emitting diode lamp F. Since the light-emitting diode lamp 80 of the present embodiment is composed of the light-emitting diodes A, it is excellent in that it has excellent light-emitting characteristics. In particular, even when electric power is applied between the electrodes at a high density as described above, since heat can be efficiently dissipated with the light emission, the high-output light-emitting diode lamp 80 having excellent luminous efficiency can be obtained. Further, in the light-emitting diode lamp 80 of the above configuration, the material of the substrate 85 or the like is used, and the thermal resistance is, for example, 9 ° C, whereby, for example, a power of 0.5 W / mm 2 is applied to the light-emitting diode A. When the light is emitted, in addition to the heat-dissipating substrate, the light-emitting efficiency of the built-in light-emitting diode A can be further increased as a shape of the fixing substrate by the scattering of the fixing substrate 85. In the example shown in Fig. 11, the shape is not limited thereto, and other shapes may be employed. EXAMPLES Hereinafter, the light-emitting diode of the present invention, the method for producing the same, and the embodiment thereof will be appropriately referred to the first to eleventh drawings, and the detailed description is not limited to the examples described below. [Embodiment] Fig. 1A and Fig. 1B are diagrams showing the illuminating pattern produced in the present embodiment, Fig. 1A is a cross-sectional view, and Fig. 1B is a plan view. The figure is illuminated by seven layers 7 of the light-emitting diodes shown in Figs. 1A and 1B. The front side of 80 The above-mentioned brightness of the present invention is 0.5 W/mm2, and the heat generated by the high brightness and the high brightness are preferably adjusted to be below the solid/W. The above heat dissipation effect of the high density 1 is winter, so: high. In addition, the 1 series is formed as a plate and a lamp, but the mode of the diode of the present invention is also a pattern cross-sectional view of the lamp-37-201044632 light diode lamp produced in the eleventh. In the present embodiment, a laminate comprising a compound semiconductor layer provided on a substrate for a buildup layer made of GaAs, a base portion made of a Mo material, and an embedded portion made of a Cu plating layer are bonded. The heat-dissipating substrate 1 formed of 3 has a light-emitting element having an upper and lower electrode structure. In other words, the light-emitting layer 7 is made of an AlGalnP-based compound semiconductor, and a light-emitting diode A having a red light emission is produced, and a light-emitting diode A of a top view type is further produced by using the light-emitting diode A. q "Growth of the compound semiconductor layer (semiconductor layer forming process)" First, a layered substrate 30 composed of a GaAs single crystal having a surface doped with Si from the (100) plane is prepared. Then, a buffer layer made of GaAs doped with an n-type characteristic of Si is first formed on the build-up substrate 30, and a layer is sequentially formed thereon: the n-type semiconductor layer 8 is doped with Si (Al〇.5Ga) 〇.5)〇.5In〇.5P; the light-emitting layer 7 is laminated by an n-type cladding layer 7a composed of Al-doped characteristics (AlpGao. + .sInuP) doped with Si, and 10 pairs alternately Multilayer formed by an undoped (AlD.2Ga〇.8)〇.5Intt.5P well layer and a barrier layer composed of (Al〇.7Ga〇.3)〇.5In〇.5P The well layer 7b and the p-type characteristic doped with Mg are formed by a p-type cladding layer 7c composed of (Alo. 7Gao.Oo.5Ino.5P); and the P-type semiconductor layer 6 is doped with Mg In the present embodiment, when each of the buffer layer, the n-type semiconductor layer 8, the light-emitting layer 7, and the p-type semiconductor layer 6 having the above composition is formed, the third layer is used by the raw material. Decompression organometallic chemical vapor phase reactor of group III constituent elements such as (CH〇3Al), trimethylgallium ((CH3)3Ga) and trimethylindium ((CHOdn)) -38- 201044632 (MOCVD) Law), and Each layer is formed on the laminated substrate 30. As the Mg raw material doped to the P-type cladding layer 7c and the p-type semiconductor layer 6, dicyclopentadienyl magnesium (bis - (CsH^Mg) is used as the doping layer η The Si material of the type semiconductor layer 8 and the n-type cladding layer 7a is made of dioxane (SiiHs). Further, as a raw material of the group V constituent element, scale (ph3) or yttrium (AsH〇) is used. Further, the growth temperature of each layer is used. The P-type semiconductor layer 6 made of GaP is grown at 7501: and each layer including the barrier layer in addition to the n-type semiconductor layer 8 and the light-emitting layer 7 is grown at 730 ° C. In the above film formation process, GaAs is used. The carrier concentration of the buffer layer formed forms a film thickness of about 5×10 18 cm −3 Å to form about 0.2/zm. Further, the carrier concentration of the n-type semiconductor layer 8 forms a film thickness of about 2×1 018 cm −3 ′ to form about 1.5 am. Further, the light-emitting layer 7 is formed. The carrier concentration of the n-type cladding layer 7a is formed to be about 8 x 10 7 cnT 3 , and the film thickness is formed to be about 1 μ m. In addition, the multiple well layer 7b is formed into an uncomplicated (Al〇.2GaD.8) 〇.5ln〇.5P. 10 pairs of laminated structures with (AlD.7Ga〇.3)〇.5lnD.5P, the layer thickness is 0.8/zm. p-type cladding layer 7c Doped with Mg p type (8 〇.7 〇 &.3). 5111..5?, the carrier concentration is 2 parent 10|7 (: 111_3, layer thickness is l / / m. Further, the p-type semiconductor layer 6 is doped with a Mg-type p-type GaP layer having a carrier concentration of 3×10 18 cm −3 and a layer thickness of 3/im. The n-type semiconductor layer 8, the light-emitting layer 7, and the p-type semiconductor layer 6 are sequentially laminated on the build-up substrate 30 by the above respective processes to form the compound semiconductor layer 11. "Formation of a laminate (layer formation process)" Next, the Ρ-type semiconductor layer 6 of the compound semiconductor layer 11 formed by the above process is subjected to mirror processing from the surface to a depth of l//m, and P is processed. The surface roughness of the type semiconductor layer 6 is formed to the extent of about 0.18 nm. -39- 201044632 Next, on the P-type semiconductor layer 6 after mirror honing, a laminated film composed of an AuBe alloy film and an Au film is sequentially laminated by photolithography to be patterned, thereby forming a P-type Ohmic electrode 5. At this time, the film thickness of the Au Be alloy film / Au film was 0.4 / / m / 0.2 jam, respectively, and a plurality of p-type ohmic electrodes 5 having a circular diameter of 20 were formed at intervals of 80 jczm. Next, the bonding layer 4 is formed on the p-type semiconductor layer 6 so as to cover the p-type ohmic electrode 5 formed on the P-type semiconductor layer 6 of the compound semiconductor layer 11. First, a light-transmissive thin film layer 4a made of ITO which forms a transparent conductive film is completely covered with a plurality of p-type ohmic electrodes 5, and then heat-treated at a temperature of 45 ° C to form an ohmic contact. Next, a vapor deposition method is sequentially applied to the surface thereof: a 0.5/zm reflective layer 4b made of an Ag alloy, a 0.1/zm layer of W and a Pt barrier layer 4c, a 0.5/zm Au layer 4d, and The bonding layer 4 is formed of each layer of the metal bonding layer 4e of Ιμη which is composed of an AuGe material (melting point: 386 ° C). "Formation of heat-dissipating substrate (substrate forming process)" Next, the metal Mo block is subjected to a rolling process, and the obtained rolled plate is punched by a press to obtain a flat substrate portion having a thickness of 80/m. 2. Next, on the lower surface 2b side of the base material portion 2, a circular pattern having a diameter of 300 Å/zm was formed at intervals of 500 m. Then, the concave portion 21 having a depth of 65 /zm (the remaining thickness of the base material portion 2: I5jczm) was formed by an etching method. At this time, the diameter of the lower side 2b side after the etching treatment was expanded to 400 / / m, and the vertical cross section was formed into a trapezoidal shape. Next, in the inside of the concave portion 21 formed in the base portion 2, the embedded portion 3 composed of the Cu plating layer is embedded by the electrolytic ore plating method, and further on the lower surface 2b of the base portion 2 and the surface of the embedded portion 3. Implement a comprehensive overlay of lym, -40- 201044632 as a heat sink substrate 1. The heat dissipation substrate 1 has a thermal expansion coefficient of 5.5 Ppm/K and a thermal conductivity of 220 W/m·K. Then, a Pt film of 0.1/zm was formed by sputtering on the upper side 2a to stabilize the surface. "Joining of the compound semiconductor layer and the heat dissipation substrate (joining process)" Next, the compound semiconductor layer is bonded to the metal bonding layer 4e of the bonding layer 4 of the laminated body 40 and the upper surface 2a side of the heat dissipation substrate 1 by eutectic bonding. 11 with the heat sink substrate 1. In the eutectic bonding, (the laminated body 40 and the heat dissipation substrate 1) are first introduced into the substrate bonding apparatus, and evacuation is performed so that the internal pressure of the apparatus becomes 3x10 5 Pa or less. Next, after the substrate temperature was heated to about 400 °C, the upper surface 2a of the heat dissipation substrate 1 and the metal bonding layer 4e were eutectic bonded by applying a load of about 100 g/cm2. "Removal of the substrate for lamination (removal process)" Next, the substrate 30 for lamination is removed from the compound semiconductor layer 11, and the light-emitting surface 11a is exposed. In this case, the laminated substrate 30 and the buffer layer and the underlying layer (not shown) are selectively removed by using an ammonia-based etchant or the like. "Formation of n-type electrode layer (electrode forming process)" Next, an n-type electrode layer 9 is formed on the n-type semiconductor layer 8. At this time, first, 0.15 μm of AuGe (Ge mass ratio: 12%), 0.05//m of Ni, and Au were sequentially deposited on the n-type semiconductor layer 8 by vacuum evaporation. Then, patterning was carried out by a general photolithography method, and then alloying was carried out by heat treatment at a temperature of 420 ° C for 3 minutes to form an n-type electrode layer 9 having a low contact resistance. Further, at this time, the heat treatment substrate 1 is simultaneously subjected to alloying treatment. -41 - 201044632 "Wafer Dividing (Split Process)" Next, the wafer produced by each of the above processes is cut by dicing, and the wafer is divided into element units by planar observation to form a square (four-corner shape). . First, after the compound semiconductor layer 11 and the bonding layer 4 are removed by etching along a predetermined cutting line, the position of the substrate portion 2 made of Mo material in the exposed heat-dissipating substrate 1 is obtained by using a dicing saw blade to which a diamond blade is attached. Cut at a pitch of 0.5 mm. Then, an adhesive sheet is bonded to the side of the compound semiconductor layer 1 to protect the compound semiconductor layer 11, and the cross section is washed by a wet method. By the above-described respective procedures, a wafer-shaped light-emitting diode A having a square shape of 500 / zm on the side of the plan view was produced. "Production of Lamp" A top view type light-emitting diode lamp 80 as shown in Fig. 1 is produced by mounting the light-emitting diode A obtained by the above procedure. First, the heat-dissipating substrate 1 side of the light-emitting diode A is placed on the p-electrode terminal 83 provided on the surface of the fixing substrate 85 having a thermal resistance of 9 ° C/W, and the light-emitting diode A is made of a wire 86. The electrode layer 9 is bonded to the n electrode terminal 84. Then, a top view type light-emitting diode lamp (lamp) 80 as shown in Fig. 11 is produced by molding the periphery of the light-emitting diode body with a molding resin 81 composed of a transparent resin. "Measurement of Light-Emitting Characteristics" The light-emitting diode lamp 80 in which the light-emitting diode A obtained by the above procedure is incorporated is connected to the n-type electrode layer 9 and the heat-dissipating substrate via the n-electrode terminal 84 and the p-electrode terminal 83. When a forward current flows between the electrodes of 1 , -42 - 201044632 emits red light having a dominant wavelength of 620 nm. Further, when the forward current of 150 V was applied between the electrodes at a forward voltage of 2.2 V, the luminous efficiency was about 7 μm /W', and it was found that it had high luminous efficiency. In addition, the power density at this time is 1.43 W/mm2. [Comparative Example 1] In Comparative Example 1, a light-emitting diode was produced in the same manner as in the above embodiment except that the entire substrate was made of a Cu material and a heat-dissipating substrate having a thickness of 80 cm was used, and the light-emitting diode was further used. A top view type light emitting diode lamp was produced in the same manner as in the above embodiment. The heat-dissipating substrate made of the Cu material used in this comparative example had a thermal conductivity of 3 9 8 W /m·K and a thermal expansion coefficient of 16_8 ppm/K. In this comparative example, in the bonding process, after the heat-dissipating substrate and the laminated body including the compound semiconductor layer were bonded, cracking occurred in the compound semiconductor layer. It is considered that since the difference in thermal expansion coefficient between the heat dissipation substrate and the compound semiconductor layer is large, large stress is generated on the compound semiconductor layer to cause cracking. Further, in the comparative example, when the wafer division is performed by the division process, the blade of the dicing blade is expensive, and a large number of defects occur in the wafer, and only a small number of wafers can be produced, resulting in a low yield. Therefore, it is understood that the wafer after the division of the comparative example almost becomes unqualified, and is not a practical process. Further, a lamp comprising the light-emitting diode of the comparative example which can be produced without causing damage during the dividing process is passed between the n-type electrode layer and the electrodes of the heat-dissipating substrate via the n-electrode terminal and the p-electrode terminal. When a forward current flows, red light having a dominant wavelength of 620 nm is emitted. Further, the luminous efficiency when a forward current of 150 V was applied between the electrodes at a forward voltage of 2.2 V was about 721 m/W, which was not problematic in terms of luminous efficiency, but as described above, -43- 201044632 This comparison Since the wafer after the division is almost unqualified, it is not practical from the viewpoint of industrial productivity. [Comparative Example 2] In Comparative Example 2, a light-emitting diode was produced in the same manner as in the above embodiment except that the entire substrate was made of a Mo material and a heat-dissipating substrate having a thickness of 80 μm was used, and the light-emitting diode was further used. A top view type light emitting diode lamp was produced in the same manner as in the above embodiment. The heat-dissipating substrate made of Mo material used in this comparative example had a thermal conductivity of 138 W/m·K. In this comparative example, since the difference in thermal expansion coefficient between the heat dissipation substrate and the compound semiconductor layer composed of the Mo material is small, no damage occurs in the compound semiconductor layer in the bonding process, and the workability in the division process is also improved. And become the high yield. Further, when the lamp comprising the light-emitting diode of the comparative example was assembled, when a forward current was flowed between the n-type electrode layer and each of the electrodes of the heat-dissipating substrate via the n-electrode terminal and the p-electrode terminal, the emission dominant wavelength was 620 nm. The red light. Further, the luminous efficiency when a forward current of 150 mA was supplied between the electrodes at a forward voltage of 2.2 V was about 621 m/W, so that the luminous efficiency was inferior to that of the above embodiment. It is considered that the entire heat dissipating substrate is made of a Mo material, and although the workability and the like at the time of division are excellent, the heat dissipation property is insufficient, so that the luminous efficiency is lowered. From the above results, it is understood that the light-emitting diode of the present invention and the lamp using the same have excellent light-emitting efficiency and high luminance, and the method for producing a light-emitting diode of the present invention is excellent in yield. [Industrial Applicability] -44 - 201044632 The light-emitting diode system of the present invention provides a light-emitting diode which has excellent heat dissipation characteristics and is higher in efficiency than before, and is therefore suitable for use in various display lamps and Lighting equipment, etc. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a schematic cross-sectional view showing an example of a light-emitting diode of the present invention. Fig. 1B is a plan view showing the light emitting diode of Fig. 1A. Fig. 2 is a view showing a 0 process chart of an example of a method for producing a light-emitting diode of the present invention. Fig. 3A is a process chart for explaining an example of a method for producing a light-emitting diode of the present invention. Fig. 3B is a process chart for explaining an example of a method for producing a light-emitting diode of the present invention. Fig. 4A is a process chart for explaining an example of a method for producing a light-emitting diode of the present invention. Fig. 4B is a process chart for explaining an example of the method for producing a light-emitting diode of the present invention. Fig. 5 is a process diagram for explaining an example of a method for producing a light-emitting diode of the present invention. Fig. 6A is a process diagram for explaining an example of a method of manufacturing the light-emitting diode of the present invention. Fig. 6B is a process diagram for explaining an example of a method of manufacturing the light-emitting diode of the present invention. Fig. 7 is a process chart for explaining an example of a method for producing a light-emitting diode of the present invention. -45- 201044632 Fig. 8 is a process diagram for explaining an example of a method of manufacturing the light-emitting diode of the present invention. Fig. 9 is a process chart for explaining an example of a method for producing a light-emitting diode of the present invention. Fig. 10 is a process chart for explaining an example of a method for producing a light-emitting diode of the present invention. Fig. 1 is a schematic cross-sectional view showing an example of a lamp comprising the light-emitting diode of the present invention. G% [Description of main component symbols] 1 heat dissipation substrate 2 base material portion 2a upper surface (one surface side) 2b lower surface 3 buried portion 4 bonding layer 4a light transmissive film layer 4b reflective layer 4 c barrier layer 4d Au layer 4e metal bonding layer 5 P-type ohmic electrode 6 P-type semiconductor layer 7 luminescent layer 7a η-type cladding layer -46 - 201044632

7b multiple well layer 7c P-type cladding layer 8 n-type semiconductor layer 9 n-type electrode layer 11 compound semiconductor layer 1 la light extraction surface 1 lb dividing groove 21 concave portion 30 laminated substrate 40 laminated body 80 light-emitting diode lamp ( Lamp 81 Molding resin 83 Ρ electrode terminal 84 η electrode terminal 85 fixing substrate 86 wire A light-emitting diode F front direction -47-

Claims (1)

201044632 VII. Patent application scope: 1. A light-emitting diode having a wafer structure in which at least a compound semiconductor layer is laminated on a substrate, and a light-emitting surface of the compound semiconductor layer is characterized in that: the substrate is made of a substrate portion And a structure surrounded by the base material portion, wherein the base material portion has a smaller thermal expansion coefficient than the embedded portion. 2. The light-emitting diode according to claim 1, wherein the front substrate portion and the buried portion are respectively made of different metal materials. 3. The light-emitting diode of claim 1 or 2 The thermal expansion between the substrate portion and the compound semiconductor layer is within ±1.5 ppm/K. 4. For a light-emitting diode according to item 1 of the patent application, wherein the front thermal conductivity is 200 W/m·K or more. 5. For a light-emitting diode according to item 1 of the patent application, wherein the front Q consists of molybdenum or tungsten, or an alloy material of the same. 6. The light-emitting diode of claim 1, wherein the front portion comprises at least one selected from the group consisting of gold, silver, copper or aluminum. 7. The light-emitting diode of claim 6, wherein the front layer comprises at least any one selected from the group consisting of gold, silver, copper or aluminum. 8. The light-emitting diode according to claim 1, wherein the recess is formed in the portion, and the embedded portion is provided in the recess. The upper side of the light-emitting layer is composed of the substrate of the material of the embedded portion. The base material of the substrate having the difference of the front coefficient is the substrate of the element on the embedded portion of the embedded portion - 48- 201044632. 9. The light-emitting diode according to claim 1 of the patent application, wherein the aforementioned embedding The thickness of the portion is 70% or more of the thickness of the base portion. 10. The light-emitting diode according to claim 1, wherein a through portion is formed in the base portion, and the embedded portion is provided in the through portion. 11. The light-emitting diode according to claim 1, wherein the light-emitting layer included in the compound semiconductor layer is made of a material containing AlGalnP or AlGaAs. 12. The light-emitting diode of claim 1, wherein the substrate is formed into a square shape having a length of 500 # m or more on each side in plan view. 13. The light-emitting diode according to claim 1, wherein the compound semiconductor layer is formed by laminating at least a layer of a P-type semiconductor layer, a light-emitting layer and an n-type semiconductor layer on the substrate. 14. The light-emitting diode of claim 13, wherein an n-type electrode layer of a negative electrode is further provided on the n-type semiconductor layer of the compound semiconductor layer, and the substrate is a positive electrode and is interposed between the electrodes Electric power having a density of 0.5 W/mm 2 or more is applied. 15. The light-emitting diode of claim 1, wherein the substrate and the compound semiconductor layer are joined by a metal bonding layer. 16. The light-emitting diode according to claim 1, wherein the substrate and the compound semiconductor layer are directly bonded to each other. 17. A method of producing a light-emitting diode, comprising: forming a layered body, forming a compound semiconductor layer containing at least a light-emitting layer on a substrate for a buildup, and forming a second semiconductor provided in the compound semiconductor layer After forming a second electrode having an ohmic property on the layer, the build-up bonding layer covers the second electrode to form a laminated body; -49- 201044632 The process of bonding the laminated body and the substrate is formed by etching at least a part thereof a buried portion is formed in the recessed portion or the penetrating portion or the penetrating portion to form a substrate, and then the bonding layer of the layered body and the substrate are formed on the surface side of the substrate and the substrate; and the process of forming the first electrode is performed by the compound layer After the light extraction surface of the semiconductor layer of the compound semiconductor layer is exposed by the substrate, the first electrode is taken out by the light, and the process of dividing into the element unit is performed by dividing the bonding layer of the compound into a plurality of layers. The dividing groove between the precursor semiconductor layers is cut at the position of the base portion, and is divided Element into the unit: the base portion is constituted by a thermal expansion coefficient than the embedded portion. 18. A method of producing a light-emitting diode, comprising: forming a semiconductor layer forming process on a substrate for a buildup to an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer, and forming a semiconductor layer; Forming a p-type ohmic electrode on the germanium-type semiconductor layer of the compound semiconductor to cover the germanium-type ohmic electrode to form a laminated body; and forming a substrate by forming a recess or penetrating through at least one of the base portions After the portion, the substrate is formed by forming the embedded portion in the concave portion or the embedded portion; and the semiconductor layer and the plurality of chemical plates are formed on the first surface of the base portion which is formed by bonding and bonding the conductive layer on the base portion. In the case where the substrate is small, the material layer is formed in a small number of layers, and the portion of the layered bonding layer provided by the layer is formed by the inner surface of the etched portion. The bonding process is performed by joining one side of the bonding plate of the laminated body. Bonding the compound semiconductor layer and the removal process by stripping the substrate from the compound semiconductor layer to form the compound semiconductor The layer has a light extraction surface of the front body layer exposed; the electrode formation process is performed to form an n-type electrode layer on the n-type semiconductor layer; and the dividing process is performed by forming the compound semiconductor layer and the front part into a plurality of layers In the dividing groove between the plurality of compounds, the base portion of the substrate is formed of a thermal expansion coefficient higher than that of the embedded portion. 19. In the manufacturing process of the light-emitting diode of claim 18, the substrate forming process is performed by using a plating method to form the embedded portion inside the portion. The method of claim 18, wherein the substrate forming process is formed of molybdenum or tungsten, and the alloy material forms the substrate portion. 21. The method of forming a light-emitting diode according to claim 18, wherein the substrate forming process comprises forming the buried portion 2 from a material containing any one or more elements selected from the group consisting of gold, silver, and less. In the method of forming the light-emitting diode, the electrode forming process and the dividing process are performed by the light extraction surface layer of the n-type semiconductor layer and the substrate; and the n-type semiconductor light is used for the layering a method of fabricating a material having a small position at which the junction layer semiconductor layer of the bonding layer is removed, a method of manufacturing a recessed body of the substrate portion, or a method for fabricating the same, and a method for fabricating copper or aluminum Roughening to roughen -51 - 201044632 23. A light-emitting diode obtained by the method of manufacture of claim 17 or item 18. 2 4. The lamp is constructed using the light-emitting diode of the first application of the patent scope. -52-