201022699 六、發明說明： 【發明所屬之技術領域】 本發明係有關於一種中頻處理引擎、中頻載波移除方法、以 及全球導航衛星系統(Global Navigation Satellite System，以下簡稱 GNSS)接收器，且特別係有關於一種由具有不同載波頻率之多個 展頻信號(spread spectrum signal)所共用之中頻（interme(jiate frequency，以下簡稱IF)處理引擎(processing engine)、將IF信號中 之具有不同頻率之多個IF載波移除之IF載波移除方法、以及使用 此IF處理引擎之GNSS接收器。 【先前技術】 現在’已有多個GNSS可使用’包含：全球定位系統(G1〇bal Positioning System，以下簡稱為GPS) ’伽利略(Galileo)系統以及全 球導航衛星系統(GLObal NAvigation Satellite System，以下簡稱為 GLONASS)。GPS 係使用分碼多重進接(Code Division Multiple Access，以下簡稱CDMA )。亦即，於GPS中，衛星係藉由調制 具有不同的PRN碼(pseudo-random noise code，偽隨機碼)之各個衛 星之信號來互相區分* GLONASS係使用分頻多重進接(frequency201022699 6. Technical Description: The present invention relates to an intermediate frequency processing engine, an intermediate frequency carrier removal method, and a Global Navigation Satellite System (GNSS) receiver, and In particular, it relates to an interme (hereinafter, IF) processing engine shared by a plurality of spread spectrum signals having different carrier frequencies, and having different frequencies in the IF signal. IF carrier removal method for multiple IF carrier removal, and GNSS receiver using this IF processing engine. [Prior Art] Now 'a plurality of GNSS can be used' includes: Global Positioning System (G1〇bal Positioning System) , hereinafter referred to as GPS) 'Galileo system and GLOBAL NAvigation Satellite System (hereinafter referred to as GLONASS). GPS uses Code Division Multiple Access (CDMA). In GPS, satellites have different PRN codes by modulation (pseudo-random noise co De, pseudo-random code) The signals of each satellite are distinguished from each other* GLONASS uses frequency division multiple access (frequency
Division Multiple Access，以下簡稱 FDMA )。亦即，於 GLONASS 中，衛星係藉由使用不同之載波頻率來互相區分。表i係為L1及 L2次頻帶中之Gl〇NASS載波頻率的示意圖。 201022699 廳 編號 L1娜帶中頻率之標稱値 (單位:MHz) 通道 編號 L2次頻帶中頻率之標稱値 (單位:MHz) 13 1609.3125 13 1251.6875 12 1608.75 12 1251.25 11 1608.1875 11 1250.8125 10 1607.625 10 1250.375 09 1607.0625 09 1249.9375 08 1606.5 08 1249.5 07 1605.9375 07 1249.0625 06 1605.375 06 1248.625 05 1604.8125 05 1248.1875 04 1604.25 04 1247.75 03 1603.6875 03 1247.3125 02 1603.125 02 1246.875 01 1602.5625 01 1246.4375 00 1602.0 00 1246.0 -01 1601.4375 -01 1245.5625 -02 1600.8750 -02 1245.1250 -03 1600.3125 •03 1244.6875 -04 1599.7500 -04 1244.2500 -05 1599.1875 -05 1243.8125 -06 1598.6250 -06 1243.3750 -07 1598.0625 •07 1242.9375Division Multiple Access, hereinafter referred to as FDMA). That is, in GLONASS, satellites are distinguished from one another by using different carrier frequencies. Table i is a schematic diagram of the Gl〇NASS carrier frequency in the L1 and L2 subbands. 201022699 Hall number L1 Na-band nominal frequency 値 (unit: MHz) Channel number L2 sub-band frequency nominal 値 (unit: MHz) 13 1609.3125 13 1251.6875 12 1608.75 12 1251.25 11 1608.1875 11 1250.8125 10 1607.625 10 1250.375 09 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 1245.1250 -03 1600.3125 •03 1244.6875 -04 1599.7500 -04 1244.2500 -05 1599.1875 -05 1243.8125 -06 1598.6250 -06 1243.3750 -07 1598.0625 •07 1242.9375
表1 第1圖係依先前技術之現代GNSS接收器100的基本結構之 概要示意圖。接收器100包含：天線101，射頻(radiofrequency， 零 以下簡稱 RF)前端(front end) 112，IF 降頻器(down-converter) 123， 本地振盪器128 ’相關器引擎(correlator engine) 130 ’相關器記憶體 135 ’本地碼產生器147，以及處理器150。接收器100經由天線 101接收RF頻帶中之衛星信號。已接收之RF信號於RF前端112 中被降頻為IF信號，並得到放大。IF信號傳輸(pass to)至IF降頻 器123。IF降頻器123藉由使用由本地振盪器128提供之ip載波 將正信號降頻為基頻信號。基頻信號被傳輸至相關器引擎13〇， 以與本地碼產生器147提供之碼進行相關。相關結果係儲存於相 5 201022699 關器記憶體135以用於累計。處理器150處理所述相關結果及/或 相關結果之累計，以產生位置-速率-時間(position-velocity-time， 以下簡稱PVT)資訊。於此結構中，IF載波頻率僅可為一固定值。 然而，於實作中，來自不同衛星(例如，以上所述之GLONASS中 之衛星)或不同GNSS系統之展頻信號(spread spectrum signal)可能 使用不同之載波。亦即’所接收的展頻信號之載波頻率係為不相 同。因此，現有接收器(例如，GLONASS接收器)係使用多個IF 載波移除模組’以提升衛星搜尋及跟蹤之效率。多個IF載波移除 模組中之每一個係用於特定之載波頻率。 【發明内容】 為解決以上技術問題，本發明提供了一種正處理引擎、正載 波移除方法、以及GNSS接收器。 本發明提供了一種IF處理引擎，用於GNSS接收器，包含： 本地振m器部件’產生具有不同頻率之多個載波；正降頻器，分 別將多個IF信號與本地振I神件產生之載波混頻 ，以產生多個 已移除IF載波之信號區段；時分多工控制器，排程E降頻器之各 個混頻作業，以及緩觸，儲存由if降顧產生之已移除正載波 之信號區段。 提供了—種㈣波移除方法，麟Ο·接收器中， 將號巾之具林_率之多個IF載波雜，所述方法包含： 201022699 產生具有不同頻率之多個載波；基於時分多工排程，分別將載波 與IF信號混頻’以產生已移除IF載波之信號區段；以及儲存所述 已移除IF載波之信號區段。 本發明提供了一種GNSS接收器，包含：RF前端，將RF信 號降頻為IF信號；IF處理引擎，提供具有不同頻率之多個載波， 並於時分多工排程中藉由使用載波將正信號降頻為基頻信號；以 及相關器引擎，將基頻信號與碼相關，以產生多個相關結果。 利用本發明提供之GNSS接收器，具有不同載波頻率之展頻 信號可共用同一個IF載波移除模組，即本發明提供之正處理引 擎，以處理先前技術中之多個正載波移除模組的作業。 【實施方式】 _ 於說明書及後續的申請專利範圍當中使用了某些詞彙來指稱 特定的元組。所屬領域中具有通常知識者應可理解，硬體製造商 可能會用不同的名詞來稱呼同樣的元組。本說明書及後續的申請 專利範圍並不以名稱的差異來作為區分元組的方式，而是以元組 在功能上的差異來作為區分的準則。於通篇說明書及後續的請求 項當中所提及的「包含」係為一開放式的用語，故應解釋成「包 含但不限定於」。另外，「麵接」一詞在此係包含任何直接及間接 的電氣連接手段。因此，若文中描述一第一裝置柄接於一第二裝 X ’則代表該第-裝置可直接電氣連接於該第二纟置，或透過其 7 201022699 他裝置或連接手段間接地電氣連接至該第二裝置。 第2圖係依本發明一實施例之GNSS接收器2〇〇的概要示意 圖。接收器200之基本結構與第1圖所示之接收器1⑻類似，且 相同名稱的組件具有相似的功能，因此，這裡省略對該些組件之 描述。接收器200與接收器1〇〇之主要區別在於，接收器2〇〇具 有IF處理引擎220’用於將來自rf前端212之具有不同載波頻 率的IF信號轉換為基頻信號。 第3圖係依本發明一實施例之正處理引擎22〇的概要示意 圖。於此實施例中，Π?處理引擎220包含：正降頻器223，多工 器(multiplexer)224，時分多工(time division multiplex，以下簡稱 TDM)控制器225，多個本地振盪器228，以及緩衝器229。其中， 母個本地振盡器228可藉由一數控振蘯器(numerica| controlled oscillator，以下簡稱呢⑺來簡單地實現。例如，由第3圖可以看 出，正處理引擎220之本地振盪器部件係包含三個本地振盪器 228 °各個本地振盪器228產生不同之載波，亦即，產生具有不同 頻率之多個載波。多個載波係被排程(schedule)為經由多工器224 順序傳輸至IF降頻器223，其中，多工器224係由TDM控制器 225控制。相應地，！f降頻器223於方式(TDM manner)下將 接收之IF信號進行降頻。降頻之結果係儲存於緩衝器229。 第4A圖係依本發明一實施例之通用iNC〇 28的基本結構示 意圖。第4B圖係依本發明一實施例之NC〇 28之模擬波形 201022699 (waveform)以及真實映射表(mapping tme她⑹的示意圖。本發明 實施例中所述之每一個本地振盪器228可藉由NC〇 28實現。任 意合適的其他振盪器也可用於本發明aNC〇28包含：加法器281， 保持暫存器(holding register)283，余弦映射單元(c〇Smapunit，以 下簡稱為COS映射單元)285，以及正弦映射單元(SIN map她， 以下簡稱為SIN映射單元)287。時脈dk@fs係被輸入至保持暫存 器283，以決定NCO 28之頻率。加法器281係根據時脈dk@fs 之速率(clock rate)執行相位累計(phase accumuiati〇n) 〇累計結果(亦 ❹即’NCO她)係被回馈缝於下—次累計1計輸⑽被傳輸至 COS映射單元285或SIN映射單元287，以執行查找表(l〇〇k-up table，以下簡稱為LUT)作業，從而輸出模擬(simulate)之余弦波或 正弦波。藉由控制加法器281中之累計步驟，可調整輸出頻率。 第4B圖顯示了用於LUT作業中之模擬波形以及真實映射表之簡 單示例。 ❿ 例如，於此實施例中，IF處理引擎220係包含三個本地振盪 器228。第5圖係依本發明一實施例之TDM排程機制的示意圖。 圖中位於最上方之一列係表示由TDM控制器225控制的多工器 224之時槽(time slot)排程。第二列係表示接收之IF信號。第三列 係表示分別由多個本地振盪器228產生之多個載波LO〇，LO!， ΙΑ。圖中位於最下方之一列顯示了儲存於緩衝器229之已移除正 載波之展頻js號(IF removed spread spectrum signal)。如第 5 圖所 示’時槽係分配為IF〇，巧，％。對於時間t = i，於時槽正〇 ’載 波LO0係與IF信號i混頻，以產生已移除IF載波之展頻信號之區 9 201022699 段SSSi，〇，於時槽IF! ’載波LOi係與!P信號丨混頻，以產生已移 除IF載波之展頻彳s號之區段SSSU ;於時槽正2，載波L〇2係與正 信號1混頻’以產生已移除IF載波之展頻信號之區段鄉，2 ;對於 時間t = i+l ’ t=i+2…，排程方式與以上所述相同。，、 於此實施例中’ IF處理引擎220之每一模塊的運作速率係為 IF信號頻率之二倍。亦即，於第2圖中，IF處理引擎22〇之運作 速率係為RF刖端212之抽樣速率的三倍。於一個抽樣週期内，具 有不同頻率之每-個正弦曲線波形(sinus〇idal wavef〇nn)l個抽 樣值係與接收的IF信號之資料抽樣進行混頻。於混頻後，已移除 IF載波之展頻信號係儲存於缓衝|| 229(如第3圖所示），且隨後被 傳送至後續模塊，例如，相關器引擎23〇以及處理器25()。 第6圖係依本發明另一實施例之正處理引擎62〇的概要示意 圖。本實施例中之IF處理引擎620包含：正降頻器623，TDM控 制器625，相位鎖存器(phase latch)626，本地振盪器628，以及緩 衝器629。由第6圖可以看出，π處理引擎62〇之本地振堡器部 件僅包含一個單一的本地振盪器628。本地振盪器628係藉由NC〇 實現。因為NCO之狀態可藉由鎖存累計結果(亦即，NC〇相位） 而輕易被儲存，用於第3圖所示之實施例中之多個NC〇可由單一 NCO以及NCO相位鎖存器來替代。藉由TDM控制器625控制之 相位鎖存器626，鎖存每一個載波的NCO相位，從而單一的本地 振盡器628可於TDM方式下產生具有不同頻率之多個載波。 201022699 第7圖係依本發明另一實施例之正處理引擎72〇的概要示意 圖。IF處理引擎720係與第3圖所示之IF處理引擎22〇類似，且 相同名稱的組件具有相似的功能，因此，這裡省略對該些組件之 描述。IF處理引擎720與IF處理引擎220之區別在於，正處理引 擎720更包含：數位濾波器組(digital filter bank)726，其中，數位 濾波器組726中包含多個數位濾波器。數位渡波器組726中之多 個數位渡波器(圖未示)係用於分別濾除基頻信號(亦即，已移除正 載波之展頻信號)之雜訊，從而提高信號性能。其中，基頻信號係 ❹ 藉由正降頻器723將不同之IF信號降頻而得來。 7 因為具有不同載波頻率之不同IF信號係降頻至同一基頻，所 以僅使用一個數位濾波器是有可能的。第8圖係依本發明另一實 施例之IF處理引擎820的概要示意圖。正處理引擎82〇係與第7 圖所示之IF處理引擎72〇類似。二者區別僅在於，正處理引擎82〇 係使用單一數位濾波器826濾除每一個藉由ip降頻器823處理的 已移除IF載波之展頻信號的雜訊。於此實施例中，濾波器之功能 與其過去之狀態相關，因此有必要為每一個已移除JP載波之展頻 信號鎖存渡波器之狀態。因此，狀態鎖存器S27係用於為各個已 移除IF載波之展頻信號鎖存濾波器之狀態。 儘管第7圖與第8圖所示之IF處理引擎720與820之結構與 第3圖所示之處理引擎220類似，數位遽波器部件(例如，包含 多個數位濾波器的數位濾波器組或具有狀態鎖存器之數位濾波器） 也可添加至第6圖所示之IF處理引擎62〇之結構中。 201022699 第9圖係依本發明一實施例之於GNSS接收器巾，從多個IF 信號中移除具有不同鮮之多個IF做之方法的流程圖。如第9 圖所示，财法包含：產生彡個不同之錢(亦即，具有不同頻率 之多個載波)(步驟S910);基於TDM排程，將各個載波與各個正 6號混頻，以產生已移除正載波之信號區段(步驟S92〇);以及儲 存已移除IF載波之信號區段至緩衝器(步驟93〇)。根據描述，已移 除正載波之展頻信號係儲存於緩衝器，以被傳送至後續模塊，例 如’相關器引擎以及處理器，用於後續使用。 以上詳細描述僅為本發明之較佳實施例，本領域技術人員應 可根據本發明之精神做出等效之變化與修飾。因此，本發明之實 施例係以解說而非限制之方式進行描述。應可理解，本發明並不 僅限於以上所財_丨之翻。舉凡齡本案之人士援依本發明 之精神所做之等效變化與修飾，皆應涵蓋於後附之申請專利範圍 内。 【圖式簡單說明】 _第1圖係依先前技術之現代GNSS接收器的基本結構之概要 示意圏。 第2圖係依本發明一實施例之GNSS接收器的概要示意圖。 第3圖係依本發明一實施例之if處理引擎的概要示意圖。 第4A圖係依本發明一實施例之通用iNC〇的示意圖。 12 201022699 第犯圖係依本發明_實施例^NC〇之模擬波形以及真實映 射表的示意圖。 ' 第5圖係依本發明一實施例之TDM排程機制的示意圖。 第6圖係依本發明另一實施例之正處理引擎的概要示意圖。 第7圖係依本發明另—實施例之正處理引擎的概要示意圖。 第8圖係依本發明另一實施例之正處理引擎的概要示意圖。 第9圖係依本發明一實施例之於GNSS接收器中，從！F信號 中移除具有不同頻率之多個IF載波的方法之流程圖。 ❹ 【主要元組符號說明】 100，200 : GNSS 接收器；101 :天線； 112，212 : RF前端；220 : IF處理引擎； 123 ’ 223，623，823 : IF 降頻器； 128，228，628 :本地振盪器； 130 ’ 230 :相關器引擎；135 :相關器記憶體； # I47 :本地碼產生器；150，25〇 ··處理器； 620，720 ’ 820 : IF處理引擎；224 :多工器； 225 ’ 625 : TDM 控制器；229，629 :緩衝器。 28 ： NCO ； 281 :加法器； 283 :保持暫存器； 285 : COS映射單元；287 : SIN映射單元； 626 :相位鎖存器；827 :狀態鎖存器； 726 ’ 826 :數位濾波器組；826 :數位濾波器； 13 201022699 S910〜S930 :步驟。 14Table 1 Figure 1 is a schematic diagram showing the basic structure of a modern GNSS receiver 100 according to the prior art. The receiver 100 includes an antenna 101, a radio frequency (hereinafter referred to as RF) front end 112, an IF down-converter 123, and a local oscillator 128 'correlator engine 130'. The memory 135' is a local code generator 147, and a processor 150. Receiver 100 receives satellite signals in the RF band via antenna 101. The received RF signal is down-converted to an IF signal in the RF front end 112 and amplified. The IF signal is passed to the IF downconverter 123. The IF downconverter 123 downconverts the positive signal to the baseband signal by using the ip carrier provided by the local oscillator 128. The baseband signal is transmitted to the correlator engine 13A for correlation with the code provided by the local code generator 147. The relevant results are stored in phase 5 201022699 shutdown memory 135 for accumulation. The processor 150 processes the accumulation of the correlation results and/or related results to generate position-velocity-time (hereinafter referred to as PVT) information. In this configuration, the IF carrier frequency can only be a fixed value. However, in practice, different spread carriers may be used for different spread spectrum signals from different satellites (e.g., satellites in GLONASS as described above) or different GNSS systems. That is, the carrier frequency of the received spread spectrum signal is different. Therefore, existing receivers (e.g., GLONASS receivers) use multiple IF carrier removal modules to improve the efficiency of satellite search and tracking. Each of the multiple IF carrier removal modules is used for a particular carrier frequency. SUMMARY OF THE INVENTION To solve the above technical problems, the present invention provides a positive processing engine, a positive carrier removal method, and a GNSS receiver. The present invention provides an IF processing engine for a GNSS receiver, comprising: a local oscillator component that generates a plurality of carriers having different frequencies; a positive downconverter that respectively generates a plurality of IF signals and local oscillators Carrier mixing to generate signal segments for multiple removed IF carriers; time division multiplexing controllers, scheduling mixers for each of the E-downers, and buffering, storage generated by if Remove the signal segment of the positive carrier. A method for removing (four) waves is provided. In the receiver, the plurality of IF carriers of the horn are used, and the method includes: 201022699 generating multiple carriers with different frequencies; A multiplexing schedule that respectively mixes a carrier with an IF signal to generate a signal segment of the removed IF carrier; and a signal segment that stores the removed IF carrier. The present invention provides a GNSS receiver comprising: an RF front end that down-converts an RF signal into an IF signal; an IF processing engine that provides multiple carriers having different frequencies and uses a carrier in a time division multiplexing schedule The positive signal is down-converted to a baseband signal; and a correlator engine correlates the baseband signal with the code to produce a plurality of correlation results. With the GNSS receiver provided by the present invention, the spread spectrum signals having different carrier frequencies can share the same IF carrier removal module, that is, the positive processing engine provided by the present invention to process multiple positive carrier removal modes in the prior art. Group of assignments. [Embodiment] _ Certain terms are used in the specification and subsequent patent applications to refer to a particular tuple. Those of ordinary skill in the art should understand that hardware manufacturers may refer to the same tuple with different nouns. This specification and subsequent applications The patent scope does not use the difference in name as the way to distinguish the tuple, but the difference in function of the tuple as the criterion for differentiation. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term "face-to-face" is used herein to include any direct and indirect electrical connection. Therefore, if a first device handle is connected to a second device X', it means that the device can be directly electrically connected to the second device, or indirectly connected to the second device through its device or connection means. The second device. Fig. 2 is a schematic diagram showing a GNSS receiver 2A according to an embodiment of the present invention. The basic structure of the receiver 200 is similar to that of the receiver 1 (8) shown in Fig. 1, and components of the same name have similar functions, and therefore, the description of the components is omitted here. The main difference between the receiver 200 and the receiver 1 is that the receiver 2 has an IF processing engine 220' for converting IF signals from the rf front end 212 having different carrier frequencies into baseband signals. Figure 3 is a schematic diagram of a positive processing engine 22A in accordance with an embodiment of the present invention. In this embodiment, the processing engine 220 includes: a positive frequency down 223, a multiplexer 224, a time division multiplex (TDM) controller 225, and a plurality of local oscillators 228. And buffer 229. The mother local oscillator 228 can be simply implemented by a numerically controlled oscillator (hereinafter referred to as (7). For example, as can be seen from FIG. 3, the local oscillator of the processing engine 220 is being processed. The component system includes three local oscillators 228°. The local oscillators 228 generate different carriers, that is, generate multiple carriers having different frequencies. The plurality of carriers are scheduled to be sequentially transmitted via the multiplexer 224. To the IF downconverter 223, wherein the multiplexer 224 is controlled by the TDM controller 225. Accordingly, the !f downconverter 223 down-converts the received IF signal in a TDM manner. The system is stored in the buffer 229. Fig. 4A is a schematic diagram showing the basic structure of a general-purpose iNC〇28 according to an embodiment of the present invention. FIG. 4B is an analog waveform of the NC〇28 according to an embodiment of the present invention 201022699 (waveform) and real A mapping table (mapping tme her (6) schematic diagram. Each of the local oscillators 228 described in the embodiments of the present invention can be implemented by the NC 〇 28. Any suitable other oscillator can also be used in the present invention. The aNC 〇 28 includes: an adder 2 81. A holding register 283, a cosine mapping unit (c〇Smapunit, hereinafter referred to as a COS mapping unit) 285, and a sine mapping unit (SIN map her, hereinafter abbreviated as SIN mapping unit) 287. Clock dk @fs is input to the hold register 283 to determine the frequency of the NCO 28. The adder 281 performs phase accumulation (phase accumuiati〇n) 〇 accumulation result according to the clock rate of the clock dk@fs (also That is, 'NCO her' is sent back to the next-time cumulative 1 count (10) is transmitted to the COS mapping unit 285 or the SIN mapping unit 287 to perform a lookup table (l〇〇k-up table, hereinafter referred to as LUT) To output a simulated cosine wave or sine wave. The output frequency can be adjusted by controlling the accumulation step in the adder 281. Figure 4B shows a simple example of an analog waveform for a LUT job and a real mapping table. For example, in this embodiment, the IF processing engine 220 includes three local oscillators 228. Figure 5 is a schematic diagram of a TDM scheduling mechanism in accordance with an embodiment of the present invention. Controlled by TDM controller 225 The time slot of the multiplexer 224 is scheduled. The second column indicates the received IF signal. The third column indicates the plurality of carriers LO 〇, LO!, 产生 generated by the plurality of local oscillators 228, respectively. The lowermost column in the figure shows the IF removed spread spectrum signal of the removed positive carrier stored in buffer 229. As shown in Figure 5, the time slot is assigned as IF〇, Qiao, %. For time t = i, the time slot is exactly 'carrier LO0 is mixed with IF signal i to generate the spread spectrum signal of the removed IF carrier. Area 9 201022699 Segment SSSi, 〇, in time slot IF! 'Carrier LOi And the !P signal is mixed to generate the sector SSSU of the spread 彳s number of the removed IF carrier; in the time slot positive 2, the carrier L〇2 is mixed with the positive signal 1 to generate the removed The sector of the spread spectrum signal of the IF carrier, 2; for the time t = i + l ' t = i + 2 ..., the scheduling manner is the same as described above. In this embodiment, each module of the IF processing engine 220 operates at twice the frequency of the IF signal. That is, in Figure 2, the operating rate of the IF processing engine 22 is three times the sampling rate of the RF terminal 212. In one sampling period, each sinusoidal waveform (sinus〇idal wavef〇nn) having a different frequency is mixed with the data sample of the received IF signal. After mixing, the spread spectrum signal of the removed IF carrier is stored in buffer|| 229 (as shown in FIG. 3) and then transmitted to subsequent modules, eg, correlator engine 23A and processor 25 (). Fig. 6 is a schematic diagram showing a positive processing engine 62A according to another embodiment of the present invention. The IF processing engine 620 in this embodiment includes a positive downconverter 623, a TDM controller 625, a phase latch 626, a local oscillator 628, and a buffer 629. As can be seen from Figure 6, the local vibrator component of the π processing engine 62 includes only a single local oscillator 628. The local oscillator 628 is implemented by NC〇. Since the state of the NCO can be easily stored by latching the accumulated result (i.e., NC〇 phase), the plurality of NC〇 used in the embodiment shown in FIG. 3 can be obtained by a single NCO and NCO phase latch. Alternative. The NCO phase of each carrier is latched by a phase latch 626 controlled by TDM controller 625 such that a single local oscillator 628 can generate multiple carriers having different frequencies in TDM mode. 201022699 Fig. 7 is a schematic diagram of a positive processing engine 72A according to another embodiment of the present invention. The IF processing engine 720 is similar to the IF processing engine 22A shown in Fig. 3, and components of the same name have similar functions, and therefore descriptions of the components are omitted here. The difference between the IF processing engine 720 and the IF processing engine 220 is that the processing engine 720 further includes a digital filter bank 726, wherein the digital filter bank 726 includes a plurality of digital filters. A plurality of digital wavers (not shown) of the digital waver group 726 are used to filter out noise of the fundamental frequency signal (i.e., the spread spectrum signal of the positive carrier has been removed), thereby improving signal performance. The baseband signal is obtained by down-converting different IF signals by the positive down-converter 723. 7 Since different IF signals with different carrier frequencies are down-converted to the same fundamental frequency, it is possible to use only one digital filter. Figure 8 is a schematic diagram of an IF processing engine 820 in accordance with another embodiment of the present invention. The positive processing engine 82 is similar to the IF processing engine 72A shown in FIG. The only difference is that the processing engine 82 uses a single digital filter 826 to filter out the noise of each of the spread spectrum signals of the removed IF carrier processed by the ip downconverter 823. In this embodiment, the function of the filter is related to its past state, so it is necessary to latch the state of the ferrite for each spread spectrum signal of the removed JP carrier. Thus, state latch S27 is used to latch the state of the filter for the spread spectrum signal of each removed IF carrier. Although the structures of the IF processing engines 720 and 820 shown in FIGS. 7 and 8 are similar to those of the processing engine 220 shown in FIG. 3, digital chopper components (eg, digital filter banks including a plurality of digital filters) Or a digital filter with a status latch) can also be added to the structure of the IF processing engine 62 shown in FIG. 201022699 FIG. 9 is a flow diagram of a method for removing a plurality of IFs from different IF signals in accordance with an embodiment of the present invention. As shown in FIG. 9, the financial method includes: generating a different amount of money (that is, a plurality of carriers having different frequencies) (step S910); and mixing each carrier with each positive number 6 based on the TDM schedule, Generating a signal segment from which the positive carrier has been removed (step S92); and storing the signal segment of the removed IF carrier to the buffer (step 93A). According to the description, the spread spectrum signal from which the positive carrier has been removed is stored in a buffer for transmission to subsequent modules, such as the 'correlator engine and processor, for subsequent use. The above detailed description is only the preferred embodiment of the present invention, and those skilled in the art can make equivalent changes and modifications in accordance with the spirit of the present invention. Therefore, the embodiments of the present invention are described by way of illustration and not limitation. It should be understood that the present invention is not limited to the above. Equivalent changes and modifications made by persons of the present invention in accordance with the spirit of the present invention are intended to be included in the scope of the appended claims. [Simple description of the diagram] _ Figure 1 is an outline of the basic structure of a modern GNSS receiver according to the prior art. 2 is a schematic diagram of a GNSS receiver in accordance with an embodiment of the present invention. Figure 3 is a schematic diagram of an if processing engine in accordance with an embodiment of the present invention. Figure 4A is a schematic illustration of a generic iNC cartridge in accordance with an embodiment of the present invention. 12 201022699 The first diagram is a schematic diagram of the analog waveform and the real map of the invention according to the invention. Figure 5 is a schematic diagram of a TDM scheduling mechanism in accordance with an embodiment of the present invention. Figure 6 is a schematic diagram of a positive processing engine in accordance with another embodiment of the present invention. Figure 7 is a schematic diagram of a positive processing engine in accordance with another embodiment of the present invention. Figure 8 is a schematic diagram of a positive processing engine in accordance with another embodiment of the present invention. Figure 9 is a GNSS receiver in accordance with an embodiment of the present invention, from! A flow diagram of a method of removing multiple IF carriers having different frequencies in an F signal. ❹ [Major tuple symbol description] 100,200: GNSS receiver; 101: antenna; 112, 212: RF front end; 220: IF processing engine; 123 '223, 623, 823: IF downconverter; 128, 228, 628: local oscillator; 130 '230: correlator engine; 135: correlator memory; # I47: local code generator; 150, 25 〇 processor; 620, 720 '820: IF processing engine; Multiplexer; 225 '625: TDM controller; 229, 629: buffer. 28: NCO; 281: adder; 283: hold register; 285: COS mapping unit; 287: SIN mapping unit; 626: phase latch; 827: status latch; 726 '826: digital filter bank ;826: digital filter; 13 201022699 S910~S930: steps. 14