201027480 六、發明說明： 【先前技術】 近年來，對於顯示器而言，由於顯示器品質改良、價格 了降及顯示器應用範圍增加，在市場中已看到極實質的成 長。此包含二者例如用於電視或電腦監視器之大面積顯示 器及用於便攜裝置之較小顯示器。 目前在市場上，最普遍等級的顯示器為液晶顯示器及電 漿顯不器，然現在基於有機發光二極體（〇LED)之顯示器 ® 由於它們包含低功耗、輕質、大視角、傑出的對比及用於 撓性顯示器之潛能之許多的優點而日益引起注意。 一OLED之基礎結構為一有機發光層，比如夾在用於注 入負電荷載體（電子）之一陰極與用於注入正電荷载體（電 洞）之一陽極之間之一薄膜的聚（對位苯基乙烯）（「ppv」） 或聚苐。該等電子與電洞在有機層中結合產生光子。在 WO 90/13148中，該有機發光材料為共軛聚合物。在美國 專利第4,539,507號中，該有機發光材料為所熟知等級之小 分子材料，例如（8-羥喹啉）鋁（「Alq3」）。在一實用裝置 中，該等電極之其中一者為透明，以允許該等光子逃離該 裝置。 一種典型的有機發光裝置（「OLED」）係在塗有（例如）氧 化銦錫（「ITO」）之一透明陽極之一玻璃或塑膠基板上加 工。至少一電致發光有機材料的一層薄膜覆蓋該第一電 極。最後’陰極覆蓋該電致發光有機材料層。該陰極通常 為一金屬或合金，且可包括（例如）鋁之一單獨層或（例如） 144166.doc 201027480 約與銘之複數層。在操作中，電洞係透㈣陽極注入該裝 置中’且電子係透過該陰極注人該裝置中。該等電洞與電 子在電致發光有機層中結合以形成—激子，該激子接著經 歷輻射衰變以散發光。可以紅色、綠色及藍色電致發光子 像素來像素化δ亥裝置以提供一全彩顯示。 全彩液晶顯不器通常包括一白光背光源，且在穿過該 LC層之後，自該裝置發出之光係濾過紅色、綠色及藍色濾 色器以提供該所需的彩色影像。 ~ 可藉由使用與濾色器結合之一白色或藍色〇LED而以相 同的方式製成一全彩顯示器。此外，已證明使用具有 OLED之濾色器即使當該裝置之像素已經包括紅色綠色 及藍色子像素亦可為有利的。尤其是使紅色據色器與紅色 電致發光子像素對齊且對綠色及冑色子像素及滤色器做相 同處理可改良該顯示器的色純度。 作爲彩色滤色器之替代性方案或除此之外，可藉由色變 媒體（CCM)進行降頻轉換以吸收所發射之光且以一希望的 較長波長或波長帶再發射。 定址（例如）LCD及OLED之顯示器之一方式係藉由使用一 「主動矩陣」配置，其中一顯示器之獨立像素元件係藉由 一關聯薄膜電晶體而啟動。用於此等顯示器之主動矩陣底 板可用非晶矽（a-Si)或低溫多晶矽（LTPS)製成。LTPS具有 高遷移率但可為不均勻的且要求高處理溫度，該等高處理 溫度限制可使用之基板的範圍。非晶矽不要求此等高處理 溫度’然而其遷移率相對較低，且由於老化影響，在使用 144166.doc 201027480 期間可能遭受不均勻。此外，用LTPS或a-Si形成的底板均 需要（例如）可能毀壞該下伏基板之光微影術、清洗及退火 的處理步驟。尤其是在LTPS的情況中，必須選擇對此等高 能量處理有抵抗作用之一基板。 舉例而言，Rogers 等人之 Appl. PhyS. Lett· 2004, 84(26)， 5398-5400 ; Rogers 等人之 Appi. Phys. Lett 2〇〇6，88, 213101與2007年6月Benkendorfer等人之複合半導體 (Compound Semiconductor)中揭示圖案化之另一方式，其 中在一絕緣體上之矽係藉由使用例如光微影術之習知方法 而圖案化為複數個元件（以下稱為r晶片」），接著將此等 70件轉移至一裝置基板。該轉移印刷過程係藉由使該複數 個晶片進入與一彈性印模接觸之狀態而發生，該彈性印模 具有引起該等晶片黏合至該印模之表面化學作用性且接 著轉移該等晶片至該裝置基板。如此，承載例如顯示驅動 電路之微米及奈米級結構之晶片可以較好配準轉移至一末 端基板上’該末端基板不必容忍參與矽圖案之該等所需的 製程。 【發明内容】 根據本發明之實施例，提供一種將晶片驅動器元件連接 於一主動矩陣顯示器中之方法’該方法包括：定位複數個 晶片以形成一主動矩陣區域；建立複數個連接，其等鏈接 晶片於至少一邏輯鏈中，且其中至少一連接係供應有一資 料信，號。 至少一連接宜係供應有一同步時脈信號。 144166.doc 201027480 至少一連接宜係供應有一符記信號。 該符記信號宜為該資料識別該邏輯鏈内之一目標晶片。 該符記宜識別在該目標晶片上之一目標區域。 該方法宜進一步包括：建立經組態以能夠重種（reseed) 該符記信號之至少一正交列連接。 該至少一連接宜係選自GND、VDD中之一個或多個。 各晶片宜驅動6個像素或子像素。 該邏輯鍵宜係成一維連接。 根據本發明之實施例，提供一種用於一主動矩陣顯示器 之底板，其包括：用於驅動像素之複數個晶片，其中該等 複數個晶片之各晶片係以一單一維度邏輯地連接至另一晶 片以形成一邏輯鏈’且晶片之間不具有正交列連接。 較佳地為該底板包括複數個邏輯鏈。 較佳地為該邏輯鏈或該等邏輯鍵係以一規則二維晶片配 置加以配置。 較佳地為該邏輯鏈或該等邏輯鏈係經配置以形成一二維 晶片棚格。 本發明之該等實施例因為許多理由為有利的。舉例而 言，需要較少的連接以便驅動該顯示器内之該等像素，且 由於該等晶片係經邏輯地鏈接，不需要一規則的網格。 根據-實施例，像素晶片係經菊鏈於該資料線上以編碼 -晶片之位置’因而移除一選擇線之需要。根據一實施 例，此係透過定址而完成。根據另一實施例，此係透過― 移位寄存H而完成’其巾師位寄存器為類比或數位。 144166.doc -6 - 201027480 遍及此專利說明書，用語「控制電路」係、用於指用於程 式驅動電路之電路；「驅動電路」係用於指用於直接驅動 /負：器之像素之電路；且「顯示區域」係用於指藉由該 顯示器之像素及關聯驅動電路而定義之區域。 另外的優點及新穎特徵可發現於附加請求項中。 【實施方式】 '201027480 VI. Description of the Invention: [Prior Art] In recent years, for displays, due to improved display quality, lower price, and increased range of display applications, substantial growth has been seen in the market. This includes both large area displays for televisions or computer monitors and smaller displays for portable devices. Currently, the most popular displays on the market are liquid crystal displays and plasma displays, but now based on organic light-emitting diode (〇LED) displays® because they contain low power consumption, light weight, large viewing angle, and outstanding There is a growing interest in comparing and many of the advantages of the potential for flexible displays. The basic structure of an OLED is an organic light-emitting layer, such as a film sandwiched between a cathode for injecting a negative charge carrier (electron) and an anode for injecting one of the positive charge carriers (holes). Phenylvinyl) ("ppv") or polypeptone. The electrons and holes are combined in the organic layer to produce photons. In WO 90/13148, the organic luminescent material is a conjugated polymer. In U.S. Patent No. 4,539,507, the organic luminescent material is a well-known grade of molecular material such as (8-hydroxyquinoline)aluminum ("Alq3"). In a practical device, one of the electrodes is transparent to allow the photons to escape the device. A typical organic light-emitting device ("OLED") is fabricated on a glass or plastic substrate coated with a transparent anode such as indium tin oxide ("ITO"). A film of at least one electroluminescent organic material covers the first electrode. Finally, the cathode covers the layer of electroluminescent organic material. The cathode is typically a metal or alloy and may comprise, for example, a single layer of aluminum or, for example, 144166.doc 201027480. In operation, the hole is through (iv) an anode is injected into the device' and electrons are injected into the device through the cathode. The holes and electrons combine in the electroluminescent organic layer to form an exciton which then undergoes radiation decay to emit light. The red, green, and blue electroluminescent sub-pixels can be pixelated to provide a full color display. A full color liquid crystal display typically includes a white light backlight, and after passing through the LC layer, light emitted from the device filters through the red, green, and blue filters to provide the desired color image. ~ A full color display can be made in the same way by using a white or blue 〇 LED in combination with a color filter. Furthermore, it has proven advantageous to use a color filter having an OLED even when the pixels of the device already include red green and blue sub-pixels. In particular, aligning the red colorizer with the red electroluminescent sub-pixels and treating the green and green sub-pixels and color filters in the same manner improves the color purity of the display. Alternatively or in addition to the color filter, the down conversion can be performed by a color change medium (CCM) to absorb the emitted light and re-emit at a desired longer wavelength or wavelength band. One way of addressing, for example, LCD and OLED displays is by using an "active matrix" configuration in which individual pixel elements of a display are activated by an associated thin film transistor. The active matrix substrate for such displays can be made of amorphous germanium (a-Si) or low temperature polysilicon (LTPS). LTPS has high mobility but can be non-uniform and requires high processing temperatures, which limit the range of substrates that can be used. Amorphous germanium does not require this high processing temperature' however its mobility is relatively low and may suffer from non-uniformity during use of 144166.doc 201027480 due to aging effects. In addition, the substrate formed with LTPS or a-Si requires, for example, processing steps that may destroy photolithography, cleaning, and annealing of the underlying substrate. Especially in the case of LTPS, it is necessary to select a substrate which is resistant to such high energy processing. For example, Rogers et al., Appl. PhyS. Lett. 2004, 84(26), 5398-5400; Rogers et al. Appi. Phys. Lett 2〇〇6, 88, 213101 and June 2007 Benkendorfer et al. Another way of patterning is disclosed in a compound semiconductor in which a ruthenium on an insulator is patterned into a plurality of elements (hereinafter referred to as an r-chip) by using a conventional method such as photolithography. Then, these 70 pieces are transferred to a device substrate. The transfer printing process occurs by bringing the plurality of wafers into contact with an elastic stamp having a surface chemistry that causes the wafers to adhere to the stamp and then transferring the wafers to The device substrate. Thus, wafers carrying micron and nanoscale structures such as display driver circuits can be better registered for transfer to a terminal substrate. The end substrate does not have to tolerate such required processes for participating in the germanium pattern. SUMMARY OF THE INVENTION According to an embodiment of the present invention, a method of connecting a wafer driver component to an active matrix display is provided. The method includes: positioning a plurality of wafers to form an active matrix region; establishing a plurality of connections, and the like The chip is in at least one logic chain, and at least one of the connections is supplied with a data message. At least one connection should be supplied with a synchronized clock signal. 144166.doc 201027480 At least one connection should be supplied with a signal. The signature signal is preferably such that the data identifies a target wafer within the logic chain. The symbol should identify a target area on the target wafer. The method preferably further includes establishing at least one orthogonal column connection configured to be capable of re-scoring the signature signal. The at least one connection is preferably selected from one or more of GND, VDD. Each wafer is preferably driven by 6 pixels or sub-pixels. The logical key should be a one-dimensional connection. According to an embodiment of the present invention, a substrate for an active matrix display is provided, comprising: a plurality of wafers for driving pixels, wherein each of the plurality of wafers is logically connected to another one in a single dimension The wafers are formed to form a logic chain 'with no orthogonal column connections between the wafers. Preferably, the backplane includes a plurality of logical chains. Preferably, the logical chain or the logical keys are configured in a regular two-dimensional wafer configuration. Preferably, the logical chain or the logical chains are configured to form a two dimensional wafer shelf. These embodiments of the invention are advantageous for a number of reasons. For example, fewer connections are needed to drive the pixels within the display, and since the wafers are logically linked, a regular grid is not required. According to an embodiment, the pixel wafer is daisy-chained onto the data line to encode the position of the wafer and thus removes a selection line. According to an embodiment, this is done by addressing. According to another embodiment, this is done by shifting the register H. The speaker register is analog or digital. 144166.doc -6 - 201027480 Throughout this patent specification, the term "control circuit" is used to refer to a circuit for a program-driven circuit; "drive circuit" is used to refer to a circuit for a direct drive/negative device pixel. And "display area" is used to refer to the area defined by the pixels of the display and associated drive circuits. Additional advantages and novel features can be found in the additional claims. [Embodiment] '
為了更好地理解本發明及如何使本發明生效，現在將僅 作為實例參考本發明之隨附圖式。 該等晶片可用半導體晶圓源形成，該等半導體晶圓源包 3 Ή如單石夕晶圓、多晶石夕晶圓、錯晶圓之大半導體晶 圓，例如超薄型矽晶圓之超薄型半導體晶圓；例如p型或Ο 型摻雜晶圓及具有例如在絕緣體上之矽（例如矽-二氧化 矽、鍺化矽）之絕緣體上的半導體晶圓之選擇的空間分佈 換雜物的半導體之摻雜半導體晶81 ;及例如基板上的石夕晶 圓及在絕緣體上之矽之基板上的半導體晶圓。另外，本發 明之可印刷的半導體元件可用例如_薄膜的非晶、多晶及 早晶半導體材料（例如多晶石夕 '非晶石夕、多晶坤化嫁及非 晶石申化鎵）之多種#晶圓源製造，該等非晶圓源係沈積在 一犧牲層或基板（例如氮化矽或二氧化矽）上且隨後經退 火’且可用其他大晶體包含，但不限於石墨、二砸化銷及 其他過渡金屬硫族化合物，及纪鋇鋼氧化物。 該等晶片可用為此項技術者所熟知的習知處理方法形 成0 較佳地，各驅動器或LED晶片之長度至多5〇〇微米，較 144166.doc 201027480 佳地為介於約15微米至約250微米之間。且其寬度較佳地 為約5微米至約50微米之間，更佳地為5微米至1〇微米。 轉移過程 用於轉移印刷中之該印模較佳地為一聚二甲基矽氧烷印 模。 該印模之表面可具有一化學作用性，該化學作用性引起 該等晶片可逆地黏合至該印模且升離該施體基板，或可借 助諸如凡德瓦力（van der Waals force)黏合。同樣地在轉移 至該末端基板後，該等晶片藉由凡德瓦力及/或藉由與在 該末端基板之該表面上之一化學作用性交互作用而黏著至 該末端基板，且因此該印模可從該等晶片分層。 晶片舆顯示器之整合 以驅動電路圖案化之用於定址一顯示器之像素或子像素 之該等晶片可被轉移印刷於承載將該等晶片連接至一電源 且若需要連接至該顯示區域外包括用於程式該等晶片之控 制電路的驅動器之跡線之一基板上。 為了確保精確轉移至一預備末端基板上，該印模及末端 基板可藉由諸如提供對準標記於該基板上之為此項技術者 所熟知之方法而配準。 或者，在該等晶片已轉移印刷之後，可施加用來連接該 等晶片之跡線。 在該等晶片驅動例如LCD或OLED顯示器之一顯示器之 情況中，包括該等晶片之該底板係較佳地經一層絕緣材料 塗覆以形成一平坦層，該顯示器係在該平坦層上建構。該 144166.doc 201027480 顯示裝置之電極係依靠形成於該平坦層中之穿透導孔 接至該等晶片之輸出。 有饑發光二極遁 在該顯示器為一0LED之情況中，根據本發明之裝置包 括-玻璃或塑膠基板！、—陽極2及—陰極4，其中該底= (圖中未繪示)已形成於該基板】上。一電致發光層3係提供 於陽極2與陰極4之間。 '、For a better understanding of the invention and how the invention may be made, reference will now be made to the accompanying drawings. The wafers may be formed from a semiconductor wafer source, such as a single wafer wafer, a polycrystalline wafer, or a large semiconductor wafer of a wrong wafer, such as an ultra-thin wafer. Ultra-thin semiconductor wafers; for example, p-type or erbium-doped wafers and spatial distribution of semiconductor wafers having insulators such as germanium on insulators (eg, germanium-bismuth oxide, antimony telluride) a doped semiconductor crystal 81 of a semiconductor of a foreign object; and a semiconductor wafer on a substrate such as a substrate on a substrate and a substrate on the insulator. In addition, the printable semiconductor device of the present invention can be used, for example, as an amorphous, polycrystalline, and early-crystalline semiconductor material of a thin film (for example, polycrystalline stellite amorphous, polycrystalline, and amorphous). A variety of #wafer source fabrication, these non-wafer sources are deposited on a sacrificial layer or substrate (such as tantalum nitride or hafnium oxide) and subsequently annealed 'and can be included with other large crystals, but not limited to graphite, two Deuterium and other transition metal chalcogenides, and Kelvin steel oxides. The wafers can be formed by conventional processing methods well known to those skilled in the art. Preferably, the length of each driver or LED wafer is at most 5 Å, which is preferably between about 15 microns and about 144166.doc 201027480. Between 250 microns. And preferably, the width is between about 5 microns and about 50 microns, more preferably between 5 microns and 1 inch. Transfer Process The stamp used in transfer printing is preferably a polydimethyl siloxane mold. The surface of the stamp may have a chemical action that causes the wafers to reversibly adhere to the stamp and lift away from the donor substrate, or may be bonded by, for example, van der Waals force. Similarly, after transfer to the end substrate, the wafers are adhered to the end substrate by van der Waals force and/or by chemical interaction with one of the surfaces of the end substrate, and thus The stamp can be layered from the wafers. The wafer/display integrated with the driver circuit patterning for addressing pixels or sub-pixels of a display can be transferred to the carrier to connect the wafers to a power source and if necessary to connect to the display area On one of the traces of the driver of the driver of the control circuitry of the wafers. To ensure accurate transfer to a preliminary end substrate, the stamp and end substrate can be registered by methods known to those skilled in the art, such as providing alignment marks on the substrate. Alternatively, the traces used to connect the wafers may be applied after the wafers have been transferred for printing. In the case where the wafers drive a display such as an LCD or OLED display, the substrate including the wafers is preferably coated with a layer of insulating material to form a planar layer on which the display is constructed. The 144166.doc 201027480 display device electrodes are connected to the outputs of the wafers by means of through vias formed in the planar layer. There is a hunger-emitting diode. In the case where the display is an OLED, the device according to the invention comprises a glass or plastic substrate! - an anode 2 and a cathode 4, wherein the bottom = (not shown) has been formed on the substrate. An electroluminescent layer 3 is provided between the anode 2 and the cathode 4. ',
在m置中’該等電極之至少—者為半透明以便可 發出光。當該陽極為透明的，其通常包括氧化姻錫。較佳 地’該陰極為透明㈣便避免在光係透過該陽極而發出之 情況中1電致發光層3發出的光被該等晶片及關聯驅動 電路吸收之問題。—透明陽極通常包括-層的電子注入材 料’該電子注入材料係足夠薄而為透明的。通常，由於其 薄度’此層之橫向傳導率將較低。在此情況中，該層電子 主入材料係與例如氧化銅錫之—較厚層的透明傳導材料社 合使用。 ' ° 將意識到-透明陰極裳置不需要具有一透明陽極（當 然’除非需要一全透明裝置），且因此用於底部發射裝置 之透明陽極可用例如—屉沾》。 層的結之一層反光材料取代或補 充。透明陰極裝詈杳At least m of the electrodes are semi-transparent so that light can be emitted. When the anode is transparent, it typically comprises oxidized sulphur tin. Preferably, the cathode is transparent (four) to avoid the problem of light emitted by the electroluminescent layer 3 being absorbed by the wafers and associated drive circuitry in the event that the light is transmitted through the anode. - The transparent anode typically comprises a layer of electron injecting material. The electron injecting material is sufficiently thin to be transparent. Generally, the lateral conductivity of this layer will be lower due to its thinness. In this case, the layer of electron ingress material is used in conjunction with a thicker layer of transparent conductive material such as copper oxide tin. ' ° It will be appreciated that the transparent cathode skirt does not need to have a transparent anode (although 'unless a fully transparent device is required), and therefore the transparent anode for the bottom emitter can be used, for example. One of the layers of the layer is replaced or supplemented with a layer of reflective material. Transparent cathode decoration
置之實例係描述於諸如英國專利第GB 23483 1 6號中。 用於層3中之適當的材料包含小分子材料、聚合物材料 及㈣狀聚合物材料及其等之組合物。用於層3中之適當 的電致發光聚合物包含聚（伸芳基伸乙稀基類）(例如聚（對 144166.doc 201027480 亞苯次亞乙烯基類））及聚次芳基類（例如聚第類），尤其為 2,7-鍵聯之9,9二烴基聚苐類或2,7_鍵聯之9,9二芳基聚第 類；聚螺環第類’尤其為2,7-鍵聯之聚9 谦 人 , ，规聊H9,9聚螺環薙；聚茚 并第類，尤其為2,7-鍵聯之聚茚并苐類；聚亞苯基類，尤 其為烴基或烴氧基取代聚]，4_亞苯基。此係揭示 於諸如 Adv. Mater. 2000 12(23) 1737_175〇 及其參考中。用 於層3中之適當的電致發光樹枝狀聚合物包括帶有樹枝狀 團的電致發光金屬錯合物類’如揭示於（例如）世界專利第 WO 02/066552號中者。 諸如電荷轉移層、電荷注人層或電荷_層之 定位於陽極2與陰極3之間。 該裝置宜用封裝材（圖中未緣示）予以囊封以阻止水分及 氧氣進入。適當的料材包切⑽，例如揭示於諸如世 界專利第WO 01/81649號中之交替堆叠的聚合物及電介 質之具有適當之阻隔性質的薄膜，或如揭示於諸如世界專 利第觸0刪42號中之一氣密容器。用於吸收可能渗透 透過該基板或封裝材之任相女名>、 何心仕何大氣水分及/或氧氣之一吸氣 材料可佈置於該基板與該封裝材之間。 圖1說明一種裝置，置中今姑里y .. 罝具中該裝置係藉由首先形成一陽極 於-基板上，接著藉由沈積—電致發光層及—陰極而形 成’然而將意識到本發明之裂置亦可藉由首先形成一陰極 於-基板上，接著藉由沈積—電致發光層及—陽極而形 成。 在許多類型的顯示器中，各像素係分成單色區域，當在 144166.doc 201027480 遠處觀察時，該·#單色區域構成被顯示或感知的顏色。各 單色區域為一分離地可定址「子像素」。在—典型的彩色 顯示器中’各像素包括三個子像素；紅色、綠色及藍色。 因此，在此專利說明書之内容中，用語「像素」及「子像 素j可互換。 圖2 A繪示一種根據本發明之實施例之一顯示像素驅動晶 片的配置。在所繪示之配置中，該晶片1〇1驅動六個像素 102且包括接地（GND)線及VDD線及資料線D1-D3。對於一 給疋行中之所有晶片，此等線係共用的。另外，該晶片 101進一步包括一共用列連接103以使該晶片正交地連接至 下一晶片。根據此配置，當晶片元件的數量增加時，須增 加連接的數量（增加連接密度）。為了避免疑義，如此處所 使用之「行」及「列」僅為表示正交性之相對用語。 圖2B緣示根據本發明之實施例之連接顯示像素驅動晶 片。根據該說明實例，該晶片101，驅動六個像素1〇2,。該 〇 晶片包括時脈線104，、一符記線1〇5|及一資料線106，以及 GND及VDD線。如圖3中所繪示，此配置使晶片能夠以例 如垂直地而無須正交選擇線連接之一單一維度連接。該時 脈線104’承載用於協調兩個或多個晶片之動作之一時脈信 號。該符記線1〇5,為一「菊鏈」線（亦即除了晶片之間之線 性連接外別無連接），該「菊鏈」線從該鏈中之一晶片承 載一符記至為該資料信號識別目標之下—晶片。 在本發明之内容中，用語「邏輯鏈」係用於描述依靠該 等B曰片之間之内部連接而依次連接的一系列晶片。該主動 144I66.doc 201027480 矩陣區域可白扭_ 一 匕括一個邏輯鏈但較佳地為複數個邏輯鏈。根 實例’該邏輯鏈係連接於該鏈中之一晶片之底部與後 而阳片之頂部之間之—維空間中（亦即「垂直地」）。然 :::注意’根據本發明之實施例，由於該等晶片係以菊 晋琴^ 不必以任何形式的規則配置或網格配 曰5 片因此，根據此鏈接配置，當在一邏輯鏈中之 件之數㈣加時’不必增加外部連接之數量。 熟習此項技術者將瞭解儘管已描述本發明被認為最佳模 2模Ϊ及執行本發明之其他適當的模式，本發明應不限 =較佳實施例之描述中之該等特殊組態及方法。 【圖式簡單說明】 於圖明一種裝置其中該裝置係藉由首先形成-陽極 、圖二t上接著藉由沈積一電致發光層及-陰極而形成； 圖2场示—種根據本發明之_實 晶片之配4; 〈顯不像素驅動 圖2 B繪示根據本發明之一實施 片；及 π運接顯示像素驅動晶 圖3繪示根據本發明之一實施例 — 片。 早1度連接之晶 【主要元件符號說明】 1 基板 2 陽極 3 電致發光層 4 陰極 144166.doc -12- 201027480 101 晶片 101' 晶片 102 6個像素 102' 6個像素 103 共用列連接 104' 時脈線 105' 符記線 106' 資料線 D1-D3 資料線 參 144166.doc 13-Examples are described in, for example, British Patent No. GB 23483 16 . Suitable materials for use in layer 3 include small molecular materials, polymeric materials, and (tetra) polymeric materials, and the like. Suitable electroluminescent polymers for use in layer 3 comprise poly(exoarylethylene) (eg, poly(p. 144166.doc 201027480 phenylene vinylene)) and polyarylenes (eg, a poly-type), especially a 2,7-bonded 9,9-dihydrocarbyl polyfluorene or a 2,7-bonded 9,9-diaryl polyclass; a polyspiro-class of 'particularly 2, 7-bonded poly 9 qi people, , Talk about H9, 9 polyspiral ring 薙; poly 茚 and the first class, especially 2,7-bonded polyfluorene oxime; polyphenylene, especially The hydrocarbyl or alkoxy group is substituted for poly], 4-phenylene. This is disclosed, for example, in Adv. Mater. 2000 12(23) 1737_175〇 and its references. Suitable electroluminescent dendrimers for use in layer 3 include electroluminescent metal complexes with dendrimers as disclosed in, for example, World Patent No. WO 02/066552. For example, a charge transfer layer, a charge injection layer or a charge layer is located between the anode 2 and the cathode 3. The device should be encapsulated with a packaging material (not shown) to prevent moisture and oxygen from entering. Suitable materials are packaged (10), such as films having suitable barrier properties, such as those disclosed in alternately stacked polymers and dielectrics such as in World Patent No. WO 01/81649, or as disclosed in, for example, World Patent No. One of the airtight containers. A getter material for absorbing one of the substrate names that may penetrate through the substrate or encapsulant, one of the cores, and one of the atmospheric moisture and/or oxygen may be disposed between the substrate and the encapsulant. Figure 1 illustrates a device in which the device is formed by first forming an anode on a substrate, followed by deposition of an electroluminescent layer and a cathode. The cleavage of the present invention can also be formed by first forming a cathode on a substrate, followed by deposition of an electroluminescent layer and an anode. In many types of displays, each pixel is divided into a monochrome area that, when viewed from a distance of 144166.doc 201027480, constitutes a color that is displayed or perceived. Each of the monochrome areas is a separately addressable "sub-pixel". In a typical color display, 'each pixel includes three sub-pixels; red, green, and blue. Thus, in the context of this patent specification, the terms "pixel" and "subpixel j are interchangeable. Figure 2A illustrates a configuration for displaying a pixel driven wafer in accordance with one embodiment of the present invention. In the illustrated configuration The wafer 101 drives six pixels 102 and includes a ground (GND) line and a VDD line and data lines D1-D3. These lines are common to all of the wafers in a row. In addition, the wafer 101 Further including a common column connection 103 to orthogonally connect the wafer to the next wafer. According to this configuration, as the number of wafer elements increases, the number of connections must be increased (increased connection density). For the avoidance of doubt, as used herein The "row" and "column" are only relative terms that indicate orthogonality. Figure 2B illustrates a connection display pixel drive wafer in accordance with an embodiment of the present invention. According to this illustrative example, the wafer 101 drives six pixels 1〇2. The NMOS chip includes a clock line 104, a line 1〇5| and a data line 106, and GND and VDD lines. As illustrated in Figure 3, this configuration enables the wafer to be connected in a single dimension, e.g., vertically, without the need for orthogonal selection line connections. The clock line 104' carries one of the clock signals for coordinating the actions of two or more wafers. The symbol line 1〇5 is a “daisy chain” line (that is, there is no connection except for the linear connection between the wafers), and the “daisy chain” line carries a token from one of the wafers in the chain. The data signal identifies the target-wafer. In the context of the present invention, the term "logical chain" is used to describe a series of wafers that are sequentially connected by virtue of the internal connections between the B-chips. The active 144I66.doc 201027480 matrix area can be white-twisted _ a logical chain but preferably a plurality of logical chains. Root Instance 'The logical chain is connected in the dimensional space between the bottom of one of the wafers in the chain and the top of the back sheet (i.e., "vertically"). However:: Note that, according to the embodiment of the present invention, since the chips are arranged in the form of a chrysanthemum, it is not necessary to configure or grid five pieces in any form, and therefore, according to this link configuration, when in a logical chain The number of pieces (four) plus 'do not have to increase the number of external connections. Those skilled in the art will appreciate that while the invention has been described as being considered to be the best mode 2 and to perform other suitable modes of the present invention, the present invention is not limited to the particular configuration of the preferred embodiment and method. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 shows a device in which the device is formed by first forming an anode, FIG. 2, and then depositing an electroluminescent layer and a cathode; FIG. 2 is a view of the present invention. FIG. 2B illustrates an embodiment of the present invention; and a π-transport display pixel driving crystallographic diagram 3 illustrates an embodiment in accordance with an embodiment of the present invention. 1 degree connection crystal [main component symbol description] 1 substrate 2 anode 3 electroluminescent layer 4 cathode 144166.doc -12- 201027480 101 wafer 101' wafer 102 6 pixels 102' 6 pixels 103 shared column connection 104' Clock line 105' character line 106' data line D1-D3 data line parameter 144166.doc 13-