201015811 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種脈寬調變穩壓器（Pulse Width Modulation Regulator，簡稱 PWM Regulator)，且特別是 • 有關於一種脈寬調變穩壓器之過壓保護電路。 【先前技術】 隨著半導體科技的快速演進’使得例如電腦及其週邊 Θ 數位產品等也日益地更新。在電腦及其週邊數位產品之應 用積體電路（Integrated Circuit，簡稱1C)中，由於半導 體製程之快速變化，造成積體電路電源之更多樣化需求， 以致應用如升壓器（Boost Converter)、降壓器（Buck Converter)等各種不同組合之脈寬調變穩壓器，來達成各 種積體電路之不同電源需求，也成為能否提供多樣化數位 產品的極重要因素之一。 當輸入電壓接近額定上限，為了提高脈寬調變穩壓器 ® 在此時之可靠度，除了避免輸入電壓的直流誤差所造成的 過壓’且避免因輸入脈寬調變穩壓器在工作時之電源的瞬 - 間電壓變化，主要是功率電晶體開關時，伴隨發生輸入電 • 源之漣波（Ripple)或突波（Spike)所造成之瞬間電壓變 化’以致毀損了脈寬調變穩壓器電路、或甚至牽連損壞了 脈寬調變穩壓器供應電源之其他應用電路等，通常係應治 一種稱為過壓保護電路（Over Voltage Protection，簡稱 - 0VP)之額外電路來保護，以避免因輸入電源電壓之偶然變 201015811 化而損壞主要電路，達成積體電路之可靠性的需求。 習知之一種過壓保護電路，係在欲保護之主要電路的 電源輸入端，串聯一能切斷輸入電源之開關。此一開關另 搭配有一偵測電路，可於偵測到輸入之電源電壓過高時， 自動切斷輸入電源，以避免因輸入電源之電壓的變化，損 — 壞了主要電路之功能。此種作法，雖能達成保護積體電路 之功能需求，但對於大功率、大電流之脈寬調變穩壓器電 路而言，串聯開關不僅會提高電路的輸出阻抗，也會因為 〇 其功率損耗過高而不符效能與成本的需求。 習知另一種過壓保護電路，係在欲保護之主要電路的 電源輸入端，並聯如齊納二極體（Zener Diode)等能箝制輸 入電壓之裝置，以避免因輸入電源之電壓的提昇，損壞了 主要電路之功能。此種作法，雖然同樣也能達成保護積體 電路之功能需求，但卻因可應用之箝制裝置在不同製程上 之選擇極為有限，使得其應用十分不便。 ®【發明内容】 有鑑於此，本發明之目的是提供一種脈寬調變穩壓器 之過壓保護電路及方法，其無須在輸入電源串聯開關或並 聯電壓箝制裝置，可在不損耗電路工作效能且不過度提高 成本的情形下，方便地達成過壓保護之功能需求。 為達上述及其他目的，本發明提供一種脈寬調變穩壓 器之過壓保護電路，包括：功率電晶體、用以產生驅動功 率電晶體之脈寬調變驅動訊號的控制驅動電路、以及用以 201015811 偵測輸入功率電晶體之電源電壓的電壓偵測電路。其中， 過壓保護電路係於電壓偵測電路偵測到電源電壓到達一預 設電壓值時，以其輸出之過壓保護訊號，來關閉脈寬調變 驅動訊號對於功率電晶體之驅動。 在一實施例中，此脈寬調變穩壓器之過壓保護電路的 電壓彳貞測電路包括：用以取得所欲偵測之電源電壓的分壓 之兩串聯電阻、以及用以將所取得之分壓與一參考電壓作 比較之比較器。其中，比較器係當所欲偵測之電源電壓到 Ο 達前述之預設電壓值時，即輸出前述之過壓保護訊號，以 關閉脈寬調變驅動訊號對於功率電晶體之驅動。 在一實施例中，此脈寬調變穩壓器之過壓保護電路的 過壓保護訊號，係與脈寬調變驅動訊號一同輸入至一致能 開關，以當所偵測之電源電壓到達前述之預設電壓值時， 關閉驅動功率電晶體之脈寬調變驅動訊號。其中，致能開 關可以為及閘、或閘、反及閘與反或閘之其一，以因應過 壓保護訊號之輸出與否，來決定是否關閉驅動功率電晶體 © 之脈寬調變驅動訊號。 在一實施例中，此脈寬調變穩壓器之過壓保護電路的 - 功率電晶體，係為如NPN功率電晶體、PNP功率電晶體、 ， 腿0S功率電晶體或pm〇S功率電晶體等之其一。 本發明另提供一種脈寬調變穩壓器之過壓保護方法， 可應用於具有受脈寬調變驅動訊號驅動之功率電晶體的脈 寬調變制器。此過麼保護方法包括下列步釋··首先侦測 輸入功率電晶體之電源電屢的電壓值；以及當價測到電源 201015811 電壓已達一預設電壓值時，輸出一過壓保護訊號，以關閉 脈寬調變驅動訊號對於功率電晶體之驅動。 其中，偵測輸入功率電晶體之電源電壓的電壓值之步 驟包括：取得輸入功率電晶體之電源電壓的分壓；以及將 所取得之分壓與一參考電壓作比較，以當電源電壓到達前 " 述之預設電壓值時，輸出前述之過壓保護訊號。 其中，此脈寬調變穩壓器之過壓保護方法，係將前述 之過壓保護訊號與脈寬調#驅動訊號一同輸入至例如是及 β 閘、或閘、反及閘與反或閘之其一的致能開關，以當所偵 測之電源電壓到達前述預設電壓值時，藉由輸出之過壓保 護訊號，來關閉脈寬調變驅動訊號。 綜上所述，本發明所提供之一種脈寬調變穩壓器之過 壓保護電路及方法，係以電壓偵測電路來偵測輸入功率電 晶體之電源電壓，在一般情況下，當積體電路（ic)的耐 壓決定在功率電晶體時，在電壓偵測電路偵測到電源電壓 到達一預設電壓值，也就是接近功率電晶體導通（0Ν)時之 ® 崩潰電壓值時，以輸出之過壓保護訊號，來關閉脈寬調變 驅動訊號對於功率電晶體之驅動。除了可以消除電源因功 _ 率電晶體開關時所造成的漣波（Ripple)及突波（Spike)引 . 起的瞬間過壓，且由於功率電晶體在關閉（OFF)時之崩潰電 壓，通常較導通（0N)時之崩潰電壓高約百分之十至二十左 右，因而可進一步保護脈寬調變穩壓器之功率電晶體免於 損壞。另外，當積體電路（1C)耐壓決定於其他某些内部 元件時，此時當輸入電壓接近預設過壓電壓時，過壓保護 201015811 訊號會輸出來關閉功率電晶體，使瞬間輸入電壓上的、 (Ripple)或是突波（Spike)不致出現，以保護内部元件'連波 方式因無須在輸入電源串聯開關或並聯電壓箝制骏置此 可在不損耗電路工作效能且不過度提高成本的情形下，’故 便地達成過壓保護之功能需求。 方 為讓本發明之上述和其他目的、特徵、和優點4 顯易1¾，下文特以較佳實施例，並配合所附圖式”，作a,月 說明如下： 作詳細 ❹ ❹ 【實施方式】 圖1係為根據本發明第一實施例之一種脈寬調 、 器之過壓保護電路示意圖’目2則為圖i之操作波带，麗 圖。實施例中，係以脈寬調變穩壓器之降壓器意 Converter)的應用為例來說明。 CBuck 圖1中，脈寬調變穩壓器之降壓器包括：電 路11、控制驅動電路12、作為上橋之PM〇s功率電晶’則電 作為下橋之_S功率電晶體14、作為輸讀波^ 13、 15與電容16、以及提供控制驅動電路12迴授分電感 阻17、18等元件。 跫卟之電 其中，控制驅動電路12係依據電阻17、μ之、回」 壓FB的大小，來產生分別驅動娜功率電晶體i3 功率電晶體14等功率電晶體之脈寬調變驅動訊號卯^ 。常態運作時，脈寬調變驅動訊號UG與LG係受控制親 動電路12之控制，而如圖2之肌前段般地在高準位與低 201015811 準位間循序變動，脈寬調變驅動訊號UG與LG的脈寬則參 考迴授分壓FB來調變，並分別驅動pM〇s功率電晶體13輿 丽0S功率電晶體14而產生震盪之輸出LX，達成調節輸出 電壓Vout之目的。 為了提高脈寬調變穩壓器之可靠性，圖中並以電壓偵 〜測電路11 ’來偵測輸入至PM0S功率電晶體13與NM0S功 率電晶體14等功率電晶體之電源電壓νίΝ。電壓偵測電路 11設定有一預設電壓值Vth，此一預設電壓值vth可以參 ❹考PM0S功率電晶體13與NM0S功率電晶體14等功率電晶 體之崩潰電壓來設定，以當電壓偵測電路n偵測到電源電 壓VIN到達予i設電壓值Vth _，可以藉由輸出之過壓保護 訊號0VP，來關閉脈寬調變驅動訊號UG與LG分別對於pM〇s 功率電晶體13與_s功率電晶體14等功率電晶體之驅 動，避免因輸入之電源電壓VIN過高時，導致PM〇s功率電 晶體13與NM0S功率電晶體14等功率電晶體之損壞。另 外，如圖2後段所示’當電源電壓VIN恢復低於預設電壓 值Vth時，電壓侧電路11則停止輸出過壓保護訊號0VP， 使脈寬調變穩壓器再度恢復其常態運作功能。 - 由於如應功率電晶體13與_S功匕率電晶體】4等 ，功率電晶體，其關閉_)時之崩潰電壓，通常較導通_ 時之崩潰電壓局約百分之十至二十左右，故前述當電壓積 測電路11偵測到電源電壓VIN到達預設電壓值Vth時，藉 由輸出之過壓保護訊號0VP ’來關閉脈寬調變驅動訊號UG 與LG分別對於PM0S功率電晶體13與丽〇s功率電晶體14 201015811 等功率電晶體之驅動的方法，即可適時地保護脈寬調變穩 壓器之功率電晶體免於損壞。 請參考圖3所示，其為圖1之電壓偵測電路的實施例 示意圖。圖中，電壓偵測電路11係以兩串聯之電阻31、 ‘ 32，來取得所欲積測之輸入電源電壓VIN的分壓，然後將 ••所取得之分壓輸人#較11 33，以與參考電壓Vref作比 較。因此，當比較器33憤測到輸入之電源電壓VIN到達預 設電壓值Vth時，即<輸出過壓保護訊號0VP。 ❹言青參考圖4所系，其為圖1之控制驅動電路實施例示 意圖。圖中，控制驅動電路12内部產生之驅動訊號UG’’ 係先行輪入至例如是或間41之致能開關’然後才經由驅動 器42之驅動，產生驅動PM0S功率電晶體13之脈寬調變驅 動訊號UG。因此，即玎藉由過壓保護訊號0VP之有無’來 關閉脈寬調變驅動訊號UG ’以停止其對於PM0S功率電晶 體13之驅動，適時地保護脈寬調變穩壓器之PM〇S功率電 晶體13免於損壞。 圖4中，雖然是以成閘41來作為驅動訊號UG’之致能 開關’然熟習此藝|應知’也可以使用如及閘、反或閘、 _ 反及閘等各種不同之邏輯閘，來達成致能開關之功能，以 ' 因應過歷保護吼號〇"VP之輸出與否，來決定是否關閉脈寬 調變驅動訊號UG ,以停土其對於PM0S功率電晶體13之驅 動°另外，關閉脈寬調變驅動訊號UG對於PM0S功率電晶 體丨3之驅動的方式，也可以是在控制驅動電路12中，參 考過壓保護訊號〇vp之輸出，而直接地將驅動訊號UG’予以 11 201015811 關閉。 圖5係為根據本發明第二實施例之一種脈寬調變穩壓 器之過壓保護電路示意圖，實施例中，係以脈寬調變穩壓 器之升壓器（Boost Converter)的應用為例來說明。 圖5中，脈寬調變穩壓器之升壓器包括：電壓偵測電 ·* 路51、控制驅動電路52、NM0S功率電晶體54、電感55、 二極體59、電容56、以及提供控制驅動電路52迴授分壓 FB之電阻57、58等元件。 ❹ 其中，控制驅動電路52係依據電阻57、58之迴授分 .壓FB的大小，來產生驅動疆0S功率電晶體54之脈寬調變 驅動訊號LG。常態運作時，脈寬調變驅動訊號LG係受控 制驅動電路52之控制，而在高準位與低準位間循序變動， 脈寬調變驅動訊號LG的脈寬則參考迴授分壓FB來調變， 以驅動丽0S功率電晶體54而產生震盪之輸出LX，達成調 節輸出電壓Vout之目的。 假設積體電路（1C)之電源電壓VIN的上限是來自某 ® 些内部元件的崩潰電壓，當電源電壓VIN接近這些崩潰電 壓時，電壓偵測電路51輸出過壓保護訊號0VP，以啟動過 - 壓保護線路並關閉NM0S功率電晶體54，進而消除電源電 • 壓VIN端的漣波（Ripple)/突波（Spike)，達到保護内部元 件的目的。201015811 IX. Description of the Invention: [Technical Field] The present invention relates to a Pulse Width Modulation Regulator (PWM Regulator), and in particular to a pulse width modulation regulator Overvoltage protection circuit. [Prior Art] With the rapid evolution of semiconductor technology, for example, computers and their peripheral digital products have also been increasingly updated. In the application of integrated circuits (1C) for digital products in computers and their peripherals, due to the rapid changes in semiconductor manufacturing processes, the demand for integrated circuit power supplies has become more diverse, resulting in applications such as boosters (Boost Converter). Various types of pulse width modulation regulators, such as Buck Converter, to achieve different power requirements of various integrated circuits, and become one of the most important factors for providing a variety of digital products. When the input voltage is close to the rated upper limit, in order to improve the reliability of the PWM converter at this time, in addition to avoiding the overvoltage caused by the DC error of the input voltage' and avoiding the operation of the input pulse width modulation regulator The instantaneous-to-inter-voltage variation of the power supply is mainly caused by the instantaneous voltage change caused by the Ripple or the Spike of the input power source when the power transistor is switched, so that the pulse width modulation is destroyed. The regulator circuit, or even the other application circuits that damage the supply of the PWM converter, are usually protected by an extra circuit called Over Voltage Protection (0VP). In order to avoid the damage to the main circuit due to the accidental change of the input power supply voltage, the reliability of the integrated circuit is required. An overvoltage protection circuit of the prior art is a switch that can cut off the input power supply in series with the power input terminal of the main circuit to be protected. The switch is additionally equipped with a detection circuit to automatically cut off the input power when the input power supply voltage is too high, so as to avoid the function of the main circuit due to the change of the voltage of the input power. In this way, although the functional requirements of the protection integrated circuit can be achieved, for a high-power, high-current pulse width modulation regulator circuit, the series switch not only increases the output impedance of the circuit, but also because of its power. The loss is too high to meet the performance and cost requirements. Another overvoltage protection circuit is known to be connected to a power input terminal of a main circuit to be protected, such as a Zener diode, to clamp the input voltage to avoid an increase in the voltage of the input power source. Damaged the function of the main circuit. In this way, although the functional requirements of the protection integrated circuit can be achieved as well, the application of the clamp device is extremely limited in different processes, making the application extremely inconvenient. In view of the above, an object of the present invention is to provide an overvoltage protection circuit and method for a pulse width modulation regulator, which can operate in a non-loss circuit without an input power supply series switch or a parallel voltage clamping device. In the case of performance without excessively increasing the cost, it is convenient to achieve the functional requirements of overvoltage protection. To achieve the above and other objects, the present invention provides an overvoltage protection circuit for a pulse width modulation regulator, comprising: a power transistor, a control driving circuit for generating a pulse width modulation driving signal for driving the power transistor, and A voltage detection circuit for detecting the power supply voltage of an input power transistor in 201015811. The overvoltage protection circuit is configured to turn off the pulse width modulation driving signal for driving the power transistor when the voltage detecting circuit detects that the power voltage reaches a preset voltage value and outputs an overvoltage protection signal. In one embodiment, the voltage sensing circuit of the overvoltage protection circuit of the pulse width modulation regulator includes: two series resistors for obtaining a voltage division of the power supply voltage to be detected, and a A comparator that compares the obtained partial voltage with a reference voltage. The comparator outputs the overvoltage protection signal when the power supply voltage to be detected reaches the preset voltage value to turn off the pulse width modulation driving signal for driving the power transistor. In one embodiment, the overvoltage protection signal of the overvoltage protection circuit of the pulse width modulation regulator is input to the uniformity switch together with the pulse width modulation driving signal, so that when the detected power supply voltage reaches the foregoing When the voltage value is preset, the pulse width modulation driving signal of the driving power transistor is turned off. Wherein, the enable switch can be one of a gate, or a gate, a reverse gate, and an inverse or a gate to determine whether to turn off the pulse width modulation drive of the driving power transistor © in response to the output of the overvoltage protection signal. Signal. In one embodiment, the power transistor of the overvoltage protection circuit of the pulse width modulation regulator is, for example, an NPN power transistor, a PNP power transistor, a leg OS power transistor or a pm power amplifier. One of crystals, etc. The invention further provides an overvoltage protection method for a pulse width modulation regulator, which can be applied to a pulse width modulation device having a power transistor driven by a pulse width modulation driving signal. The protection method includes the following steps: firstly detecting the voltage value of the power supply of the input power transistor; and outputting an overvoltage protection signal when the voltage of the power supply 201015811 has reached a predetermined voltage value, The driving of the power transistor is performed by turning off the pulse width modulation drive signal. The step of detecting a voltage value of a power supply voltage of the input power transistor includes: obtaining a partial voltage of a power supply voltage of the input power transistor; and comparing the obtained partial voltage with a reference voltage to before the power supply voltage arrives " When the preset voltage value is described, the above-mentioned overvoltage protection signal is output. The overvoltage protection method of the pulse width modulation regulator is to input the above-mentioned overvoltage protection signal together with the pulse width adjustment # drive signal to, for example, a β gate, or a gate, a reverse gate, and an inverse gate. One of the enabling switches is to turn off the pulse width modulation driving signal by outputting the overvoltage protection signal when the detected power supply voltage reaches the preset voltage value. In summary, the overvoltage protection circuit and method of the pulse width modulation regulator provided by the present invention uses a voltage detection circuit to detect the power supply voltage of the input power transistor, and in general, when The withstand voltage of the body circuit (ic) is determined by the voltage detection circuit when the voltage detection circuit detects that the power supply voltage reaches a predetermined voltage value, that is, the value of the breakdown voltage when the power transistor is turned on (0Ν). The output overvoltage protection signal is used to turn off the pulse width modulation driving signal for driving the power transistor. In addition to eliminating the transient overvoltage caused by the Ripple and Spike caused by the power transistor, and because of the breakdown voltage of the power transistor during the OFF state, usually The breakdown voltage is about 10 to 20 degrees higher than that of conduction (0N), so that the power transistor of the pulse width modulation regulator can be further protected from damage. In addition, when the integrated circuit (1C) withstand voltage is determined by some other internal components, when the input voltage is close to the preset overvoltage voltage, the overvoltage protection 201015811 signal will be output to turn off the power transistor, so that the instantaneous input voltage The upper (Ripple) or the spur (Spike) will not appear to protect the internal components. The continuous wave mode does not need to be used in the input power series switch or the parallel voltage clamp, so that the performance of the circuit can be avoided without excessively increasing the cost. In the case of 'defectively, the functional requirements of overvoltage protection are achieved. The above and other objects, features, and advantages of the present invention will become apparent to those skilled in the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; 1 is a schematic diagram of an overvoltage protection circuit of a pulse width modulation device according to a first embodiment of the present invention, and FIG. 2 is an operation band of the diagram i, in which the pulse width modulation is used in the embodiment. The application of the regulator's buck converter is as an example. CBuck In Figure 1, the buck regulator of the pulse width modulation regulator includes: circuit 11, control drive circuit 12, PM〇s as the upper bridge The power electric crystal 'is electrically used as the lower bridge _S power transistor 14, as the input read wave ^ 13, 15 and the capacitor 16, and provides the control drive circuit 12 to return the sub-inductance resistance 17, 18 and other components. The control drive circuit 12 generates a pulse width modulation drive signal 卯^ for driving a power transistor such as a power transistor i3 power transistor 14 according to the magnitude of the resistors 17, and the voltage FB. In normal operation, the pulse width modulation drive signal UG and the LG are controlled by the control of the remote control circuit 12, and as shown in the front section of the muscle of FIG. 2, the sequence is changed between the high level and the low 201015811 level, and the pulse width modulation drive is driven. The pulse widths of the signals UG and LG are modulated by reference to the feedback voltage divider FB, and respectively drive the pM〇s power transistor 13 to the 0Vost power transistor 14 to generate the oscillating output LX, thereby achieving the purpose of adjusting the output voltage Vout. In order to improve the reliability of the pulse width modulation regulator, the voltage detection circuit 11' is used to detect the power supply voltage νίΝ input to the power transistors such as the PMOS power transistor 13 and the NMOS power transistor 14. The voltage detecting circuit 11 is configured to have a preset voltage value Vth. The predetermined voltage value vth can be set by referring to the breakdown voltage of the power transistor such as the PM0S power transistor 13 and the NM0S power transistor 14 to detect the voltage. The circuit n detects that the power supply voltage VIN reaches the voltage value Vth_, and can turn off the pulse width modulation driving signal UG and LG by the output overvoltage protection signal 0VP, respectively, for the pM〇s power transistor 13 and _ The driving of the power transistor such as the power transistor 14 avoids damage to the power transistors such as the PM〇s power transistor 13 and the NM0S power transistor 14 when the input power supply voltage VIN is too high. In addition, as shown in the latter part of Fig. 2, when the power supply voltage VIN returns below the preset voltage value Vth, the voltage side circuit 11 stops outputting the overvoltage protection signal 0VP, so that the pulse width modulation regulator resumes its normal operation function again. . - Due to the power transistor 13 and _S power rate transistor], etc., the power transistor, the breakdown voltage when it is turned off _), usually about 10 to 20 percent of the breakdown voltage when conducting _ So, when the voltage integration circuit 11 detects that the power supply voltage VIN reaches the preset voltage value Vth, the pulse width modulation driving signal UG and LG are turned off by the output overvoltage protection signal 0VP' respectively. The driving method of the crystal 13 and the power transistor of the high-voltage transistor 14 201015811 can timely protect the power transistor of the pulse width modulation regulator from damage. Please refer to FIG. 3, which is a schematic diagram of an embodiment of the voltage detecting circuit of FIG. 1. In the figure, the voltage detecting circuit 11 uses two series resistors 31, '32 to obtain the divided voltage of the input power supply voltage VIN to be measured, and then the voltage divided by the input is #11, Compare with the reference voltage Vref. Therefore, when the comparator 33 infers that the input power supply voltage VIN reaches the preset voltage value Vth, it is < output the overvoltage protection signal 0VP. ❹言青 is referred to Fig. 4, which is an illustrative embodiment of the control drive circuit of Fig. 1. In the figure, the driving signal UG'' generated inside the control driving circuit 12 is firstly turned into an enabling switch of, for example, or 41, and then driven by the driver 42, generating a pulse width modulation of the driving PMOS power transistor 13. Drive signal UG. Therefore, the pulse width modulation drive signal UG ' is turned off by the presence or absence of the overvoltage protection signal 0VP to stop its driving for the PM0S power transistor 13, and the PM〇S of the PWM converter is protected in time. The power transistor 13 is protected from damage. In Fig. 4, although the gate 41 is used as the enable switch for the drive signal UG', it is familiar to the art. It should be known that various logic gates such as sluice gate, reverse gate, _reverse gate and the like can also be used. To achieve the function of the enable switch, to determine whether to turn off the pulse width modulation drive signal UG in order to stop the drive of the PM0S power transistor 13 in response to the output of the 过 吼 〇 〇 quot VP ° In addition, the way to turn off the pulse width modulation driving signal UG for the driving of the PM0S power transistor 丨3 may also be in the control driving circuit 12, referring to the output of the overvoltage protection signal 〇vp, and directly driving the driving signal UG 'To be 11 201015811 closed. 5 is a schematic diagram of an overvoltage protection circuit of a pulse width modulation regulator according to a second embodiment of the present invention. In the embodiment, an application of a booster (Boost Converter) with a pulse width modulation regulator is shown. As an example to illustrate. In FIG. 5, the booster of the pulse width modulation regulator includes: a voltage detection circuit, a control circuit 52, an NM0S power transistor 54, an inductor 55, a diode 59, a capacitor 56, and a The control drive circuit 52 feeds back the components such as the resistors 57, 58 of the divided voltage FB. The control drive circuit 52 generates a pulse width modulation drive signal LG for driving the 0S power transistor 54 according to the back of the resistors 57 and 58 and the magnitude of the voltage FB. In the normal operation, the pulse width modulation driving signal LG is controlled by the control driving circuit 52, and sequentially changes between the high level and the low level, and the pulse width of the pulse width modulation driving signal LG is referred to the feedback voltage dividing FB. To adjust, to drive the CMOS power transistor 54 to generate an oscillating output LX, to achieve the purpose of regulating the output voltage Vout. Assume that the upper limit of the power supply voltage VIN of the integrated circuit (1C) is the breakdown voltage from some internal components. When the power supply voltage VIN approaches these breakdown voltages, the voltage detection circuit 51 outputs an overvoltage protection signal 0VP to start over- The protection circuit is closed and the NM0S power transistor 54 is turned off, thereby eliminating the Ripple/Spike at the VIN end of the power supply to protect the internal components.
前述實施例中，脈寬調變穩壓器之過壓保護電路的功 率電晶體，雖然是僅以NM0S功率電晶體與PM0S功率電晶 體為例，然熟習此藝者應知，其他如NPN功率電晶體或PNP 12 201015811 功率電晶體等，也可以應用此一方式，來達成過壓保護之 目的。 綜上所述，可歸納一種脈寬調變穩壓器之過壓保護方 法，可應用於具有受脈寬調變驅動訊號驅動之功率電晶體 ' 的脈寬調變穩壓器。此過壓保護方法包括下列步驟：首先 ' 偵測輸入功率電晶體之電源電壓VIN的電壓值；以及當偵 測到電源電壓VIN已達一預設電壓值Vth時，輸出一過壓 保護訊號0VP，以關閉脈寬調變驅動訊號UG、LG對於功率 ® 電晶體之驅動。 其中，偵測輸入功率電晶體之電源電壓VIN的電壓值 之步驟包括：取得輸入功率電晶體之電源電壓VIN的分 壓；以及將所取得之分壓與一參考電壓Vref作比較，以當 電源電壓VIN到達前述之預設電壓值Vth時，輸出前述之 過壓保護訊號0VP，以關閉脈寬調變驅動訊號UG、LG對於 功率電晶體之驅動。 其中，此脈寬調變穩壓器之過壓保護方法，係將前述 ® 之過壓保護訊號0VP與脈寬調變驅動訊號UG或LG，一同 輸入至例如是及閘、或閘、反及閘與反或閘之其一的致能 開關，以當所偵測之電源電壓VIN到達前述預設電壓值 Vth，並輸出前述之過壓保護訊號0VP時，藉以關閉脈寬調 變驅動訊號UG、LG。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍内所作之各種更動與潤飾，亦屬本發明之範圍。因 13 201015811 $準本發明之保護範圍當視後附之申請專利範圍所界定者 【圖式簡單說明】 、圖1係顯示根據本發明第一實施例之一種脈寬調變穩 壓器之過壓保護電路示意圖。 〜 圖2係顯示圖1之操作波形示意圖。 圖3係顯示圖i之電壓该測電路實施例示意圖。 圖4係顯示圖1之控制驅動電路實施例示意圖。 、圖5係顯示根據本發明第二實施例之一種脈寬調變穩 壓器之過壓保護電路示意圖。 【主要元件符號說明】 11、 51電壓彳貞測電路 12、 52控制驅動電路 13 PM0S功率電晶體 14、 54 NM0S功率電晶體 15、 55電感 16、 56電容 17、 18、31、32、57、58 電阻 33比較器 41或閘 42驅動器 59二極體 14In the foregoing embodiment, the power transistor of the overvoltage protection circuit of the pulse width modulation regulator is exemplified by only the NM0S power transistor and the PMOS power transistor. However, those skilled in the art should know that other powers such as NPN are known. Transistor or PNP 12 201015811 Power transistor, etc., can also be applied to achieve overvoltage protection. In summary, an overvoltage protection method for a pulse width modulation regulator can be summarized, which can be applied to a pulse width modulation regulator having a power transistor driven by a pulse width modulation driving signal. The overvoltage protection method includes the following steps: firstly: detecting the voltage value of the power supply voltage VIN of the input power transistor; and outputting an overvoltage protection signal 0VP when detecting that the power supply voltage VIN has reached a preset voltage value Vth To turn off the pulse width modulation drive signal UG, LG for the power ® transistor drive. The step of detecting the voltage value of the power supply voltage VIN of the input power transistor includes: obtaining a partial voltage of the power supply voltage VIN of the input power transistor; and comparing the obtained partial voltage with a reference voltage Vref to be the power supply When the voltage VIN reaches the preset voltage value Vth, the overvoltage protection signal 0VP is outputted to turn off the driving of the pulse width modulation driving signals UG and LG for the power transistor. The overvoltage protection method of the pulse width modulation regulator is to input the overvoltage protection signal 0VP of the above-mentioned ® and the pulse width modulation driving signal UG or LG into, for example, a gate, a gate, or a gate. The enable switch of one of the gate and the reverse gate or the gate is used to turn off the pulse width modulation drive signal UG when the detected power supply voltage VIN reaches the preset voltage value Vth and outputs the aforementioned overvoltage protection signal 0VP. LG. While the invention has been described above by way of a preferred embodiment, it is not intended to limit the invention, and it is intended to be within the scope of the invention. . Because of the scope of the invention, the scope of the invention is defined by the scope of the appended patent application. [FIG. 1 shows a pulse width modulation regulator according to the first embodiment of the present invention. Schematic diagram of the voltage protection circuit. ~ Figure 2 is a schematic diagram showing the operation waveform of Figure 1. FIG. 3 is a schematic diagram showing an embodiment of the voltage measurement circuit of FIG. 4 is a schematic diagram showing an embodiment of the control driving circuit of FIG. 1. Figure 5 is a schematic diagram showing an overvoltage protection circuit of a pulse width modulation regulator according to a second embodiment of the present invention. [Main component symbol description] 11, 51 voltage detection circuit 12, 52 control drive circuit 13 PM0S power transistor 14, 54 NM0S power transistor 15, 55 inductor 16, 56 capacitor 17, 18, 31, 32, 57, 58 resistor 33 comparator 41 or gate 42 driver 59 diode 14