200921879 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種發光二極體封裝基板之製作 方法，尤指一種以金屬基板開始製作封裝基板之方 法’其結構係包括完整線路之置晶側及一支撐用之固 持件。於其中’係在最後移除該金屬基板以完成基板 製程，使晶片之發光面完全曝露。 【先前技術】 在一般發光二極體封裝基板之製作上，其製作方 法通常係由一核心基板開始，經過鑽孔、電鍍金屬及 雙面線路接墊製作等方式，完成一雙面結構之發光二 極體封裝基板。如第1 7圖〜第1 9圖所示，其係為 一般發光二極體封裝基板之剖面示意圖。首先，準備 :核心基板5 0 ’其中’該核心基板5 ◦係由—具預 定厚度之芯層5 0 1及形成於此芯層5 〇丄表面：金 屬層5 0 2所構成’且該芯層5 〇工中係 個電@ # i甬：?丨R η 〇 '、^成有復數 冤鍍¥通孔5 0 3，可藉以連接該芯層5 〇 之金屬層5 0 2。 “I表面 接㈣錢収方切該心'基板 置晶側接塾5 i及—球側接塾52，最後再進 及成型’即完成傳統雙面結構之發光二極體 ή基板。然而’此㈣作方法並無法改善 低發光角纟、封裝材料變色及散熱等缺點。故：—般 200921879 習用者係無法符合 使用者於實際使用時之所200921879 IX. Description of the Invention: [Technical Field] The present invention relates to a method for fabricating a light-emitting diode package substrate, and more particularly to a method for starting a package substrate using a metal substrate, the structure of which includes a complete circuit Crystal side and a support for holding. The metal substrate is removed at the end to complete the substrate process, so that the light-emitting surface of the wafer is completely exposed. [Prior Art] In the fabrication of a general light-emitting diode package substrate, the fabrication method is usually started from a core substrate, and the light-emitting of a double-sided structure is completed by drilling, plating metal, and double-sided wiring pads. Diode package substrate. As shown in Fig. 17 to Fig. 19, it is a schematic cross-sectional view of a general light-emitting diode package substrate. First, a core substrate 50' is prepared in which the core substrate 5 is made of a core layer 501 having a predetermined thickness and a surface of the core layer 5 is formed: a metal layer 502 is formed and the core Layer 5 is completed in the middle of a power @ # i甬:?丨R η 〇', ^ into a plurality of 冤 plating 通 hole 5 0 3, by which the metal layer 5 0 2 of the core layer can be connected. "I surface connection (four) money collection side cut the heart 'substrate crystal side connector i 5 i and - ball side interface , 52, and finally re-entry and molding 'that completes the traditional double-sided structure of the LED array substrate. However' This method does not improve the low illumination angle, the discoloration of the packaging material and the heat dissipation. Therefore: the general practitioner of 200921879 cannot meet the user's actual use.
【發明内容】 本發明之主要目的係在於， 剛性使封裝製程可更為簡易，並於足夠之 曝露。藉此，使本發明且J 片之發光面完全 反方法所製造之封裝基板結構，不僅可簡 程，並能有效改善傳統封裝㈣光^ 色及散熱等問題。 從金屬基板開始製作 線路之置晶側及—支 本發明之次要目的係在於， 之封裝基板，其結構係包括完整 撐用之固持件。 為達以上之目的，本發明係一種發光二極體封裝 ί板之製作方法’係於-金屬基板之第-面製作線路 層’以作為與-晶片電性連接之接塾用，並於該線路 層上製作—作為支撐用之固持件。最後，再移除該金 屬基板，以完成封裝基板之製作。 【實施方式】 請芩閱『第1圖』所示，係分別為本發明之製作 流程示意圖。如圖所示··本發明係一種發光二極體封 裝基板之製作方法，其至少包括下列步驟： (Α)提供金屬基板11:提供一金屬基板； 200921879 (B) 形成第一、二阻層及複數個第一開口 分別於該金屬基板之第一面上形成—第 於該金屬基板之筮-而μ五，丄、 汉 展，於豆：形成一完全覆蓋狀之第二阻 層於其中，並以曝光及_之方式 :成複數個第-開口，以顯露其下該金屬基板二 (C) 形成第一凹槽1 q . ,ν Α± -Μ 個第-開口下方形成複數個第一凹槽^之方式於複數 (D) 移除第一、二阻眉1」· Αι 除該第-阻層及該第二阻層4，以剝離之方式移 印刷形成第—電性阻絕層1 5 :以直接壓合或 声”於複數個第-凹槽内形成-第-電性阻絕 曰、中’該第-電性阻絕層係可為防焊綠漆、環氧 (Ajino.oto Build-up Film,ABF)> enz〇cyci。摘咖，BCB)、雙馬來亞 ^ Triazine> j ，）、聚醯亞胺（Poiyimide，pi)、聚四氣乙 :^t:r：：tMene)’pTFE)或環氧樹脂及玻 (F )形成第三、四阻層及複數個第二開口 2 6 : 屬絲之第一面上形成—第三阻層，以及 …孟海基板之弟二面上形成-完全覆蓋狀之第四阻 曰其尹，並以曝光及顯影之方式在該第三阻層上 數個第二開D，以顯露其下該金屬基板之第- 200921879 面； (G )形成複數金屬層1 7 :於複數個第二開口 中形成一複數金屬層，其中，該複數金屬層係可為鎳/ 銅、金/銅或金/錄/銅之複數金屬結構； (Η)移除第二、四阻層1 8 :以剝離之方式移 除該第三阻層及該第四阻層； (I )完成具有金屬基板支撑並具電性連接之單 層基板19:於該複數金屬層上形成一第一防焊層， 並以曝光及顯影之方式在該第一防焊層上形成複數個 第二開口，以顯露作為與晶片電性連接之接墊部份。 至此，可選擇進行步驟（j )或步驟（K); (J )开> 成具有金屬基板與固持件支撐並具完整 置晶側線路之單層基板2 〇a:在該金屬基板之第二^ 上形成一第五阻層，並於複數個第三開口上形成一第 一阻障層，最後再以剝離之方式移除該第五阻層，並 再於該第一防谭層上形成至少一固持件。至此，係完 成一具有金屬基板與固持件支撐並具完整置晶側線$ 之車層基板，以形成一發光二極體封裝基板，其中， 。玄第阻障層係可為電鑛錄金、無電鑛鎳金、電錢銀 或電鍍錫中擇其一；或 (Κ)形成具有金屬基板與固持件支撐並具完整 置晶側線路之單層基板2 〇b:在該第一防焊層上形^ 至少-固持件，接著於該金屬基板之第二面上形成— 第六阻層’並在複數個第三開口上形成一第二阻障 200921879 層，最後再以剝離之方式移除該第六阻層。至此，完 成:具有金屬基板與固持件支樓並具完整置晶側線路 之單層基板，以形成一發光二極體封裝基板；以及 (L )形成具有固持件支撐之封裝基板2丄·以 蝕刻之方式移除該金屬基板與該第一電性阻絕層。至 此，元成一具有固持件支撐之封裝基板。 上述步驟（J )係在完成完整線路之置晶側後形 成一支撐用之固持件，而步驟（K)則係先行完成該 支標用之固持件後，始進行置晶側之完整線路製作。 兩種方式皆可獲得相同結構之高亮度發光二極體封裝 基板。於其中，該第一〜六阻層係以貼合、印刷或旋 轉塗佈所為之乾膜或渔膜之高感光性光阻；該第一、 一阻障層係可為電鍍鎳金、無電鍍鎳金、電鍍銀或電 鍍錫中擇其一；該固持件係可為金屬、非金屬或具金 屬及非金屬混成之材料。 請f閱『第2圖〜第i 3圖』所示，係分別為本 發明一實施例之發光二極體封裝基板（一）剖面示意 圖、本發明一實施例之發光二極體封裝基板（二）剖 面示意圆、本發明一實施例之發光二極體封裝基板 (三）剖面示意圖、本發明一實施例之發光二極體封 裝基板（四）剖面示意圖、本發明一實施例之發光二 極體封a基板（五）剖面示意圖、本發明一實施例之 矣光一彳J!肢封I基板（六）剖面示意圖、本發明一實 施例之發光二極體封裝基板（七）剖面示意圖、本發 200921879 明一實施例之發光二極體封裝基板（八）剖面示意圖、 本發明一實施例之發光二極體封裝基板（九）剖面示 意圖、本發明一實施例之發光二極體封裝基板（十） 剖面示意圖、本發明一實施例之發光二極體封裝基板 (十一）剖面示意圖、及本發明一實施例之發光二極 體封裝基板（十二）剖面示意圖。如圖所示：本發明 於一較佳實施例中，係先提供一金屬基板3 〇，並分 別於該金屬基板3 0之第一面上貼合一高感光性高分 子材料之第一阻層3 以及於該金屬基板3 〇之第 面上貼合一同為高感光性高分子材料之第二阻層^ f，並以曝光及顯影之方式在該第一阻層3丄上形成 禝數個第：開口 3 3，以顯露其下之金屬基板3 〇第 一面。接著以蝕刻之方式製作-半蝕之第一凹槽3 二招金屬基板3 Q係為—不含介電層材料之 。之層31、32係為乾膜光阻層。 *印刷-第二二第1槽34 一面上貼合一高感光性高分子材料之第 -高二::::於該金屬基板30之第二面上貼合 ’ 阿刀子材料之第四阻層3 7，* 顯影之方式於哕黛二 並以曝光及 3 8，以C層3 6上形成複數個第二開口 電鍵之方2 = 屬基板3〇第—面。之後係以 層39，其_，第—開〇38中形成-複數金属 第—電性阻絕層35係為防谭綠漆； 200921879 "硬屬層3 9係為錄/銅兩層之複數金屬結構。 者：除該第三、四阻層。於該複數金 一層絕緣保護用之第-防焊層40,並心 方式於該第一防焊層4〇上形成複數個= =二顯露作為與晶片電性連接之接墊部份7 m 屬基板3〇之第二面上形成一 ，：r第三開口41上形成-第-阻障層4 3，取後’移除該第五阻層。於此，係完成一且= 屬基=支撐並具完整置晶側線路之單層基板3。 本發：1弟14圖及第15圖』所示，係分別為 ^ Η列之發光二極體封裝基板（十三）剖面 不思圖、及本發明—眚祐& ,„ 月貫^例之發光二極體封裝基板（十 =口’面不意圖。如_ * :在本發明較 :者於可：固；：之貼合。首先利用-黏著膠材4 :持Si二::::::合一為金屬· ^万斗層4 0上。於此，係為一且 基板與固持件支撐並具完整置晶側線路之單層 反 之後再進而移除該金屬基板與該第一電性 阻障層，並完成一具固持件支撐之封裝基板已。 請參閱『第i6圖』所示，係本發明 例之 發光二極體封裝結構（十五）剖面示意圖。如圖所示： 本發明可由上述第i 5圖進一步進行—封裝製程，以 後得㈣度之發光二極體封I结構。於其中，此發光 -極體封裝結構係包括一晶片4 6、一做為該晶片4 200921879 6與電=接μ合之金球或錫球或金/錫合金4 二基板3〇間充填 “以外之第二::或錫合金49做為該晶片4 由上述可知，本發明係從金屬基板開始製作之封 、土反’其結構係包括完整線路之置晶側及一支樓用 :=提：封裝過程中’本發明之封裝基板係可以 足夠之剛性使封裝製程可更為簡易，並 产發先面完全曝露。因此’使用本發明具高亮 二體封，基板方法所製造之封裝基板結 間化封裝流程，並能有収善傳統封裝低 毛光角度、封裝材料變色及散熱等問題。 =所：本發明係—種發光二極體封裝基板之 ::二，可有效改善習用之種種缺點，於封裝過程 旦Ί金屬基板提供足夠之剛性使封裝製程可 =’並於最後移除該金屬基板以完成封裝製程， 使日曰片之發光面完全曝露。藉此，使本發明所製作且 =度之發光二極體封裝基板結構’不僅可簡化封裝 :二亚此有效改善傳統封裝低發光角度、封裝材料 ^散熱寺問題’進而使本發明之產生能更進步、 j貫用、更符合使用者之所須’確已符合發明 h之要件，爰依法提出專利申請。 甲 !·隹以上所述者，僅為本發明之較佳實施例而已， 12 200921879 當;不能以此限定本發明實獻範圍；故，凡依本發明 申請專利範圍及發明說明t内容所作之簡單的等效變 化與修飾，皆應仍屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 第1圖，係本發明之製作流程示意圖。 第2圖，係本發明一實施例之發光二極體封裝基板 (一） 剖面示意圖 第3圖，係本發明一實施例之發光二極體封裝基板 (二） 剖面示意圖。 第4圖，係本發明一實施例之發光二極體封裝基板 (三） 剖面示意圖。 第5圖，係本發明一實施例之發光二極體封裝基板 (四） 剖面示意圖。 第6圖，係本發明一實施例之發光二極體封裝基板 (五） 剖面示意圖。 第7圖，係本發明一實施例之發光二極體封裝基板 (六） 剖面示意圖。 第8圖，係本發明一實施例之發光二極體封裝基板 (七） 剖面示意圖。 第9圖，係本發明一實施例之發光二極體封裝基板 (八） 剖面示意圖。 13 200921879 第1 0圖’係本發明—實施例之發光二極體封裝基 板（九）剖面示意圖。 第1 1圖，係本發明一實施例之發光二極體封裝基 板（十）剖面示意圖。 第1 2圖，係本發明一實施例之發光二極體封裝基 板（十一）剖面示意圖。 第1 3圖’係本發明一實施例之發光二極體封裝基 板（十二）剖面示意圖。 第1 4圖，係本發明一實施例之發光二極體封裝基 板（十三）剖面示意圖。 第1 5圖，係本發明一實施例之發光二極體封裝基 板（十四）剖面示意圖。 第1 6圖，係本發明一實施例之發光二極體封裴結 構（十五）剖面示意圖。 第1 7圖，係習用發光二極體封裝基板（一）剖面 示意圖。 第1 8圖，係習用發光二極體封裝基板（二）剖面 示意圖。 第1 9圖，係習用發光二極體封裝基板（三）剖面 示意圖。 14 200921879 【主要元件符號說明】 (本發明部分） 步驟（A)〜（L)11〜21 單層基板3、4 封裝基板5 金屬基板3 0 第一、二阻層3 1、3 2 第一開口 3 3 第一凹槽3 4 第一電性阻絕層3 5 第三、四阻層36、37 第二開口 3 8 複數金屬層3 9 第一防焊層4 0 第三開口 4 1 第五阻層4 2 第一阻障層4 3 黏著膠材4 4 固持件4 5 晶片4 6 15 200921879 金球或錫球或金/錫合金4 7 充填用封膠4 8 第二導電電極4 9 (習用部分） 核心基板5 0 芯層5 0 1 金屬層5 0 2 電鍍導通孔5 0 3 置晶側接墊5 1 球側接墊5 2 表面處理5 3 16SUMMARY OF THE INVENTION The main object of the present invention is that rigidity makes the packaging process easier and less exposed. Therefore, the package substrate structure manufactured by the method of the present invention and the light-emitting surface of the J-chip is not only simple, but also can effectively improve the problems of the conventional package (4) light color and heat dissipation. The crystallized side of the line is formed from the metal substrate and the secondary object of the present invention is the package substrate, the structure of which includes the holder for the complete support. For the purpose of the above, the present invention is a method for fabricating a light-emitting diode package, which is used to make a circuit layer on the first surface of a metal substrate, and is used as an interface for electrically connecting to the wafer. Made on the circuit layer - as a support for the support. Finally, the metal substrate is removed to complete the fabrication of the package substrate. [Embodiment] Please refer to the "Figure 1" for a schematic diagram of the production process of the present invention. As shown in the figure, the present invention is a method for fabricating a light-emitting diode package substrate, which comprises at least the following steps: (Α) providing a metal substrate 11: providing a metal substrate; 200921879 (B) forming first and second resist layers And a plurality of first openings are respectively formed on the first surface of the metal substrate - the first surface of the metal substrate - and the fifth, 丄, Han, and the beans: forming a completely covered second resist layer therein And in the manner of exposure and _: forming a plurality of first-openings to reveal that the metal substrate 2 (C) forms a first recess 1 q . , ν Α ± - Μ under the first opening forms a plurality of a groove ^ in the plural (D) removes the first and second barrier eyebrows 1" · Αι In addition to the first barrier layer and the second barrier layer 4, the film is removed by peeling to form a first electrical barrier layer 1 5 : Forming directly in a plurality of first grooves by directly pressing or accommodating - first - electrical resistance, ', the first electrical barrier layer can be solder resist green paint, epoxy (Ajino.oto Build-up Film, ABF)> enz〇cyci. Coffee, BCB), Double Malaya ^ Triazine> j ,), Polyimide (pi), Poly Gas B: ^t:r::tMene)'pTFE) or epoxy resin and glass (F) form the third and fourth resistive layers and a plurality of second openings 2 6 : formed on the first side of the filaments - third The resist layer, and ... the second side of the brother of the Menghai substrate is formed - the fourth covering of the complete covering, and the second opening D is displayed on the third resisting layer by exposure and development to reveal Substituting -200921879 of the metal substrate; (G) forming a plurality of metal layers 17: forming a plurality of metal layers in the plurality of second openings, wherein the plurality of metal layers may be nickel/copper, gold/copper or a metal structure of gold/recorded/copper; (Η) removing the second and fourth resist layers 18: removing the third resistive layer and the fourth resistive layer by peeling; (I) completing with metal substrate support And electrically connecting the single-layer substrate 19: forming a first solder resist layer on the plurality of metal layers, and forming a plurality of second openings on the first solder resist layer by exposure and development to reveal The pad portion electrically connected to the wafer. At this point, step (j) or step (K) may be selected; (J) open > with metal substrate and holding a single-layer substrate supporting a complete crystal-side line 2 〇a: forming a fifth resist layer on the second surface of the metal substrate, and forming a first barrier layer on the plurality of third openings, and finally Removing the fifth resist layer in a peeling manner, and further forming at least one holding member on the first anti-tank layer. Thus, completing a vehicle layer having a metal substrate and a support member and having a complete crystal side line $ Substrate to form a light-emitting diode package substrate, wherein the mysterious barrier layer may be selected from the group consisting of electro-mineral gold, electroless nickel-gold, electric silver or electroplated tin; or (Κ) formed with a single-layer substrate supported by a metal substrate and a holder and having a complete crystal-side line 2 〇b: forming at least a holder on the first solder resist layer, and then forming a second surface on the metal substrate - sixth The resist layer 'and a second barrier layer 200921879 is formed on the plurality of third openings, and finally the sixth resist layer is removed by peeling. So far, a single-layer substrate having a metal substrate and a holder branch and having a complete crystal side circuit is formed to form a light-emitting diode package substrate; and (L) a package substrate having a support member is formed. The metal substrate and the first electrical barrier layer are removed by etching. Thus, Yuan Cheng has a package substrate supported by a holder. The above step (J) forms a supporting member for supporting after completing the crystallizing side of the complete line, and the step (K) is to complete the complete line making of the crystallizing side after completing the holding member for the label. . A high-brightness light-emitting diode package substrate of the same structure can be obtained in both ways. Wherein, the first to sixth resistive layers are high-sensitivity photoresists which are adhered, printed or spin-coated as a dry film or a film; the first and first barrier layers may be electroplated with nickel gold and without electricity. One of nickel-plated gold, electroplated silver or electroplated tin; the holding member may be metal, non-metal or a mixture of metal and non-metal. Please refer to FIG. 2 to FIG. 3 for a schematic cross-sectional view of a light-emitting diode package substrate according to an embodiment of the present invention, and a light-emitting diode package substrate according to an embodiment of the present invention ( 2) a cross-sectional schematic circle, a cross-sectional view of a light-emitting diode package substrate according to an embodiment of the present invention, a schematic cross-sectional view of a light-emitting diode package substrate (4) according to an embodiment of the present invention, and a light-emitting diode according to an embodiment of the present invention A schematic diagram of a cross-sectional view of a substrate (5), a schematic cross-sectional view of a light-emitting diode substrate (s), and a schematic cross-sectional view of a light-emitting diode package substrate (s) according to an embodiment of the present invention. A cross-sectional view of a light-emitting diode package substrate (8) according to an embodiment of the present invention, a cross-sectional view of a light-emitting diode package substrate (9) according to an embodiment of the present invention, and a light-emitting diode package substrate according to an embodiment of the present invention (10) A schematic cross-sectional view, a schematic diagram of a light-emitting diode package substrate (11) according to an embodiment of the present invention, and a light-emitting diode package substrate according to an embodiment of the present invention (12) Schematic plane. As shown in the figure, in a preferred embodiment, a metal substrate 3 is first provided, and a first resist of a high-sensitivity polymer material is attached to the first surface of the metal substrate 30, respectively. The layer 3 and the second resist layer of the high-sensitivity polymer material are bonded to the first surface of the metal substrate 3, and the number of turns is formed on the first resist layer 3 by exposure and development. The opening: 3 3, to expose the first side of the metal substrate 3 其. Then, it is fabricated by etching - the first recess 3 of the semi-etched surface. The second metal substrate 3 Q is - without the dielectric layer material. The layers 31 and 32 are dry film photoresist layers. *Printing - the second and second grooves 34 are bonded to the first surface of the high-sensitivity polymer material on the first surface of the high-sensitivity polymer material:::: the fourth resist layer of the 'knife material' is attached to the second surface of the metal substrate 30 3 7,* The development method is to form a plurality of second opening keys on the C layer 3 6 by exposure and 3 8 to be the substrate 3 〇 first surface. Then, the layer 39 is formed, and the _, the first opening - 38 forms a complex metal first electrical barrier layer 35 is anti-tank green paint; 200921879 " hard layer 3 9 series is recorded / copper two layers Metal structure. In addition to the third and fourth resistive layers. a first solder mask 40 for insulating protection of the plurality of gold layers, and a plurality of == two exposures formed on the first solder resist layer 4〇 as a pad portion electrically connected to the wafer A second surface of the substrate 3 is formed with a: - a barrier layer 43 formed on the third opening 41, and the fifth barrier layer is removed. Herein, a single-layer substrate 3 having a base = support and having a complete crystal side circuit is completed. This is a picture of a light-emitting diode package substrate (13), which is shown in Fig. 1 and Fig. 15 respectively, and the present invention - 眚佑 & For example, the light-emitting diode package substrate (10 = mouth 'face is not intended. For example, _ * : in the present invention: can be: solid;: the fit. First use - adhesive material 4: hold Si two:: :::: is a metal · ^ million layer 40. Here, is a substrate and a support member and has a single layer of the complete crystal side line reverse and then remove the metal substrate and The first electrical barrier layer is completed, and a package substrate supported by a holding member is completed. Please refer to the "figure i6" for a cross-sectional view of the light emitting diode package structure (fifteenth) of the present invention. As shown in the above, the present invention can be further carried out by the above-mentioned FIG. 5 - a packaging process, and thereafter a (four) degree light-emitting diode package I structure, wherein the light-emitting body package structure comprises a wafer 46, one as The wafer 4 200921879 6 is filled with a gold ball or a solder ball or a gold/tin alloy 4 two substrate 3 〇 filled with "the second:: or tin Gold 49 as the wafer 4 As can be seen from the above, the present invention is a seal made from a metal substrate, the soil is reversed, and its structure includes a crystallized side of a complete line and a floor: =: during the packaging process The package substrate can be sufficiently rigid to make the packaging process easier, and the first surface is fully exposed. Therefore, the package substrate can be intercalated and packaged by using the method of the present invention with a bright two-body seal and a substrate method. There are problems in the low-gloss angle of the traditional packaging, the discoloration of the packaging material and the heat dissipation. The invention is a kind of LED package substrate: 2, which can effectively improve various disadvantages in the packaging process. The metal substrate provides sufficient rigidity to enable the packaging process to be 'and finally remove the metal substrate to complete the packaging process, so that the light-emitting surface of the ruthenium sheet is completely exposed. Thereby, the light-emitting diode made by the present invention and having a degree of The package structure of the package package not only simplifies the package: the effect of improving the low illumination angle of the conventional package and the problem of the heat dissipation temple of the package is further improved, and the invention can be further improved and utilized. More in line with the user's need to 'have met the requirements of the invention h, 提出 filed a patent application. A! 隹 隹 隹 隹 隹 隹 隹 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 The scope of the present invention is intended to be within the scope of the present invention. The simple equivalent changes and modifications made by the content of the invention and the description of the invention are still within the scope of the present invention. FIG. 2 is a schematic cross-sectional view of a light-emitting diode package substrate according to an embodiment of the present invention, and is a light-emitting diode package substrate according to an embodiment of the present invention ( 2) Schematic diagram of a cross section. Fig. 4 is a cross-sectional view showing a light emitting diode package substrate (3) according to an embodiment of the present invention. Fig. 5 is a cross-sectional view showing a light-emitting diode package substrate (4) according to an embodiment of the present invention. Figure 6 is a cross-sectional view showing a light-emitting diode package substrate (5) according to an embodiment of the present invention. Figure 7 is a cross-sectional view showing a light emitting diode package substrate (6) according to an embodiment of the present invention. Figure 8 is a cross-sectional view showing a light-emitting diode package substrate (7) according to an embodiment of the present invention. Figure 9 is a cross-sectional view showing a light-emitting diode package substrate (8) according to an embodiment of the present invention. 13 200921879 Figure 10 is a schematic cross-sectional view of a light-emitting diode package substrate (9) of the present invention. Fig. 1 is a schematic cross-sectional view showing a light emitting diode package substrate (10) according to an embodiment of the present invention. Fig. 1 is a schematic cross-sectional view showing a light emitting diode package substrate (11) according to an embodiment of the present invention. Fig. 1 is a schematic cross-sectional view showing a light emitting diode package substrate (12) according to an embodiment of the present invention. Fig. 14 is a schematic cross-sectional view showing a light emitting diode package substrate (13) according to an embodiment of the present invention. Fig. 15 is a cross-sectional view showing a light emitting diode package substrate (14) according to an embodiment of the present invention. Fig. 16 is a schematic cross-sectional view showing a light-emitting diode sealing structure (fifteenth) according to an embodiment of the present invention. Figure 17 is a schematic cross-sectional view of a conventional light-emitting diode package substrate (1). Figure 18 is a schematic cross-sectional view of a conventional light-emitting diode package substrate (2). Figure 19 is a schematic cross-sectional view of a conventional light-emitting diode package substrate (III). 14 200921879 [Description of main components] (Invention section) Steps (A) to (L) 11 to 21 Single-layer substrate 3, 4 Package substrate 5 Metal substrate 3 0 First and second resist layers 3 1 and 3 2 First Opening 3 3 first recess 3 4 first electrical barrier layer 3 5 third, fourth resistive layer 36, 37 second opening 3 8 plural metal layer 3 9 first solder resist layer 4 0 third opening 4 1 fifth Resistor layer 4 2 First barrier layer 4 3 Adhesive material 4 4 Retainer 4 5 Wafer 4 6 15 200921879 Gold ball or solder ball or gold/tin alloy 4 7 Filling sealant 4 8 Second conductive electrode 4 9 ( Conventional part) Core substrate 5 0 core layer 5 0 1 Metal layer 5 0 2 Plating via 5 0 3 Crystal side pad 5 1 Ball side pad 5 2 Surface treatment 5 3 16