200921813 九、發明說明： 【發明所屬之技術領域】 本發明係有關於窗口型半導體封裝構造之製造技術 中之單體化切割技術，特別係有關於一種小窗口模封切 割方法及形成之封裝構造。 【先前技術】200921813 IX. Description of the Invention: [Technical Field] The present invention relates to a singulation cutting technique in a manufacturing technique of a window type semiconductor package structure, and more particularly to a small window mold sealing method and a package structure formed therefor . [Prior Art]
由口型球格陣列封裝構造（W i n d 〇 w B G A)或稱微間 距球格陣列（fine_pitch baU gHd fbga)封裝構造 為近年來半導體晶片封裝產品之主流，其是以一具有窗 口之電路基板承載晶片，並以複數個金屬銲線穿過窗口 以電性連接電路基板與晶片。以一封膠體（encapulaM) 提供半導體晶片與銲線之保護。但在基板之下表面必須 形成圍繞窗口之局部模封區，若處理不當容易發生壓模 ’益料（molding flash)之問題。但以往窗口型球格陣列封 裝構造中設在基板之窗口僅為單一且為狹長之中央槽 孔模封區與外接墊之間尚留有一間距，壓模溢料尚可 獲得控制。然在新一代之窗口型半導體封裝構造中基板 側邊與角隅會攻有複數個小窗口，以提高電性密度與 ^合端子微間距之需求，但這樣會導致壓模溢料問題更 合易發生，又模封區與外接墊之間的間距更小，壓模溢 料將會影響電性連接品質。 如第1圖所示，習知具 100,主要包含有一基板單元 性連接元件130以及一封膠體 有小窗口之半導體封裝構造 、一晶片120、複數個電 140。該基板單元i丨〇係由一 6 200921813 基板條切割形成，該基板單元110係具有一黏晶表面ui、 一外接表面112以及複數個貫穿該基板單元11〇之小窗口 113。如第2圖所示，該些小窗口丨13係形成於該基板單元 m之側邊或角隅，並且該外接表面112係包含有複數個窗 口模封區m’其係圍繞該些小窗口 113但不延伸至該基板 單元110之對應側邊與角隅。該基板單元11〇更具有一中央 槽孔115,其係形成於該基板單元11〇之中央㈣並且該 外接表面U2係包含有一下模封區117，其係圍繞該中央槽 孔ι15。此外，如第i圖所示，該基板單元11〇更具有複數 個形成於該外接表面112之外接塾116，可用於設置複數個 外接端子150’常見為銲球。 再如第1囷所示’藉由一黏晶# 16〇之黏#，該晶片 120係設置於該基板單元11〇之該黏晶表面⑴並具有複 數個位於主動面之銲塾121。習知利用打線形成之該些 電性連接元件13G係形成於該些小f σ U3及該中央槽孔 Η5内，利用該些電性連接元件通過該些小窗口⑴及 該中央槽孔115,以將該晶片12〇之該些銲塾ΐ2ι電性連接 至該基板單元U〇。該封膠體MO係形成於該基板單元11〇 之黏晶表面m與外接表面112，以密封該^ m及該些 電性連接元件13〇。在該外接表面112之模封面積必須盡量 控制在該些窗口模封區114與該下模封區ιΐ7之内。習知 地，由於該些小窗口 113的數量本多，超過該些窗口模封區 】μ之模封溢勝極容易污染到該些外接藝⑴，導致咳些外 接端子】5〇無法順利接合到所有之該些外接#n6。此夕:， 200921813 :條切單作業時易使基板單元側邊或角隅之 ' 鲜層發生剝離分層之現象，影響封 4 ^ Μ. να ^ 與可靠性。 及打再:作業當習知窗口型半導體封裝製程中已完成黏晶 該基板. ’在進行模壓製程時’下模具必須依據 罢Γ —早7° U〇之該中央槽孔115與該些小窗口 113位 元=設計而開設有對應之下模六，因而，當該基板單 複雜，=窗口數量愈多’將使得下模具之設計將更為 成本更南且模封溢膠的問題越顯嚴重。 【發明内容】 本發明之主要目的係在於提供一種小窗口模封切割 及形成之封裝構造，除了可以減少位於基板單^邊或角 ^ t I °發生模封溢膠之機率，更可在進行基板條切 :乍業時’可減少基板單元之線路及防銲層發生剝離分 層之現象，藉此提高封裝產品之品質與可靠性。 本發明之次一目的係在於提供一種小窗口模封切割 及形成之封裝構造，可以簡化壓模下模具之設計，降梦 治具之成本。 '屐The package structure of a spheroidal grid array package (W ind Bw BGA) or a micro-pitch ball grid array (fine_pitch baU gHd fbga) is a mainstream of semiconductor chip package products in recent years, and is carried by a circuit substrate having a window. The wafer is passed through the window with a plurality of metal bonding wires to electrically connect the circuit substrate and the wafer. The protection of semiconductor wafers and bonding wires is provided by a gel (encapulaM). However, a surface of the substrate must be formed with a localized encapsulation area around the window. If improperly handled, the problem of molding flashing is likely to occur. However, in the conventional window type ball grid array package structure, the window provided in the substrate is only a single and narrow, and a gap is left between the central slot die-molding area and the external pad, and the die overflow can be controlled. However, in the new generation of window-type semiconductor package structure, the side edges and corners of the substrate will have a plurality of small windows to improve the electrical density and the micro-pitch of the terminal, but this will lead to a more complicated dieover problem. It is easy to occur, and the distance between the die-sealing area and the external pad is smaller, and the die overburden will affect the quality of the electrical connection. As shown in Fig. 1, the conventional device 100 mainly includes a substrate unitary connecting member 130 and a semiconductor package structure having a small window, a wafer 120, and a plurality of electrodes 140. The substrate unit is formed by cutting a substrate strip having a die-bonding surface ui, an external surface 112, and a plurality of small windows 113 extending through the substrate unit 11 . As shown in FIG. 2, the small windows 13 are formed on the side or corner of the substrate unit m, and the external surface 112 includes a plurality of window molding regions m' surrounding the small windows 113. It does not extend to the corresponding side and corner of the substrate unit 110. The substrate unit 11 has a central slot 115 formed in the center (four) of the substrate unit 11 and the outer surface U2 includes a lower molding region 117 surrounding the central slot ι15. In addition, as shown in the figure i, the substrate unit 11 further has a plurality of interfaces 116 formed on the external surface 112, and can be used to set a plurality of external terminals 150' as solder balls. Further, as shown in Fig. 1, the wafer 120 is disposed on the die-bonding surface (1) of the substrate unit 11 and has a plurality of pads 121 on the active surface. The electrical connecting elements 13G formed by the wire are formed in the small f σ U3 and the central slot Η 5, and the electrical connecting elements are used to pass the small windows (1) and the central slot 115 to The solder pads 2 of the wafer 12 are electrically connected to the substrate unit U. The encapsulant MO is formed on the die-bonding surface m and the external surface 112 of the substrate unit 11 to seal the gate and the electrical connecting elements 13A. The area of the mold at the outer surface 112 must be controlled as much as possible within the window molding area 114 and the lower mold area ι7. Conventionally, since the number of the small windows 113 is much larger than the window molding area, the mold seal of the μ is easily contaminated by the external art (1), resulting in coughing of the external terminals] All of these are external #n6. On the eve of this: 200921813: When the singulation operation is performed, the phenomenon of peeling and delamination of the fresh layer on the side or corner of the substrate unit is easily caused, which affects the seal 4 ^ Μ. να ^ and reliability. And the re-operation: the work has been completed in the conventional window-type semiconductor packaging process. The 'mold in the mold-pressing process' must be based on the slamming - the central slot 115 and the small window 7° U 113 bits = design and open the corresponding lower mold 6, so when the substrate is simple, the more the number of windows will make the design of the lower mold more cost-effective and the problem of over-molding is more serious. . SUMMARY OF THE INVENTION The main object of the present invention is to provide a small window die-cutting and forming package structure, which can reduce the probability of occurrence of molding overflow at a single edge or corner of the substrate, and can be carried out. Cutting of the substrate: When the industry is in use, it can reduce the phenomenon of peeling and delamination of the circuit of the substrate unit and the solder resist layer, thereby improving the quality and reliability of the packaged product. A second object of the present invention is to provide a small window die-cutting and forming package structure, which can simplify the design of the mold under the stamper and reduce the cost of the dream jig. 'clog
本發明之另一目的係在於提供一種小窗口模封切巧方 法，可以控制與改變可能模封溢勝之區域到基板 道’以提高製程良率。 °lJ 依據本發明之一種小窗口模封切割方法，包含提供— 板條’包含有複數個基板單元以及複數個形成在該此基板仰 …1之切割ϋ，該基板條係具有一黏晶表φ、一外接表： 8 200921813 以及複數個貫穿該基板條 此夹板單亓Y 二小匈口係形成於該 二暴板早兀之側邊或角隅， 容D ϋ广& 玉且°亥外接表面係包含有複數個 由口拉封區，其係圍繞 二小® 口並延伸至該些切割道。之 後’設置複數個晶片於亨其 ㈣該基板條之該黏晶表面 位於該些基板單元内而不 —曰日月係 復盖主β亥些切割道。接菩，你士痛 數個電性連接元件於該此 小®口内，以電性連接該些晶片至 該基板條。然後，形成一扭 ，膠體該基板狀該些窗口模封 區 以密封5亥歧雷性i車；& i Λ4· * 接兀件更延伸至該些切割道。最後， 沿著該些切割道切判哕其妃放 < 取俊 A、 基板條以及該封膠體在該些窗口模 法所彤二基板早兀分離。另揭示依前述方 云所士成之封裝構造。 本發明的目的及解冰甘 _施谁、/、技術問題還可採用以下技術 措施進一步實現。 在前述的小窗口模封切割 — 圍續$ ,丨、A， 方法中，母一 ® 口模封區係可 圍繞至J兩個相鄰近於側 小固口並包含位在該此小窗 口之間之切割道部位。 1隹4二小由 在前述的小窗口模封切割 — 圍繞至少四個相鄰近於角隅之：：’：:：口模封區係可 口之間之切割道交錯部位。自口並包“立在該些小窗 在前述的小窗口模封切割 ^ ^ . 万去中’該基板條之外接表面 係可預留有一溢膠槽道，其係 「秩衣曲 些窗口模封區。 、^準於該些切割道内並穿過該 在前述的小窗口模封切割 之小窗口係可為連通。 ，中’在同一窗口模封區内 200921813 該些晶片係可具有複 以供該些電性連接元 在前述的小窗口模封切割方法中 數個銲墊，其係對準於該些小窗口内 件之連接。 在前述的小窗口模封切刻 上H i ® τ ° /中，該些晶片在該基板條 上之汉置面積係可不小於對 八夕> 了應基板早兀之黏晶表面面積百 刀之七十：以供製成晶片尺寸封敦構造。 在前述的小窗口模封切$ t刀。1方法中，該些電性連接元件係 可包含複數個銲線。 r 在前述的小窗口模封七 Q方法中，該基板條更可具有複 數個貫穿該基板條之中央样 有複 價孔，其係形成於該些基板單元之 中央區域。 在前述的小窗口模封士 法中，該封膠體係可更形成 於忒基板條之該些中央槽孔。 在刚述的小窗口模封切割方法中，該封膠體係可更 於該基，條之該黏晶表面，以密封該些晶片之至少-部位。 在月j述的小面口模封切割方法中，該基板條更可具 數個形成於該外接表面之外接塾。 在則述的小窗口模封切割方法中，可另包含之步驟有： 設置複數個外接端子於該些外接墊。 【實施方式] 依據本發明之第—且辨香 Μ + /、體實施例，提供一種小窗口模封切 割方法及形&之封袈構 圖為種半導體封裝構造所使用之基板條之外 接表面以及其中— 土板早疋之局部放大之示意圖。第4Α 10 200921813 至4F圖為該基板條在該半導體封裝構造之製造方法中之 局部截面示意圖。首先，如第3及4A圖所示，該小窗口模 封切割方法包含提供一基板條2 〇，其包含有複數個基板單元 210以及複數個形成在該些基板單元21〇之間之切割道η。 通常該些基板單元210係可為記憶卡、球格陣列封裝（BGa) 或是平面陣列封裂（LGA)之晶片載板。該基板條2〇係具有一 黏晶表面2Π、一外接表面212以及複數個貫穿該基板條2〇 之小窗口 213。該些小窗口 213係形成於該些基板單元2ι〇 % 之側邊或角隅，並由該黏晶表面211連通至該外接表面 212 ’並且該外接表面212係包含有複數個窗口模封區214， 其係圍繞該些小窗口 2 1 3並延伸至該些切割道2 j。 此外，該基板條20更可具有複數個形成於該外接表 面212之外接墊216，以供接合該些外接端子25〇(如第 6圖所不）。在本實施例中，該基板條2 〇更可具有複數 個貫穿該基板條20之中央槽孔2丨5，其係形成於該些 C；基板單兀210之中央區域。並且該外接表面212係包含有 複數個下模封區2丨7，其係圍繞該些中央槽孔2丨5。在本實 施例中，相鄰基板單元210之下模封區217可相互連接。 之後，如第4B圖所示，設置複數個晶片22〇於該基板條 2〇之該黏晶表面2U’該些晶片22〇係位於該些基板單元21〇 内而不覆蓋至該些切割道21，並具有複數個位於該主動面 之銲墊22 1，通常是排列在晶片主動面之周邊，亦可同 時排列在晶片主動面之周邊與中央。例如可利用一如b 階（B stage)印刷膠層或是pi(p〇lyimide，聚亞醯胺）膠 200921813 帶之黏晶膠2 6 0之黏著，而將該晶片2 2 〇之主動面貼附 於§玄基板條20之该黏晶表面211。其中，該些銲塾221 係對準於該些小窗口 2 1 4與該中央槽孔2 1 5，以便於進 行後續之電性連接。並且，較佳地，該些晶片2 2 〇在該 基板條2 0上之設置面積係可不小於對應基板單元2 i 〇 之該黏晶表面2 1 1面積百分之七十，以供製成晶片尺寸 討裝構造。 之後’如第4C圖所示，形成複數個電性連接元件23〇於Another object of the present invention is to provide a small window molding splicing method that can control and change the area of possible overprinting to the substrate track to improve process yield. A small window molding cutting method according to the present invention, comprising providing - a slab comprising a plurality of substrate units and a plurality of cutting dies formed on the substrate, the substrate strip having a viscous crystal table φ, an external connection table: 8 200921813 and a plurality of plywood penetrating through the substrate strip. The two small Hungarian mouths are formed on the side or corner of the second storm board, and the capacity is D ϋ广 & jade and ° The external surface includes a plurality of port-sealed regions that surround the two small ports and extend to the cutting channels. Thereafter, a plurality of wafers are disposed on the substrate. The surface of the substrate of the substrate strip is located in the substrate units, and the main surface of the substrate is covered. In the case of Bodhisattva, you have several electrical connection elements in the small port to electrically connect the wafers to the substrate strip. Then, a twist is formed, and the window molding regions of the substrate are sealed to seal the 5 ray-defining i-car; the & i Λ4·* connector extends to the scribe lines. Finally, along the scribe lines, the 妃 妃 & 取 取 取 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 In addition, the package structure of the above-mentioned square cloud is disclosed. The object of the present invention and the problem of solving the problem can be further achieved by the following technical measures. In the aforementioned small window mold-cutting-----, 丨, A, method, the parent------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- The scribe line between the sections. 1隹4二小由 Molded and cut in the aforementioned small window—around at least four of the adjacent corners::’::: The die seal area is the intersection of the scribe lines between the ports. Self-porting and "packing in these small windows in the aforementioned small window mold-cutting ^ ^ . Wan to" 'the outer surface of the substrate strip can be reserved with an overflow channel, which is the "classified clothing" window module a sealing area, which is adjacent to the scribe lines and through which the small window in the aforementioned small window is die-cut can be connected. The middle part is in the same window molding area 200921813. The plurality of solder pads for the electrical connection elements in the small window molding and cutting method are aligned with the connection of the small window inner members. In the foregoing small window molding etch, H i ® τ ° / Wherein, the area of the wafers on the substrate strip is not less than that of the eighty-seventh of the surface area of the substrate of the occupant: for the wafer size seal structure. The small window mold-cutting cuts the $t knife. In the method, the electrical connecting elements may comprise a plurality of bonding wires. r In the aforementioned small-window molding seven-Q method, the substrate strip may have a plurality of The center of the substrate strip has a re-validation hole formed in the substrate In the aforementioned small window molding method, the sealing system can be further formed in the central slots of the 忒 substrate strip. In the small window molding cutting method just described, the sealing system The surface of the die may be further sealed to at least a portion of the wafer. In the small face die-cutting method of the month, the substrate strip may be formed on the external surface. In the small window molding cutting method described above, the method further includes the steps of: setting a plurality of external terminals on the external pads. [Embodiment] According to the invention, the first and the fragrant Μ + / The embodiment provides a small window molding and cutting method and a sealing structure for the outer surface of the substrate strip used in the semiconductor package structure and a partial enlargement of the soil plate early. 200921813 to 4F are partial cross-sectional views of the substrate strip in the method of fabricating the semiconductor package structure. First, as shown in Figures 3 and 4A, the small window molding and cutting method includes providing a substrate strip 2 〇 including a plurality of substrate units 210 and a plurality of dicing streets η formed between the substrate units 21 。. Typically, the substrate units 210 can be memory cards, ball grid array packages (BGa) or planar arrays (LGA) The substrate carrier 2 has a die-bonding surface 2Π, an external surface 212, and a plurality of small windows 213 extending through the substrate strip 2. The small windows 213 are formed on the substrate units 2ι a side or corner of the %, and the bonded surface 211 is connected to the external surface 212' and the external surface 212 includes a plurality of window molding regions 214 that surround the small windows 2 1 3 and extend to The substrate strips 20 may further have a plurality of pads 216 formed on the outer surface 212 for engaging the external terminals 25 (as shown in FIG. 6). In this embodiment, the substrate strip 2 can further have a plurality of central slots 2丨5 extending through the substrate strip 20, which are formed in the central regions of the C; substrate unit 210. And the outer surface 212 includes a plurality of lower molding regions 2丨7 surrounding the central slots 2丨5. In the present embodiment, the lower molding regions 217 of the adjacent substrate units 210 may be connected to each other. Thereafter, as shown in FIG. 4B, a plurality of wafers 22 are disposed on the die-bonding surface 2U' of the substrate strip 2, and the wafers 22 are disposed in the substrate units 21A without covering the dicing streets. 21, and having a plurality of pads 22 1 located on the active surface are generally arranged around the active surface of the wafer, and can also be arranged at the periphery and the center of the active surface of the wafer. For example, a bonding layer such as a b stage printing layer or a pi (p〇lyimide) rubber 200921813 adhesive layer 260 can be used, and the active surface of the wafer 2 2 is used. Attached to the viscous surface 211 of the slab substrate strip 20. The soldering holes 221 are aligned with the small windows 2 1 4 and the central slot 2 15 to facilitate subsequent electrical connections. Moreover, preferably, the area of the wafers 2 2 该 on the substrate strips 20 is not less than 70% of the area of the die-bonding surface 21 1 of the corresponding substrate unit 2 i , for making Wafer size discussion structure. Thereafter, as shown in FIG. 4C, a plurality of electrical connecting elements 23 are formed
該些小窗口 2 1 3内’甚至於部分之該些電性連接元件23〇可 形成於該些中央槽孔215内。該些電性連接元件23〇係通過 該些小囪口 2 1 3以及該些中央槽孔2丄5，以將該些晶片22〇 之該些銲墊221電性連接至該基板條2〇。在本實例中，該 些電性連接元件230係為打線形成之銲線。 之後，如第4D圖所示，形成一封膠體24〇於該基板條 20之忒些窗口模封區214内（如第3圖所示卜以密封該些電 性連接兀件230。在本實施例中’該封膠體24〇更形成於該 Ή模封 217内並覆蓋該些晶片220之背面，以密封其餘 之該些電性連接元件23〇以及該些晶片22〇。因此，如第$ 圖所示，該封膠體240係更延伸穿過該些切割道21。如第3 圖所示’在該基板單元210之側邊位置，每—窗〇模封區 214係可圍繞至少兩個相鄰近於側邊之小窗口 213並包 含位在該些小窗口 213之間之切割冑21部位。在該基 板單元210之角隅位置，每一窗口模封& 214係可圍繞至 少四個相鄰近於角隅之小窗α 213並包含位在該些小 12 200921813 窗口 ：13之間之切割道21交錯部位。在本實施例中， 4封膠體240係為-％氧模封化合物叫…Μ。! —The small windows 2 1 3 may even be formed in the central slots 215. The electrical connecting elements 23 are electrically connected to the plurality of pads 2 1 3 and the central slots 2 丄 5 to electrically connect the pads 221 of the wafers 22 to the substrate strips 2 . In the present example, the electrical connection elements 230 are wire bonds formed by wire bonding. Thereafter, as shown in FIG. 4D, a glue body 24 is formed in the window molding regions 214 of the substrate strip 20 (as shown in FIG. 3 to seal the electrical connection members 230. In the embodiment, the encapsulant 24 is formed in the enamel mold 217 and covers the back surface of the wafers 220 to seal the remaining electrical connection elements 23 and the wafers 22 〇. As shown in the figure, the encapsulant 240 extends further through the scribe lines 21. As shown in Fig. 3, at the side of the substrate unit 210, each window stencil 214 can surround at least two The small window 213 adjacent to the side and includes a portion of the cutting edge 21 located between the small windows 213. At the corner position of the substrate unit 210, each window molding & 214 system can surround at least four The small window α 213 adjacent to the corner 并 and includes the intersection of the scribe lines 21 between the small 12 200921813 windows: 13. In the present embodiment, the 4 sealant 240 is a -% oxygen mold compound called... Oh.! —
Compound，EMC)，藉由壓模時 棋呀上下板具夾壓該基板條 2 〇，將預熱好的樹脂擠入模中 ^ τ待樹脂充填硬化後可形 成該封膠體240，再開模取出成品。 如第4Ε圖所示，在上述 由口杈封切割方法中，可另 包含一步驟：設置複數個外接 钱鳊子250於該些外接墊 2 1 6。該些外接端子25〇係 J 13複數個金屬球、錫膏、接 觸塾或接觸針等等。在本實施中，該些外接端子2則為鲜 球，藉以組成小窗口型球格陣列封裝，並使載設於該基板 條20之§玄些晶片220得與#此冰& # 7 兴°哀二外接端子250達成電性連 接關係，以供表面接合一 k . ^ ° 外部印刷電路板（printed circuit board，PCB)。 最後，如第4F圖所示，以切宝丨 以切割刀具40沿著該些切割道 21切割該基板條2 0，以栗科仆八故b + 1 早體化刀離出後數個半導體封裝構 造20〇(如第6圖所示）。除了 士刀宝丨丨不丨丨分甘上 f、了切割到该基板條20，同時在切 割過程會切割到該封膠體2 菔』4〇在该些囪口模封區214内穿過 該些切割道21之部位。A1 a 在進仃基板條切單作業時，即該些 基板單元210分離之過裎，兮 程該封膠體240在該些窗口模封區 2 14内穿過該些切割道2 1夕却 1之°卩位可以發揮有如切割保護墊 之力此可減夕3玄些基板單元21〇之線路及防銲層發生剝 離刀層之現象’藉此提咼封裝產品之品質與可靠性。此外， 。亥封膠體24G在該外接表面212之可能溢膠區域更包含了切 割道21，這樣能降低模封溢膠在該些基板單元210内之面積 13 200921813 與風險，大幅降低模封溢膠污染到該些外接墊216之可能。 ，另外，本發明揭示一種由上述小窗口模封切割方法& $成之封裝構造。如第6圖所示’該封裝構造主要包 含一基板單元21G、—晶片22G、複數個電性連接元件230Compound, EMC), by pressing the substrate strip 2 〇 on the upper and lower plates of the stamper, the preheated resin is extruded into the mold ^ τ after the resin is filled and hardened to form the sealant 240, and then the mold is taken out Finished product. As shown in Fig. 4, in the above method of sealing by the mouth, the method may further include a step of: setting a plurality of external money tweezers 250 to the external pads 2 16 . The external terminals 25 are a plurality of metal balls, solder pastes, contact pads or contact pins, and the like. In this embodiment, the external terminals 2 are fresh balls, thereby forming a small window type ball grid array package, and the chip 220 mounted on the substrate strip 20 is obtained by #冰&# 7 兴° The external terminal 250 is electrically connected to the surface for a k. ^ ° printed circuit board (PCB). Finally, as shown in FIG. 4F, the substrate strip 20 is cut along the scribe lines 21 by the cutting tool 40, and the plurality of semiconductors are separated by the cleavage b + 1 early knives. The package structure is 20〇 (as shown in Figure 6). In addition to the knives, the knives are cut into the substrate strip 20, and at the same time, the encapsulant 2 is cut during the cutting process. Some of the sections of the cutting track 21. A1 a is in the singulation operation of the substrate strips, that is, the substrate units 210 are separated, and the encapsulant 240 passes through the dicing streets in the window molding regions 214. The ° position can play the role of cutting the protective pad, which can reduce the phenomenon of the stripping of the circuit board and the solder mask layer of the substrate unit 21, thereby improving the quality and reliability of the packaged product. In addition, . The sealing gel 24G further includes a cutting pass 21 in the possible overflow area of the external surface 212, which can reduce the area of the molded adhesive in the substrate unit 210 and the risk, and greatly reduce the leakage of the molded glue. The possibility of these external pads 216. In addition, the present invention discloses a package structure formed by the above-described small window molding and cutting method. As shown in FIG. 6, the package structure mainly includes a substrate unit 21G, a wafer 22G, and a plurality of electrical connection elements 230.
以及一封膠體24G。該基板單元21〇係'由―基板條2()(如第3 ，所示)切割形成，該基板單元21〇係具有複數個貫穿該黏 阳表面211至該外接表面212之小窗口 2丨3。該些小窗口 213 係形成於該基板單元21〇之側邊或角隅。在本實施例中，該 些小窗口 213係鄰近於而可不連通至該基板單元21〇之側邊 或角隅。並如第3圖所示，該外接表面212係包含有複數 個® 口模封區2 1 4，其係圍繞該些小窗σ 2 i 3並延伸至該基 板單元2 1 〇之側邊或角隅。該晶片 2 2 0係設置於該黏晶表面 °玄』電性連接元件2 3 〇係形成於該些小窗口 2丨3内 以電性連接該晶片22〇與該基板單元21〇。 此外，該封膠體240係形成於該基板單元21〇之該些窗 口模封區214,以密封該些電性連接元件23〇，該封膠體24〇 係具有一連接該外接表面212之第一切割側面242，其係單 化刀離忒基板單元21 〇時同時形成，並切齊於該基板單元 2 1 〇之側邊或角隅，該第一切割側面242具有一突出於該外 接表面212之防護厚度，以致使該基板單元21〇之線路及防 銲層不會發生剥離分層之現象，此外，該封膠體24〇係具有 一連接該黏晶表面211之第二切割側面243，其係切齊於該 基板單元2 1 〇之側邊或角隅。因此，該封膠體係具有複 數個由口模封部24 1，其係形成於該些窗口模封區2丄4内並 14 200921813 具有該第一切割側面242。And a gel 24G. The substrate unit 21 is formed by cutting a substrate strip 2 (as shown in FIG. 3), and the substrate unit 21 has a plurality of small windows 2 through the adhesive surface 211 to the external surface 212. 3. The small windows 213 are formed on the side or corner of the substrate unit 21A. In this embodiment, the small windows 213 are adjacent to and may not be connected to the sides or corners of the substrate unit 21A. And as shown in FIG. 3, the external surface 212 includes a plurality of ® die sealing regions 2 1 4 surrounding the small windows σ 2 i 3 and extending to the side or corner of the substrate unit 2 1 〇 corner. The wafer 220 is disposed on the surface of the die bond. The electrical connection device 2 is formed in the small windows 2丨3 to electrically connect the wafer 22 and the substrate unit 21〇. In addition, the encapsulant 240 is formed on the window molding regions 214 of the substrate unit 21 to seal the electrical connection members 23, and the encapsulant 24 has a first connection to the external surface 212. The cutting side surface 242 is formed at the same time as the singulation knife is separated from the 忒 substrate unit 21 , and is aligned with the side or corner of the substrate unit 2 1 隅. The first cutting side 242 has a protrusion from the external surface 212. The thickness of the protective layer is such that the circuit and the solder resist layer of the substrate unit 21 do not peel and delaminate. Further, the sealant 24 has a second cut side 243 connecting the die-shaped surface 211. It is tangent to the side or corner of the substrate unit 2 1 〇. Accordingly, the encapsulation system has a plurality of die seal portions 24 1 formed in the window molding regions 2丄4 and 14 200921813 having the first cut side surfaces 242.
因此，本發明揭示一種小窗口模封切割方法及其結 構，該封膠體240之該些窗口模封部241係延伸並覆蓋至該 基板條20在外接表面212之切割道21，解決習知位於該 些基板單元2 1 0側邊或角隅之小窗口 2丨3容易發生溢膠 之現象。此外，在進行該基板條2〇切單作業時，藉由 該些窗口模封部241提供突出於該外接表面212之第一切割 側面242,以保護該基板單元21〇之線路及防銲層不會發 生剝離分層之現象，可提高該些基板單元21〇側邊或角 隅之結合力並可維持基板結構之強度，以提高封裝產品 之品質與可靠性。 在本發明之第二具體實施例，揭示3 —種小窗口模 切割方法所形成之封裝構造。請參閱第7 & 8圖所示，第 圓係為另一種半導體封裝構造之基板單元外接表面之: 意圖。第8圖係該半導體封裝構造之截面示意圖。該半; 體封裝構造300主要包含一基板單元310、一晶片32〇 =數個電性連接元件33〇以及一封膠體34()。該基板單元 :具有-黏晶表面3U、—外接表面312以及複數個貫穿, 土板單S 3U)之小窗σ 3Π。該基板單由一基㈣ 〇(如第7圖所示）所切割形成，在相鄰之基板單Tt 310之》 表=面312之間設有切割道31。該晶片320係設置於該⑸ 表面3η"該些電性連接元件别係形成於該些小窗口 η 内，以電性連接該些晶片32〇至該基板單元3 1〇。 如第7圖所示，該此小宠π Qq…l 多二小固口 313係形成於該基板單元3ι 15 200921813 之側邊或角隅，並且該外接表面312係包含有複數個窗口模 封區314’其係圍繞該些小窗口⑴並延伸至該基板翠元㈣ 之側邊或角隅。在本實施例中，在相鄰基板單元3〖〇且同一 窗口模封區314内之小窗σ 313係、為連通，藉以減少該基板 條30被切割側面之面肖，具有防止該些基板單& 3ι〇 _ 時發生剝離分層之增益性與提昇產品抗濕性之功效。此外°， 該基板單元31〇更可具有複數個貫穿該基板單元31〇之中 央槽孔3 1 5，其係形成於該些基板單元3丨〇之中央區 域，並且該外接表面312係包含有一下模封區317，其係圍 繞a亥些中央槽孔3 15，但可不延伸至該些切割道3 i。另外， 該基板條30更可具有複數個形成於該外接表面312之 外接墊316，可用於設置複數個外接端子35〇,該晶片 3 20係經由該基板單元3 1〇電性連接至該些外接端子 350，以供该半導體封裝構造3〇〇可表面接合至一外部 印刷電路板（圖中未繪出）。 I) 該封膠體340係形成於該基板單元310之該些窗口模封 區314，以密封該些電性連接元件33〇。該封膠體34〇係具 有一突出於該外接表面312之第一切割側面342，其係切齊 於該基板單元3 10之側邊或角隅。此外，該封膠體34〇係具 有犬出且連接於該黏晶表面3 11之第二切割側面343，其 係切齊於s亥基板單兀3丨〇之側邊或角隅。由於該些小窗口 3 1 3係連通至該基板單元3丨〇之對應側邊或角隅，故第一切 割側面342與第二切割侧面343在該些小窗口 3丨3處為一體 連接，在其餘部位則以該基板單元31〇之側邊分隔之。封膠 16 200921813 後’该封勝體340在每—窗|~7#+土4·!^ / 牡母® 口杈封區314可形成一窗口模 部34卜 ' 由於切割後該些小窗π 313係連通至該基板單元31〇之 側邊或角隅’形成為側邊η形或角隅L形之缺口，可簡化模 封下模具之設計’進—步節封t製程中之治具成本。、 較佳地，如第 7 m π - ^ ^ 囷所不，該基板條3 0於外接表面 312係可預留有一溢膠槽道 、j 2其係對準於該些切割道 r =内並穿過該些窗口模封區314，故將能使原欲被切除 生^、314作為溢膠預定區，避免在該基板單元3!0内產 生可能污染至該些外接塾316之模封溢勝。 以上所述，僅是本發明 gp . y J ^佳貫施例而已，並非對本發 月作任何形式上的限制，本 n #|, r ...., 月技術方案範圍當依所附申請 的#併〇^ 1 ^的技術人員可利用上述揭示 β技術内容作出歧許#知 一今更動或修飾為等同變化的等效實施 但凡是未脫離本發明枯 种w 技射案的内容，依據本發明的技 辦實質對以上實施例所作的的技 錦，均仍屬於本發明技術…1早“文、荨同變化與修 货月技術方案的範圍内。 【圖式簡單說明】 第1圖.一種習知球格陣列封裝1 _ 第2_-羽4 4·、 、構之截面示意圖。 2圖.S知球格陣列封裝構 -立门 扳早疋外接表面之 不思圖。 第3圖：依據本發明之第一呈體會 造m 實施例，—種半導體封裝構 &所使用之基板條之外 ^ ^ E A 接表面以及其中一基板 早凡之局部放大之示意圖。 17 200921813 第4 A至4F gl :依據本發明之第一具體實施例，該基板條 在該半導體封裝構造之製造方法中之局部截面示 意圖。 第5圖.依據本發明之第—具體實施例，在模封後該基板單 元之外接表面之示意圖。 第6圖.依據本發明之第一具體實施例，該半導體封裝構 造之截面示意圖。 第7圖：依據本發明之第二具體實施例，另一種半導體封裝 構造所使用之基板單元之外接表面之示意圖。 第8圖.依據本發明之第二具體實施例該半導體封裝構 造之截面示意圖。 【主要元件符號說明】 2 0基板條 21切割道 3〇基板條 3丨切割道 32溢膠槽道 40 切割工具Therefore, the present invention discloses a small window molding and cutting method and a structure thereof. The window molding portions 241 of the sealing body 240 extend and cover the cutting path 21 of the substrate strip 20 on the external surface 212. The small window 2丨3 of the side of the substrate unit 2 1 0 or the corner 容易 is prone to overflow phenomenon. In addition, when the substrate strip 2 is singulated, the first dicing side 242 protruding from the external surface 212 is provided by the window molding portions 241 to protect the circuit and the solder resist layer of the substrate unit 21 The phenomenon of peeling delamination does not occur, and the bonding force of the side edges or corners of the substrate unit 21 can be improved and the strength of the substrate structure can be maintained to improve the quality and reliability of the packaged product. In a second embodiment of the invention, a package construction formed by a three-window mode cutting method is disclosed. Referring to Figures 7 & 8, the first circle is the external surface of the substrate unit of another semiconductor package construction: Intention. Figure 8 is a schematic cross-sectional view of the semiconductor package structure. The package structure 300 mainly includes a substrate unit 310, a wafer 32 〇 = a plurality of electrical connection elements 33 〇, and a gel 34 (). The substrate unit has a small window σ 3 具有 having a viscous surface 3U, an circumscribed surface 312, and a plurality of through-holes, a single sheet S 3U. The substrate is formed by cutting a substrate (four) 〇 (as shown in Fig. 7), and a dicing street 31 is provided between the adjacent substrate single Tt 310. The chip 320 is disposed on the surface of the (5) surface. The electrical connection elements are formed in the small windows η to electrically connect the wafers 32 to the substrate unit 31. As shown in FIG. 7, the small π Qq...l multiple small solid ports 313 are formed on the side or corner of the substrate unit 3ι 15 200921813, and the external surface 312 includes a plurality of window moldings. A zone 314' surrounds the small windows (1) and extends to the sides or corners of the base plate (4) of the substrate. In this embodiment, the small windows σ 313 in the adjacent substrate unit 3 and the same window molding area 314 are connected to reduce the surface of the substrate strip 30 from being cut, and the substrate is prevented. When single & 3ι〇_ occurs, the gain of peeling delamination occurs and the moisture resistance of the product is improved. In addition, the substrate unit 31 can further have a plurality of central slots 31 through the substrate unit 31, which are formed in a central region of the substrate units 3, and the external surface 312 includes The molding zone 317 is surrounded by a central slot 3 15 but may not extend to the cutting lanes 3 i. In addition, the substrate strip 30 may further have a plurality of pads 316 formed on the external surface 312, and may be used to provide a plurality of external terminals 35, and the wafers 30 are electrically connected to the substrate through the substrate unit 31. The external terminal 350 is for the semiconductor package structure 3 to be surface-bonded to an external printed circuit board (not shown). I) The encapsulant 340 is formed on the window molding regions 314 of the substrate unit 310 to seal the electrical connection members 33A. The encapsulant 34 has a first cutting side 342 protruding from the outer surface 312 and is cut to the side or corner of the substrate unit 3 10 . In addition, the encapsulant 34 has a second cut side 343 which is dog-exposed and attached to the surface 311 of the die-bonding surface, which is cut to the side or corner of the substrate. Since the small windows 3 1 3 are connected to the corresponding side edges or corners of the substrate unit 3 , the first cutting side 342 and the second cutting side 343 are integrally connected at the small windows 3丨3, and the rest The portions are separated by the sides of the substrate unit 31. Sealing tape 2009 200921813 After the 'the seal body 340 in each window|~7#+土4·!^ / Aomu® mouth seal area 314 can form a window mold part 34' because of the small window after cutting 313 is connected to the side of the substrate unit 31 or the corner 隅' is formed as a side n-shape or a corner L-shaped notch, which can simplify the design of the mold under the mold step-in step-by-step process cost. Preferably, as for the 7 m π - ^ ^ 囷, the substrate strip 30 has an overflow channel disposed on the external surface 312, and the system is aligned with the scribe lines r = And passing through the window molding areas 314, so that the original intended to be cut, the raw materials, 314 as the overflowing predetermined area, to avoid the possibility of contamination in the substrate unit 3! 0 to the external 塾316 Winning. The above description is only the gp. y J ^ good example of the present invention, and does not impose any formal restrictions on the present month, the present n #|, r ...., the monthly technical solution scope is attached to the attached application. The technicians of #和〇^ 1 ^ can use the above-mentioned disclosure of the contents of the β technology to make an ambiguity. The knowledge is changed or modified to the equivalent implementation of the equivalent change, but the content of the technique is not deviated from the invention. The technical merits of the above embodiments of the present invention are still within the scope of the technical method of the present invention. [1] Early in the text, the same change and the repairing month technical solution. [Simple description of the drawing] Figure 1 A schematic diagram of a cross-section of a conventional ball grid array package 1 _ 2_-feet 4 4·, constituting a structure. 2 Fig. S knows the grid array package structure - the front door pulls the front surface of the external surface. Figure 3: The first embodiment of the present invention is a schematic diagram of a semiconductor package, a substrate attached to the substrate, and an externally enlarged portion of one of the substrates. 17 200921813 4A to 4F Gl: According to the first embodiment of the present invention, the substrate strip is A schematic partial cross-sectional view of the method of fabricating the semiconductor package structure. Fig. 5 is a schematic view showing the external surface of the substrate unit after molding according to the first embodiment of the present invention. Fig. 6 is the first aspect of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A cross-sectional view of a semiconductor package structure. FIG. 7 is a schematic view showing an external surface of a substrate unit used in another semiconductor package structure according to a second embodiment of the present invention. FIG. Second Embodiment A schematic cross-sectional view of the semiconductor package structure. [Main component symbol description] 2 0 substrate strip 21 cutting path 3 〇 substrate strip 3 丨 cutting path 32 overflow channel 40 cutting tool
1〇〇半導體封裝構造 1 1 0基板單元 113小窗口 116外接勢 120晶片 111黏晶表面 114窗口模封區 117下模封區 121銲墊 11 2外接表面 11 5中央槽孔 130電性連接元件140封膠體 160黏晶膠 150外接端子 200半導體封裝構造 2 1 0基板單元 2 1 1黏晶表面 2 1 2外接表面 18 200921813 213 小窗α 214 窗口模封區 215 216 外接墊 217 下模封區 220 晶片 221 銲墊 230 電性連接元件 240 封膠體 241 242 第一切割側面 243 第二切割側面 250 外接端子 260 黏晶膠 300 半導體封裝構造 310 基板單元 3 11 黏晶表面 312 ( 313 小窗口 314 窗口模封區 315 316 外接墊 317 下模封區 320 晶片 321 銲墊 330 電性連接元件 340 封膠體 341 342 第一切割側面 343 第二切割側面 350 外接端子 中央槽孔 窗口模封部 外接表面 中央槽孔 窗口模封部 191〇〇 semiconductor package structure 1 10 substrate unit 113 small window 116 external potential 120 wafer 111 adhesive surface 114 window molding area 117 lower mold area 121 solder pad 11 2 external surface 11 5 central slot 130 electrical connection element 140 sealant 160 adhesive 100 external terminal 200 semiconductor package structure 2 1 0 substrate unit 2 1 1 adhesive surface 2 1 2 external surface 18 200921813 213 small window α 214 window molding area 215 216 external pad 217 lower molding area 220 wafer 221 solder pad 230 electrical connection component 240 encapsulant 241 242 first cut side 243 second cut side 250 external terminal 260 adhesive 300 semiconductor package construction 310 substrate unit 3 11 sticky surface 312 (313 small window 314 window Mold sealing area 315 316 External pad 317 Lower molding area 320 Wafer 321 Welding pad 330 Electrical connection element 340 Sealing body 341 342 First cutting side 343 Second cutting side 350 External terminal Central slot window Molding part External surface Central slot Hole window molding portion 19