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TW200920198A - Printed circuit board - Google Patents

Printed circuit board Download PDF

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Publication number
TW200920198A
TW200920198A TW96139163A TW96139163A TW200920198A TW 200920198 A TW200920198 A TW 200920198A TW 96139163 A TW96139163 A TW 96139163A TW 96139163 A TW96139163 A TW 96139163A TW 200920198 A TW200920198 A TW 200920198A
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TW
Taiwan
Prior art keywords
layer
signal
differential
differential signal
circuit board
Prior art date
Application number
TW96139163A
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Chinese (zh)
Other versions
TWI409008B (en
Inventor
Chien-Hung Liu
Shou-Kuo Hsu
Yu-Chang Pai
Original Assignee
Hon Hai Prec Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hon Hai Prec Ind Co Ltd filed Critical Hon Hai Prec Ind Co Ltd
Priority to TW96139163A priority Critical patent/TWI409008B/en
Publication of TW200920198A publication Critical patent/TW200920198A/en
Application granted granted Critical
Publication of TWI409008B publication Critical patent/TWI409008B/en

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Abstract

A printed circuit board (PCB) includes a first signal layer, a second signal layer, and a medium layer between the first signal layer and the second signal layer. A differential pair is disposed in the first and second signal layers by a broadside-coupling manner. The differential pair includes two differential signal transmission lines respectively disposed in the first and second signal layers. Bisectors of the two differential signal transmission lines have a distance in horizontal direction. The distance is less than width of each differential signal transmission line. Differential impedance of the transmission lines can be adjusted by changing the distance between the bisectors of the two differential signal transmission lines in horizontal direction. The PCB can also reduce time delay and signal noise when transmitting signal in the differential signal transmission lines.

Description

200920198 九、發明說明: 【發明所屬之技術領域】 本:明係關於一種印刷電路板’尤指—種具有上下耦 &式是刀λ號對之印刷電路板。 【先前技術】 方六、電路板之佈線中,通常採用差分訊號對之佈線 方式以降低訊號在彳皇、g、苦u 現在傳輸通逗上傳輸時所產 印刷電路板中之羔八却味I 甲饺$知 ., 差77訊唬對大多採用邊緣耦合 = ge-_ple)之方式佈設,該邊緣輕合之方式是指差分訊 说對之兩條差分職傳輸線在印㈣路板之同—訊號層中 :互搞合。在實際佈線時為保證訊號傳輸品質在差分訊號 子之上方或下方必須要設有參考層。如圖1所示,印刷電 板之中間層佈置差分訊號對1〇之兩差分訊號傳輸線 皿、搬’外側兩層分別佈置參考層31、%。根據印刷電 路U規’差分訊號傳輸線差分阻抗之理想值為 lOOohm $知之印刷電路板通常是透過調節差分訊號傳輸 線101 1G2之間在水平方向上之間隔距離來調整差分訊號 傳輸線之差分阻抗值,但利用f知之邊緣輕合方式在調整 差分訊號傳輸線差分阻抗之過程中,由於每條差分訊號傳 輸線對應介質之介電常數不相同,因此訊號在差分訊號傳 輸線中傳輸時會產生較大之時間偏移和共模雜訊。 【發明内容】 鑒於以上内合,有必要提供一種印刷電路板,可減少 差分訊號傳輸線之間之時間偏移和共模雜訊。 200920198 一種印刷電路板,包括一第一訊號層、一第二訊號層 和 w於第一訊號層與第二訊號層之間之介質層,該第一 訊號層與第二訊號層中以上下耦合方式佈設一差分訊號 對,该差分訊號對包括分別位於第—訊號層和第二訊號層 中之兩條差分訊號傳輸線,該兩差分訊號傳輸線之中心線 在水平方向上有一段錯位距離,該錯位距離小於每條差分 訊號傳輸線之線寬。 β亥印刷电路扳可透過凋整兩差分訊號傳輸線之中心線 在水平方向上之錯位距離調整傳輸線之差分阻抗值,同時 減少了訊號在差分訊號傳輸線中傳輸時之時間偏移和共模 雜訊。 A、 【實施方式】 請參照圖2,本發明印刷電路板的較佳實施方式包括 一第一參考層41、一第一訊號層42、一第二訊號層43和 一第一參考層44。該第一訊號層42和第二訊號層43之間 佈設有介質層,該第一參考層41和第一訊號層42之間以 及該第二訊號層43和第二參考層44之間也佈設有介質 層,其中該第一參考層41和第二參考層44為金屬層。該 第一訊號層42和第二訊號層43上以上下耦合 (broadside-couple)方式佈設一差分訊號對2〇。該上下耦合 方式是指一差分訊號對中之兩條差分訊號傳輸線在印刷電 路板之兩個相鄰層間耦合。該差分訊號對20包括兩條差分 訊號傳輸線201和202,該差分訊號傳輸線2〇1佈設於該 第一 5孔號層42上,該差分訊號傳輸線202佈設於該第二訊 200920198 號層43上,該兩條差分訊號傳輸線201和202之中心線在 水平方向上之錯位距離為S。兩條差分訊號傳輸線間之差 分阻抗計算方法可參照相應之經驗公式,如:200920198 IX. Description of the invention: [Technical field to which the invention pertains] This: The system relates to a printed circuit board, in particular, a printed circuit board having a pair of upper and lower couplings & [Prior Art] In the wiring of the circuit board and the circuit board, the wiring method of the differential signal is usually used to reduce the signal in the printed circuit board produced by the transmission of the emperor, g, and bitu. I 甲 $ 知 知 知 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , - In the signal layer: Engage each other. In the actual wiring, in order to ensure the signal transmission quality, a reference layer must be provided above or below the differential signal. As shown in Fig. 1, the middle layer of the printed circuit board is arranged with a differential signal pair of two differential signal transmission lines, and two layers of the outer side are arranged with reference layers 31 and %, respectively. According to the printed circuit U regulation, the ideal value of the differential impedance of the differential signal transmission line is 100 ohm. The printed circuit board generally adjusts the differential impedance value of the differential signal transmission line by adjusting the distance between the differential signal transmission lines 101 1G2 in the horizontal direction, but In the process of adjusting the differential impedance of the differential signal transmission line, the differential dielectric impedance of the differential signal transmission line is different, so that the signal transmits a large time offset when transmitted in the differential signal transmission line. And common mode noise. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a printed circuit board that reduces time offset and common mode noise between differential signal transmission lines. 200920198 A printed circuit board comprising a first signal layer, a second signal layer and a dielectric layer between the first signal layer and the second signal layer, wherein the first signal layer is coupled to the second signal layer Disposing a differential signal pair, the differential signal pair includes two differential signal transmission lines respectively located in the first signal layer and the second signal layer, and the center line of the two differential signal transmission lines has a misalignment distance in a horizontal direction, the misalignment The distance is less than the line width of each differential signal transmission line. The β-hai printed circuit board can adjust the differential impedance value of the transmission line by shifting the center line of the two differential signal transmission lines in the horizontal direction, and reduce the time offset and common mode noise when the signal is transmitted in the differential signal transmission line. . A. [Embodiment] Referring to FIG. 2, a preferred embodiment of the printed circuit board of the present invention includes a first reference layer 41, a first signal layer 42, a second signal layer 43, and a first reference layer 44. A dielectric layer is disposed between the first signal layer 42 and the second signal layer 43. The first reference layer 41 and the first signal layer 42 and the second signal layer 43 and the second reference layer 44 are also disposed. There is a dielectric layer, wherein the first reference layer 41 and the second reference layer 44 are metal layers. A differential signal pair 2 is disposed on the first signal layer 42 and the second signal layer 43 in a broadside-couple manner. The up-and-down coupling means that two differential signal transmission lines of a differential signal pair are coupled between two adjacent layers of the printed circuit board. The differential signal pair 20 includes two differential signal transmission lines 201 and 202. The differential signal transmission line 2〇1 is disposed on the first 5 hole number layer 42. The differential signal transmission line 202 is disposed on the second layer 200920198. The center line of the two differential signal transmission lines 201 and 202 has a horizontal displacement distance S of S. The differential impedance calculation method between the two differential signal transmission lines can refer to the corresponding empirical formula, such as:

其中為傳輸線之差分阻抗,C22和Lu分別為差分訊號 對之對地電容和對地電感,和心分別為差分訊號對之兩 條傳輸線間之轉合電容和搞合電感。 當增大錯位距離S時,差分訊號傳輪線201和202之 正對面積減小,根據電容跟正對面積成正比可知差分訊號 對20之對地電容Q會減小,差分訊號傳輸線和2⑽ 之差分阻抗會增大。因此透過調整錯位距離s即可調整傳 輪線之差分阻抗值。在本發明較佳實施方式中,錯位距離 S越大,差分阻抗也越大,因此得到之差分阻抗值越理 想。當S增大到4.5mil時,差分阻抗、也增大到 99.91〇hm,接近設計規範要求的1〇〇〇hm之理想值。但在 吏錯位距離S之過私中應保證兩差分訊號傳輸線施和 2〇2之間之正對面積不為零’即錯位距離$應小於差分訊 號傳輸線之線寬。 本發明透過改變兩條差分訊料輸線之巾w線在水-方向上之錯位距離來調整兩差分訊號傳輸線之正對面積 從而實現改變差分訊號傳輸線差分阻抗值之目的。由則 ^上下耦合佈線方式,電場大多分佈在兩條差分訊旧 輪線之間之同一介質中’因此減少了訊號在差分訊細 200920198 線中傳輸時之時間偏移和共模雜訊。 ^上所ϋ本發明符合發明專利要件 申請。惟’以上所述者僅為本發明 ^提出專利 本案技藝之人士,在爰依太實轭例,舉凡熟悉 #友依:本發明精神所令 化,皆應涵蓋於以下之申往I 專效t飾或變 夂·τ明專利範圍内。 【圖式簡單說明】 圖1係習知之印刷電路板之示意圖。 圖2係本發明印刷電路板較佳實施方式之 。 【主要元件符號說明】 〜ΰ 第一參考層 第二訊號層 差分訊號傳輸線 41 43 201、 202 差分訊號對 20 第一訊號層 42 第二參考層 44Among them, the differential impedance of the transmission line, C22 and Lu are respectively the differential signal to ground capacitance and the ground inductance, and the heart is the switching capacitance between the two transmission lines of the differential signal pair and the inductance. When the misalignment distance S is increased, the facing area of the differential signal transmission lines 201 and 202 is reduced. According to the capacitance and the positive facing area, the capacitance Q of the differential signal pair 20 is reduced, and the differential signal transmission line and 2 (10) The differential impedance will increase. Therefore, the differential impedance value of the transmission line can be adjusted by adjusting the misalignment distance s. In the preferred embodiment of the present invention, the larger the misalignment distance S is, the larger the differential impedance is, and thus the more advantageous the differential impedance value is. When S is increased to 4.5 mils, the differential impedance is also increased to 99.91 hm, which is close to the ideal value of 1 hm required by the design specification. However, in the case of a misplaced distance S, it should be ensured that the direct-pair area between the two differential signal transmission lines and 2〇2 is not zero, that is, the misalignment distance $ should be smaller than the line width of the differential signal transmission line. The invention adjusts the facing area of the two differential signal transmission lines by changing the misalignment distance of the two lines of the differential signal transmission line in the water-direction to realize the purpose of changing the differential impedance value of the differential signal transmission line. By the upper and lower coupling wiring mode, the electric field is mostly distributed in the same medium between the two differential old wires. This reduces the time offset and common mode noise when the signal is transmitted in the differential signal 200920198. ^ The above invention is in accordance with the application for the invention patent. However, the above mentioned persons are only those who have patented the present invention in the present invention. In the case of the yoke yoke, the familiarity with the yoke of the present invention: the spirit of the present invention should be covered in the following application. t decoration or change 夂 τ Ming patent range. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of a conventional printed circuit board. Figure 2 is a preferred embodiment of a printed circuit board of the present invention. [Main component symbol description] ~ΰ First reference layer Second signal layer Differential signal transmission line 41 43 201, 202 Differential signal pair 20 First signal layer 42 Second reference layer 44

Claims (1)

200920198 十、申請專利範圍 1. 一種印刷電路板,包括一第一訊號層、一第二訊號層 和一介於第一訊號層與第二訊號層之間之介質層,該 第一訊號層與第二訊號層中以上下耦合方式佈設一 差分訊號對,該差分訊號對包括分別位於第一訊號層 和第二訊號層中之兩條差分訊號傳輸線,該兩差分訊 號傳輸線之中心線在水平方向上有一段錯位距離,該 錯位距離小於每條差分訊號傳輸線之線寬。 2. 如申請專利範圍第i項所述之印刷電路板,其中當該 錯位距離為4.5仙時,該等差分訊號傳輪線間之差分 阻4几為 99.91〇hm。 3.如申請專利範圍第!項所述之印刷電路板,還包括一 位於該第一訊號層之上之第一參考層和物μ墙 -1增和—位於該第 -汛唬層之下之第二參考,,第_參考層 層之間以及第二訊號層和第_夫 说 質層。 I層矛弟—參考層之間均設有介 項所述之印刷電路板,其中該 /亏層和弟一參考層為金屬層。 11200920198 X. Patent Application Area 1. A printed circuit board comprising a first signal layer, a second signal layer and a dielectric layer between the first signal layer and the second signal layer, the first signal layer and the first signal layer A differential signal pair is disposed in the upper and lower coupling modes of the second signal layer, and the differential signal pair includes two differential signal transmission lines respectively located in the first signal layer and the second signal layer, and the center lines of the two differential signal transmission lines are horizontally There is a misalignment distance which is smaller than the line width of each differential signal transmission line. 2. The printed circuit board of claim i, wherein when the misalignment distance is 4.5 sen, the differential resistance between the differential signal transmission lines is 99.91 〇hm. 3. If you apply for a patent scope! The printed circuit board of the present invention, further comprising a first reference layer over the first signal layer and a second reference of the object μ-wall - a second reference under the first-layer layer, The reference layers are between the second signal layer and the second layer. The layer I spear-the reference layer is provided with a printed circuit board as described in the section, wherein the/defective layer and the first reference layer are metal layers. 11
TW96139163A 2007-10-19 2007-10-19 Printed circuit board TWI409008B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW96139163A TWI409008B (en) 2007-10-19 2007-10-19 Printed circuit board

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Application Number Priority Date Filing Date Title
TW96139163A TWI409008B (en) 2007-10-19 2007-10-19 Printed circuit board

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TW200920198A true TW200920198A (en) 2009-05-01
TWI409008B TWI409008B (en) 2013-09-11

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Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7173442B2 (en) * 2003-08-25 2007-02-06 Delaware Capital Formation, Inc. Integrated printed circuit board and test contactor for high speed semiconductor testing
TWI237536B (en) * 2003-09-30 2005-08-01 Hon Hai Prec Ind Co Ltd PCB and layout thereof

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