200926928 九、發明說明： 【發明所屬之技術領域】 本發明係有關於-種防止電磁干擾的電略板佈局結 構及方法，尤指一種具有高頻信號及防止電磁干柃的電路 板佈局結構及佈局方法。 & . 【先前技術】 任何高頻電子產品均會產生雜訊（N〇ise)，電子雜訊 干擾可分為傳導干擾和幅射干擾兩方面來談，〜般而古， ❹傳導干擾會透過電源線去干擾影響其他電子或電^產:正 常運作’而幅射干擾則是透過空氣去干擾影響其^設;， 對於電器用品的使用，-般國家的電氣器安規皆有制定防 止電磁干擾之規範。 .隨著高科技領域的進步’電磁干擾（electr⑽零tlc - inference，ΕΜί)的問題也日益增多。當半導體元件速度變 得忍陕也度愈咼日守，雜訊也愈大。對印刷電路板（pcb) 設計工程師而言，ΕΜΙ的問題也日趨重要，而藉 告的 ❹ _電路板佈局技術與配合祕化的設計方法，將^先 避免EMI問題的干擾。 —而目剛4圖減少或將電磁波降到最低的方法都是靠 離保漠’這包括了將電I線包覆_層隔離網以傳導接 地，或是將電子產品之機殼内會產生電磁波的元件週遭放 置-金屬導電物。而這些電磁波的防制步驟會增加電子裝 置的製造成本，以及讓電子產品更為複雜。 【發明内容】 有鐘於此，本發明提供一種防止電磁干擾的電路板佈 6 200926928 構’係利用複數導電網格佈設在電路 層上，以巴覆信號層上的信號線路 ^虎 壞信號線路所產生的干擾源磁場，進而;會破200926928 IX. Description of the Invention: [Technical Field] The present invention relates to an electrical board layout structure and method for preventing electromagnetic interference, and more particularly to a circuit board layout structure having a high frequency signal and preventing electromagnetic dryness Layout method. & . [Prior Art] Any high-frequency electronic products will generate noise (N〇ise), electronic noise interference can be divided into two aspects: conducted interference and radiation interference, ~ ordinary, ❹ conduction interference will Through the power line to interfere with other electronic or electrical production: normal operation 'and radiation interference is through the air to interfere with its impact;, for the use of electrical appliances, the national electrical safety regulations have been formulated to prevent electromagnetic The specification of interference. With the advancement of high-tech fields, the problem of electromagnetic interference (electr(10) zero tlc - inference, ΕΜί) is also increasing. When the speed of the semiconductor components becomes more and more difficult, the more the noise is, the bigger the noise is. For printed circuit board (PCB) design engineers, the problem of embarrassment is becoming more and more important, and the ❹ _ board layout technology and the secret design method will be used to avoid interference from EMI. - The method of reducing or minimizing the electromagnetic wave is to rely on the protection of the desert. This includes the coating of the electric I-line to conduct the grounding, or the inside of the casing of the electronic product. Electromagnetic wave components are placed around - metal conductors. These electromagnetic wave prevention steps increase the manufacturing cost of the electronic device and make the electronic product more complicated. SUMMARY OF THE INVENTION In view of the above, the present invention provides a circuit board cloth 6 200926928 for preventing electromagnetic interference, which is constructed by using a plurality of conductive grids on a circuit layer to cover signal lines on the signal layer. The generated interference source magnetic field, and thus;
磁場分佈之長度降低，以致雜訊輕射程板t大面積 的防制效果。 又減弱’達到EMI 本發明提供的防止f針_電路板 有-多層印刷電路板、複數導電網格及複數導;包括 卜多層印刷電路板具有複數信號層與-接^牙ίΐΐ 號皆佈設有複數條信號線路。複數導電網^:一， -化號層上，並且包覆每一信號層上古ς 5又於母 電穿孔設置於多層印刷電路板各層間^電Hi複數導 地層及每-信號層上的導電網格。藉；：” 寸的:；!明係可達到阻隔特定電磁波頻率的= 施於一多層印刷電路板，該多層印刷糸貧 層與一接地層，其中該方法步驟為，首先丈信號 ❹ 路信號層形成有複數導電網格，並且Γ 網格包覆母一信號層上的信號線路，其中導導„電 位網格，其尺才係根據所欲阻 車而。為-早 導電穿孔電性連接於該接地層與每一㈣導電牙孔，複數 格，以構成一封閉接地網路。如此，根據二上::導電網 寸，:係可達到阻隔特定電磁波頻率的目^網格尺 及方二擾板佈局結構 磁她目的。如此，本發=局 200926928 低干擾_場分佈之長度， 減低信號彼此相互干擾裎产。射私度’進而 減低程度约略3。〜5==，細可使導電穿孔 孔ϋ 使得電路板之強度不因導電穿 =咸低。另外，本發明使用導電網格佈局方式，2 ' 可以減低電錢成本約25〜30%。 而 .τ進二接下來的詳細說明皆為示範性質，是為 他目的· &明的申請專利範圍。而有關本發明的i Q r 、、毹點，將在後續的說明與圖示加以闡述。" 雩 【實施方式】 圖。考f一圖，為本發明的電路板佈局結構分層示音 Q 中，本發明的電路扳姊 - =複數導電網格1ΰ2及複數導構電=。4:: .:乂二!一第一信號層10、-第二信號層η二: 地屢i 2。在弟,一 <士·&& 1 π λ々々 才文 °，U層0與弟二信號層14上皆佈設右、> 數條域、、泉路103與複數導電網格⑽， 有後 =〇2用以包覆前述複數條信號線路103:同ί數^電網 ®電穿孔104電性連接於接地層12，以數導 第二信號層14上的複數導電網格⑽。。姻1◦與 局示S第：:為本!明電路板表層佈 103，數信號線路!:;上有後數信號線路 第一信號與則_巾㈣方式干擾 佈設有複數導電網格102，几因此’第一^號層w上 信號線路103，用電―1G2係包覆複數 y 用以阻隔刖述電磁雜訊的干擾。 復配合第-圖，參考第二圖’第一信號層1〇還佈設 8 200926928 Ο ❹ 有複數導電穿孔剛，複數導電穿孔1Q4 號層10上的導電網格102，其中複數導電穿接第一信 倍單位導電網格102的長度，間隔設置在讀夕104係以2 板1的周圍。同時，複數導電穿孔104更曾二:印刷電路 刷電路板1之第二信號層14上的導電網格^接多層印 地層12。如此，多層印刷電路板i中第一=不）與接 層14的導電網格1Q2皆透過複數二與第 連接到接地層12，因而構成—封閉接地網路:孔1G4電性 復配合第一圖，參考第二圖，當 高頻操作下產生電路^於 孔104電性連接到接地層12的複數導 過導電穿 導到接地層12並予轉放，進而破將電 2線分佈’降低磁場分佈之長 =相之 程度。 I磁雜訊輻射 因此，在多層印刷電路板1的第 怖設有大面積的複數導電二G與第二 二:；:==信號層1。與第二S 產生=雜訊，進而達::止電所 發明導電網格示意圖。其t，導電 度。同時單:=，即網格的長L與寬W具有相= 早位網格的尺寸大小係根據公式⑴而^長 c=fx 又···⑴ 在公式（1)令，（；代表 波頻率’又代表所欲阻隔的代表所欲阻隔的電碌 ⑴，由於光逮(:為—固:神的波長。根據公式 1星’因此，欲阻隔的電磁波頰 200926928 率f與欲阻隔的電磁波頻率的波長λ成反比例。 如此，在導電網格102的尺寸設計中 欲阻隔的電磁波頻率f，再依據公式⑴計：而，所 二電磁波頻率的波長λ，而單位導電網格 ;。如第三圖所示，在導電網請的尺匕數^ U的長度係由公式⑺與公 1其長L與 為任意整數。 …冲异取得，其中η ❹ L二入 /η... ( 2) W= λ /η··· ( 3) 、'配合第一圖，請參考第四圖，為本發 法、f程方塊示意®。本發明的電路板佈局方^ >局方 有第—信號層1〇、第二信號層i4及接地施於具 ，，該方法步驟為:首先需先選擇 ==印刷 磁波_叫長λ，其中（：代表光阻隔的電 阻隔的電磁波頻率波長λ除以整數㈣，以心，’將欲 '=〇2的長L與寬w的長度_)。接著:在= 電路板1的第一信號層10與第二作 曰印咧 導，網格1G2，其中複數導電網格°1();日包=有複叙 與第二信號層14上的信號線路（81〇4)。；，2層“ 刷電路板1形成有複數導電穿孔1Q [ 夕層印 信號層1〇、第二信號層Η與接地層：：1。4 电連接於該接地層12及第一信號層1〇盥θ日’係 上的導電網_(_，而構成封閉接路號層14 综上所述，本發明之防止電磁干擾的電路板佈局結辑 10 200926928 及方法，係透過導電網袼的佈局 磁波頻率的目的。如此，太運到阻〜特疋電 低干擾源磁場分饰之局結構及方法係可降 減低信號彼此相互干擾射程度’進而 «孔104數而減低。電路板之強度不因導 .局方式，因而可明使用導電網格102佈 ^ 」以減低電鍍成本約25〜30%。 _ '上所述，僅為本發明最佳之具體實施例，惟太 案之專利範圍。及之交化或修飾，皆可涵蓋在以下本 【圖式簡單說明】 • =二本毛明的電路板佈局結構分層示意圖； 明電路板表層佈局示意圖； =二圖為本發明導電網格示意圖；及 籌 【主要-:為本發明電路板佈局方法流程方塊示意圖。 L主要TL件符號說明】 多層印刷電路板1 第一信號I 1〇 導電網格1〇2 信號線路 導電穿孔104 接地層12 第二信號層14The length of the magnetic field distribution is reduced, so that the noise of the noise light-radiation plate is large. Attenuating 'Achieve EMI'. The invention provides a f-pin-circuit board having a multi-layer printed circuit board, a plurality of conductive grids, and a plurality of conductors. The multi-layer printed circuit board includes a plurality of signal layers and a plurality of signals. Multiple signal lines. a plurality of conductive nets: one, on the layer of the layer, and covering each of the signal layers, the upper layer 5 and the parental electroporation are disposed on the layers of the multilayer printed circuit board, electrically conducting a plurality of conductive layers and conducting a signal on each of the signal layers grid. By: "inch";;! The system can achieve a specific electromagnetic wave frequency = applied to a multilayer printed circuit board, the multilayer printed poor layer and a ground layer, wherein the method steps are, first, the signal The signal layer is formed with a plurality of conductive grids, and the Γ grid envelops the signal lines on the parent-signal layer, wherein the conductive grid is guided by the grid according to the desired resistance. The early conductive via is electrically connected to the ground layer and each of the (four) conductive vias, and is complexed to form a closed ground network. Thus, according to the second:: conductive mesh, : can achieve the purpose of blocking the specific electromagnetic wave frequency grid and square two scramble board layout structure magnetic her purpose. Thus, this issue = Bureau 200926928 The length of the low interference _ field distribution, reducing the signal interference with each other. The degree of smuggling and then the degree of reduction is about 3. ~5==, fine can make the conductive perforation hole 使得 so that the strength of the circuit board is not due to conductive wear = salt low. In addition, the present invention uses a conductive grid layout, and 2' can reduce the cost of electricity by about 25 to 30%. The next detailed description of the .τ into the second is exemplary, and it is for the purpose of & The i Q r and the points related to the present invention will be explained in the following description and illustration. " 雩 [Implementation] Figure. In the figure of Fig. f, in the layered sound display Q of the circuit board layout structure of the present invention, the circuit of the present invention - - complex conductive grid 1 ΰ 2 and complex conduction structure =. 4:: .: 乂二! A first signal layer 10, a second signal layer η 2: The ground is i 2 . In the younger brother, a <士·&& 1 π λ 々々 ° °, U layer 0 and the second signal layer 14 are arranged on the right, > several fields, spring road 103 and complex conductive grid (10), after = 〇 2 is used to cover the plurality of signal lines 103: electrically connected to the ground layer 12 to electrically connect the plurality of conductive grids on the second signal layer 14 (10) . . Marriage 1◦ and Bureau S:: Ben! Ming circuit board surface layer 103, number signal line!:; The last signal line has the first signal and the _ towel (4) mode interference cloth is provided with a plurality of conductive grids 102, Therefore, the signal line 103 on the first layer w is covered with a power -1G2 system to block the interference of the electromagnetic noise. Complex with the first figure, refer to the second figure 'the first signal layer 1〇 is also laid 8 200926928 Ο ❹ has a plurality of conductive perforations, a plurality of conductive perforations 1Q4 layer 10 on the conductive grid 102, wherein the plurality of conductive through the first The length of the doubling unit conductive grid 102 is set at intervals around the two plates 1 of the reading eve 104. At the same time, the plurality of conductive vias 104 are more than two: the conductive grid on the second signal layer 14 of the printed circuit board 1 is connected to the multilayer printed layer 12. Thus, the first non-multiple printed circuit board i and the conductive mesh 1Q2 of the bonding layer 14 are connected to the grounding layer 12 through the plurality of and the second, thus forming a closed grounding network: the hole 1G4 is electrically complexed. In the figure, referring to the second figure, when the high frequency operation is performed, the circuit 104 is electrically connected to the ground layer 12, and the plurality of conductive leads are electrically conducted to the ground layer 12 and are transferred to the ground layer 12, thereby breaking the electric 2 line distribution. Decrease the length of the magnetic field distribution = the degree of phase. I. Magnetic Noise Radiation Therefore, in the first layer of the multilayer printed circuit board 1, a large area of the plurality of conductive two G and the second two:; == signal layer 1 are provided. And the second S generates = noise, and then reaches:: the schematic diagram of the conductive grid invented by the power-off. Its t, conductivity. At the same time, single: =, that is, the length L and the width W of the grid have phase = the size of the early grid is based on the formula (1) and the length is c = fx and (1) in the formula (1), (; represents the wave The frequency 'is also the representative of the desired block of electricity (1), due to light arrest (: is - solid: the wavelength of God. According to the formula 1 star 'thus, the electromagnetic wave cheeks to be blocked 200926928 rate f and the electromagnetic wave to be blocked The wavelength λ of the frequency is inversely proportional. Thus, the frequency f of the electromagnetic wave to be blocked in the size design of the conductive mesh 102 is calculated according to the formula (1): and the wavelength λ of the two electromagnetic wave frequencies, and the unit conductive grid; As shown in the three figures, the length of the ruler of the conductive mesh ^ U is determined by the formula (7) and the length of the public L and the arbitrary number L. is obtained by the difference, where η ❹ L is in / η... ( 2 ) W = λ /η··· ( 3) , 'With the first picture, please refer to the fourth picture, this is the method, the f-square block shows ®. The circuit board layout of the present invention ^ > - the signal layer 1 〇, the second signal layer i4 and the grounding device, the method steps are: firstly, the first choice == printing magnetic wave _ called length λ, (: The wavelength of the electromagnetic wave representing the resistance of the light barrier is divided by the integer (four), to the heart, 'will be '= the length L of the 〇2 and the length of the width _). Then: at = the first signal of the board 1 The layer 10 and the second layer are printed on the grid 1G2, wherein the plurality of conductive grids are 1(); the day packet = the signal line on the second signal layer 14 (81〇4).;, 2 The layer "brush circuit board 1 is formed with a plurality of conductive vias 1Q [the layer printed signal layer 1 第二, the second signal layer Η and the ground layer:: 1. 4 electrically connected to the ground layer 12 and the first signal layer 1 〇盥 θ The conductive mesh _(_, which constitutes the closed circuit number layer 14 in summary, the electromagnetic interference prevention circuit board layout of the present invention 10 200926928 and the method, is the layout magnetic wave frequency through the conductive mesh The purpose of this is that the structure and method of the low-interference source magnetic field sub-decoration can reduce the degree of interference between the two signals and the number of holes 104. The strength of the board is not guided. In the way of the board, it can be seen that the conductive grid 102 is used to reduce the plating cost by about 25 to 30%. For the best embodiment of the present invention, the patent scope of the present invention, and the cross-linking or modification, can be covered in the following [simplified description of the schema] • = two layers of schematic structure of the board layout structure Schematic diagram of the surface layout of the circuit board; = 2 is a schematic diagram of the conductive grid of the present invention; and [mainly:: the block diagram of the circuit board layout method of the present invention. L main TL parts symbol description] multilayer printed circuit board 1 first Signal I 1 〇 Conductive Grid 1 〇 2 Signal Line Conductive Pierce 104 Ground Layer 12 Second Signal Layer 14