TW200926388A - Semiconductor device, semiconductor installation structure, photoelectric device - Google Patents

Abstract

An objective of the present invention is to provide a semiconductor device allowing simplification and diversification of wiring status on a substrate electrically connected to the semiconductor device by using the installation of the semiconductor device to the substrate. An IC chip (41) which is a semiconductor device includes a base material (2) containing an internal circuit, resin protrusions (7a, 7b) protruding from and provided on an active surface (3) of the base material (2), and a plurality of terminals (6a, 6b) containing island-shaped conductive films (8a, 8b) provided on the resin protrusions (7a, 7b). The plurality of terminals (6a, 6b) includes terminals conducted with the internal circuit, wherein a re-wire (11) connecting at least two terminals of the plurality of terminals 6a is formed on the active surface (3). The IC chip (41) is installed on a first substrate (42), while a second substrate (43) is connected to the first substrate (42). Though there is no crossing wire or jumping wire on the second substrate (43), the second wire (46) and the forth wire (46) are electrically connected via the re-wire (11) and the terminals (6a) coupled to the same of the IC chip (41).

Description

200926388 - Nine, invention description: . [Technical Field of the Invention] The present invention relates to a semiconductor device such as a HX Integrated Circuit: a semiconductor chip, a semiconductor mounting structure of the semiconductor, and a photovoltaic device. [Prior Art] In general, a photovoltaic device such as a liquid crystal display device has a photovoltaic panel belonging to a photovoltaic element for display. The photovoltaic panel has a plurality of dots (i.e., island regions) of a predetermined arrangement (e.g., a matrix shape) when viewed in a plan view. Each of the dot regions has, for example, a pair of electrodes disposed opposite to each other, and a photoelectric substance provided between the pair of electrodes. By applying a predetermined voltage between a pair of electrodes selected from the plurality of dot regions, the optical state of the photoelectric substance is changed to enable the dog to display a desired image. In the above optoelectronic device, in order to select the desired. In the dot area, a scan signal is supplied to one of the pair of electrodes, and a signal is supplied to the other. The scanning signal and the data signal are generated by a driving circuit having a predetermined circuit. This drive circuit is formed, for example, inside the drive 1C belonging to the semiconductor device. This driving IC is manufactured by, for example, performing a known semiconductor manufacturing method on a silicon wafer. The drive 1C is mounted on a glass or plastic substrate constituting the photovoltaic panel or on a relay substrate to which the substrates are connected. In the base plate or relay substrate for driving 1C for women's wear, wiring for supplying signals and electric power to the drive IC is provided for transmitting the signal generated by the drive Ic and the data signal to Electrode in the photoelectric panel 6 320394 200926388 ic Electrically connected wires and other wiring. A wiring terminal for driving is provided in the wiring system of the Xiao. This is carried out by mounting the driving 1 (: when mounted on a substrate, for example, by flip chip, Phlp). The flip chip mounting system forms a connection electrode called a bump on a circuit surface (that is, an active surface) for driving 1C, and electrically connects the connection electrodes to the wiring terminals on the substrate. installation method. In this case, the drive 1C is in a state of being packaged in almost the same size as a bare chip, that is, in a state of a wafer scale package. A semiconductor package structure of a wafer size package has been disclosed in, for example, Patent Document j and Patent Document 2. Patent Document 1 discloses a technique of electrically connecting solder bumps belonging to electrodes for connection to wiring terminals on a substrate. Further, Patent Document 2 discloses an electrical connection structure in which a conductor layer is formed on a resin projection and the conductor layer is directly contacted with a wiring terminal on the substrate via an adhesive. Japanese Laid-Open Patent Publication No. 2001-223319 (page 4, paragraphs 1 and 2) Patent Document 2: Japanese Patent No. 2731471 (pages 3, 4, and 1) [Summary of the Invention] ( The problem to be solved by the invention is to provide a case where the above-described bare wafer-sized driving IC is mounted on a substrate such as a glass substrate, and the plurality of connection electrodes for driving the Ic are electrically connected to the plurality of wirings on the substrate. Terminal. A plurality of substrates on the substrate 320394 7 200926388 The wiring terminals and the wirings connecting the wiring terminals are usually formed on one side of the substrate by a photo-etching method. Therefore, since it is necessary to insulate the wirings from each other, it is difficult to form the cross wiring in which a part of the wirings intersect with the other wirings by the same photo-step process. In other words, there is a problem that another step is required in order to form the wiring and wiring. In addition, it is assumed that the driving Ic is mounted on the substrate, and the relay substrate (for example, FPC (Flexible Printed Circuit)) is connected. In the case of the substrate, the case where the driving ic is mounted on the relay f board. In such a case, when cross wiring is to be performed on the relay substrate, it is generally necessary to form a normal wiring on one side of the relay substrate and to form a wiring on the other surface. Thus, the formation of the relay substrate by the double-sided wiring involves an increase in the number of steps, which causes a problem in cost. (The means to solve the problem. This month, the researcher is still working to solve at least part of the above problems, and can be realized as the following aspects or application examples. [Application Example 1] The semiconductor device of the application example includes a substrate including an internal circuit: a resin protrusion protruding from the active surface side of the substrate, and a plurality of terminals including the resin protrusion The semiconductor device is characterized in that the plurality of terminals include terminals that are electrically connected to the internal circuit, and at least two of the plurality of terminals are provided on the active surface side. The terminals are electrically wired. In the above configuration, the term "substrate" means, for example, a main portion of an IG wafer. Off 320394 8 200926388 1 In an Ic chip, a semiconductor element is typically formed on a semiconductor wafer to form an inner region. The germanium circuit is covered with a passivation film belonging to a protective film, and the wafer is obtained by cutting the wafer by a dicing step. The surface of the substrate on which the internal circuit is formed is referred to as an active surface which is covered by a passivation film and a terminal (e.g., a bump) which is connected to a terminal of the external wiring is formed on the surface of the passivation film. When the semiconductor device is mounted on a substrate, it is generally mounted in a state in which the active surface faces the substrate. That is, the active surface of the semiconductor device is usually used as the mounting surface. According to the above configuration, the plurality of terminals provided on the active surface side are bumps in which a resin protrusion is a core and an island-shaped conductive film is formed thereon (hereinafter, the bumps formed by this are called For resin core bumps). This resin core bump utilizes the elastic bumps of the resin portion. The resin protrusion may be i long linear protrusions or island-shaped protrusions corresponding to the island-shaped conductive film. • When the semiconductor device of this application example is installed. When mounted on the substrate, the resin projections are elasticized and deformed, whereby the terminals on the substrate and the conductive film of the semiconductor device are brought into contact with each other under a large pressing force under a sufficient pressing force. Therefore, a stable connection state between terminals can be obtained. Further, at least two terminals of a plurality of terminals including an island-shaped conductive film provided on the substrate are electrically connected by wiring provided on the active surface side. Therefore, at least two wirings formed on the substrate to be mounted can be connected by wiring provided on the active surface side of the semiconductor device, without wiring or flying over the wiring on the substrate. As a result, it is sufficient to increase the degree of freedom of the wiring pattern without complicating the wiring pattern on the substrate. For example, even in the case where the substrate is formed by the state of 320394 9 200926388 of the single-sided wiring of the enamel layer, by using the wiring provided on the active surface side of the semiconductor device, it is possible to realize the use of the double-sided wiring and the multilayer. The same wiring pattern when the substrate is single-sided. That is, a semiconductor device having an auxiliary wiring is provided, and the wiring state of the substrate to be mounted can be simplified or diversified. [Application Example 2] In the semiconductor device according to the application example described above, the wiring system is configured to connect at least two non-adjacent terminals among the plurality of terminals. According to the above configuration, by mounting the semiconductor device on the substrate, at least two of the non-adjacent wirings provided on the substrate can be electrically connected to the substrate without the parent fork wiring or the flying wiring. [Application Example 3] In the semiconductor device according to the application example described above, the wiring system may connect the terminals that are not connected to the internal circuit among the plurality of terminals. The plurality of terminals provided on the substrate may be only the conduction terminals that are electrically connected to the internal circuit, and it is also possible to have terminals that are not electrically connected to the internal circuits in addition to such conduction terminals. Terminals that are not conductive to internal circuits are referred to as dummy terminals. The dummy terminal usually has the same shape as the conductive terminal in appearance. & Horse The wiring system provided on the active surface side of the substrate can connect the above-mentioned dummy (four) dumping materials in the plurality of ends. The materials can be shunted, and the terminals that are connected to the circuit are connected to each other, or the terminals that are electrically connected to the inner and middle circuits can be connected to the dummy terminals. [Application Example 4] In the semiconductor device of the above application example, preferably, 320394 10 200926388 'the active surface of the substrate is provided with an insulating protective film; and the resin protruding portion is used. The conductive film is provided on the protective film via an opening provided in the protective film, and the wiring is formed on the protective film. According to the above configuration, the wiring formed on the protective film on the substrate can be formed as a so-called rewiring wiring. The rewiring refers to a wiring which is formed again by the steps performed after the step of manufacturing the substrate of the semiconductor device (the so-called step). Generally, in the preceding step, the internal circuit including the semiconductor element is formed on the substrate by a predetermined semiconductor manufacturing method, and passivation belonging to the protective film is formed to cover the surface of the internal circuit. The terminal portion of the internal circuit (usually formed of a low-resistance metal such as Sau) is formed in the passivation film to form an opening, and is formed as a pad for conducting to the outside. Perform the previous steps before the rewiring formation step. A step of forming an internal circuit on a semiconductor wafer, forming a pure germanium film and forming a terminal portion of the internal circuit, and forming a substrate of the first precursor by dicing. The wiring on the substrate is formed by wiring. It means that rewiring can be formed in the step of substituting the conductive film constituting the plurality of terminals, and there is no need for another formation step, and there are two. [Application Example 5] In the semiconductor device of the above application example, it is preferable that the wiring is integrally formed by the terminal of the wire. According to the above configuration, since (4) the guide line is formed, the door can be formed without increasing the component cost and the manufacturing cost: 320394 11 200926388 ^ It is often advantageous. [Application Example 6] In the semiconductor device according to the application example described above, it is preferable that the thickness of the wiring is larger than the thickness of the conductive film constituting the terminal, and the wiring is thinner than the terminal for bonding. Since the film thickness is thin, it is possible to use no conductive film constituting the wiring. Further, in the semiconductor device according to the application example described above, the wiring system is capable of connecting a plurality of terminals from a plurality of terminals formed along the same side of the substrate to a plurality of terminals. Further, the wiring system can have one or a plurality of terminals selected from a plurality of terminals formed along one side of the base material, and a plurality of terminals formed from the other sides along the base material. One or more of the selected terminals are connected. [Application Example 7] In the semiconductor mounting structure of this application example, a semiconductor device is mounted on the first substrate by an adhesive, and the semiconductor device is mounted. The semiconductor device is characterized in that the semiconductor device includes a substrate including an internal circuit: a tantalum resin protrusion is protruded from an active surface side of the substrate; and a plurality of terminals are provided on the resin protrusion An island-shaped conductive film comprising: a terminal electrically connected to the internal circuit; and a wiring disposed on the active surface side, wherein at least two of the plurality of terminals are connected, and the first substrate is included The second bonding terminal group of the plurality of bonding terminals is bonded to the plurality of terminals of the semiconductor device described above. According to the above configuration, at least two terminals of the plurality of terminals including the island-shaped conductive film provided on the active surface side of the semiconductor device are connected by the wiring provided on the active surface side. Therefore, by mounting the semiconductor package 320394 12 200926388 on the first substrate, at least two of the first connection and the connection of the sub-group of the first substrate can be connected to the semiconductor device. Electrically connected. In other words, the wiring for connecting the first bonding terminal group can be connected by the wiring provided on the active surface side of the semiconductor device, and it is not necessary to wire or fly over the wiring on the first substrate. As a result, the degree of freedom in designing the wiring pattern can be improved without complicating the wiring pattern on the first substrate. That is, the wiring state electrically connected to the second substrate of the semiconductor device can be simplified or diversified by planarly mounting the semiconductor device on the second substrate. [Application Example 8] In the semiconductor mounting structure of the application example, the wiring system electrically connects at least two non-adjacent terminals among the plurality of terminals. According to the above configuration, it is possible to eliminate the need to connect the wiring to the non-adjacent bonding terminal of the first bonding terminal group of the first substrate. The fly-by wiring is performed on the i-th substrate, but is connected via a semiconductor device. [Application Example 9] In the semiconductor mounting structure of the application example described above, the wiring system may connect the terminals that are not electrically connected to the internal circuit among the plurality of terminals. According to the above configuration, the wiring connects the terminals that are not electrically connected to the internal circuit among the plurality of terminals (that is, the dummy terminals are mutually connected). Therefore, it is sufficient to connect the wirings of the first substrate which are not required to be connected to the internal circuits of the semiconductor device by the dummy terminals provided in the semiconductor device and the wirings connecting the dummy terminals. [Application Example 10] In the semiconductor mounting structure of the application example described above, 320394 13 200926388 may be further provided, wherein the first substrate is electrically connected to the connection terminal group of the second bonding terminal group 2; and the second bonding terminal group According to the second configuration, the second substrate is connected to the first substrate via the second terminal group. Therefore, it is possible to connect by wiring provided on the active surface side of the semiconductor device without complicated wiring of the wiring provided on the second substrate. In other words, the wiring pattern of the second wiring can be simplified. One configuration is a configuration in which a first substrate belonging to another substrate is connected to a first substrate on which a semiconductor device is mounted. Further, the semiconductor device is configured such that the wiring on the first substrate and the wiring on the second substrate can be connected. According to this configuration, it is not necessary to implement complicated layout wiring or flying wiring on the U-plane, and the wiring on the second substrate can be made early and surely by the wiring on the substrate of the semiconductor device. In the semiconductor mounting structure of the application example, it is preferable that the first bonding terminal group of the first substrate is electrically connected to the plurality of terminals of the semiconductor device. The above-mentioned adhesive is a non-conductive film containing no conductive particles. According to the above configuration, since the plurality of terminals of the semiconductor device have the structure of the resin core bumps, even if the sword is in a state in which the conductive particles are not contained, the plurality of terminals can be stably joined to the second junction of the second substrate. . Further, after the flat wire to the first substrate, the wiring provided on the active surface side of the semiconductor device and the terminal other than the terminal to which the wiring is connected are not electrically short-circuited by the conductive particles. In other words, don't worry. Electrical short-circuiting with the other terminals mentioned above increases the reliability and improves the design freedom of the wiring on the active side. In the semiconductor mounting structure of the above application example, the first substrate may be an inflexible substrate made of glass, a flexible substrate made of plastic, or a flexible substrate. The inflexible substrate is a substrate in which it is difficult to adopt a wiring form of both sides. As long as the semiconductor device having the auxiliary wiring on the active surface side is mounted on such an inflexible substrate, the same wiring state as in the case of performing the double-sided wiring on the non-flexible substrate can be realized. Compared with the non-flexible substrate, the flexible substrate is easier to adopt a wiring pattern on both sides, and it is possible to perform wiring on both sides to realize cross wiring. However, since the two-sided wiring involves an increase in cost, it is a technique that is avoided as much as possible. As long as the semiconductor device having the auxiliary wiring on the active surface side is mounted on such a flexible substrate, the parent fork wiring for performing double-sided wiring on the flexible substrate is not used, and substantial ❹ crossing can be realized by the above wiring of the semiconductor device. Wiring (this is not limited to the case where the semiconductor device is directly mounted on the flexible substrate, and also includes the case where the semiconductor device is planarly mounted on the flexible substrate via the wiring provided on the non-flexible substrate. ). [Application Example 12] The photovoltaic device of the application example includes: a second substrate that supports the photoelectric substance; and a semiconductor device that is planarly mounted on the ith substrate for driving and controlling the photoelectric substance; and the semiconductor device is the above application An example of a semiconductor device. [Application Example 13] The other photovoltaic device of this application example is provided with: First Beauty 320394 15 200926388 . The board supports the photovoltaic material; and the semiconductor mounting structure is driven by the drive. The semiconductor device in which the photoelectric substance is formed is provided in a region other than the region of the photovoltaic material in the support of the first substrate, and the semiconductor mounting structure is a semiconductor device in the application example. According to the configuration of the above-described application examples, the wiring state of the wiring provided on the first substrate or the wiring of the other substrate mounted on the first substrate can be simplified or diversified. For example, it is possible to transmit other electrical number No. which is not directly related to the driving control of the photoelectric substance via the wiring ❹ on the i-th substrate and the semiconductor device. As the other electrical signal system, an electrical signal from a photosensor or a temperature sensor provided on the first substrate can be exemplified. That is, since it is necessary to reduce the formation of new wiring, it is possible to provide an optoelectronic device which is excellent in cost performance. [Embodiment] " (The first embodiment of a semiconductor device).  Hereinafter, a semiconductor device of the present embodiment will be described. Further, the present invention is of course not limited to the embodiment. In addition, in the following description, the drawing is referred to as needed, and in this drawing, the important constituent elements in the structure composed of a plurality of constituent elements are easily understood, and the size is different from the actual size. To show the situation of the feature. Fig. 1 is a schematic plan view showing the configuration of an IC wafer of the semiconductor package of the present embodiment, and Fig. 2 is a schematic plan view showing the configuration of the active surface of the 1C wafer. ^ When the 1C wafer is mounted on a substrate (not shown), the active surface side becomes the surface to be mounted. Among them, the J picture shows the connection 320394 16 200926388 • The state of the appearance shape of the actual ic wafer. Figure 2 is the system. The sub-structure is easy to understand and schematically shows the terminals enlarged. Therefore, the number of terminals in the figure is different from the number of terminals in the second. First, as shown in Fig. 1 and Fig. 2, 'the semiconductor system is a semiconductor wafer having a built-in internal circuit including a semiconductor element, and is formed of a semiconductor wafer formed of, for example, a single crystal. The =4 circuit 'and the surface of the internal circuit is covered with a protective film, and the dicing step is completed by a known semiconductor process. The inner $ has a _ crystal and is composed. The outer peripheral surface of the substrate; the passivation film 4 is covered. The entire surface of the kneading surface 3 is provided by a plurality of terminals 6a and 6b of a so-called 岛^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 6b is the output side +. Zhao + side input The input signal to the internal circuit is from the input side terminal = incoming. The output signal output from the internal circuit is transmitted to the outside through the output tuning switch 6b. The one-to-two wheel-in-side terminals 6& are arranged side by side along the long sides 1a of the ic wafers 1 facing each other 钤1a, lb. The two side terminals 6 are arranged along the other long side 1b across the two sections and are arranged in an easy-to-figure manner. In order to make the structure of the terminal 6a and the terminal 6b appear to be 2, the terminal 6&, 6b The number of entries is less than the actual number and the interval between the sub-intervals is not expanded. 320394 17 200926388 * The rainbow output side 6b is shown in the enlarged view (a) of the 1st part, and has: 艮大口P 7b ' is attached to the active surface 3 side of the substrate 2; The conductive film is disposed on the resin protrusion 7b. The resin protrusion is a protrusion of an elongated shape along the other long side lb, and the resin protrusion 7b of the side end +6b is the elongated resin. The equivalent ring St of each protrusion: the resin protrusion is made of, for example, acrylic resin or 质平平, "I polyoxyl resin, phenol resin, polyimine resin, polyfluorene oxide = imine resin, etc. And formed on the passivation film 4. The resin protrusion = formed into a semi-circular shape or a partial circular shape and has an elongated shape extending from the core piece or the portion 8 or a flat elliptical shape, or a semi-elliptical shape. The thin dome shape in which the long side lb of the 1C wafer 1 extends in parallel: = the second system is formed into a long fish plate shape (that is, the long conductive film 8b_ is sufficient (4) using m (titanium crane), Au (gold), cu , Λ = = = Τ 、, W, Μ, lead-free solder and other metal single layer or 8 2 =. If the perspective of the three-dimensional, the conductive film of the three-dimensional opening 1) In the case of the outer shape of the resin projecting portion 7b, the conductive film 8b has a rectangular shape as shown in Fig. 2, which is a rectangular shape. A portion of the end portion of 8b is collapsed/shown in a state in which the portion of the purification membrane 4 is provided with a chemical film of 4 h·· and the material of the conductive film (9) is filmed to be blunt 'attached to the portion of the port 9 The material of the conductive film surrounds the shape of the ". At the opening 9 of the purified film 4, 320394 18 200926388 is placed. The terminal of the internal circuit in the substrate 2 (i.e., a pad, such as a pad formed of aluminum or the like). The pads are, for example, connected to respective external connection terminals of the gate, the source, and the drain of the M〇s transistor. Therefore, each of the conductive films is electrically connected to the internal circuit via the opening 9 and the opening 9. That is, the portion provided with the conductive film is used as a resin. The core bumps function. When an aluminum pad is used, it is preferable to provide a Tiw film as a base layer (seed layer). Thereby, it is possible to suppress the voids 1(1) generated by the mutual diffusion of the aluminum pads and the conductive film ❹y laminated on the pads, for example, Au (gold). That is, the film combines the adhesion and barrier properties between aluminum and gold. When the type of the component of the component is considered right, the input side terminal is formed of the same constituent elements as the output side terminal 6b. That is, the input side 6a has a resin protrusion and a conductive film 8& as shown in Fig. 2 . The tree knows big. The crucible 7a is made of the same material as the resin projection % in the wheel-side terminal 6b and has a substantially ancestor shape. However, since the number of terminals necessary is not the relationship of p, the length of the resin projection 7a provided along one long side la of the Ic wafer j is different from that of the resin projection on the output side. Further, the width of the conductive film 8a is wider than that of the conductive film on the output side, and the number of the conductive films 8a along one long side la of the ic wafer is smaller than that of the conductive film 8b on the output side. Among the plurality of input side terminals 6a, the second wheel-in terminal 6a counted from the left end of the second figure and the fourth input side terminal 6a counted from the left end are provided as the substrate 2 The rewiring U of the wiring on the active surface 3 side is connected to be electrically connected to each other. The second and fourth input side terminals 6a are not provided with an opening 9 in the passivation film 4, and are not provided with a connection internal circuit 320394 19 200926388 :::: that is, 'No. 2, No. 4 input side terminal 6' The internal circuit and the internal circuit are also formed as so-called dummy terminals. In addition, depending on the situation, the (4) material terminal (4) is the same as the (4) circuit conduction = line η when the conductive film and the conductive film are formed. Therefore, the 'rewiring 11 is formed by fighting the conductive films 8a and 8b. As described above, it can be used as a metal, n, N, N, P, M, Ti, W, Ni, and metal. The early layer or the structure in which a plurality of such metals are stacked. The fourth (4) refers to a wiring which is formed by forming an internal circuit by a known semiconductor manufacturing method === and forming the purification film 4. The processing is called pre-processing. In this case, after the pre-treatment is completed, the shape is continuously set across the second coffee bar 8b. On the other hand, the island-shaped resin projections 7a and 7b of the length of the eye damage can be arranged on the electric film 8 Sh. The method is formed on the active surface 3 side of the substrate 2, and the conductive film is formed separately in the trees The protrusions 7a and _, and the different types of the terminals 6a and 6b are described with reference to FIGS. 3 to 6 . In the drawings, the right 2 is a plan view. The picture on the left is a plan view along the plan view. The 12° pre-twisted disk is difficult to form 320394 20 200926388 parts of the internal circuit. The symbol is the subsequent round body. The pad 13' of the 3 terminal is formed with a passivation film 4. An opening 9 is formed in a region where the bamboo is transmitted through the opening 13, and the interface 13 is exposed to the outside through the opening 9. 歹ί is a pad 13 The method of forming the film can be exemplified by the following method: a method of patterning the film of the (4) film of the active surface 3 by photo-etching Ο. The method of forming the film 4 can be exemplified. As follows: After covering the region of the interface 13 corresponding to the opening 9 with a resist (reS1St) film, the film is covered with a film of =0 (cerium dioxide), SiN (nitrided stone), and polyamidide wax. Active surface 3. Then peel off the above resist film. Group j ' as shown in Figure 3 (5) 'for example A photosensitive material (for example, an epoxy resin) of a raw material belonging to the 曰月曰4 7a, 7b (refer to Fig. 2) is applied to the active surface 3 side by a predetermined thickness by a spin coating method. The photosensitive resin epoxy resin is subjected to exposure and development to form a pattern = a thin tree skeleton σρ 7 having a rectangular cross section of the original shape of the resin projections 7a and 7b. The temperature of the heat is applied to the resin to harden it, and the corners thereof are formed into rounded corners, and the resin projections 7a, 7b are formed as shown in Fig. 3(c). Next, as shown in FIG. 4(d), the first layer 14' as a base layer made of, for example, T1W is formed on the entire surface of the wafer (on the active surface 3 side) by a sputtering method or the like with a predetermined thickness. Further, on the first layer 14', the second layer 15 made of, for example, Au is formed by a bismuth or plating method or the like to form 320394 21 200926388 'on the entire surface of the wafer with a predetermined thickness.坌7 a ^ , , the pad 13 is in surface contact. The β 4 is applied to the opening 9 of the passivation film 4 and then, as shown in Fig. 4, the same thickness is applied to the crystal 2: the resistance of the sword material 17 is in the shape of the face (specifically, the gentleman* 'Shoulder image forms a predetermined flat resist pattern 17. The same planar shape as the electro-optical films 8a, 8b) ο is performed as a mask (called the second layer 15, layer! 5. At this time, as the sixth The rewiring of the 24th terminal 6a of the predetermined shape shown in Fig. 1 (1) indicates that the second layer 15 of the second wiring 15 is formed by simultaneous pattern forming. The liquid leakage resistance of the (4) is shown in the case. The agent engraved the liquid engraving pair, performing _ 乍f hand hood to pre-form 盥筮 9 s, etch etching, and as shown in Figure 5 (h), s 5 is the same plane shape · the first layer 14 ^ # 6 (b) thousand gates ^ 4 at this time 'as described in the process, in Figure 2: shape 2 rewiring 11 of the first layer 14. By the upper conductive film 8a, 8b active surface A plurality of terminals 仏, 6b are formed on the plurality of islands, and a plurality of terminals 6, 6b, and the terminal 4a are formed integrally with the rewiring 11. The film thickness of the first layer 14 which is considered to be elastic deformation of the resin g bump and the reliability 1 of the connection is preferably from 3 to 1 〇〇 nm, and the film thickness of the jth layer of h is preferably 2 〇〇 〇〇 To 2〇〇〇nm. Further, the rewiring U = the thickness of the second layer 15 may be the same as the terminal 6 Μ _. Since it is only necessary to secure the wiring resistance that the cavity!1 connection can be realized, it can be formed, for example, thinly. Thereby, the waste of Au can be prevented. 320394 22 200926388 The IC chip i produced as described above has a plurality of terminals 6 & b, which functions as a resin core bump on the active surface 3; and a rewiring 11 which is among a plurality of terminals 6a The 2nd and 4th terminals (stupid terminals) 6a are connected. When the IC chip i is planarly mounted to the substrate, it is sufficient to use the ic chip set! The terminal 6a and the rewiring line 11 of the connection terminal 6a electrically connect the wiring on the substrate. Next, the method of anchoring the wafer shown in FIGS. 1 and 2 will be described. The 1C wafer 1 is mounted on a surface of a glass hard substrate or a plastic rigid substrate: a flexible FPC board. When mounting, as shown in Fig. 7, a non-conductive film (NCF) containing no conductive particles is placed between the active surface 3 side and the substrate 18 as an adhesive, and then the IC wafer is transferred to the substrate 18. Therefore, as shown in Fig. 7 (8), the terminal % 基板 on the substrate 18 side is in direct contact with the terminals 6a and 6b on the ic chip ! side, and if the push is continued, the resin projections 7a and 7b correspond to each other. The pressure is elastically deformed to become a flat state. By the elastic deformation of the resin projections 7a and 7b, the contact area of each of the terminals 2 of the conductive film 8 and the ribs is increased, and the conductive film is collapsed. The pressing force of 8b and the terminal 2〇 are pressed to each other sufficiently, and as a result, a stable conductive contact is obtained between the conductive films 8a and 8b and the terminal 20. The conductive contact state is on the 1C wafer 1 side. Realizing between all the terminals 6a, 6b and all the terminals 2 on the side of the substrate 18, thereby enabling High reliability ^ Mounting the IC chip 1 to the substrate 18. Further, an anisotropic conductive film (ACF) can be used as an adhesive to transfer the crystal to the substrate 18. At this time, the terminal 6a on the ic wafer 1 side, this is 320394 23 200926388 The material 2G on the substrate 18 side is electrically connected by the conductive particles contained in the film of the anisotropic film in a dispersed state. In the case of the conductive connection structure, the plane arrangement interval of the right terminal 20 is narrowed. 'There will be a short circuit between the adjacent terminals 2 and the galvanic particles. The rewiring 11 on the side of the slabs and the terminal 20 on the side of the substrate 18, or the re-matching, the line u and the The terminal 6a connected to the rewiring 11 (for example, the terminal No. 3 (8) shown in Fig. 2 is short-circuited by the conductive particles. / This is the case in this embodiment, since the material-based film (NCF) is used. Since the terminals 6a and 6b on the 1C wafer 1 side are in direct contact with the terminals 2 on the substrate 18 side to obtain a structure of electrically conductive connection, there is no need to worry about short-circuit defects between adjacent terminals. Therefore, the interval between the terminals on the substrate 18 can be reduced. And a high-definition wiring pattern is arranged. The 1C wafer 1 is mounted on a surface of a glass hard substrate, a plastic hard substrate, a flexible 彳% substrate, etc. In the following description, the substrate of the lacquer 1C wafer 1 is referred to as a mounting substrate. Any of the glass substrate, the plastic substrate, and the FPC substrate. In this case, the input side terminal 6a and the output side terminal 6b of the 1C wafer 1 are electrically connected to the wiring on the mounting substrate. In Fig. 2, The input side terminals 6a are sequentially labeled as 1, 2, 3, 4, and 5 from the left. The rewiring 11 is to connect the No. 2 terminal to the No. 4 terminal. Any of the terminals from No. 1 to No. 5 is electrically conductive. Wiring connected to the mounting substrate. Now, it is assumed that a 1C chip player using a conventional technique in which rewiring 11 is not provided is used. As described above, in the mounting surface of the mounting substrate, the portion facing the active surface 3 in the region inside the terminals 6a and 6b of the IC wafer 1 is also 320394 24 200926388', or the wiring cannot be disposed. In some cases, the wiring of the wiring on the mounting substrate that is not adjacent to the No. 2 terminal and the wiring that is connected to the No. 4 terminal are installed in the form of one-sided wiring with one mounting substrate. It is impossible to connect the substrates to each other. At least one reason is that there is a wiring for connecting the terminal No. 3 between the wiring connecting the terminal No. 2 and the wiring connecting the terminal No. 4, and the wiring (that is, the cross wiring) crossing the wiring is only one layer. Single-sided wiring cannot be formed by the formation of a graph. To achieve cross wiring, the mounting board must be in the form of, for example, two-sided wiring, and a cross wiring should be formed on the back side of the main wiring. However, the form of the two-sided wiring involves a significant increase in cost and is not consistent. The same applies to the case where the mounting substrate is formed by a single-sided multilayer wiring. On the other hand, in the present embodiment, the Ic chip is connected to the non-adjacent No. 2 terminal and the No. 4 terminal by rewiring, so when the IC chip j is mounted on the mounting substrate, the mounting substrate is mounted on the substrate. The wiring connected to the No. 2 terminal and the wiring connected to the No. 4 terminal are turned on by the rewiring u*. As a result, the terminal wiring No. 2 and the terminal wiring No. 4 on the mounting substrate were substantially crossed by the rewiring 11 on the ic wafer i, although no cross wiring was performed on the Onon board. . (4) It is possible to realize a substantial cross-wiring of the mounting substrate directly in the form of a single-sided wiring of the i-layer without using the double-sided wiring or the multi-layered single-sided wiring of the mounting substrate, that is, to maintain the lower mounting substrate as it is. Manufacturing costs, but greatly increase the freedom of wiring design' can make a significant contribution to the refinement of circuit design. (Second Embodiment of Semiconductor Device) 320394 25 200926388 ' Fig. 8 is a plan view showing a semiconductor device according to another embodiment. The principal surface 23 of the 1C wafer 21 as a semiconductor device is shown flat in Fig. 8. The entirety of the active surface 23 is covered by a passivation crucible 24. The passivation film 24 is provided with a plurality of input side terminals 26a and a plurality of output side terminals 26b. The input side terminal 26a is arranged in a straight line along a long side (long side in the drawing) 2la of a pair of long sides of the 1C wafer 21 facing each other. The output side terminal 26b is arranged side by side along the other long side (long side in the drawing) 21b across two stages, and is arranged side by side along a pair of short sides 21c, 21d of the IC wafer 21 opposite to each other. Set to a straight line. Each of the input side terminals 26a is constituted by each terminal portion of the elongated resin projection 27a and an island-shaped conductive film 28a. Each of the output side terminals 26b is composed of a respective terminal portion of the elongated resin projection 27b and an island-shaped conductive film 28b. The configuration of each of the resin projections 27a and 27b is the same as that of the resin projections 7a and 7b shown in Figs. 2 and 2, and therefore the description thereof will be omitted. Further, since the configurations of the respective conductive films 28a and 28b are the same as those of the conductive films 8a and 8v shown in Figs. 1 and 2, the description thereof will be omitted. Rewiring 31 is formed in the region of the passivation film 24 of the active surface 23 and surrounded by a plurality of terminals 26a and 26b. The content of the rewiring 31 formed on the active surface 23 side is the same as the content in which the rewiring 11 is provided on the active surface side 3 in the embodiment in the front side shown in Fig. 2 . The method of forming the rewiring 31 in Fig. 8 is the same as the method of forming the rewiring u in Fig. 2. In the first embodiment, the input side terminals 6a are connected to each other by the rewiring 11, and in the embodiment shown in Fig. 8, the input side of the fifth number is replaced by the wiring 31394 26 200926388 - the wiring 31. The outputs of terminals (10) and (4) are connected. In addition, the input side terminal ^ side terminal (10) of No. 8 is connected. In the present embodiment, these are formed as dummy terminals that are not connected to the internal circuit. In other cases, the terminals can be formed to pass through the _ terminal according to the embodiment. The stickers can be ~ s super # You have a non-conductive film (NCF) of the shape of the women's clothing to the mounting substrate of the matching side of the substrate. At this time, the main body of the K-chip 21 and the body of the Onon substrate are sturdy. Next, the 1C-day film "Non-conductive film (NCF) and the terminals of the mounting substrate are suitable (4) Contact with force directly to achieve electrical conduction: the situation is also the same as in the first embodiment shown in Fig. 1; shape = compared with the case of using an anisotropic conductive film (ACF), can prevent adjacent & When the IC chip 21 of the present embodiment is mounted on the mounting substrate, the input side terminal 26a and the output side terminal of the Ic chip 2i are connected to the wire substrate 〇. The wiring is electrically connected. In Fig. 8, the input side terminal 26a is sequentially labeled from the left side of the figure to 12', and the output side terminal 26b along the left side of the left side 21c is sequentially labeled from the lower side of the figure. 13 to 18. Similarly, the wheel-side terminals along the right short side 21d are sequentially labeled 19 to 24 from the lower side of the figure. The rewiring 31 on the left side of the figure is the output terminal 5 of the input side. Terminal 14 on the side is connected. The rewiring 3 on the right side of the figure connects the No. 8 terminal on the input side to the No. 2 terminal on the output side. Any of the terminals from the 丄 terminal to the 24th terminal are electrically connected to the wiring on the mounting substrate. 320394 27 200926388 Now it is assumed that a conventional technique without rewiring 31 is used. 1C chip, then when on the 1C chip! When the portion of the inner side of the terminals 6a, 6b is disposed with the wiring of the active/23, or when the distribution line cannot be disposed to the portion, the single-sided wiring is only the mounting substrate. In this way, it is impossible to connect the wiring connected to the input side No. 5 terminal (hereinafter referred to as the No. 5 terminal wiring) and the wiring connected to the output side No. 14 terminal (hereinafter referred to as the No. 14 terminal wiring) on the mounting substrate. . At least one reason is that between the No. 5 terminal wiring on the input side and the No. 14 terminal wiring on the output side, there are an input side terminal wiring of No. 1 to No. 4 and an output side No. 13 terminal wiring, and the terminal wiring is cross-cut. The wiring (that is, the cross wiring) is formed by patterning if only one layer of single-sided wiring is formed. In order to realize the wiring of the parent fork, it is necessary to form the mounting substrate with, for example, a double-sided wiring, and to form a cross wiring on the back surface of the main wiring. However, the shape of the two-sided wiring involves an increase in cost, which is not practical. In the present embodiment, in the Ic wafer 21, the input side 5th terminal and the output side 14th terminal are connected by the rewiring 31. Therefore, when the 1C wafer 21 is mounted on the mounting substrate, the mounting substrate is mounted. The upper input side, the 5th terminal wiring, and the output side 14th terminal wiring are guided by the rewiring %. As a result, the No. 5 terminal wiring and the No. 14 terminal wiring on the mounting substrate were not crossed and wired on the women's substrate, but the rewiring 31 on the 1C wafer 31 was substantially cross-wired. The same applies to the case where the wiring No. 8 connected to the rewiring 31 on the right side in Fig. 8 is connected to the wiring of the No. 2 terminal. In other words, it is possible to use the two-sided wiring or the multi-layer single-sided wiring without the mounting substrate. The shape of the single-sided wiring of the layer 28 320394 200926388 'state realizes the substantial cross wiring of the mounting substrate, that is, the degree of freedom in the design of the wiring can be greatly improved by maintaining the manufacturing cost of the lower women's substrate, and the circuit design can be designed. Refinement brings a large degree of contribution. (First Embodiment of Semiconductor Mounting Structure) Next, a semiconductor mounting structure of the present embodiment will be described. The semiconductor mounting structure is a structure in which a semiconductor device is mounted on a substrate by an adhesive. Fig. 9 is an exploded perspective view showing the semiconductor mounting structure. As shown in FIG. 9, the semiconductor mounting structure of the present embodiment is such that the IC wafer 41 belonging to the semiconductor device is mounted on the first substrate 42 by the non-conductive film (NCF) 19, and the second substrate 43 is connected to the first substrate 43. An example of the ruthenium substrate 42. . The first substrate 42 and the second substrate 43 are connected by, for example, an asymmetrical conductive crucible (ACF). The 1C wafer 41 is the same as the ΪC wafer 1 shown in Figs. 1 and 2 . . .  The first substrate 42 is a non-flexible rigid substrate made of glass or plastic. The second substrate 43 is a thin flexible Fpc substrate. On the second substrate, a plurality of input side wirings 4 4 and output side wirings 4 respectively serving as 帛i wirings are respectively formed by photolithography. The front end portions of the wirings 4 4 and 45 are formed as joint terminals that are connected to other wirings. On the second substrate 43, a plurality of wirings 46 as second wirings are formed by photolithography. In other words, the joint terminal group shirt of the input side wiring 44 of the first board 42 joined to the plurality of terminals of the IC chip 41 and the joint terminal group 45a of the output side wiring 45 constitute the second joint terminal group. The other bonding terminal group 4413 of the input side wiring 44 joined to the plurality of wirings 46 of the second substrate 320394 29 200926388 -43 constitutes the second bonding terminal group 0 connected to the first bonding terminal group. Figure 9 is a plan view of the semiconductor mounting structure seen in the direction of arrow B. Specifically, the state seen from the back side of the j-th substrate 42 is specifically shown, and the terminals of the Ic wafer 41, the wirings 44 and 45 on the i-th substrate 42 (first wiring), and the second substrate 43 are displayed. The connection state of the wiring 46 (second wiring). Further, a plurality of wirings (not shown) are formed on the i-th substrate 42 facing the active surface 3 in the terminal 6& of the IC chip i and the region 〇 inside the rib. As shown in Fig. 1, the bonding terminal group 45a of the output side wiring 45 on the i-th substrate 42 is connected to the output side terminal 6b of the IC chip 41. One of the connection terminal groups 44a of the input side wirings 44 on the first substrate 42 is connected to the input side terminals 6& of the IC wafer 41. And, the end of the terminal 46 on the second substrate 43. The child is connected to the first! The other connection terminal group 4 of the input side wiring 44 on the substrate stack is provided. Here, the wheel-in terminal 6a of the 1C wafer 41 is sequentially labeled L, 2, 3, 4, 5, ... from the left side of the figure. In addition, the wiring 46 on the second substrate is sequentially labeled as 2, 3, 4, 5, from the left side of the figure. . . . The rewiring 11 formed on the active surface 3 side of the 1C wafer 41 connects the non-adjacent No. 2 terminals of the IC wafer 41 to the No. 4 terminals, and turns on the terminals. In the present embodiment, the two terminals are formed as dummy terminals that are not connected to the internal circuit. The conventional circuit configuration of the second substrate 43 is as shown in Fig. u, and the wiring No. 2 and the wiring No. 4 provided next to the No. 3 wiring are formed as a dedicated signal transmission line. When it is necessary to connect the No. 2 wiring and the No. 4 wiring 320394 30 200926388 'On time' In the conventional technology, there is a 3 between the No. 2 wiring and the No. 4 number. The wiring of the number and the region facing the active surface 3 in the region on the inner side of the terminals 6a and 6d of the 1C wafer 41 also have other wirings. Therefore, it is impossible to connect them by one-layer single-sided wiring, and it is necessary to, for example, Double-sided wiring to make the connection. Specifically, it is necessary to form a cross wiring on the back surface opposite to the main surface on which the wiring 46 is formed, and to connect the No. 2 wiring and the No. 4 wiring by the cross wiring. Such double-sided wiring will increase the cost and is not practical.相对 In contrast, in the present embodiment, as in the first! As shown in the figure, the No. 2 wiring and the No. 4 wiring on the second substrate 43 are connected to the No. 2 terminal and the No. 4 terminal of the Ic wafer 41, respectively, and are connected to the active surface 3 of the IC wafer 41 by the rewiring 31. These 2nd and 4th terminals. As a result, even if the second substrate 43 is maintained in the form of one-layer single-sided wiring, the second wiring and the fourth wiring can be substantially cross-wired using the re-wiring line 11. In this way, it is possible to improve the design freedom of the wiring design of the second substrate 43 without causing an increase in cost. Further, since the 1C wafer 41 and the first substrate 42 are connected by the NCF 19, the plurality of terminals 6a and 6b and the second terminal group are joined so that short-circuit defects do not occur between the terminals. (Second Embodiment of Semiconductor Mounting Structure) Fig. 12 is a plan view showing another embodiment of the semiconductor mounting structure. In the present embodiment, as shown in FIG. 9, the semiconductor device 41 is attached to the i-th substrate 42 by the non-conductive film (NCF) 19, and the second substrate 43 is connected to the first substrate 42. example. The i-th substrate 320394 31 200926388 The board 42 and the second board 43 are connected by, for example, an anisotropic conductive film (ACF). The 1C wafer 41 is used as the κ wafer shown in Fig. 8. The same. In the j-th substrate 42 which is a non-flexible hard substrate made of glass or plastic, a plurality of input side wirings 44 and output side wirings 45 which are respectively the first wirings are formed by photolithography. The front end portions of the respective wirings 44, 45 are formed as joint terminals that are connected to other wirings. In the region on the inner side of the terminals 26a and 26b of the 1C wafer 21, a plurality of wirings (not shown) are formed on the first substrate 42 facing the main surface 23. On the second substrate 43 belonging to the flexible FPC board, a plurality of wirings 46 as second wirings are formed by photo-etching. The bonding terminal group 45a of the output side wiring 45 on the first substrate 42 is connected to the wheel-out terminal 26b of the IC wafer 41. One of the bonding terminal groups 44a of the wheel-side wiring 44 on the first substrate 42 is connected to the input-side terminal 26a of the κ wafer. And, the terminal 46 on the second substrate 43. The terminal is connected to the other matching terminal group 44b of the input side wiring 44 on the first substrate 42. Here, the input side terminals 26a of the Ic wafer 41 are sequentially labeled 1, 2, 3, 4, 5, and 6 from the left side of the figure. Further, the wiring 45 extending from the short side of the left side of if 曰 y μ ν 1 to 曰曰 41 in the wiring 45 on the first substrate 42 is sequentially labeled as 7 and 8 from the side of the figure. , 9, 1 〇, 11 12 The rewiring 31 formed on the active surface 23 of the 1C wafer 41 connects the No. 5 terminal on the input side of the Ic wafer 41 to the output side terminal of the No. 8 terminal connected to the i-th substrate 42 to connect the terminals. Turn on. In the present embodiment, the two terminals are formed as dummy terminals that are not connected to the internal circuit. ' 320394 32 200926388 .  When the first substrate 42 is a hard base plate formed of glass or the like, it is difficult to form a double-sided wiring on the first substrate 42, and a single-layer wiring of one layer is usually used. In this case, when the horn 5 on the input side of the IC wafer 41 is to be connected to the No. 8 wiring on the first substrate 42, the above-described wiring cannot be formed in the prior art. The reason for this is that the wiring 44 and the wiring No. 7 connected to the input terminal 26a of the j to 4 are present between the No. 5 terminal and the No. 8 terminal on the first substrate 42 and the terminal of the IC chip 41. In the inner region of the 26a and 26b, the region facing the active surface 23 also has other wirings. Therefore, the terminal No. 5 and the terminal No. 8 cannot be connected by the cross wiring. On the other hand, in the present embodiment, as shown in FIG. 12, the terminal 5 on the input side of the ic wafer 41 and the terminal 26b connected to the wiring on the second substrate 42 are formed on the IC chip 41. The rewiring 31 on the active (four) is connected to be electrically connected to each other. As a result, even in the form of the one-sided wiring of the i-th substrate (four), the Ic wafer 41 can be attached to the first substrate 42 and the re-wiring 31 can be used to connect the No. 8 wiring and the No. 5 terminal. . Such a can be improved without causing an increase in cost. The degree of freedom in designing the wiring design of the substrate 42. The NCF 19 is bonded to the terminal group. Further, since the 1C wafer 41 and the i-th substrate 42 are connected, the plurality of terminals 26a and 26b and the i-th terminal are bonded without causing a short-circuit defect between the terminals. (First Embodiment of Photoelectric Device) The device will be described. Exploded oblique view of the 13th. In the photo-electrical system of the present embodiment, the liquid crystal device of the present embodiment is shown as a liquid crystal device. The liquid crystal device 15 of the photovoltaic device of the present embodiment is provided with a liquid crystal panel 52. The photoelectric panel; the driving IC 53 is a semiconductor device mounted on the liquid crystal panel 52 by a non-conductive paste (the NCFM 9 and the FPC substrate 54 is connected to the liquid crystal panel by an anisotropic conductive film (acf) 55). The second substrate of 52. The liquid crystal panel 52 has the second substrate 56 and the third substrate 57 opposed to each other. The i-th polarizing plate 58a is attached to the outer surface of the first substrate 56. The third substrate 57 is bonded to the third substrate 57. The second polarizing plate 58b is attached to the outer surface. The polarizing plates selectively pass the polarized light through the optical element, and the polarizing transmission axis of the second polarizing plate 58a and the polarizing transmission axis of the second polarizing plate 58b are appropriately adapted. The angles of the first substrate 56 and the third substrate 57 are bonded to each other by a sealing material (not shown) in the peripheral region, and for example, about 5 #m is formed between the substrates. Gap (so-called cel i gap) A liquid crystal layer is formed by encapsulating a liquid crystal as a photoelectric substance in the crystal cell gap. The first substrate 56 and the third substrate 57 are each an inflexible hard substrate formed of a translucent glass or a translucent plastic crucible. The cymbal substrate 56 has a protruding portion (terminal portion) that protrudes to the outside of the third substrate 57, and the driving IC 53 is worn on the protruding portion (terminal portion). In the present embodiment, the driving is performed by [[ The non-conductive film (NCF) 19 and the first substrate 56 constitute a semiconductor mounting structure. The liquid crystal panel 52 is driven by an arbitrary liquid crystal driving method, for example, a simple matrix method or an active matrix. In addition, the operation mode of the liquid crystal panel 52 can select any mode 'for example, 'TNCTwisted Nematic: twisted nematic), STN (Super 320394 34 200926388)

Twisted Nematic: super-twisted nematic), VA (Vertical Aligned. Nematic: vertical alignment nematic), ECB (electrically C〇ntr〇iied Birefringence), Ips (In_piane (7) derivative ratio): bogey: Various modes such as control) and FFS (Fringe Field Switching), and the liquid crystal panel 52 can adopt any lighting method such as a reflection type, a penetration type, or a semi-transmissive reflection type. A part of the pixel is used as the reflection area, and the other two parts are used as the penetration area, thereby selectively adopting the reflection type and the penetration type as needed. When forming a transmissive or transflective liquid crystal panel When the illumination device (not shown) is attached to the liquid crystal panel 52, the early pure matrix method does not have an active element for each pixel, and the intersection of the scan electrode and the data electrode corresponds to a pixel or a point ((4), and is directly applied. The method of driving No. 4. As the operation modes suitable for using this method, there are TN, STN, VA, ECB, etc. The active matrix method is to set the main at each pixel or point. In the device, the active voltage is written in the ON state and the data voltage is written in the write-in (JN) state. In other periods, the active device is turned off (OFF) and the voltage is maintained. The active device used in this mode. There are 3 terminal type and 2 terminal type.

Transistor · · Thin film transistor). 2-terminal type _ ) ° 2-terminal type active element

The three-terminal type active element is a liquid crystal panel of a liquid crystal matrix of an active matrix type such as τπ (ΤΜη Fum Lifan旰<switching element).

320394 35 200926388 - extending in a direction orthogonal to the longitudinal direction of the protruding portion of the first substrate 56. The plurality of linear scanning lines 6 and the data line 6 are orthogonal to the data line 60 and the scanning line 61. The state of the insulation layer is set to -. On the substrate 56. On the protruding portion of the first substrate 56, the wiring 44 on the input side and the wiring 45 on the wheel side are formed by light processing. The central area of the wiring 45 is connected to the data line 6A. The left and right end regions of the wiring 45 are connected to the scanning line 61. — ', m element is placed near the intersection of data line 6G and scan line 61. The data line 6 is connected to a source such as a TFT element: 61 is connected to the idle electrode of the TFT element. In a small area surrounded by the data line, a dot-shaped (ie, island-shaped) pixel electrode is formed by a light-transmissive metal oxide film such as IT0 (Indium Tin), IZ〇UndiUmZinc0xide: yttrium zinc oxide. . The pixel electrode is connected to the source of the TFT τ. A common electrode belonging to the planar electrode is provided on the liquid crystal side surface of the third substrate 57 facing the i-th substrate. When the liquid crystal panel 52 is viewed in a meandering plane, a plurality of minute regions in which the dot-shaped pixel electrode and the planar germanium electrode are overlapped are formed in a dot matrix. These tiny regions form areas of the pixel. The FPC board 54 belonging to the second substrate is formed with circuit components and wiring in a state of being mounted on one side. Specifically, a plurality of wires 46 are formed on one side of the back side shown in the figure, and are mounted on the same back side (not shown). As circuit components, resistors, electric = zero coil, ic, etc. are used. The wiring 44 on the input side of the i-th substrate 56 is electrically connected to the wiring 46 on the side of the Fpc substrate 320394 36 200926388 5 4 when the Fpc substrate 54 is connected to the side end of the first substrate 56. The driving IC 53 of the present embodiment is formed of the 1C wafer 1 shown in Figs. 1 and 2 . In addition, the connection state of the wiring in the semiconductor mounting structure including the driving IC 53, the non-conductive film 19, and the first substrate 56 is in the state shown in Fig. 10. In the first diagram, the symbols indicated by parentheses indicate the corresponding parts in Fig. 13. As shown in the first diagram, the No. 2 wiring and the No. 4 wiring on the FPC board 54 are respectively connected to the No. 2 terminal and the No. 4 terminal of the driving 1C 53 and are on the main raking surface 3 of the driving ic 53. The terminals No. 2 and No. 4 are connected by rewiring π. As a result, even if the FPC board 54 is in the form of a single-sided wiring of one layer, the rewiring 11 can be used to substantially cross the wiring of the No. 2 wiring and the No. 4 terminal. Thus, the degree of freedom in designing the wiring design of the FpC substrate can be improved without causing an increase in cost. Further, in the present embodiment, the second terminal and the fourth terminal on the input side of the driving 1C 53 are connected by the rewiring n, but the terminal connected by the rewiring 11 is not limited to two. Terminal and terminal No. 4. Further, the number of terminals connected by the rewiring u may be three or more as necessary. Further, the driving ic 53 may be formed by the IC wafer 21 shown in FIG. That is, the input side terminal 6a and the output side terminal 亦可 can be connected by rewiring 31 as necessary. For example, when a portion of the first substrate 56 of the liquid crystal panel is provided with a circuit configuration for driving the liquid crystal layer, and a detection circuit such as a photo sensor or a temperature sensor is provided, the detection circuit is used as Wiring 46 of the second substrate 54 belonging to the relay substrate 320394 37 200926388 A method of connecting the input side terminal 6a and the output side terminal -6b and the rewiring 31 connected thereto can be used. • In general, it is effective to provide rewiring n and 31 on the active surface side in such a way that terminals that are not adjacent (not aligned) are connected. Further, the photoelectric device of the semiconductor mounting structure of the present embodiment can be applied, and the device is not limited to the liquid crystal device 5, and can be applied to, for example, an organic germanium (Electro Luminescence) device, an inorganic germanium device, or a plasma display device (PDP: Plasma Display), electrophoretic display (U.S. Electro Electrotic Display) 'Field emission display (fed:

EmissionDisplay). By adopting the semiconductor mounting structure, it is possible to provide a photovoltaic device which is simpler and cheaper. The photovoltaic device of the present embodiment can be used as a constituent element of various electronic devices. Preferably, it is possible to use a display device for an image as an electronic device. As such an electronic player, there are, for example, a mobile phone, a personal digital assistant (PAD: Personal Digitai Assistant), a personal computer LCD TV, a view finder type, or a direct view type camera or car. Navigation device, pager, electronic notebook, computer, text, processor, workstation, video telephone device, m terminal, digital ^ e-book, etc. Figure i4 shows an oblique view of a mobile phone as an electronic device. As shown in Fig. 14, the mobile phone 11 as an electronic device has a main body 111, and the body portion 112 is displayed so that _ can be performed with respect to the main body portion lu. A display device up and a receiver 320394 38 200926388 4 are provided on the display body 112. Various display systems associated with the practice communication are displayed on the display surface 115 of the display device. The control unit for controlling the operation of the display device 113 is a part of the control unit that controls the overall control of the mobile phone, or is housed inside the main body unit U1 or the display body separately from the control unit. An operation key 116 and an utterance unit are provided in the main body unit 111. Ο The display device 113 is configured using, for example, the liquid crystal device 51 shown in Fig. 13 . According to the liquid crystal device 5, the rewiring 11' is formed on the substrate of the driving IC 53, and the plurality of terminals of the driving lc 53 are connected by the rewiring n. Therefore, even in the vicinity of the driving cymbal When the substrates 54 and 56 are formed in a single-sided wiring pattern of the i-layer, the degree of freedom in designing the wiring pattern can be maintained at a high level, and thus a complicated circuit configuration can be manufactured at low cost. Therefore, the mobile phone 110 using the liquid crystal device 51 achieves an excellent function by a complicated circuit configuration, but is still highly cost-effective. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic perspective view showing a 1C wafer as a semiconductor device. Fig. 2 is a schematic plan view showing the configuration of an active surface of a 1C wafer. Fig. 3 (a) to (c) are schematic views showing a method of forming a terminal. 4(d) to (f) are schematic views showing a method of forming a terminal. Fig. 5 (g) and (h) are schematic views showing a method of forming a terminal. Fig. 6 (a) and (b) are schematic views showing a method of forming a rewiring. Fig. 7 (a) and (b) are views showing a state in which the terminals of the semiconductor device (resin core bump) are electrically connected to the terminals of the substrate. Fig. 8 is a plan view showing another embodiment of the semiconductor device. 320394 39 200926388 ' Fig. 9 is an exploded perspective view showing the semiconductor mounting structure. • Fig. 10 is a plan view showing a semiconductor mounting structure. Fig. 11 is a plan view showing the circuit configuration of the second substrate in the prior art. Fig. 12 is a plan view showing another embodiment of the semiconductor mounting structure. Fig. 13 is an exploded perspective view showing a liquid crystal device as a photovoltaic device. Fig. 14 is a perspective view showing a mobile phone as an electronic machine. [Description of main components] 1. 21, 41 semiconductor device (ic wafer) 2 Substrate 2a Wafer main body 4, 24 Purification film 3, 23, 53 Active surface 6a, 26a terminal (input side terminal) 6b, 26b terminal ( Output side terminal)

7', 7a, 7b, 27a, 27b Resin protrusions 8a, 8b, 28a, 28b Conductive film 9 Opening 12 Semiconductor wafer 14, 14' First layer 17 Resistive pattern 18 Substrate 20 Terminal 21c, 21d Short of 1C wafer Edge 11, 31 wiring (rewiring) 13 pads 15, 15' second layer 17' photosensitive resist material 19 non-conductive film (NCF) 21a, 21b 1C wafer long side 320394 40 200926388 -42 .44 45 51 52 53 54 55 〇56 58a 60 110 112 114 116

First substrate 43 Input side wiring 44a Output side wiring 46 Photoelectric device (liquid crystal device) Photoelectric panel (liquid crystal panel) Semiconductor device (drive 1C) Second substrate (FPC substrate) Anisotropic conductive film (ACF) First substrate 57 First polarizing plate 58b Data line 61 Mobile phone 111 Display body 113 Receiving unit. 115 Operation keys 117 Second substrate, 44b, 45a Bonding terminal group wiring Third substrate Second polarizing plate Scanning line Main body display device display 发面发话Department 320394 41

Claims (1)

200926388 •10. Patent application scope: 1. A semiconductor device having: a substrate comprising an internal circuit: a resin protrusion protrudingly disposed on an active surface side of the substrate; and a plurality of terminals 'including a setting The island-shaped conductive film is formed on the resin protrusion; the semiconductor device is characterized in that: a plurality of terminals are respectively connected to terminals that are electrically connected to the internal circuit; and the plurality of terminals are provided on the active surface side. At least two of the terminals are electrically connected. 2. The semiconductor device according to the application of the patent application, wherein the wiring is electrically connected to at least two terminals of the plurality of terminals that are not adjacent. The semiconductor device according to the jth or the second aspect of the invention, wherein the wiring is connected to the terminals of the plurality of terminals that are not electrically connected to the internal circuit. The semiconductor device according to any one of the preceding claims, wherein the active surface of the substrate is provided with an insulating protective film; the resin protrusion is attached to the protective film. The conductive film is electrically connected to the internal circuit via an opening provided in the protective film; 320394 42 200926388 The wiring is formed on the protective film. The semiconductor device according to claim 4, wherein the wiring is made of the same material as the conductive film, and is integrally formed with the connected terminal. 6. The semiconductor device according to claim 5, wherein the thickness of the wiring is thinner than a thickness of the conductive film constituting the terminal. 7. A semiconductor mounting structure is characterized in that a semiconductor device is mounted on a second substrate by an adhesive, and the semiconductor mounting structure is characterized in that the semiconductor device has a substrate and an internal circuit: a resin protrusion a plurality of terminals are provided on the active surface side of the substrate; a plurality of terminals include an island-shaped conductive film provided on the resin protrusion, and include terminals electrically connected to the internal circuit; and wirings are provided in the foregoing The active surface side is connected to at least two of the plurality of terminals; and the second bonding terminal group including the plurality of bonding terminals of the first substrate is bonded to the plurality of terminals of the semiconductor device. The semiconductor mounting structure of claim 7, wherein the wiring system electrically connects at least two non-adjacent terminals among the plurality of terminals. Please refer to the semiconductor safety (4) of item 7 or item 8 of the patent range, and (4) connect the terminals of the plurality of terminals that are not electrically connected to the internal circuit. 1. The semiconductor mounting structure of any one of the seventh to ninth aspects of the patent application of the present invention is in the first aspect of the present invention, wherein the first substrate is electrically connected to the second bonding terminal electrically connected to the bonding terminal group. In the second bonding terminal group, a second substrate is mounted. The semiconductor oscillating body according to any one of the seventh to the first aspect of the invention, wherein the first ytterbium terminal group of the first substrate and the plurality of terminals of the semiconductor device are electrically connected to the splicer It is a non-conductive film containing no conductive particles. 12. A photovoltaic device comprising: a first substrate for supporting a photoelectric substance; and a semiconductor device for planarly mounting the first substrate in order to drive and control the photoelectric substance; A semiconductor device according to any of the items of item 6. An optical/electrical device comprising: a first substrate that supports a photoelectric substance; and a semiconductor mounting structure that supports a semiconductor device that drives and controls the photoelectric substance in the first substrate The semiconductor device is a semiconductor device according to any one of claims 7 to 11. 320394