200926239 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種微型晶片保險絲結構及製造方法，特別是指一種結構 簡易，其基板導熱係數(thermal conductivity)在1瓦特/公尺·克耳文 (W/m · K)以下，係可直接印刷金屬薄膜之微型晶片保險絲結構及製作方法。 【先前技術】 一般電子產品中，保險絲最主要的功用，就是防止超量的電流流過該電 子電路造成危險’當電路板（PCB)承載電流量超過額定最大使用電流時，常 會使昂貴設備受損或燒燬，而當超額的電流流過保險絲時將使它產生高溫而 導致溶斷電路’以保護電子電路免於受到傷害及危險，故當保險絲之基板使 用塑膠材料時，不耐高溫燒灼保護不完全，而且僅可使用電鍍製造方式之金 屬薄膜’製造困難成本高，產品穩定度不佳，又，使用電鍍之金屬薄膜，浪 費材料及生產不良率高。 再者’目前隨著電器設備越來越複雜，需要的零件越來越多，電路板上 的線路與電子元件也越來越密集’於是電路基板之線路趨向於微細化，電子 元件採晶片化，放置於已沾有錫膏的電路板上，然後再利用一加熱技術使元 件固定於電路板的表面’已是常態使用方法，其可使電路板的零件可較為密 集’使更多功能安置於同樣面積的印刷電路板上，或者能夠以面積更小的電 © 路板維持同樣的功能，然而，一般保險絲係將零件安置在電路板的一面，藉 由保險絲座裝設，並將保險絲座接腳焊在另一面上，此種零件會需要佔用大 量空間，而且接腳的焊點也比較大，遇超額的電流流過保險絲，無法隔絕高 溫，容易將電路板燒灼，且佔用大量空間。 由於習用保險絲仍具有上述之缺失’是以實用上具有如下之諸項缺點： 1·習用之基板使用塑膠材料，不耐高溫燒灼保護不完全。 2. 習用之基板使用塑膠材料，使用電鍍之金屬薄膜製造困難成本高， 產品穩定度不佳。 3. 習用使用電鍵之金屬薄膜，浪費材料及生產不良率高。 4. 習用保險絲將接腳焊在電路板上，接腳的焊點比較大，遇超額的電 流流過保險絲，無法隔絕高溫，容易將電路板燒灼，且又佔用大量 5 200926239 空間。 故而’如何將上述缺失加以摒除，即為本案創作人所欲解決之技術困難 點之所在。有鑑於此，本案創作人基於多年從事相關產品設計的經驗，有感 於上述傳統用品之不便，經多年苦心孤諸潛心研究，試作改良，終於可以摒 除習用微型晶片保險絲之諸多缺點成功研發完成本案，使本創作得以誕生， 並以增進功效者。 【發明内容】200926239 IX. Description of the Invention: [Technical Field] The present invention relates to a microchip fuse structure and a manufacturing method thereof, and particularly to a simple structure in which a substrate has a thermal conductivity of 1 watt/meter·gram. Below (W/m · K), it is a microchip fuse structure and a manufacturing method for directly printing a metal film. [Prior Art] In general electronic products, the main function of the fuse is to prevent excessive current from flowing through the electronic circuit. "When the current carrying capacity of the circuit board (PCB) exceeds the rated maximum current, it often causes expensive equipment. Loss or burnout, and when excess current flows through the fuse, it will cause high temperature and cause the circuit to protect the electronic circuit from damage and danger. Therefore, when the substrate of the fuse is made of plastic material, it is not resistant to high temperature burning. The metal film which is incompletely protected and can only be used in the electroplating manufacturing method is difficult to manufacture, has low product stability, and uses a plated metal film to waste materials and have a high production failure rate. Furthermore, with the increasing complexity of electrical equipment, more and more parts are needed, and the lines and electronic components on the circuit board are becoming more and more dense. Then the circuit of the circuit board tends to be finer, and the electronic components are waferized. It is placed on a circuit board that has been soldered with solder paste, and then a heating technology is used to fix the components on the surface of the circuit board. It is a normal use method, which can make the parts of the circuit board more dense. On the same area of the printed circuit board, or can maintain the same function with a smaller area of the electrical board, however, the general fuse is to place the part on one side of the board, through the fuse holder, and the fuse holder The soldering is soldered on the other side. Such parts will require a lot of space, and the solder joints of the pins are also relatively large. When excess current flows through the fuse, the high temperature cannot be insulated, and the board is easily burned and takes up a lot of space. Since the conventional fuse still has the above-mentioned defects, it has the following disadvantages in practical use: 1. The conventional substrate is made of a plastic material, and the high temperature cauterization protection is incomplete. 2. Conventional substrates use plastic materials. The use of electroplated metal films is difficult to manufacture and the product stability is poor. 3. The use of metal foils using electric keys is a waste of material and a high rate of production failure. 4. The conventional fuse will solder the pins to the circuit board. The solder joints of the pins are relatively large. When the excess current flows through the fuse, the high temperature cannot be insulated, and the board is easily burned, and a large amount of space is occupied. Therefore, how to eliminate the above-mentioned defects is the technical difficulty point that the creators of this case want to solve. In view of this, the creator of this case is based on years of experience in the design of related products, and feels the inconvenience of the above-mentioned traditional products. After many years of painstaking research and trials, I can finally improve the shortcomings of the microchip fuses. To make this creation born, and to enhance the efficacy. [Summary of the Invention]
本發明之目的是為：提供一種微型晶片保險絲結構及製造方法，特別是 指-種結構㈣’其基板導熱係數(thennal CQnduetivityM丨瓦特/公尺· 克耳文（W/m . K)以下，係可直接印刷金屬薄膜之微型晶片保險絲結構及製 作方法。 本發明的目的還在於：提供一種微型晶片保險絲結構，其基板使用BT或 PCB材質’可耐高溫燒灼具保護作用，並可直接印刷金屬薄膜，製作簡便成 本低，節省材料及生產良率性，提高產品穩定度。 為實現這些本_的目的，並且娜如所實肺概括描述_樣以及其 他優點’本創作提供了-種微型晶片保險絲結構，其在於技術方案是:一種微 型晶片保險絲結構，包括有： 一基板，其導熱係數（thermal⑺“此乜“七”在丨瓦特/公尺·克耳文 (W/m ·Κ)以下，提供形成晶片保險絲之基礎； -熔鍊^ ’設於基板上，其係H金屬薄膜延伸至基板麟，且在第一 f薄膜上形成-較小於第—金屬薄膜之第二金屬薄膜；其中該第一金屬 質可為金、銀、銅等導電材料’該第二金屬薄膜材質可為錫； P，係分別設於熔鍊部之兩側面端部’並延伸至熔鍊部反面端部，且 之第—金屬薄膜電性連結’其係由—第—金屬薄膜上形成一第三 及-第四金㈣膜所構成；其中·三金屬薄膜及第四金屬薄膜 材質可為鎳、錫、銅等導電材料；以及 保濩體，係設置完全覆蓋該熔鍊部上，達成保護作用。 線保險絲結構’進-步包括，其中該 6 200926239 在本發明的另一個方面’該微型晶片保險絲結構，進一步包括， 基板，係為ΒΤ或PCB材質。 中該 在本發明的另一個方面’該微型晶片保險絲結構，進—步包括，其： 炫鍊部係設置該基板正面者。 Λ 在本發明的另一個方面’該微型晶片保險絲結構，進一步包括， 炫鍊部係設置該基板正面及反面者。 該 又，本發明之製造方法的技術方案是：一種微型晶片保險絲之激 其包括以下製程步驟： 忐’ (Α) ^供一基板，於該基板的正/反面貼合或離子沉積，使形成第一金屬 膜’ (Β)以衝壓或銑床方式撈槽成型； (C) 在榜槽成型之位置貼合或離子沉積，使形成一相同第一金 側面導通電極部； (D) 製成切割對位線； ⑻於«部位置上之第-金屬薄膜上形成第三金屬薄膜不要 置的第一金屬薄膜以微影（光阻）或印刷方式覆蓋保護· (Π於電極雜置上之第三金料膜上形絲四金屬薄媒不 置的第三金屬薄膜以微影（光阻）或印刷方式復蓋保護；雌 Ο (G)於背面兩側蝕刻第一金屬薄膜，形成背面電極部； (Η)於正面_第-金屬薄膜，形成所需之溶鍊部基材， 面電極部； 々珉正 (I)於正面第-金觸膜上依辑特性，軸_較小於第—金 第二金屬薄膜’形成料部’其中該第二金屬薄膜炼點係低於2 金屬薄膜’其第二金屬薄膜尺寸依_特性可自由改變.、 成賴體，設置完全W雜鍊部上，達祕護雜鍊 (K) 將該包覆體上，印刷設置一規格標示； 乍用， (L) 切割成粒，完成成品。 在本創作的另—個方面，該微型晶片保險絲之製造方法 其中該製程步驟⑻具有以下子步驟： 步^括， (D-1)壓膜切割對位線； 7 200926239 (D-2)曝光切割對位線； (D-3)顯影切割對位線； (D一4)蝕刻切割對位線； (D-5)去膜切割對位線。 其個該微型晶片保險絲之製造方、法，進—步包括 丹甲这製程步驟（G)具有以下子步驟： (G-1)壓膜背面電極部 (G-2)曝光背面電極部 (G-3)顯影背面電極部 〇 (G-4)蝕刻背面電極部 (G-5)去骐背面電極部 其中讎之製造方法，進一步包括 (Η-1)壓臈正面電極部 (Η-2)曝光正面電極部 (Η-3)顯影正面電極部 (Η-4)蝕刻正面電極部 (Η-5)去膜正面電極部。 其中個方面’織型晶片保險絲之製造方法，進—步包括， 再Τ該製程步驟（I)可另具有以下子步驟·· 之笛反面第一金屬薄膜上依輯特性，形成一較小於第一金屬薄膜 第=屬_，形成熔鍊部’其中該第二金屬薄_點係低於第一金屬薄 骐’其第一金屬薄膜尺寸依溶斷特性可自由改變。 藉=在第-金屬薄膜上形成溶點係低於第一金屬薄膜之第四金屬薄 ’可負載額定電慶及額定兩倍負載電流·f，經過i秒後才炼化阻斷負載電 =可達慢速峨之效果，完成微型晶㈣祕之舰功效，娜用電安全， 提高產品的良率及穩定度者。 【實施方式】 K 胃摘作之特制容與優點及其所達成之功 8 200926239 效能夠更為顯現’兹再將本創作為達成其創作目的之整體構造上設計，配合 附圖及實施例，作進一步詳細說明如下： 首先請參騎示，係本發雜型晶#碰賴構之外觀立體示意 圖。其中本發明一種微型晶片保險絲1結構，包括有： 基板2，其導熱係數(thermal conductivity)在1瓦特/公尺·克耳文 (W/m · K)以下’提供形成微型晶片保險絲！之基礎，其正面及反面設有 第一金屬薄膜40，又，其中該基板2 ,係為BT或pcB材質，其導熱係數皆 在1瓦特/公尺·克耳文（W/m · K)以下； 一炫鍊部3 ’設於基板2上，其係由-第一金屬薄膜4〇延伸至基板2端部， 且在第-金屬薄膜40上形成-較小於第一金屬薄膜4〇之第三金屬薄媒 41，其中該熔鍊部3之形狀可為直線或曲線或螺旋線條，使具有不同慢速 熔斷之效果’又其中該熔鍊部3係設置於該基板2正面，或係設置於該基 板2正面及反面者，用以形成微型大電流之晶片保險絲； 二電極部4，係分別設於熔鍊部3之兩側面端部，並延伸至溶鍊部3 部，且與熔鍊部3之第一金屬薄媒4。電性連結，其 4〇上形成-第三金屬薄膜41及-第四金屬薄膜/所係構由成;1及金屬薄膜 一保護艎5 ’係設置完全覆蓋該熔鍊部3上，達成保護作用。 又，請參閱第二囷至第十圖所示，係本發明之製造方法完成製程步驟 至（J)的剖視圖或俯視圖。茲說明如後：本發明之製造方法的技術方案是： 〇 一種微型晶片保險絲之製造方法，其包括以下製程步驟： (A) 提供一基板2 ’於該基板的正/反面貼合或離子沉積，使形成第一金 屬薄膜40 ; (B) 以衝壓或銑床方式撈槽21成型； (C) 在榜槽21成型之位置貼合或離子沉積’使形成一相同第一金屬薄膜 40之側面導通電極部400 ; (D) 製成切割對位線22，其中具有以下子步驟： (D-1)壓膜切割對位線； (D-2)曝光切割對位線； (D-3)顯影切割對位線； (D-4)蝕刻切割對位線； 9 200926239 (D-5)去膜切割對位線； ⑻Γ電極部4位置上之第一金属薄膜4〇上形成第三金屬薄膜41，不 ,τ?、成位置的第—金屬薄膜以微影（光阻）或印刷方式覆蓋保護； ()於電極部4位置上之第三金屬薄膜41上形成第四金屬薄膜乜，不 成位置的第三金屬薄膜以微影（光阻）或印刷方式覆蓋保護； ;背面侧第-金屬薄膜4〇，形成背面電極部422，其中以下 子步驟： 、 (G-1)壓膜背面電極部； (G-2)曝光背面電極部； (G-3)顯影背面電極部； 0 (G-4)姓刻背面電極部； (G-5)去膜背面電極部； (H)於正面触刻第一金屬薄膜4〇，形成所需之溶鍊部3基材並同步形 成正面電極部421，其中具有以下子步驟： (H-1)壓膜正面電極部； (H-2)曝光正面電極部； (H-3)顯影正面電極部； (H-4)蝕刻正面電極部； (H-5).去膜正面電極部； 〇 (1)於正面第一金屬薄膜40上依溶斷特性，形成一較小於第一金屬薄骐 40之第二金屬薄膜30，形成熔鍊部3，其中該第二金屬薄犋3〇熔點 係低於第一金屬薄膜4〇，其第二金屬薄膜3〇尺寸依熔斷特性可自由 改變，用來形成不同慢速熔斷規格之保險絲；又，其中該步驟（ 可另具有以下子步驟： (M)於反面第一金屬薄膜40上依熔斷特性，形成一較小於第一 金屬薄膜40之第二金屬薄膜30，形成熔鍊部3 ’其中該第二 屬薄膜30熔點係低於第一金屬薄膜40，其第二金屬薄膜^ 寸依熔斷特性可自由改變，用來形成不同慢速熔斷規格之尺 絲，及製成微型大電流之晶片保險絲； 、險 (J)形成保護體5，設置完全覆蓋該熔鍊部3上，達成保護該熔鍊部4 200926239 用； (κ)將該包覆體上，印刷設置一規格標示5〇; (L)切割成粒’完成成品。 士#/青ί㈣—圖係本發明之製造方法完成製程步驟（Α)賴視®。基板2 _哲、於ΒΤ基板或PCB基板貼合鋼笛，ΒΤ基板或PCB基板材料為含玻璃 BT基板4PCB基板’於BT基板紐B基板上下兩面貼合或離子沈 薄膜4〇;其中該第一金屬薄膜仙之材料，可為金、銀、銅 ❹ 後士 1 @第二隱本發明之製造方法完成製程麵⑻麟視圖及第四圖 播士^明之製造方法絲製程步驟⑻_視®。顯21,係以壓或銳床 is/於BT基域PCB基板上成型，絲成型之位置兩側製作側面導通電 極部400 ; 請參閱第五_本發明之製造方法完絲程步驟（D)的俯視I製作切 割對位線22，係經過壓膜、曝光、顯影、姓刻、去媒等製程。 請參Μ第六_本發明之製造方法完成製程細⑺關視圖。該步驟 ^)，係於第-金屬薄膜4〇上形成第三金屬薄膜41及第四金屬薄膜42 ;其 該第三金屬薄，41及第四金屬薄膜42其材料為銅、鎳或鍚等金屬導電材 不需形成第二金屬薄膜41及第四金屬薄膜42的位置以微影（光阻）或印 刷方式覆蓋保護。 請參閱第七囷係本發明之製造方法完成製程步驟⑹的剖視圖。該步驟 G)製作背面電極，係於耵基板或pCB基板背面兩側形成電極，製作時經 過壓，、曝光、顯影、蝕刻、去膜等製程，且以光阻或印刷材料為遮避材料。 凊參閱第八圖係本發明之製造方法完成製程步驟的俯視圖。該步驟 jH)製作正面線路’係於BT基板或PCB基板正面蝕刻第一金屬薄膜4〇形 :所需之熔鍊部3基材，並同步形成正面電極，製作時經過壓膜、曝光、顯 I、蝕刻、去膜等製程，且以光阻或印刷材料為遮避材料。 請參閱第九圖係本發明之製造方法完成製程步驟的俯視圖。該步驟 (I)正面線路鍍錄，係於第一金屬薄膜4〇上可形成第二金屬薄膜3〇其大小 視溶斷特性可自由改變，製作時以光阻或印刷材料為遮避材料。 請參閱第十圖係本發明之製造方法完成製程步驟（J)的剖視圖。該步驟 200926239 ⑴印刷保護體5 ’係於溶鍊部3上方以網版印刷方式形成保護層。 請參閱第十—_本發明之製造方法進行製程步驟（L)的俯視圖。本 發喔型晶片保險絲經過切割線51切割成粒後，即為微型晶片保險絲】的成 品0 以上所述係本發明之-較佳可行實施例總要說明，惟非因此即拘限本發 明之專利細，故釋凡吾人運林發明綱書及圖式内容所為之等效結構 或製妓法’直接或間接運麟其_麟躺者，綱理皆理航含 發明之精神範疇的範圍内，合予陳明。 、 由於本創作主要目的在於解決習知保險絲之缺點，故在使用上， 有下列優點： & ® 1.本發明之基板使用BT或PCB材質，可耐高溫燒灼具保護作用β 2. 本發明之基板使用ΒΤ或PCB材質，可直接印刷金屬薄膜，製作簡便 成本低，提高產品穩定度。 3. 本發明直接印刷金屬薄膜，節省材料及生產良率性。 4. 本發明直接印刷金屬薄膜、電極端部，且在第一金屬薄膜上昼印第 四金屬薄膜，可負載額定電壓及額定兩倍負載電流下，經過丨秒 才熔化阻斷負載電流，可達慢速熔斷之效果，保障用電安全。/ 綜上所述，本發明在突破先前之技術結構及製造方法下，確實已達到 欲增進之功效，且也非熟悉該項技藝者所易於思及；再者，本發明申請前$ 〇 曾公開，其所具之進步性、實用性，顯已符合發明專利之申請要件，^佑 提出發明申請》 决 【圖式簡單說明】 第一圖係本發明微型晶片保險絲結構之外觀立體示意圓。 第二圖係本發明之製造方法完成製程步驟（A)的剖視圖。 第三圖係本發明之製造方法完成製程步驟（B)的俯視囷。 第四圖係本發明之製造方法完成製程步驟（C)的剖視囷。 第五囷係本發明之製造方法完成製程步驟（D)的俯視囷。 第六圖係本發明之製造方法完成製程步驟（F)的剖視圖。 第七圖係本發明之製造方法完成製程步驟（G)的剖視圖。 12 200926239 第八圖係本發明之製造方法完成製程步驟（Η)的俯視圖。 第九圖係本發明之製造方法完成製程步驟（I)的俯視圖。 第十圖係本發明之製造方法完成製程步驟（J)的剖視圖。 第十一圖係本發明之製造方法進行製程步驟（L)的俯視圖。 【主要元件符號說明】 微型晶片保險絲..................1 基板.................................2 ' 撈槽.................................21 對位線..............................22 〇 熔鍊部..............................3 第二金屬薄膜.....................30 電極部..............................4 第一金屬薄膜.....................40 側面導通電極部..................400 第三金屬薄膜.....................41 第四金屬薄膜.....................42 正面電極部........................421 背面電極部........................422 φ 保護體..............................5 標示.................................50 切割線..............................51 13The object of the present invention is to provide a microchip fuse structure and a manufacturing method thereof, in particular to a structure (4) whose substrate thermal conductivity (thennal CQnduetivity M watt / meter · gram (K / m. K) or less, The utility model relates to a microchip fuse structure and a manufacturing method capable of directly printing a metal film. The object of the invention is also to provide a microchip fuse structure, wherein the substrate is protected by a BT or PCB material, which can protect the metal from direct burning. The film is easy to manufacture and low in cost, saves material and production yield, and improves product stability. In order to achieve the purpose of these, and the general lungs are described in general and other advantages, the author provides a microchip. The fuse structure is characterized in that: a microchip fuse structure comprises: a substrate whose thermal conductivity (thermal (7) "this 乜 "seven" is below 丨 watt / metric gram (W / m · Κ) Providing a base for forming a wafer fuse; - a fuse link is disposed on the substrate, the H metal film extending to the substrate lining, and on the first f film a second metal film which is smaller than the first metal film; wherein the first metal material may be a conductive material such as gold, silver or copper; the second metal film material may be tin; and P is respectively disposed in the melting chain The two side end portions of the portion extend to the opposite end of the fuse link portion, and the first metal film is electrically connected to form a third and fourth gold (four) film formed on the first metal film; The material of the three metal film and the fourth metal film may be a conductive material such as nickel, tin or copper; and the protective body is provided to completely cover the fuse portion to achieve protection. The wire fuse structure includes, Wherein the 6 200926239 in another aspect of the invention, the microchip fuse structure further includes a substrate, which is made of germanium or a PCB material. In another aspect of the invention, the microchip fuse structure includes In the other aspect of the invention, the microchip fuse structure further includes: a chain portion is provided on the front side and the back side of the substrate. The technical solution of the manufacturing method of the present invention is: a microchip fuse comprising the following process steps: 忐' (Α) ^ for a substrate, the front/back surface of the substrate is bonded or ion deposited to form a first metal The film '(Β) is formed by punching or milling machine; (C) bonding or ion deposition at the position of the grid forming, so as to form an identical first gold side conduction electrode portion; (D) forming a cutting alignment line (8) The first metal film not formed on the first metal film formed on the first metal film of the "partial position" is protected by lithography (resistance) or printing (the third gold material on the electrode miscellaneous) The third metal film which is not disposed on the film and has a metal thin film is protected by lithography (resistance) or printing; the female (G) etches the first metal film on both sides of the back surface to form a back electrode portion; ) on the front side - the first metal film, to form the desired sol chain substrate, the surface electrode portion; 々珉 (I) on the front first - gold touch film, the axis _ is smaller than the first - gold a second metal film 'forming a part' wherein the second metal film is less than 2 The metal film's second metal film size can be freely changed according to the _ characteristics. It is placed on the complete W-chain portion, and the secret chain (K) is provided on the coated body. When used, (L) cut into pellets to complete the finished product. In another aspect of the present invention, the microchip fuse manufacturing method wherein the process step (8) has the following sub-steps: step (D-1) lamination cutting bit line; 7 200926239 (D-2) exposure Cutting the alignment line; (D-3) developing the dicing bit line; (D-4) etching the dicing bit line; (D-5) removing the film to align the bit line. The manufacturing method and method of the microchip fuse further include the following substeps: (G-1) laminating the back electrode portion (G-2) and exposing the back electrode portion (G) -3) developing the back surface electrode portion G (G-4) etching the back surface electrode portion (G-5) to remove the back surface electrode portion, and further comprising (Η-1) pressing the front electrode portion (Η-2) The exposure front electrode portion (Η-3) development front electrode portion (Η-4) etches the front electrode portion (Η-5) to remove the front surface electrode portion. In one aspect, the manufacturing method of the woven chip fuse includes, and further, the process step (I) may further have the following sub-steps on the reverse side of the first metal film, forming a smaller than The first metal thin film is _ _, forming a melting portion 'where the second metal thin _ point is lower than the first metal thin 骐', and the first metal thin film size can be freely changed depending on the dissolution characteristics. Borrow = forming a melting point on the first metal film is lower than the fourth metal thin film of the first metal film 'loadable rated electric and rated twice the load current · f, after i seconds, refining and blocking the load electric = It can achieve the effect of slow speed, complete the function of the micro-crystal (four) secret ship, and use electricity safety to improve the product's yield and stability. [Embodiment] The special capacity and advantages of K-stomach extraction and its achievements 8 200926239 can be more obvious. 'The design of the whole structure to achieve its creative purpose, with the drawings and examples, For further details, please refer to the following: First, please refer to the riding, which is a three-dimensional diagram of the appearance of the hybrid type crystal. The structure of a microchip fuse 1 of the present invention comprises: a substrate 2 having a thermal conductivity of less than 1 watt/meter gram (W/m · K) to provide a microchip fuse! The foundation is provided with a first metal film 40 on the front side and the back side, and the substrate 2 is made of BT or pcB material, and the thermal conductivity is 1 watt/meter gram (W/m · K). Hereinafter, a bright chain portion 3' is disposed on the substrate 2, which is extended from the first metal film 4 to the end of the substrate 2, and formed on the first metal film 40 - smaller than the first metal film 4 a third metal thin film 41, wherein the shape of the melt chain portion 3 may be a straight line or a curved line or a spiral line, so as to have different slow-fuse effects, and wherein the fuse link portion 3 is disposed on the front surface of the substrate 2, or Provided on the front surface and the reverse side of the substrate 2 for forming a micro-high current wafer fuse; the two electrode portions 4 are respectively disposed at the two side end portions of the fuse link portion 3 and extend to the ML portion 3, and The first metal thin medium 4 with the melt chain portion 3. Electrically connected, the fourth metal film 41 and the fourth metal film/structure are formed on the four sides, and the metal film and the protective film 5' are completely covered on the fuse portion 3 to achieve protection. effect. Further, referring to the second to tenth drawings, the manufacturing method of the present invention completes the cross-sectional view or the plan view of the process steps to (J). The following is a description of the technical solution of the manufacturing method of the present invention: A method for manufacturing a microchip fuse, comprising the following process steps: (A) providing a substrate 2' on the front/back surface of the substrate or ion Depositing to form the first metal film 40; (B) forming the groove 21 by stamping or milling; (C) laminating or ion-depositing at the position where the grid 21 is formed to form a side of the same first metal film 40 Turning on the electrode portion 400; (D) forming a dicing bit line 22 having the following sub-steps: (D-1) laminating the alignment bit line; (D-2) exposing the dicing bit line; (D-3) Developing the dicing bit line; (D-4) etching and cutting the bit line; 9 200926239 (D-5) stripping the aligning line; (8) forming a third metal film on the first metal film 4 at the position of the Γ electrode portion 4 41, No, τ?, the position of the first metal film is protected by lithography (resistance) or printing; () forming a fourth metal film 于 on the third metal film 41 at the position of the electrode portion 4, failing The position of the third metal film is protected by lithography (resistance) or printing; The film 4 is formed to form the back electrode portion 422, wherein the following sub-steps: (G-1) laminated film back electrode portion; (G-2) exposed back electrode portion; (G-3) developed back electrode portion; 0 (G -4) surname engraved back electrode portion; (G-5) stripped back electrode portion; (H) first engraved first metal film 4〇 to form desired sol link portion 3 substrate and simultaneously form front electrode portion 421, which has the following sub-steps: (H-1) laminated front electrode portion; (H-2) exposed front electrode portion; (H-3) developed front electrode portion; (H-4) etching front electrode portion; H-5). removing the front electrode portion of the film; 〇(1) forming a second metal film 30 smaller than the first metal thin film 40 according to the dissolution property on the front first metal film 40, forming a melting portion 3, wherein the second metal thin layer 3〇 has a lower melting point than the first metal thin film 4〇, and the second metal thin film 3〇 size can be freely changed according to the melting characteristics, and is used to form fuses of different slow-fuse specifications; The step (which may further have the following sub-steps: (M) is based on the first metal film 40 on the reverse side, and is formed to be smaller than the first metal film 40. The second metal film 30 forms a melting portion 3' in which the melting point of the second film 30 is lower than that of the first metal film 40, and the second metal film can be freely changed according to the fusing characteristics, and is used to form different slow melting specifications. a ruler wire, and a micro fuse having a large current; a danger (J) forming a protective body 5, which is completely covered on the melt chain portion 3 to achieve protection of the melt chain portion 4 200926239; (κ) the package On the cover, the printing set a specification mark 5 〇; (L) cut into granules 'finish the finished product. 士#/青 ( (4) - The manufacturing method of the present invention completes the process step (Α) 赖视®. The substrate 2 _ Zhe, the ΒΤ substrate or the PCB substrate is attached to the steel flute, and the ΒΤ substrate or the PCB substrate material is a glass-containing BT substrate 4 PCB substrate 'on the upper and lower sides of the BT substrate New B substrate or the ion-precipitated film 4 〇; A metal film fairy material, can be gold, silver, copper ❹ 士 1 @ 第二隐 The manufacturing method of the invention completes the process surface (8) Lin view and the fourth figure of the broadcaster ^ Ming's manufacturing method silk process steps (8) _ Vision ® . Display 21, which is formed by pressing or sharp bed is/on the BT base domain PCB substrate, and the side conduction electrode portion 400 is formed on both sides of the wire forming position; please refer to the fifth method of manufacturing method of the present invention (D) The top view I is made to cut the alignment line 22, which is subjected to processes such as lamination, exposure, development, surname, and media removal. Please refer to the sixth method of the present invention to complete the process fine (7) off view. The step ^) is to form a third metal film 41 and a fourth metal film 42 on the first metal film 4; the third metal film 41 and the fourth metal film 42 are made of copper, nickel or tantalum. The position where the metal conductive material does not need to form the second metal film 41 and the fourth metal film 42 is protected by lithography (photoresist) or printing. Please refer to the seventh embodiment of the manufacturing method of the present invention to complete the process step (6). In the step G), the back electrode is formed on the both sides of the back surface of the ruthenium substrate or the pCB substrate, and is formed by overpressure, exposure, development, etching, film removal, etc., and the photoresist or the printing material is used as the shielding material. Referring to the eighth drawing, a plan view of the process steps of the manufacturing method of the present invention is completed. In the step jH), the front surface is formed on the front surface of the BT substrate or the PCB substrate, and the first metal thin film is etched into a shape: a desired melt-chain portion 3 substrate, and the front surface electrode is simultaneously formed, and is subjected to lamination, exposure, and display during production. I, etching, film removal and other processes, and using photoresist or printed materials as shielding materials. Please refer to the ninth drawing for a top view of the process steps of the manufacturing method of the present invention. In the step (I), the front side is plated, and the second metal film 3 is formed on the first metal film 4, and the size thereof can be freely changed according to the melting property, and the photoresist or the printing material is used as the shielding material during the production. Please refer to the tenth drawing for a cross-sectional view of the manufacturing process (J) of the manufacturing method of the present invention. This step 200926239 (1) The print protector 5' is formed on the sol chain portion 3 by screen printing to form a protective layer. Please refer to the tenth--the manufacturing method of the present invention for the top view of the process step (L). The present invention is a final embodiment of the present invention, which is a microchip fuse. The preferred embodiment is described above, but is not limited to the present invention. The patent is fine, so the equivalent structure or the system of the invention is the scope of the invention. , combined with Chen Ming. Since the main purpose of the present invention is to solve the shortcomings of the conventional fuse, the following advantages are obtained in use: & 1. The substrate of the present invention is made of BT or PCB material, and can withstand high temperature cauterization protection β 2. The present invention The substrate is made of ruthenium or PCB material, which can directly print metal film, which is easy to manufacture and low in cost, and improves product stability. 3. The invention directly prints a metal film, saving material and production yield. 4. The invention directly prints the metal film and the electrode end portion, and prints the fourth metal film on the first metal film, which can be loaded with the rated voltage and the rated load current twice, and then melts and blocks the load current after the leap second. The effect of slow melting is to ensure the safety of electricity consumption. In summary, the present invention has achieved the desired effect under the prior art structure and manufacturing method, and is not familiar to those skilled in the art; further, the application of the present invention is Publicity, its progressive and practical, has been in line with the application requirements of the invention patent, ^ You filed an invention application. [Simplified description of the drawings] The first figure is a three-dimensional schematic circle of the microchip fuse structure of the present invention. The second drawing is a cross-sectional view of the manufacturing process of the present invention which completes the process step (A). The third figure is a top view of the manufacturing process of the present invention which completes the process step (B). The fourth drawing is a cross-sectional view of the manufacturing process of the present invention which completes the process step (C). The fifth aspect is the manufacturing method of the present invention which completes the top view of the process step (D). Figure 6 is a cross-sectional view showing the manufacturing process of the present invention completing the process step (F). The seventh drawing is a cross-sectional view showing the manufacturing process step (G) of the manufacturing method of the present invention. 12 200926239 The eighth drawing is a plan view of the manufacturing process step (Η) of the manufacturing method of the present invention. The ninth drawing is a plan view of the manufacturing process of the present invention which completes the process step (I). The tenth drawing is a cross-sectional view showing the manufacturing process step (J) of the manufacturing method of the present invention. The eleventh drawing is a plan view of the manufacturing step (L) of the manufacturing method of the present invention. [Main component symbol description] Microchip fuse..................1 Substrate........................ ............2 ' Fishing trough....................................21 Alignment line..............................22 〇Fuse chain......... ..................3 Second metal film........................30 Electrode part... ...........................4 First metal film.................. ...40 side conduction electrode section..................400 third metal film................... ..41 Fourth Metal Film........................42 Front Electrode Section.................. ......421 Back electrode part........................422 φ protector............ ..................5 Marking.............................. ...50 cutting line..............................51 13