TW200915357A - Thermistor chip and method of fabricating the same - Google Patents
Thermistor chip and method of fabricating the same Download PDFInfo
- Publication number
- TW200915357A TW200915357A TW96134869A TW96134869A TW200915357A TW 200915357 A TW200915357 A TW 200915357A TW 96134869 A TW96134869 A TW 96134869A TW 96134869 A TW96134869 A TW 96134869A TW 200915357 A TW200915357 A TW 200915357A
- Authority
- TW
- Taiwan
- Prior art keywords
- electrode
- layer
- thermistor
- wafer
- buffer layer
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 238000002844 melting Methods 0.000 claims abstract description 30
- 230000008018 melting Effects 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000005245 sintering Methods 0.000 claims abstract description 28
- 239000010410 layer Substances 0.000 claims description 229
- 238000000034 method Methods 0.000 claims description 29
- 230000008569 process Effects 0.000 claims description 28
- 239000000463 material Substances 0.000 claims description 22
- 239000011241 protective layer Substances 0.000 claims description 19
- 229910052709 silver Inorganic materials 0.000 claims description 16
- 239000004332 silver Substances 0.000 claims description 16
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 13
- 239000010408 film Substances 0.000 claims description 11
- 239000011521 glass Substances 0.000 claims description 11
- 229920000642 polymer Polymers 0.000 claims description 8
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 6
- 150000002739 metals Chemical class 0.000 claims description 5
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 229910052703 rhodium Inorganic materials 0.000 claims description 3
- 239000010948 rhodium Substances 0.000 claims description 3
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 2
- 239000010409 thin film Substances 0.000 claims description 2
- 241000270666 Testudines Species 0.000 claims 1
- 230000003139 buffering effect Effects 0.000 claims 1
- 238000007670 refining Methods 0.000 claims 1
- 239000002689 soil Substances 0.000 claims 1
- 238000004804 winding Methods 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 55
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 13
- 238000010586 diagram Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 241000251468 Actinopterygii Species 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001252 Pd alloy Inorganic materials 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 241001122767 Theaceae Species 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 1
- 235000013372 meat Nutrition 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Landscapes
- Thermistors And Varistors (AREA)
Abstract
Description
200915357 —_4171twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種熱敏電阻晶片及其製造方法,且 特別是有關於一種具有緩衝層(buffer layer)的熱敏電阻 晶片(thermistor chip )及其製造方法。 【先前技術】 熱敏電阻晶片的電阻值會隨溫度變化而改變。熱敏電 阻晶片依其電阻值隨溫度變化的情形,主要可分為電阻值 與溫度成反比變化之負溫度係數(negative temperature coefficient,NTC )熱敏電阻晶片及電阻值與溫度成正比變 化之正溫度係數(positive temperature coefficient,PTC) 熱敏電阻晶片兩種。 請參考圖1,習知熱敏電阻晶片100包括一基板 (substrate ) 110、一第一電極(electrode ) 120、一 第二電 極130、一熱敏電阻層(thermistor layer) 140、兩外部電 極(external electrode) 150、兩背面電極(back electrode) 以及一保護層(protective layer) 170。其中,基板 no 具有第一表面112、相對於第一表面112之第二表面U4 及連接第一表面112及第二表面114之兩端面116。第一 電極120與第二電極130配置於基板110之第一表面112 上’這些背面電極160配置於基板11〇之第二表面114上, 熱敏電阻層140配置於第一表面112上且電性連接第一電 極120與第二電極130。熱敏電阻層14〇覆蓋部分第一電 極120與部分第二電極130。保護層170覆蓋部分第一電 200915357 :4171twf.doc/n * 極120、部分第二電極130與熱敏電阻層140。這些外部電 極150分別由第一表面Π2上之第一電極120與第二電極 130經過其中之一端面116延伸且電性連接至第二表面ι14 上之這些背面電極160。 然而’習知採用厚膜製程(thick film process)與燒結 製程(sintering process)製造之熱敏電阻晶片,其製造過BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a thermistor wafer and a method of fabricating the same, and more particularly to a heat sensitive device having a buffer layer. A resistor chip and a method of manufacturing the same. [Prior Art] The resistance value of the thermistor wafer changes with temperature. The thermistor wafer can be divided into negative temperature coefficient (NTC) thermistor wafer and resistance value proportional to temperature, which is proportional to the change of resistance value with temperature. There are two types of positive temperature coefficient (PTC) thermistor wafers. Referring to FIG. 1 , a conventional thermistor wafer 100 includes a substrate 110 , a first electrode 120 , a second electrode 130 , a thermistor layer 140 , and two external electrodes ( External electrode 150, two back electrodes, and a protective layer 170. The substrate no has a first surface 112, a second surface U4 relative to the first surface 112, and end surfaces 116 connecting the first surface 112 and the second surface 114. The first electrode 120 and the second electrode 130 are disposed on the first surface 112 of the substrate 110. The back electrodes 160 are disposed on the second surface 114 of the substrate 11 , and the thermistor layer 140 is disposed on the first surface 112 and electrically The first electrode 120 and the second electrode 130 are connected. The thermistor layer 14 is covered with a portion of the first electrode 120 and a portion of the second electrode 130. The protective layer 170 covers a portion of the first power 200915357:4171twf.doc/n* pole 120, a portion of the second electrode 130, and the thermistor layer 140. The external electrodes 150 are respectively extended by the first electrode 120 and the second electrode 130 on the first surface Π2 through one of the end faces 116 and electrically connected to the back electrodes 160 on the second surface ι14. However, a thermistor wafer manufactured by a thick film process and a sintering process has been manufactured.
程中需經過多次的印刷及燒結步驟。由於第一電極12〇與 第二電極130的材質為銀,且銀的熔點過於接近熱敏電阻 層140形成時的燒結溫度(sintering temperature ),所以 熱破電阻層140在經由燒結製程而形成時,第一電極12〇 與苐一電極130會產生銀邊移(siiver mjgrate)而使部份 的銀擴散主熱敏電阻層140内,致使影響電阻值隨溫度變 化的性質及整體的電性表現(electrical perf〇rmance )。There are many printing and sintering steps in the process. Since the material of the first electrode 12 〇 and the second electrode 130 is silver, and the melting point of the silver is too close to the sintering temperature when the thermistor layer 140 is formed, the thermal breaking resistance layer 140 is formed through the sintering process. The first electrode 12 〇 and the first electrode 130 generate a silver edge shift (siiver mjgrate) to cause a portion of the silver to diffuse into the main thermistor layer 140, thereby affecting the resistance value of the resistance value and the overall electrical performance. (electrical perf〇rmance ).
目前以增加熱敏電阻層14〇的厚度T1(亦即熱敏電阻 層140之遠離基板11〇之一第三表面142與基板11〇之第 —表面112之間的距離)或將第一電極120與第二電極13〇 的材質改為絲合金來改善上述之問題。然而,增加熱敏 電阻層U0的厚度TU等增加熱敏電阻晶片1〇〇的體積。 = 銀遷移所採用的銀鈀合金,在第-電極 4厂、,一電才0中免的重量百/分比約S 15%〜3〇。/0,而 ·,ό、材料成本&為昂貴,故會使整體成本增加。 【發明内容】 較佳本剌之—目触供-齡㈣阻晶片 其電性表現 200915357 4171twf.doc/n 本發明之另〆目的提供—種熱敏電阻 且成本低。 具體知小 本發明之又-目的提供—種熱敏電阻晶 法,其所製造出的熱敏電阻晶片的電性表現較佳。、 本發明之再-目的_供—種熱敏電阻晶片土 法,其所製造出的熱敏電組晶片的體積小且成本低,-方 本發明提出一種熱敏電阻晶片,其包括—基板、一… -電極、-第二電極:-熱敏電阻層與一第衝層。: 板具有一第一表面。第一電極配置於第一表面上。 衝層覆盍至少部分第一電極,且熱敏電阻層至少笋签第二 緩衝層。第一緩衝層的熔點分別大於熱敏電阻層^結溫 度與第一電極的熔點,且第一電極藉由第—緩衝層與熱敏 電阻層電性連接。第二電極與第一電極間隔設置且與熱敏 電阻層電性連接。 在本發明之一實施例中,上述第一緩衝層的熔點大於 或等於攝氏1400度。 在本發明之一實施例中,上述第一緩衝層的材質包括 鎳、鉑、釕或包含至少上述一種金屬之合金。 在本發明之一實施例中,上述第一電極的材質包括 銀,且第一電極中銀的重量百分比為85%以上。 在本發明之一實施例中,上述第一缓衝層之厚度介於 1000埃與3000埃之間。 在本發明之一實施例中,上述熱敏電阻層是利用厚膜 製程形成,第一緩衝層是利用薄膜製程或厚膜製程形成。 200915357 24171 twf.doc/n 牡/31 尸' 〜, 一 电阻層的燒結溫度 是介於攝氏850度與攝氏950度之間。 ° 夂 在本發明之一實施例中,上述熱敏電阻晶片更包括一 玻璃保護層(glass protective layer)及—聚合物保護層 (polymer protective layer),其中玻璃保護層至少覆莫^ 敏電阻層,聚合物保護層至少覆蓋玻璃保護層。是 〇 =明,一:施例中,上述第一電心接配置於該At present, the thickness T1 of the thermistor layer 14A is increased (that is, the distance between the third surface 142 of the thermistor layer 140 away from the substrate 11 and the first surface 112 of the substrate 11A) or the first electrode The material of 120 and the second electrode 13A is changed to a wire alloy to improve the above problem. However, increasing the thickness TU of the thermistor layer U0 or the like increases the volume of the thermistor wafer 1〇〇. = The silver-palladium alloy used for silver migration, in the first electrode 4 factory, the weight of the electricity is 0 / min ratio of about 15% ~ 3 〇. /0, and ·, 材料, material cost & expensive, it will increase the overall cost. SUMMARY OF THE INVENTION The preferred embodiment of the present invention is to provide a thermistor at a low cost. Further, it is a further object of the present invention to provide a thermistor crystal having a better electrical performance of a thermistor wafer. Further, the present invention provides a thermistor wafer having a small volume and a low cost, and the present invention provides a thermistor wafer including a substrate. , an ... electrode, - second electrode: - thermistor layer and a first layer. : The board has a first surface. The first electrode is disposed on the first surface. The punch layer covers at least a portion of the first electrode, and the thermistor layer is at least a second buffer layer. The melting point of the first buffer layer is greater than the temperature of the thermistor layer and the melting point of the first electrode, respectively, and the first electrode is electrically connected to the thermistor layer by the first buffer layer. The second electrode is spaced apart from the first electrode and electrically connected to the thermistor layer. In one embodiment of the invention, the first buffer layer has a melting point greater than or equal to 1400 degrees Celsius. In an embodiment of the invention, the material of the first buffer layer comprises nickel, platinum, rhodium or an alloy comprising at least one of the above metals. In an embodiment of the invention, the material of the first electrode comprises silver, and the weight percentage of silver in the first electrode is 85% or more. In an embodiment of the invention, the first buffer layer has a thickness between 1000 angstroms and 3000 angstroms. In one embodiment of the invention, the thermistor layer is formed by a thick film process, and the first buffer layer is formed by a thin film process or a thick film process. 200915357 24171 twf.doc/n Mud / 31 corpse '~, The resistance temperature of a resistive layer is between 850 degrees Celsius and 950 degrees Celsius. In one embodiment of the present invention, the thermistor wafer further includes a glass protective layer and a polymer protective layer, wherein the glass protective layer covers at least the resistive layer The polymer protective layer covers at least the glass protective layer. Yes 明 = Ming, one: In the embodiment, the first electrical core is arranged in the
—端直接覆蓋於部分L ^ J敏電阻層之-端直接覆蓋第一缓衝層上,= 層之另-端延伸至直接覆蓋於部分第一表面上,第二= 接覆紐部分熱敏電㈣上,且第二電極之= 夕而先伸至直接覆蓋於部分第一表面上。 又·另 第三逑熱敏電阻晶片更包括一 包括-第三缓衝層分敏電叫更 層的溶點分別大於該熱敏電^ =弟二緩衝 的熔點。另外,第三緩衝 几,、,°級度與該弟三電極 至少上述-種金屬之合全曰、,貝包括鎳、翻、舒或包含 在本發明之一實施例中,材質包括銀。 別直接配置於基板之第 处弟一電極及第二電極分 包括-第二緩衝層,覆、面上。此外’熱敏電阻曰曰曰片更 至少覆蓋第二緩衝層,部分第二電極。熱敏電阻層 電阻層的燒結溫度與第_ 點分別大於熱敏 〜电極_點。另外,第二緩衝層 200915357 M17Itwf.doc/n ^質$括韓”或包含至少上述 該弟—電極的材質包括銀。再齋種至屬之口金 第四電極,第四電極 …电阻晶片更包括一 包極之另—端延伸至覆蓋部分第二電極。电阻層且弟四 在本發明之—實施例中,上述埶敏 電極。第一電極直接配置於該第―::片 ,第二電極與第四電極間 Λ x 曰 第二電極之-端覆蓋於部分ΐ敏=敏電阻層之兩端。 嶠延伸至霜蓄於筮主 …、破電阻上,弟二電極之另一 電阻声,第四電極之1覆蓋部分熱敏 之另—端延伸至覆蓋於第-表面。 巧步ΐ首/雜敏電阻晶片的製造方法,其包括下 ‘tr成—第—電極於—基板之—第—夫面上。 者,形成一第一缓衝層以覆蓋至少部分第—命。 j用厚膜製程盘燒6士紫穿 ,— 电一後 第1衝層。第;層以至少覆蓋 麵溫度與第-電極的炫點,電阻層的燒 上。笛一•、设形成一第二電極於第-表面 趣。电極與第一电極間隔設置且與熱敏電阻層電性連 幾等^^4^/。_中’上述第—缓衝層触點大於 製巷’上述第—緩衝層是利用薄膜 在本發明之-實施例中,上述熱敏電阻層的燒結溫度 200915357 — :4171twf.d〇c/n 是介於攝氏850度與攝氏95〇度之間。 由於熱破电阻層與這些電極的其中之—之間可配置 有缓衝層,且緩衝層的熔點分別大於熱敏電阻層的燒結 溫度以及上述被緩衝層所覆蓋之電極的熔點,所以熱敏電 阻層在經由燒結製程而形成時,緩衝層可避免上述被緩衝 層所覆蓋之電極遷移至熱敏電阻層内。因此,本發明之熱 敏電阻晶片之電阻值隨溫度變化的性質將不易受到影響而 仍可滿足設計者的預先設計需求。換言之,本發明之熱敏 電阻晶片的電性表現較佳。 為讓本發明之上述特徵和優點能更明顯易懂,下文特 舉實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 [第一實施例] 睛參考圖2A,本發明第一實施例之熱敏電阻晶片2〇〇 包括一基板210、—第一電極220、一第二電極23〇、—熱 敏電阻層240與一第一缓衡層250。基板210具有一第一 表面212。第一電極220、第二電極230與熱敏電阻層mo 配置於基板210之第一表面212上。第一電極220與第二 電極230間隔設置。第一電極220藉由第一緩衝層25〇與 熱敏電阻層240電性連接,真第二電極230與熱敏電阻層 240電性連接。第一緩衡層250覆蓋至少部分第一電^ 220,且熱敏電阻層240炱少覆蓋第一緩衝層250。第—緩 衝層250的熔點分別大於熱敏電阻層240的燒結溫度與第 一電極220的熔點。請參考圖2B,第一實施例之熱敏電阻 10 200915357 --------^17ltwf.d〇c/n 日日片200的等效電路為圖2B所示之具有阻&的 電路。 4 „月再參考圖2A,在本實施例巾,第—電22〇 表面212上,第-緩衝層咖之一端直接= 於4刀:一電極22〇上,第一緩衝層Μ。之另一端延伸至 直接,分第一表面212上。熱敏電阻層24〇之一端直 接覆蓋第一緩衝層250上,熱敏電限層24〇之另一端延伸 〇 至直接覆蓋於部分第一表面212上。第二電極23〇之〜端 直接覆蓋於部分熱敏電阻層24〇上,第二電極23〇之另— 端延伸至直接覆蓋於部分第一表面212上。換言之,第— 缓衝層2d0配置於第一電極22〇與熱敏電阻層24〇之間, 且熱敏電阻層240配置於第一電極22〇盥第二電極23〇令 間。 〜 由於第一缓衝層250配置於熱敏電阻層24〇與第—雷 極220之間,且第一緩衝層25〇的熔點分別大於熱敏電阻 (丨 層240的燒結溫度與第一電極220的熔點,所以熱敏電阻 " 層240在經由燒結製程(詳見下述)而形成時,第一緩衝 層250可避免第一電極22〇產生遷移而擴散至熱敏電阻層 240内。因此’熱敏電阻晶片2⑽之電阻值隨溫度變化的 性質將不易受到影響而仍可滿足設計者的預先設計需求, 使得熱敏電阻晶片200的電性表現較佳。而且,與習知技 術相較,熱敏電阻層240的厚度T2 (亦即熱敏電阻層240 之遠離基板210之一第三表面242與基板210之第一表面 212之間的距離)可較薄。因此,熱敏電阻晶片2〇〇的體 200915357 iw-u/j-i w ^4171twf.doc/n 積可較小。而且,第1極⑽咐讀中 可少於習知技術揭露的15%〜30% ·二分比 金。因此’熱敏電阻晶片200的材料:=:用銀免合 在本實施例中,第—電極220的材質包括 電極220中銀的重量百分比例如為85%以上,而^一 質包括玻璃編b轉絕緣材質。絲電阻層= 溫度可介於攝氏請度與攝氏95〇度之間,且熱- the end directly covers the portion of the L ^ J varistor layer directly covering the first buffer layer, the other end of the layer extends to directly cover a portion of the first surface, and the second = the junction portion of the thermal On the electric (four), and the second electrode = first extended to directly cover a part of the first surface. Further, the third of the thermistor wafers further includes a melting point of the third-buffer layer, and the melting point of the thermosensitive circuit is greater than the melting point of the thermistor. In addition, the third buffer, the degree of phase, and the third electrode of the third electrode are at least the combination of the above-mentioned metals, and the shell includes nickel, turned, sleeved or included. In one embodiment of the invention, the material comprises silver. The first electrode and the second electrode which are disposed directly on the substrate include a second buffer layer, a cover surface and a surface. In addition, the thermistor chip covers at least the second buffer layer and a portion of the second electrode. The temperature of the sintering layer of the thermistor layer and the _th point are larger than the heat-sensitive electrode_point. In addition, the second buffer layer 200915357 M17Itwf.doc/n ^ quality includes the Korean or the material of the at least the above-mentioned electrode includes silver. The fourth electrode of the gold is added to the genus, the fourth electrode... the resistor chip further includes The other end of the package extends to the second electrode of the covering portion. The resistive layer and the fourth embodiment are in the embodiment of the invention, the sensing electrode, the first electrode is directly disposed on the first:::, the second electrode Between the fourth electrode and the fourth electrode, the end of the second electrode covers the two ends of the sensitized varistor layer. The 峤 extends to the frost and is stored in the ... main, the broken resistor, and the other resistance of the second electrode. The first electrode of the fourth electrode covers a portion of the other end of the heat-sensitive end to cover the first surface. The manufacturing method of the chip/hypersensitizer chip includes a lower electrode and a second electrode. - a face, forming a first buffer layer to cover at least part of the first life. j with a thick film process disk burning 6 Shi purple, - after the first layer of the first layer. The first layer to cover at least The temperature and the bright point of the first electrode, the burning of the resistive layer. The two electrodes are on the first surface. The electrodes are spaced apart from the first electrode and electrically connected to the thermistor layer, etc. ^^4^/. The above-mentioned first-buffer layer contacts are larger than the lanes The first buffer layer is a film in the embodiment of the present invention, and the above-mentioned thermistor layer has a sintering temperature of 200915357 - : 4171 twf.d 〇 c / n between 850 ° C and 95 ° C. A buffer layer may be disposed between the breaking resistance layer and the electrodes, and the melting point of the buffer layer is respectively greater than the sintering temperature of the thermistor layer and the melting point of the electrode covered by the buffer layer, so the thermistor layer When formed through a sintering process, the buffer layer can prevent the electrode covered by the buffer layer from migrating into the thermistor layer. Therefore, the resistance value of the thermistor wafer of the present invention is not easily affected by the temperature change property. The designer's pre-design requirements can still be met. In other words, the thermistor wafer of the present invention has better electrical performance. To make the above features and advantages of the present invention more apparent, the following embodiments are described and Attached The first embodiment of the present invention relates to a thermistor wafer 2A including a substrate 210, a first electrode 220, and a first embodiment. The second electrode 23〇, the thermistor layer 240 and a first balance layer 250. The substrate 210 has a first surface 212. The first electrode 220, the second electrode 230 and the thermistor layer mo are disposed on the substrate 210 The first electrode 220 is spaced apart from the second electrode 230. The first electrode 220 is electrically connected to the thermistor layer 240 by the first buffer layer 25, and the second electrode 230 and the thermistor layer 240 are connected. The first balance layer 250 covers at least a portion of the first electrode 220, and the thermistor layer 240 reduces the first buffer layer 250. The melting point of the first buffer layer 250 is greater than the sintering temperature of the thermistor layer 240 and the melting point of the first electrode 220, respectively. Referring to FIG. 2B, the equivalent circuit of the thermistor 10 200915357-------^17ltwf.d〇c/n of the first embodiment is the resistance & Circuit. 4 „ month and then refer to FIG. 2A. On the surface 212 of the first embodiment, the first buffer layer is directly on the surface of the first buffer layer, and the first buffer layer is Μ. One end extends directly to the first surface 212. One end of the thermistor layer 24〇 directly covers the first buffer layer 250, and the other end of the thermistor layer 24 extends to directly cover a portion of the first surface 212. The second electrode 23 is directly covered on the portion of the thermistor layer 24, and the other end of the second electrode 23 is extended to directly cover the portion of the first surface 212. In other words, the first buffer layer 2d0 is disposed between the first electrode 22A and the thermistor layer 24A, and the thermistor layer 240 is disposed between the first electrode 22 and the second electrode 23. ~ Since the first buffer layer 250 is disposed Between the thermistor layer 24A and the first-pole 410, and the melting point of the first buffer layer 25〇 is greater than the thermistor (the sintering temperature of the germanium layer 240 and the melting point of the first electrode 220, so the thermistor " When the layer 240 is formed through a sintering process (see below), the first buffer layer 250 can be avoided. The first electrode 22 迁移 migrates and diffuses into the thermistor layer 240. Therefore, the resistance value of the thermistor wafer 2 (10) will not be affected by the change in temperature and still meet the designer's pre-design requirements, so that the thermal The electrical performance of the resistive wafer 200 is better. Moreover, the thickness T2 of the thermistor layer 240 (i.e., the third surface 242 of the thermistor layer 240 away from the substrate 210 and the substrate 210) is superior to the prior art. The distance between a surface 212 can be relatively thin. Therefore, the body of the thermistor wafer 2〇〇200915357 iw-u/ji w^4171twf.doc/n can be smaller. Moreover, the first pole (10) is being read. It can be less than 15%~30% of the prior art. Dimensional gold. Therefore, the material of the thermistor wafer 200: =: silver is free. In this embodiment, the material of the first electrode 220 includes silver in the electrode 220. The weight percentage is, for example, 85% or more, and the quality includes a glass b-switched insulating material. The wire resistance layer = temperature can be between Celsius and 95 degrees Celsius, and the heat
OO
的材質包括锰、# '錄、銅或二氧化舒。此外二 缓衝層250的熔點可大於或等於攝氏14〇〇度,且第 層250的材質包括鎳(Ni)、鉻(ρί)、釕(Ru)或白人 至少上述一種金屬之合金。 w3 本實施例之熱敏電阻晶片200更包括—玻續保護居 260、一聚合物保護層270、兩背面電極280與兩外部電才^ 290。玻璃保護層260覆蓋部分第二電極230、第一緩衡居 250、熱敏電阻層240與部分第一電極220,且聚合物保^ 層270至少覆蓋玻璃保護層260。由於基板210提供的散 熱速度快,通常會造成熱敏電阻晶片200之B值不穩定, 而藉由玻璃保護層260之設置可降低基板210之散熱速 度,使得熱敏電阻晶片200之B值不穩定之現象可改善。 在本實施例中,基板210更具有一第二表面214與兩 相對端面216。第一表面212相對於第二表面214,且各個 端面216連接第一表面212與第二表面214。這些背面電 極280間隔配置於第二表面214上,這些外部電極290分 別配置於這些端面216上。此外,這些外部電極290之— 12 200915357 w/λ *!4171twf.doc/n 之一,且這些 與這些背面電 電性連接第—電極220與這些f面電極28〇 外部電極2901另-電性連接第二電極23〇 極280之另一。 先敏^且晶片200的製造方法作說明。^ 先、參考圖3A,利用印刷製程 : 220於基板⑽之第—表面犯上。接著,請ί考圖Γ 利用薄膜製程,例如_ (Sputter)製程, ^The material includes manganese, # '录, copper or dioxide. In addition, the buffer layer 250 may have a melting point greater than or equal to 14 degrees Celsius, and the material of the first layer 250 includes nickel (Ni), chromium (ρί), ruthenium (Ru) or white alloy of at least one of the above metals. The thermistor wafer 200 of the present embodiment further includes a glass protection layer 260, a polymer protection layer 270, two back electrodes 280, and two external electrodes 290. The glass protective layer 260 covers a portion of the second electrode 230, the first buffer 250, the thermistor layer 240, and a portion of the first electrode 220, and the polymer layer 270 covers at least the glass protective layer 260. Since the heat dissipation speed provided by the substrate 210 is fast, the B value of the thermistor wafer 200 is generally unstable, and the heat dissipation speed of the substrate 210 can be reduced by the arrangement of the glass protection layer 260, so that the B value of the thermistor wafer 200 is not The phenomenon of stability can be improved. In this embodiment, the substrate 210 further has a second surface 214 and two opposite end faces 216. The first surface 212 is opposite the second surface 214, and each end surface 216 connects the first surface 212 with the second surface 214. The back electrodes 280 are spaced apart from each other on the second surface 214, and the external electrodes 290 are disposed on the end faces 216, respectively. In addition, these external electrodes 290 are one of 12 200915357 w/λ *! 4171 twf.doc/n, and these are electrically connected to the back electrodes electrically connected to the first electrode 220 and the f-side electrodes 28 and the external electrodes 2901. The second electrode 23 is the other of the drains 280. The method of manufacturing the wafer 200 will be described. ^ First, referring to FIG. 3A, using the printing process: 220 on the first surface of the substrate (10). Next, please take a picture of the film process, such as _ (Sputter) process, ^
層250於第一表面212上,使得第一緩衝層25〇之—= 接覆盍於部分第-電極220上,且第—_層75()— 端延伸至直接覆蓋部分第—表面212上。本實施例中,: 由薄膜製程將第-緩衝| 25〇 <厚度控制於心 _〜3_埃’使得第—缓衝層25〇之設置不致造成熱= 電阻晶片200的體積增大。 之後’請參考® 3C,利用厚膜製程(例如印刷製程、 與燒結製程而形成熱敏電阻層24〇於第一緩衝層25〇與部 分第一表面212上,使得熱敏電阻層24〇之一端直接覆蓋 第一缓衝層250上,且熱敏電阻層24〇另一端延伸至 覆蓋於部分第一表面212上。在此必須說明的是,熱敏電 阻層240可藉由預先印刷熱敏電阻材料於第一緩衝層25〇 與部分第一表面212上,再藉由燒結製程燒結熱敏電阻材 料而形成。再次強調的是,由於第一缓衝層25〇的熔點分 別大於熱敏電阻層240的燒結溫度與第一電極22〇的熔 點,所以熱敏電阻層240在經由上述燒結製程而形成時, 第一緩衝層250可避免第一電極22〇產生遷移而擴散至熱 13 aThe layer 250 is on the first surface 212 such that the first buffer layer 25 is bonded to the portion of the first electrode 220, and the first layer 75() is extended to the directly covering portion of the first surface 212. . In this embodiment, the first buffer - 25 〇 <thickness is controlled by the film process to the center _~3_ angstroms so that the arrangement of the first buffer layer 25 不 does not cause heat = increase in the volume of the resistive wafer 200. After that, please refer to ® 3C, using a thick film process (for example, a printing process, and a sintering process to form the thermistor layer 24 on the first buffer layer 25 and a portion of the first surface 212, so that the thermistor layer 24 is One end directly covers the first buffer layer 250, and the other end of the thermistor layer 24 extends to cover a portion of the first surface 212. It must be noted that the thermistor layer 240 can be printed by pre-printing heat. The resistive material is formed on the first buffer layer 25 and the portion of the first surface 212, and is formed by sintering the thermistor material. It is emphasized that the melting point of the first buffer layer 25 is greater than the thermistor. The sintering temperature of the layer 240 is the same as the melting point of the first electrode 22, so that when the thermistor layer 240 is formed through the above-described sintering process, the first buffer layer 250 can prevent the first electrode 22 from migrating and diffusing to the heat 13a.
L 200915357 -~417ltwf.doc/n 敏電阻層240内。 電極23,二a jd ’利用印刷或賴製程形成第二 層_及部份第—表面犯上, 上之—端直接覆蓋於部份熱敏電阻層· 著面^ 另一端延伸至直接覆蓋於部分第一 表面=上;至此,熱敏電阻晶片基本上已完成弟 然而,在形成圖犯所示之第二 形成朗保護層、聚合物保 27〇、這^面= 280與廷些外部電極29〇。 迅 , „ 明參考圖3£,利用印刷 以覆蓋部分第二電極230、第一 ,衝層250、熱敏電阻層24()與部分第—電極, 聚:物保護層27。以至少覆蓋麵:護 : 欠,印茶考圖死,利甩印刷製程形成兩背面雷 極280於基板21〇之第二表面214上。然後, 滾鐘製程分卿成兩外部電極於基板21G之兩二面 W上,使得這些外部電極29Q的其中之—電性連而= 電極220與這些背面電極28〇的其中之一,且這些外部泰 另—電性連接第二電極23Q與這些背面電極 " 匕、中另—。值的一提的是,這些背面電極280亦可 於形成第—電極220於基板210之第一表面212上前, 利用印刷方法形成於基板210之第二表面214上。 [弟二實施例] 請參考圖4A,本發明第二實施例與第—實施例的不 同之處在於’第二實施例之熱敏電阻晶片3〇〇的第—電極 14 200915357 320與第二電極330的配置方式有所不同,I熱敏電阻晶 片300更包括第二缓衝層35〇,。詳言之,第一電極320與 第二電極330可分別直接配置於基板31〇之第一表面312 上’且第一緩衝層350與第二緩衝層350,分別覆蓋至少部 分第一電極320與至少部分第二電極33卜熱敏電阻層340 覆蓋第一緩衝層350、部分第一表面312與第二缓衝層 350’。請參考圖4B,第二實施例之熱敏電阻晶片300的 等效電路為圖4B所示之具有一電阻r的等效電路。 第一缓衝層350的熔點分別大於熱敏電阻層34〇的燒 結溫度與第一電極320的熔點,且第二缓衝層35〇,的熔點 分別大於熱敏電阻層340的燒結溫度與第二電極33〇的熔L 200915357 -~417ltwf.doc/n Within the varistor layer 240. The electrode 23, the second a jd 'is formed by the printing or the process of forming the second layer _ and part of the surface - the upper end directly covers part of the thermistor layer · the face ^ the other end extends to directly cover the part The first surface = upper; at this point, the thermistor wafer has been substantially completed, however, in the formation of the second formation of the protective layer, the polymer is guaranteed, the surface is 280, and the external electrodes 29 are Hey.快, „明 Referring to FIG. 3, using printing to cover part of the second electrode 230, the first, the punch layer 250, the thermistor layer 24 () and part of the first electrode, the poly: protective layer 27. To cover at least : Guard: owe, the printing tea is dead, and the printing process forms two back thunder poles 280 on the second surface 214 of the substrate 21 。. Then, the rolling clock process is divided into two external electrodes on the two sides of the substrate 21G. W, such that one of these external electrodes 29Q is electrically connected = one of the electrode 220 and the back electrode 28, and these external electrodes are electrically connected to the second electrode 23Q and the back electrodes " In addition, the back electrodes 280 may be formed on the second surface 214 of the substrate 210 by a printing method before forming the first electrode 220 on the first surface 212 of the substrate 210. Second Embodiment Referring to FIG. 4A, a second embodiment of the present invention is different from the first embodiment in that the first electrode 14 200915357 320 and the second electrode of the thermistor wafer 3 of the second embodiment are different. 330 is configured differently, I thermistor chip 300 The first buffer layer 35 and the second electrode 330 are respectively disposed directly on the first surface 312 of the substrate 31 and the first buffer layer 350 and the second buffer layer 350 are respectively disposed. Covering at least a portion of the first electrode 320 and at least a portion of the second electrode 33 respectively, the thermistor layer 340 covers the first buffer layer 350, a portion of the first surface 312 and the second buffer layer 350'. Please refer to FIG. 4B, second. The equivalent circuit of the thermistor wafer 300 of the embodiment is an equivalent circuit having a resistor r shown in Fig. 4B. The melting point of the first buffer layer 350 is greater than the sintering temperature of the thermistor layer 34 and the first electrode, respectively. The melting point of 320, and the melting point of the second buffer layer 35〇, respectively, is greater than the sintering temperature of the thermistor layer 340 and the melting of the second electrode 33〇
~緩衝層350’之配置,~ buffer layer 350' configuration,
電阻層 及材料成本可較低。 [弟三實施例] 的電性表現較佳 ’第一缓衝層35〇及第 敏電阻層340内,藉 、體積可較小 清參考圖5A,本發明第二 實施例與第一實施例的不 15 200915357 —…. 」4171ΐ\νίΜ〇(;/η 同之處在於,第三實施例之熱敏電阻晶片400更包括~~第 二電極Ε與一第三緩衝層Β’弟二電極Ε配置於熱敏電随 層440内,且第一電極420藉由第~緩衝層450與熱敏電 阻層440而電性連接至電極ε。第三緩衝層β覆蓋至少部 分第二電極Ε ’且第三缓衝層β的熔點分別大於熱敏電阻 層440的燒結溫度與第三電極Ε的熔點。請參考圖5Β,第 二貫施例之熱敏電阻晶片400的等效電路為圖5Β所示之 Ο 具有四電阻Rl、R2、R3與R4的等效電路。 ,下對於熱敏電阻晶片4〇〇的製造方法作說明。首 先’請參考圖6A,形成第一電極420於基板410之第一表 面^上。接著’形成第一缓衝層450於第一表面412上, 使知第一緩衔層45〇覆蓋部分第一電極420。接著,請參 考圖, I 4、 /战一次熱敏電阻層 440’( sub-thermistor layer ) 於部分第—表面412及第一緩衝層450上,使得次熱敏電 阻層44〇至少覆蓋緩衝層450。 、 之後’請參考圖6C,形成第三電極E於次熱敏電阻 I) 芦 440,ί- . θ 之後,形成第三缓衝層B以覆蓋至少部分第三 電斤圣E D妙' 4么 r、、w曼’形成另一次熱敏電阻層440”於次熱敏電阻 層44〇’卜,、 曰^ 上’以覆蓋第三緩衝層B。次熱敏電阻層440,與次 、、、電阻層構成(compose)熱敏電阻層44〇。換言之, 就圖鱼Pl cr^ , 13,、圖6C所繪示的步驟而言,在形成熱敏電阻層 440的_問,结_ 内 ’]弟二電極E埋入(embed)於熱敏電阻層440 1 卜弟二缓衝層B的材質包括錄、翻、舒或包含至 ^攻―種金屬之合金,第三電極E的材質包括銀。 16 200915357 24171twf.doc/n 在此必須說明的是,由於第三電極E只會經過形成次 熱敏電阻層440”所需的燒結製程,所以電極E遷移至次= 敏電阻層440”的現象可被控制。因此,設計者亦可在圖 所示之形成電極E的步驟之後,省略形成第三緩衝層B的 步驟,使得圖6C所示之次熱敏電阻層440,,至少直接覆罢 第三電極E,但是上述情形並未以圖面繪示。The resistance layer and material cost can be lower. [Electrical Third Embodiment] The electrical performance is better in the first buffer layer 35〇 and the first varistor layer 340, and the volume can be smaller. Referring to FIG. 5A, the second embodiment and the first embodiment of the present invention The same is that the thermistor wafer 400 of the third embodiment further includes a second electrode and a third buffer layer. The first buffer 440 is electrically connected to the electrode ε by the first buffer layer 450 and the thermistor layer 440. The third buffer layer β covers at least a portion of the second electrode Ε ' The melting point of the third buffer layer β is respectively greater than the sintering temperature of the thermistor layer 440 and the melting point of the third electrode 。. Referring to FIG. 5A, the equivalent circuit of the thermistor wafer 400 of the second embodiment is FIG. The Ο shown has an equivalent circuit of four resistors R1, R2, R3 and R4. The manufacturing method of the thermistor wafer 4A will be described. First, please refer to FIG. 6A, the first electrode 420 is formed on the substrate 410. The first surface is on the surface. Then, the first buffer layer 450 is formed on the first surface 412, so that the first surface is known. The cap layer 45A covers a portion of the first electrode 420. Next, referring to the figure, I 4, a sub-thermistor layer 440' (sub-thermistor layer) is applied to the portion of the first surface 412 and the first buffer layer 450, so that The sub-thermist layer 44A covers at least the buffer layer 450. Then, referring to FIG. 6C, the third electrode E is formed on the sub-thermistor I) 435, ί-. θ, and the third buffer layer B is formed. Covering at least part of the third battery, the second thermistor layer 4, the other the thermistor layer 440" is formed on the sub-thermist layer 44, 曰^" to cover the third buffer layer B. The sub-thermist layer 440, and the second, and the resistive layer compose the thermistor layer 44. In other words, in terms of the steps illustrated by the fish Pl cr^, 13, and FIG. 6C, Forming the thermistor layer 440, the second electrode E is embedded in the thermistor layer 440 1 The material of the buffer layer B includes recording, turning, comforting or inclusion to ^ Attacking the metal alloy, the material of the third electrode E includes silver. 16 200915357 24171twf.doc/n It must be stated here that due to the third electrode E only passes through the sintering process required to form the sub-thermist layer 440", so the phenomenon that the electrode E migrates to the sub-varistor layer 440" can be controlled. Therefore, the designer can also form the electrode E as shown in the figure. After the step, the step of forming the third buffer layer B is omitted, so that the secondary thermistor layer 440 shown in FIG. 6C is at least directly over the third electrode E, but the above case is not shown in the drawing.
U 然後,請參考圖6D,形成第二電極430於部分第一 表面412上及部分熱敏電阻層440上,使得第二雷極43〇 可覆盍部分熱敏電阻層440與部分第一表面。接著, 形成玻璃保護層460、聚合物保護層47〇、這些背面電極 480與這些外部電極490,上述這些構件的形成方式可^考 第一實施例之圖3E與相關敘述,故於此不再贅述。# [第四實施例] 、〜 #請參考圖7A,本發明第四實施例之熱敏電阻晶片5〇〇 與第二實施例的不同之處在於:熱敏電阻晶片5〇〇更包浐 第三電極E1與第四電極E1,。f —電極52〇與第二^ 530配置於基板510之第一表面512上。第一緩衝 覆蓋至少部分第-電極52〇,且第二緩衝層55〇,覆^至少 部分第二電極530。熱敏電阻層54〇覆蓋第—緩衝層5%、 第二緩衝層550,與部分第-表面512^三電極£1日配置於 ^電阻層540内’且第四電極E1’之1覆蓋部分熱敏 包阻層MG’第四電極E1之另-端延伸至覆苗部 考®7B’第四以例之熱敏‘晶片5_ 4效笔路為圖7Β所示之具有五電阻Ri、R2、r3、r^ 17 200915357 24I71twf.doc/n R5的等效電路。 务敎=第,衝層550及第二緩衝層550,之配置,、 免熱敏電阻層540進行焯社制, 避 二緩徐屏^製程時,第一缓衝層550及第 、、、: 產生遷移而擴散至熱敏電阻層540内,蕤 以,可使熱敏電阻晶片5⑽沾+ 释 及材料成本可較低。 碰表現較佳、體積可1 [第五實施例] Ο 包括ilim’本發明第五實施例之熱敏電阻晶片6〇〇 :弟,20、弟二電極630、第三電極_ 電極630與第四·Ε2,間隔設置於熱敏電电 1 ,之兩端。第—電極620直接配置於基板010之第〜 6;。面乂2之中間位置上,第一緩衝層650覆蓋第-電槌U, then referring to FIG. 6D, forming a second electrode 430 on a portion of the first surface 412 and a portion of the thermistor layer 440 such that the second drain electrode 43 can cover a portion of the thermistor layer 440 and a portion of the first surface . Next, a glass protective layer 460, a polymer protective layer 47, and these back electrodes 480 and the external electrodes 490 are formed. The formation of the above-mentioned members can be referred to FIG. 3E and related description of the first embodiment, and thus no longer Narration. # [Fourth Embodiment], ~ # Please refer to FIG. 7A, the thermistor wafer 5 of the fourth embodiment of the present invention is different from the second embodiment in that the thermistor wafer 5 is further packaged. The third electrode E1 and the fourth electrode E1, f — The electrode 52 〇 and the second 530 are disposed on the first surface 512 of the substrate 510 . The first buffer covers at least a portion of the first electrode 52A, and the second buffer layer 55 is covered with at least a portion of the second electrode 530. The thermistor layer 54A covers the first buffer layer 5%, the second buffer layer 550, and a portion of the first surface 512^three electrodes are disposed in the ^resist layer 540' and the first electrode E1' is covered by the first electrode E1' The other end of the fourth electrode E1 of the thermal barrier layer MG' extends to the cover of the seedlings test 7B'. The fourth example of the thermal 'wafer 5_ 4 effect pen path is shown in Fig. 7Β with five resistances Ri, R2 , r3, r^ 17 200915357 24I71twf.doc/n R5 equivalent circuit. The first buffer layer 550 and the first, second, and the second buffer layer 550 are disposed, and the thermistor layer 540 is not manufactured by the system. The migration occurs and diffuses into the thermistor layer 540, so that the thermistor wafer 5 (10) can be released and the material cost can be low. The touch performance is better and the volume can be 1 [Fifth Embodiment] 包括 Including ilim' The thermistor wafer 6 of the fifth embodiment of the present invention: brother, 20, second electrode 630, third electrode _ electrode 630 and 4. Ε 2, the interval is set at the two ends of the thermistor 1 . The first electrode 620 is disposed directly on the first to sixth of the substrate 010; In the middle position of the face 乂 2, the first buffer layer 650 covers the first power 槌
熱叙電阻層_覆蓋第一緩衝層65〇與第一電極 兩側之部分第—表面Μ,ρ 味 U 阻〜40肉从 。乐三電極E2配置於熱敏電 64〇曰,…_罘—電極6刈之一端覆蓋於部份之熱敏電随 619 電極63G之另一端延伸至覆蓋於第-表面 ^四電極E2’之—端覆蓋部分熱敏電阻身_,第 =第五覆ί於第一表面612。請參考圖 ,,_ Κ也歹丨之熱敏電阻晶片β〇〇的等效電路為圖8;β 1具有四電阻R1 ' R2、R3輿r4的等故電路。 之本發明之熱敏電&晶片至少具有以下其中 置有於熱敏電阻層與這些電極的其中之—之間可配 後衝層,且緩衝層的熔點分別大於熱敏電阻層的燒 18 200915357 24171twf.doc/n 結溫度以及上述被緩衝層所覆蓋之電極的熔點,所以熱敏 電阻層在經由燒結製程而形成時,缓衝層可避免上述被缓 衝層所覆蓋之電極產生遷移而擴散至熱敏電阻層内。因 此,本發明之熱敏電阻晶片之電阻值隨溫度變化的性質將 不易受到影響而仍可滿足設計者的預先設計需求。換言 之,本發明之熱敏電阻晶片的電性表現較佳。 二、 由於缓衝層可避免上述被緩衝層所覆蓋之電極產 生遷移而擴散至熱敏電阻層内,所以與習知技術相較,本 發明之熱敏電阻層的厚度可較薄。因此,本發明之熱敏電 阻晶片的體積可較小。 三、 由於缓衝層可避免上述被缓衝層所覆蓋之電極產 生遷移而擴散至熱敏電阻層内,所以與習知技術相較,本 發明之電極的材質中鈀的重量百分比可少於15%〜30%,甚 至不需使用銀赵合金。因此,本發明之熱敏電阻晶片的材 料成本可較低。 雖然本發明已以實施例揭露如上,然其並非用以限定 本發明,任何所屬技術領域中具有通常知識者,在不脫離 本發明之精神和範圍内,當可作些許之更動與潤掷,因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 準。 【圖式簡單說明】 . 圖1繪示習知之一種熱敏電阻晶片的剖面示意圖。 圖2A繪示本發明第一實施例之一種熱敏電阻晶片的 剖面示意圖。 19 200915357 !4171twf.doc/n 圖2B繪示圖2A之熱敏電阻晶片的等效電路圖。 圖3A至圖3F繪示製造圖2A之熱敏電阻晶片的流程 示意圖。 圖4A繪示本發明第二實施例之一種熱敏電阻晶片的 剖面示意圖。 圖4B繪示圖4A之熱敏電阻晶片的等效電路圖。 圖5A繪示本發明第三實施例之一種熱敏電阻晶片的 剖面示意圖。 圖5B繪示圖5A之熱敏電阻晶片的等效電路圖。 圖6A至圖6D繪示製造圖5A之熱敏電阻晶片的流程 示意圖。 圖7A繪示本發明第四實施例之一種熱敏電阻晶片的 咅1J面示意圖。 圖7B繪示圖7A之熱敏電阻晶片的等效電路圖。 圖8A繪示本發明第五實施例之一種熱敏電阻晶片的 剖面示意圖。 圖8B繪示圖8A之熱敏電阻晶片的等效電路圖。 【主要元件符號說明】 100、200、300、400、500、600 :熱敏電阻晶片 110、210、310、410、510、610 :基板 112、114、142、212、214、242、312、412、512、 612 :表面 116、216 :端面 120 、 130 、 150 、 160 、 220 、 230 、 280 、 290 、 320 、 20 200915357 KD-U/>-J w /4l71twf.doc/n 330、420、430、480、490、E、520、530、E卜 ΕΓ、620、 630、E2、E2’ :電極 140、240、340、440、540、640 :熱敏電阻層 250、350、350’、450、B、550、550’、650 :緩衝層 170、260、270、460、470 :保護層 440’、440” :次熱敏電阻層 ΤΙ、T2 :厚度The heat resistive layer _ covers the first buffer layer 65 〇 and a portion of the first electrode on both sides of the first surface Μ, ρ 味 U 〜 ~ 40 meat from. The Le three electrode E2 is disposed on the thermistor 64, and the one end of the electrode 6 is covered with a portion of the thermistor extending along the other end of the 619 electrode 63G to cover the first surface ^four electrode E2' The end covers a portion of the thermistor body _, and the fifth layer is applied to the first surface 612. Referring to the figure, the equivalent circuit of the thermistor wafer β〇〇 of _ Κ 为 is shown in Fig. 8; β 1 has the same circuit of four resistors R1 'R2, R3 舆 r4. The thermistor &lifier of the present invention has at least a backing layer disposed between the thermistor layer and the electrodes, and the melting point of the buffer layer is greater than that of the thermistor layer. 200915357 24171twf.doc/n The junction temperature and the melting point of the electrode covered by the buffer layer, so that the thermistor layer is formed by the sintering process, the buffer layer can avoid the migration of the electrode covered by the buffer layer. Diffusion into the thermistor layer. Therefore, the resistance value of the thermistor wafer of the present invention as a function of temperature will be less susceptible to affecting the designer's pre-design requirements. In other words, the thermistor wafer of the present invention performs better in electrical performance. 2. Since the buffer layer can prevent the electrode covered by the buffer layer from migrating into the thermistor layer, the thickness of the thermistor layer of the present invention can be thinner than in the prior art. Therefore, the volume of the thermistor wafer of the present invention can be small. 3. Since the buffer layer can prevent the electrode covered by the buffer layer from migrating and diffusing into the thermistor layer, the weight of the palladium in the material of the electrode of the present invention can be less than that of the prior art. 15% ~ 30%, even without the use of silver Zhao alloy. Therefore, the material cost of the thermistor wafer of the present invention can be low. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and simplifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing a conventional thermistor wafer. Fig. 2A is a cross-sectional view showing a thermistor wafer of the first embodiment of the present invention. 19 200915357 !4171twf.doc/n FIG. 2B is an equivalent circuit diagram of the thermistor wafer of FIG. 2A. 3A to 3F are schematic views showing the flow of manufacturing the thermistor wafer of Fig. 2A. 4A is a cross-sectional view showing a thermistor wafer according to a second embodiment of the present invention. 4B is an equivalent circuit diagram of the thermistor wafer of FIG. 4A. Fig. 5A is a cross-sectional view showing a thermistor wafer according to a third embodiment of the present invention. FIG. 5B is an equivalent circuit diagram of the thermistor wafer of FIG. 5A. 6A to 6D are schematic views showing the flow of manufacturing the thermistor wafer of Fig. 5A. Fig. 7A is a schematic view showing a 热敏1J surface of a thermistor wafer according to a fourth embodiment of the present invention. FIG. 7B is an equivalent circuit diagram of the thermistor wafer of FIG. 7A. Fig. 8A is a cross-sectional view showing a thermistor wafer according to a fifth embodiment of the present invention. FIG. 8B is an equivalent circuit diagram of the thermistor wafer of FIG. 8A. [Description of Main Component Symbols] 100, 200, 300, 400, 500, 600: Thermistor wafers 110, 210, 310, 410, 510, 610: substrates 112, 114, 142, 212, 214, 242, 312, 412 , 512, 612: surface 116, 216: end faces 120, 130, 150, 160, 220, 230, 280, 290, 320, 20 200915357 KD-U/>-J w /4l71twf.doc/n 330, 420, 430, 480, 490, E, 520, 530, E, 620, 630, E2, E2': electrodes 140, 240, 340, 440, 540, 640: thermistor layers 250, 350, 350', 450 , B, 550, 550', 650: buffer layer 170, 260, 270, 460, 470: protective layer 440', 440": secondary thermistor layer T, T2: thickness
Claims (1)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW96134869A TW200915357A (en) | 2007-09-19 | 2007-09-19 | Thermistor chip and method of fabricating the same |
| JP2008006777A JP2009076838A (en) | 2007-09-19 | 2008-01-16 | Thermistor chip and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW96134869A TW200915357A (en) | 2007-09-19 | 2007-09-19 | Thermistor chip and method of fabricating the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200915357A true TW200915357A (en) | 2009-04-01 |
Family
ID=40611493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW96134869A TW200915357A (en) | 2007-09-19 | 2007-09-19 | Thermistor chip and method of fabricating the same |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2009076838A (en) |
| TW (1) | TW200915357A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102016101247A1 (en) | 2015-11-02 | 2017-05-04 | Epcos Ag | Sensor element and method for producing a sensor element |
| CN112053822A (en) * | 2020-09-04 | 2020-12-08 | 翔声科技(厦门)有限公司 | Manufacturing process of negative temperature coefficient resistor |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5648101A (en) * | 1979-09-28 | 1981-05-01 | Hitachi Ltd | Thick film thermistor |
| JPH08306508A (en) * | 1995-05-08 | 1996-11-22 | Nippondenso Co Ltd | Thin film thermistor element and its manufacturing method |
| JP2983502B2 (en) * | 1996-11-22 | 1999-11-29 | 松下電器産業株式会社 | Temperature sensor element and temperature sensor provided with the same |
| JP4298239B2 (en) * | 2002-08-29 | 2009-07-15 | コーア株式会社 | Electrode composition and electronic component |
-
2007
- 2007-09-19 TW TW96134869A patent/TW200915357A/en unknown
-
2008
- 2008-01-16 JP JP2008006777A patent/JP2009076838A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JP2009076838A (en) | 2009-04-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP1944585A2 (en) | Thermal type fluid sensor and manufacturing method thereof | |
| JP5777811B2 (en) | Measuring shunt including safety frame | |
| JP2006352082A5 (en) | ||
| JP6917843B2 (en) | Gas sensor | |
| CN101399100A (en) | Thermistor chip and method for manufacturing same | |
| TW201218383A (en) | Thin film transistor and pixel structure having the thin film transistor | |
| JP2012508870A (en) | Sensor element and method for manufacturing sensor element | |
| TW200915357A (en) | Thermistor chip and method of fabricating the same | |
| JP5709041B2 (en) | Thin film thermistor sensor and manufacturing method thereof | |
| JP7549984B2 (en) | Stacked electrode, strain-resistant film with electrode, and pressure sensor | |
| JPH116811A (en) | Contact combustion type gas sensor and manufacturing method | |
| WO2010084916A1 (en) | Base body for gas sensor and method for manufacturing the base body | |
| JP5724005B2 (en) | Contact combustion type gas sensor | |
| JP2011196896A (en) | Contact combustion type gas sensor | |
| JP2008251611A (en) | Thin composite element and manufacturing method thereof | |
| CN104538548B (en) | A kind of new resistive random access memory and its manufacture method | |
| JP5278086B2 (en) | Thin film gas sensor and manufacturing method thereof | |
| CN109390414B (en) | A thin film transistor, an array substrate and a display panel | |
| JP7744812B2 (en) | Gas Sensor | |
| JP3367495B2 (en) | Resistance thermometer and manufacturing method thereof | |
| JP5725669B2 (en) | Thin film device and manufacturing method thereof | |
| JP7776976B2 (en) | Gas Sensor | |
| JP2014190847A (en) | Gas sensor | |
| JP2012079976A5 (en) | ||
| WO2024214593A1 (en) | Resistor |