200905815 七、指定代表圖： (一） 本案指定代表圖為：第（二 (二) 本代表圖之元件符號簡單說明: (10)封膠 ^ (2 0)晶片 (21)晶片打線接點 (30)導線 (40)黏著層 (50) 載板 (51) 載板打線接點 (5 2)載板元件接腳 (6 0 )外框 八本案若有化學式時’請揭示最能顯示發明特徵的化學式： 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種電子元件的封裝結構與其封 裝方法’特別是有關於以晶片直接貼裝技術（Chip On Board，簡稱C0B)製作的封裝結構與其封裝方法。 【先前技術】 現今市面上的電子產σ 本 稱 ，皆接s Μ 士 大多數為降低封裝 白株用日日片直接貼梦枯併（η · ^ rnD、 侵跖裒技術（Chip On B〇ard， COB)進行封裝，減 < /尸/r而的封裝疋件而減 200905815 裝成本的支出。一般而言，目前晶片直接貼裝技術適 用於整機產品，並且有外殼包覆之產品。 參照第一圖’為目前一般的晶片直接貼裝的封裝 結構，其包含黑膠（110)、晶片（120)、鋁線（130)、 缺氧膠（140)、印刷電路板（150)。在此一封裝結構 中，晶片（120)藉由缺氧膠（14〇)黏著固定於印刷電路 板（150)上，而以鋁線（130)電性連接晶片（12〇)與印 刷電路板（150)並且以黑膠（110)覆蓋晶片（12〇)與印 刷電路板（150)。 ^ 此一晶片直接貼裝（C〇B)封裝方法，係先使用缺 氧膠（140)將晶片（120)黏著於印刷電路板（“ο)上， 再經高溫烘烤使缺氧膠（140)硬化’而使晶片（12〇)固 定於PCB(150)上 將晶片打線接點（121)連結到印刷電路板打線接點 (1 51)上。當打線完畢後，再將晶片（1 2 〇)用黑膠（11 〇) (COB膠’簡稱黑膠）直接覆蓋後，再經過長時間的 高溫供烤’並使黑膠（110)硬化而完成此一晶片直接 貼裝封袭。 然而此一晶片直接貼裝封裝結構與方法，在封壯 時’覆蓋黑膠（110)後’往往會因為黑膠分布不均2 k成各個區域的黑膠厚度和黑膠量的不均勻，例如以 200905815 平面角度（俯視角度）而言，會因晶片為長方形，而封 膠範圍為半圓形，上下兩邊（即晶片的長邊）的膠量較 少，左右兩邊（即晶片的短邊）的膠量較多；而以高度 的角度（侧視角度）而言，中央厚而四週薄，這兩個因 素，在黑膠硬化後，會產生因黑膠分布不均而造成各 區域的黑膠硬化後對封裝結構的拉力不平均，而造成 印刷電路板彎板，進一步會導致此元件在以表面黏著 技術（surface mount techn〇1〇gy，簡稱 SMT)進行購 裝的過程中，會因印刷電路板彎板造成元件空焊。 此外，此元件在高 _ 、J J Λ沒貝.¾¾閃5八H寸，晶 片和膠體依其物理特性而熱脹冷縮時，其會因元件整 體的黑膠量分佈不平均’導致各個區域的黑膠膨張與 縮小的量不相同’易造成元件彎曲孤度過大，而使晶 片出現裂痕或打線脫落，而造成元件故障。 再者，封黑膠的量須需大過封裝面積的50%，此 ^封會因上方及外圍，黑膠的分布不均而需使用較多 ^的黑膠來覆蓋相㈣封裝面積。如第—圖所示，因 件上方覆蓋之黑膠為_半弧形，因此’在進行表 =著（SMT)時，機台不易準確抓取元件，而容易造 成元件抛料、位移、短路等問題。 其次， 以封裝完成後對元件 進行蓋印的角度來 200905815 呪，也因黑膠硬化後形4 — 致盔綸异W + 丰弧形，而非一平面，導 …、响疋以油墨或雷射進行蓋印，均不 觀。若以記憶體模組的角度易"“邊吳 現一半弧形，而非—平此—封裝結構因呈 i是mr面積較小，而導致散熱不=問 對於以目前現有的封 差。因此，亟需要：的整體外觀上也比較 較佳整體外觀 結構與封以法。封^本的w直㈣裝封裝 【發明内容】 本發明欲解決之卩^ Hg # & > 結構鱼方半由，η 碭係為在晶片直接貼裝封裝 ^ ^ j *封裝結構内各區域之封膠厚度和黑 ;::::!致的硬化拉力不平均，而造成印刷 辉、晶片出現裂痕、打線脫落、 ;、位移、紅路、散熱片不易安裝、或是盥散 】：：：：過小導致散熱不良等，習知封裝結構與 封袭方法會產生的問題。 根，上述目的’本發明提供一解決上問題之技術 2 ’本發明提供—電子元件之封裝結構可以使封膠 =的封裝結構已解決上述問題。此一封裝結構包 rri有至少一晶片打線接點的晶片、-具有部分載 反丁秦接點對應晶片打線接點的載板、一設置於該晶 200905815 間的黏著層、-電性載板打線接點與連 線一内緣包圍整個晶片的外 U一卜片與載板部分表面的封膠。在此封 載板上，並且外框的内緣可=個 —外緣不超過載板而突出於载板，本發明利用 二=片的外框限制封膠的流動與分布範圍，而 均勻化各個封膠覆蓋區域的厚度，而避免 封膠硬化後對封裝結構的拉力不平均。°°5 、 此外，本發明提供—電子元件的封裝方法 ==題並達成本發明目的的另一技術手段二 點的載板，接著，接合一具有至：：丁,接 點的晶片打線接點2的晶片與載板，再：線接二， :線應於晶片打線接點的载板打線接點二 ::一外框於載板上而以外框之内緣包圍整個晶、 片，瑕後，填充一封膠包覆晶片與載 此一封裝方法利用在填充封膠前，先設置—外2 以外框内緣包圍晶片’而使得在填充封膠時Ϊ 二：踢的流動與分布範圍，進而均勾化 復盍區域的厚度與拉力。 ， 因此，本發明對比於先前技術之功效在於，本發 200905815 明提供一電子元件的封裝結構與封裝方法，利用—外 框的設置限制封膠的流動與分布範圍，進而均勻化 個封膠覆蓋區域的厚度與拉力，而使載板不會因拉力 不均而彎板或變形，造成晶片破裂或打線脫落，進而 增=^可靠度，在表面黏著製程（SMT)時也不發生元 ，工鲜此外，由於此一外框限制封膠的流動與分布 使封膠硬化後形成依具有較平坦頂部表面的 鬼狀、'，“冓，而非如同先前技術一樣為一半弧形，所以 =會有：台不易準確抓取元件’而容易造成元件抛 散執片等問題’也不會有蓋印不易清楚美觀、 = 女裝、或是與散熱片接觸面積過小導致散 η:題’並且因為加上外框，故可限制封膠： 二—降有效的減少封膠量明顯減 【實施方式】 2明的一些實施例詳細描述如下 该坪細描述外，太 、、叨丨示了 施行。亦即,x 、可以廣泛地在其他的實施例 丁万即’本發明的範圍不受e蔣山々虚、 制，而以本發明描屮夕由= 出之實施例的限 …之實施例圖示中的各元件咬：槿旱：… 如下之說明作為有限定的認知，即 神與應用範數目上的限制時本發明之精 與方法上再者可，數個元件或結構並存的結構 再者，在本說明書中，各元件之不同部分 200905815 並沒有完全依照尺寸繪圖，某些尺度與其他相關尺度 相比或有被誇張或是簡化，以提供更清楚的描述以增 進對本發明的理解。而本發明所沿用的現有技藝，在 此僅做重點式的引用，以助本發明的闡述。 參,日、?、弟一圖所示，其為本發明之封裝結構之一較 佳實％例，此一封裝結構包含一晶片（2〇)、一載板 (50)、一黏著層（40)、至少一導線（3〇)、一外框（6〇) 以及一封膠（10)。晶片（2〇)上設置有至少一晶片打線 接點（21 )，其可以為一接墊、一銲墊或是一裸露出的 %路，而載板（50)上設置有數個載板打線接點， 其中至 >、邛分載板打線接點（51)與晶片（2 〇)上的晶 片打線接點（21)相對應，其可以為一接墊、一銲墊、 一金手指（gold finger)或是一裸露出的電路。載板 (50)為一印刷電路板或是一製作有電路或圖案化電 路以及載板打線接點（51)的基板，並且此一載板（$ 〇) 可以設置有數個用以電性連接外界電路或其他元件 的元件接腳（52)。 在第二圖所示之封裝結構中，黏著層（40)係設置 於晶片（20)與載板（50)之間，用以將晶片（2〇)黏著固 定於載板（5G)上’而導線⑽電性連接晶片打線接點 (21)與對應晶片打線接點（21)之載板打線接點 (51) ’而做為晶片（2〇)與該載板（5〇)之間的連線介 10 200905815 t框⑽係設置於载板⑽上，而與載板 ,y 令置晶片（20)與可供填充封膠（10)的空 ς ’ :框(6〇)之内緣可以包圍晶片（2〇)，但不覆蓋而 二中^片（20)，甚至外框（6〇)之内緣可以因應不同封 :兩求而包圍導線(30)與載板打線接點⑽，而盆外 =小於載板⑽而不超出或凸出載板(5。)水平方 :、表面。然而’在本發明之其他實施例中，外框可 =應不同封裝需求而等於載板大小而不超出J 出載板水平方向的表面。 二人封膠（10)係填充於外框（60)與載板（5〇)形 烕的容置空Φ^ @ & 2中而包覆整個晶片（20)與部份的載板 至包覆導線（3 0)與載板打線接點（51)， 1:!:在灌注或是填充入外框(6。)與载板⑽形 體=後’因封膠(1°)此時仍為流體狀態或液 中且：外框⑽限制其流動或分佈範圍於該容 笨二間中，會導致封膠（10)如同液體倒入一容器中一 置中，而在外框(60)與載板(5〇)形成的容 都=一水平面，使得各個區域所覆蓋的封膠 ，。因此’等封膠硬化後’其頂部表面會形成一 =的平面，而不會如同習知技術的封裝結構（如第 圖）之封膠形成一半弧形，並且各區域 封膠都等高具有相同的严# .隹“〜y所覆盍的 蓋區域的厚产各個封膠覆 度/、拉力，而使載板不會因拉力不均而彎 11 200905815 破裂或打線脫落，進而增加其可 板或變形，造成晶片 靠度。 η膠、月之封裝結構中，黏著層（40)可以為一缺 ϋ曰片：f、％氧樹脂(epoxy)、銀膠或是其可以 ;者：】：載板使其接合與固定的材料。導線⑽則 有良好導電性的全属！ 線、銘線或其他具 膠，可封膠⑽為-⑽膠或是黑 材料。〜、用在封裝時用以保護封裝結構的封膠 參照第三A圖，為本發明之封襄結 施例的剖面圖，盆為第_ 較么實 *，本發明之外二=圖。在此-實施例 时外框(60)的形狀與材質，而是可 由1著物:言二：'同的形狀與材質，其可以藉 =二L機構或結構來進行外框⑽ 0置甚至’在本發明之其他麻fη士 t 載板為-體成型，為載板本身的外框可以與 佳圖’其為本發明之封裝結構之另-較 的剖面圖，其所展示的封 = 所展不的封裳結構大致相同，所不同的地=:第1 12 200905815 -A圖所展示的封裝結構的外框⑽是直錢置於載板 _而_不而其他機構或結構來進行外框（60)的設 献^，弟三β圖所展示的封裝結構_，外框⑽，）與載 個接入彼结合，是藉由至少二個固定機構（61)與至少兩 機構(53)而達成。在第三Β圖所展示的封裝結 在外框（6〇 )底部設置有至少兩個固定機構 而一在載板(50’)則設置有至少兩個對應外框⑽，) 之固定機構⑻）的接合機構（53)，藉由外框⑽，） =定機細)與載板(5〇，)上之接合機構(53)進 订接& ’而將外框⑽，）牢牢固定於载板（50,)上。 一在本只施例中’如第三Β圖所示，外框⑽，)上之 ，疋機構(61)為一定位卡榫或定位插銷，而載板(5〇。 之接合機構（53)則為—對應於外框（6()，）上之定位 卡榫或定位插銷⑻)的定位孔或是定位插銷孔 ’夕框(60 )精由將定位卡榫或定位插銷⑻)插入 1 ⑼’）對應的定位孔或是定位插銷孔（53)，而將 (6〇，）固定於載板（50，）上。然而，本發明並不限 =固定機構（61)-定為定位卡榫或定位插鎖，也不限 疋接合機構（53)為定位孔或是定位插鎖孔，在本發明 ’外框上之固定機構為可以為-定：孔 或m立㈣孔’而載板上之接合機構則為一對應外 :上之定位孔或是定位插銷孔的定位卡榫或定位 銷0 13 200905815 - 此外，在本發明之另一實施例中，外框上之固定 ::為可以為外框本身’而載板上之接合機構則為-對應外框的夾具或是插槽，藉由載板上的夹具夹住外 框，或是將外框底部插入插槽中而固定外框於載板 本發明也提供一種封裝方法，參照第⑸A圖至第 四c圖為本發明之一封裝方法之一較佳實施例，其皆 以剖面圖展示，其展示之内容為第三八圖所展示的封 裝結構的製作方式。此-封裝方法，首先，參照第四 A圖，提供一設置有複數個載板打線接點（51)的載板 (50)與一晶片（20)，並且接合晶片（2〇)與載板（5〇)， 而將晶片（20)固定於載板⑽上，並且晶片⑽設置 有對應至少部分載板打線接點（51)的晶片打線接點 (21)，接著，以導線（30)打線接合晶片（2〇)上的晶片 打線接點（21 )，與載板（50)上對應於晶片打線接點 (21)的載板打線接點（51)，而電性連接晶片（2 裁 接著，參照第四Β圖，固定一外框（6〇)於載板（5〇) 上而與載板（50)形成一谷置晶片（2〇)與可供填充封 膠（10)的空間，外框（60)之内緣可以包圍晶片（2〇), 但不覆蓋而密封晶片（20)，甚至外框（6〇)之内緣可以 因應不同封裝需求而包圍導線（30)與載板打線接點 14 200905815 ()，、外緣則小於或等於載板(50)而不超出或凸 於韵水平方向的表面。外框(6〇)可以直接設置 盘=(G)上’本發明並未限定此-外框⑽）的形狀 j貝，而是可以依封裝的需求而採用不同的形狀與 材貝，其可以藉由一黏著物皙（ 一 (__定於載板1 :，)而將外框 來進行外框⑽的設Γ 需其他機構或結構 取^ ’茶照第四C圖，填充一封膠（10)於外框⑽ =⑽形成的容置空間中，而包覆整個晶片⑽ =份的載板（5〇)表面，甚至包覆導線⑽與載板打 ^點51)。在剛封膠在灌注或是填充入外框（60)與 &二(50)形成的备置空間後，因封膠(⑻仍為流體狀 液體狀態，而外框⑽限制其流動或分佈範圍於 置空間中，會導致封膠(10)如同液體倒入一容器 -樣形成—水平面’而在外框⑽）與載板（ 形成一水平面，使得各個區域所覆蓋的 , * ^因此，等封膠硬化後，各區域所所覆蓋 士封膠都等高具有相同的厚度’並且其頂部表面會ς 旦的平面，而非一半弧形，進而均勾化各個封 膠復盍區域的厚度與拉力。 ，外，在第四Α圖至第四c圖所展示之實施例 曰曰片（20)與載板（5〇)之間的接合，係藉由將一黏 15 200905815 -著層（40)設置於晶片（20)與載板（50)之間，而將晶片 (20)黏著固定於載板（5〇)上。黏著層（4〇)可以為— 需高溫烘烤的黏著材料，例如樹脂層、環氧樹浐 (epoxy)或銀膠等可以直接用以黏著固定的黏著^ 料，或是一需要高溫烘烤而固定晶片（20)於載板（50 士的黏著材料，例如缺氧膠或熱固性樹脂等需高溫烘 才可以固化的黏著材料。因此，當黏著層⑷一 缺氧膠或熱固性樹脂等需高溫烘烤才可以固化的黏 者材料’例如缺氧膠或熱固性樹脂等黏著材料二 =片⑽於載板（50)上後，需要對其進行高烤 以固化而固定晶片（20)於載板（50)上。 形成：ί置封膠⑽於外框⑽與载板(5。) 板&工 而包覆整個晶片（20)與部份的載 板C 5 0 )表面的步驟中 執 與載板⑽形成：二：真滿外框⑽ 或是封腺Π η λ、， 二間，而與外框的頂部切齊， 容置空間，而勺亚填滿外框（6〇)與載板（5〇)形成的 (50)表 匕復整個晶片（20)、導線與部份的載板 框⑽二IS度低於外框(6〇)的高度而未與外 膠材料，而封後，可以視其所採用的封 性材質，⑽膠、黑膠或是其他熱固 若封膠為署勝，目、四酿烘烤步驟用以使封膠固化， a少、夕，則需進行大約8小時的高、、®# 次，雖然以上述封梦方n 』才旳巧，皿烘烤。其 疋封裝方法可以得到一個封膠頂部為一 16 200905815 •平坦表面且非為半弧形的封裝結構， 具有一個更平坦的了§郫主^ —疋為了使封膠 一的頂。卩表面，可以在填& " 封踢U0)固化後，進行—研磨製程。、充封勝（1〇)亚 參照第五A圖至第五c圖，其 方法之另一較佳者& μ . „ ^ ^封裝 之内容為第： 皆以剖面圖表示，其展示 ”、、第一Β圖所展示的封裝結構 五Α圖至第五圖所展干之抖驻古土 衣彳乍方式。弟 Γ ^ 口所展不之封裝方法不同於第四Α圖至 第四C圖所展示之封炉方 五圖所麗_ 之封I方法之處，在於第五A圖至第 " 不之封裝方法所提供的載板（50，）除了且有 複數個載板打線接點⑸），其中至少部份^ 了;^ 點（51)對摩、於曰Η Γ9ίη L a u 戟板打線接 T應於曰曰片（20)上之晶片打線接點（21)，還且 有至>'兩個接合裝置（53)，以及外框⑽，）具有至少兩 個固定裳置⑽，而外框(6〇，)與(5〇，)的接合方式係 二1框上0)上的固定裝置(61)與載板(5〇，)上與固定 對應的接合裝置（53)結合，而將外框（6〇，） 牢牢地固疋於載板（50，）上，其他步驟大致與第四A 圖至第四C圖所展示之封裝方法相同。首先，參照第 五A圖提供一設置有複數個載板打線接點（51)與至 v 2個接合裝置（53)的載板（50，）與一晶片（2〇)，並且 接5曰曰片（20)與載板（5〇)，而將晶片（20)固定於載板 (50)上，並且晶片（2〇)設置有對應至少部分載板打線 接點（51)的晶片打線接點（21)，接著，以導線（30)打 線接合晶片（20)上的晶片打線接點（21)，與載板（50) 17 200905815 子應於Ba片打線接點（21)的載板打線接點（51)。 接考，參照第五B圖，結合外框（6〇,)上的固定 (61)與載板(50，)上與固定裝置(61)對應的接合J 置(53)，而將外框⑽，)牢牢地固定於載板(5〇，)上广 載板載板(50，)形成一容置晶片(2〇)與可供填充 、:0)的空間’外框⑽’)之内緣可以包圍晶片 ()，但不覆蓋而密封晶片（20)，甚至外框（6〇，）之内 :可以因應不同封裝需求而包圍導線(3〇)與載板打 、’泉接點(51) ’而其外緣則小於或等於載板載板(5〇,) 而不超出或凸出載板載板(5〇，)水平方向的表面。外框 (60’）可以直接設置於載板載板（50，）上，本發明並未 =定此一外框（60，）的形狀與材質，而是可以依封裝的 =求而採用不同的形狀與材質，其可以藉由一黏著物 質（，圖中未示）而將外框（60，）黏著固定於載板載板 (50 )上，而不需其他機構或結構來進行外框 設置。 最後，芩照第五C圖，填充一封膠（丨〇)於外框（6 〇，） 與載板（50，）形成的容置空間中，而包覆整個晶片（2〇) 與部份的載板（50，）表面，甚至包覆導線（3〇)與載板打 線接點（51)。在剛封膠在灌注或是填充入外框（6〇,) 與載板（50，）形成的容置空間後，因封膠（1〇)仍為流體 狀態或液體狀態，而外框（60，）限制其流動或分佈範圍 18 200905815 於該容置空間t，合 器中一樣形成一水；/封膠⑽如同液體倒入-容 形成的容置空成間二面； 蓋的封膠都等高。因此，等〜:膠面硬: 覆蓋的封膠都等高且古知门 冑域所所 會形成一平坦的；；：：:：度:並且其頂部表面 個封膠覆蓋區域的厚度與拉力:弧七’進而均勻化各 相同此1卜莖與第四八圖至第四c圖所展示之封裝方法 …9n A圖至第五c圖所展示之封裝方法中， 日日片（20)與載板（5〇，）之間的接合，係藉由以一 例如樹脂層、環氧樹脂心 次銀骖寻可以直接用以黏著固定的黏著材料，或是一 :要高溫烘烤而固定晶片（20)於載板⑽上的黏著 材枓作為黏著層（40)，設置於晶片⑽與載板 之間，而將晶片（20)黏著固定於載板（5〇，）上。 士在此實施例中，與第四Α圖至第四c圖所展示之 封裝方法相同，填充一封膠（1〇)於外框（6〇,)與載板 (5〇 )形成的容置空間中，封膠（10)可以填滿外框 與載板（50，）形成的容置空間，而與外框（6〇，）的頂部 切齊，或是封膠（10)並未填滿外框（6〇，）與載板（5〇，） 形j的容置空間，而封膠（10)的高度低於外框（6〇,) 的向度而未與外框（60，）切齊。在填充一封膠後，可以 19 200905815 視其所採用的封膠材料， 膠或是其他熱固性材質， 以使封膠固化，若封膠為 的南溫烘烤。其次，雖然 個封膠頂部為一平坦表 構，但是為了使封膠具有 以在填充封膠（10)並封膠 程。 而封膠材質若是COB膠、黑 則需進行-高溫供烤步驟用 黑膠，則需進行大約8小時 以上述封裝方法可以得到一 面且非為半弧形的封裝結 一個更平坦的頂部表面，可 (1〇)固化後’進行一研磨製 ，外’在第五A圖至第五圖所展示之封裝方法與 接：二第曰四C圖所展示之封裝方法中，載板打線 接..‘，占（51)與日日片（20)上的晶片打線接點（2ι)相對 應^其可以為一接塾、一銲塾、一金手指（_仏㈣ j是一裸露出的電路。載板（50)為一印刷電路板或是 一製作有電路或圖案化電路以及載板打線接點（Η) 的基板，並且此一載板（50)可以設置有數個用以電性 連接外界電路或其他元件的元件接腳（52)。 由上述可知，本發明之電子元件之封裝方法與封 襄結構’可藉由外框使封膠在固化的過程，得到較佳 的外形。如此一來’不但對元件的外觀更為美觀，並 且在表面黏著製程（SMT)及元件的標示上，提供使用 者更佳的應用。並本發明且藉由外框限制封膠在硬化 的流動與分佈，使得在晶片前後左右四方的膠量相等 20 200905815 以及元件的上方平坦，在封膠的硬化過程拉力較為平 均，而產生較小的載板彎板，而在前後左右的黑膠量 平均，熱脹冷縮均勻，故元件變形較少，相對在可靠 度士:提高很多，因加上外框，故可限制黑膠的量在 一定範圍内，故黑膠量明顯減少。 【圖式簡單說明】 之俯視圖暨部分剖 第一圖：係為習知之封裝結構 面圖。 第二圖：係為本發明 之俯視圖暨部分剖面圖。 之封裝結構之—較佳實施例 第：A圖:係為第二圖之封裝結構之马 第三B圖：係為本發明之封《結構 施例之剖面圖。 面圖。 另較佳實 第四A圖至第四c圖.你. 一較佳實施例’其分別為該封聲之封震方法之 構的剖面圖。 去各步驟之封裝社 第五A圖至第五C圖:係 -另較佳實施例’其分別為月之封袭方法之 結構的之剖面圖。 、、方法各步驟之封裝 【主要元件符號說明】 (10)封膠 (2 0 )晶片 (21)晶片打線接點 21 200905815 (30)導線 (40)黏著層 (50) 、（50’）載板 (51) 載板打線接點 (52) 載板元件接腳 (53) 接合機構 (60) 、（60，）外框 (61) 固定機構 (110)黑膠 (120) 晶片 (121) 晶片打線接點 (130)鋁線 (140)缺氧膠 (1 5 0)印刷電路板 (1 51)印刷電路板打線接點 (152)印刷電路板元件接腳 22200905815 VII. Designation of representative drawings: (1) The representative representative of the case is: (2) The simple description of the symbol of the representative figure: (10) Sealing glue ^ (20) Wafer (21) Wafer bonding contact ( 30) Conductor (40) Adhesive layer (50) Carrier plate (51) Carrier wire bonding contact (5 2) Carrier component pin (6 0) Frame 8 If there is a chemical formula, please reveal the best indication of the invention. TECHNICAL FIELD OF THE INVENTION The present invention relates to a package structure of an electronic component and a package method thereof, particularly to a package made by Chip On Board (C0B). Structure and packaging method [Prior Art] Today's electronic production σ is said to be the majority of s Μ 为 为 降低 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 大多数 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( (Chip On B〇ard, COB) package, reduce the package cost of the / corpse / r and reduce the cost of the installation of 200,905,815. In general, the current direct placement technology for wafers is suitable for the whole machine, and there are The product covered by the outer casing. Refer to the first figure The package structure for the current general wafer direct mounting comprises a black glue (110), a wafer (120), an aluminum wire (130), an anoxic glue (140), and a printed circuit board (150). The wafer (120) is adhesively attached to the printed circuit board (150) by an anoxic glue (14), and electrically connected to the printed circuit board (150) by an aluminum wire (130) and The black glue (110) covers the wafer (12 turns) and the printed circuit board (150). ^ This wafer direct mount (C〇B) package method is to first adhere the wafer (120) with an anoxic glue (140). The printed circuit board ("o" is then cured by high temperature baking to cure the anoxic glue (140)" and the wafer (12" is fixed on the PCB (150) to bond the wafer bonding contacts (121) to the printed circuit board. On the wire contact (1 51), when the wire is finished, the wafer (1 2 〇) is directly covered with black glue (11 〇) (COB glue), and then baked for a long time. And the black glue (110) is hardened to complete the direct mounting and sealing of the wafer. However, the wafer is directly mounted on the package structure and method, and is covered when it is sealed. After the black glue (110), it tends to be uneven because of the uneven distribution of vinyl rubber, and the thickness of the black rubber and the amount of black rubber in various regions. For example, in the plane angle of 200905815 (top view angle), the wafer is rectangular. The sealing range is semi-circular, and the upper and lower sides (ie, the long side of the wafer) have less glue, and the left and right sides (ie, the short sides of the wafer) have more glue; and the height angle (side view angle) In other words, the central part is thick and thin around. These two factors, after the black rubber is hardened, may cause unevenness in the tension of the package structure due to the uneven distribution of the black rubber, which causes the printed circuit board to bend. The board will further cause the component to be soldered due to the curved surface of the printed circuit board during the surface mount technology (surface mount techn〇1〇gy, SMT). In addition, this component is high in _, JJ 贝 贝 . 3 3 3 3 3 3 3 3 3 3 , , , , , , , , , , 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片The expansion and shrinkage of the black rubber is not the same. It is easy to cause the bending of the component to be too large, causing cracks or wire breakage of the wafer, resulting in component failure. Furthermore, the amount of black rubber must be greater than 50% of the package area. This seal will require more black rubber to cover the phase (4) package area due to uneven distribution of the top and the periphery. As shown in the first figure, the black rubber covered by the top of the piece is _ semi-arc, so when the table is (SMT), the machine is not easy to accurately grasp the components, and it is easy to cause the components to throw, shift, and short. And other issues. Secondly, the angle of stamping the component after the package is completed is 200,905,815 呪, and also because the black rubber is hardened, the shape of the helmet is different from that of the W + arc, instead of a plane, the light, or the ink The shots are not stamped. If the angle of the memory module is easy, "the edge is half curved, not the flat--the package structure is because i is a small mr area, so the heat dissipation is not = ask for the current existing seal. Therefore, it is necessary to: the overall appearance is also better overall structure and sealing method. The w (straight) package of the seal [invention] The present invention is intended to solve the problem 卩 ^ Hg # &> Semi-finished, η 砀 is the thickness of the sealant in each area of the package directly mounted on the wafer ^ ^ j * package and black; ::::! The hardening tension is not uniform, resulting in printing fading, cracks in the wafer, Wire break-off, ; displacement, red road, heat sink is not easy to install, or smashed]:::: too small to cause poor heat dissipation, etc., conventional packaging structure and sealing method will cause problems. Root, the above purpose 'the present invention Providing a technique for solving the above problem 2' The present invention provides that the package structure of the electronic component can solve the above problem by the package structure of the sealant = the package structure rri has at least one wafer bonding contact wafer, and has a portion Anti-Ding Qin contact point The carrier plate of the wafer bonding contacts, an adhesive layer disposed between the crystals 200905815, the electrical carrier bonding wires and the inner edge of the wire surround the entire U-chip of the wafer and the surface of the carrier portion Glue. On the sealing plate, and the inner edge of the outer frame can be - the outer edge does not exceed the carrier plate and protrudes from the carrier plate, the present invention utilizes the outer frame of the two = sheet to limit the flow and distribution range of the sealant, Homogenizing the thickness of each of the sealant covering regions, and avoiding uneven tension on the package structure after the sealant is hardened. In addition, the present invention provides a method for packaging electronic components == and achieving the object of the present invention. Technical means two-point carrier board, then, a wafer having a wafer bonding contact 2 with a contact, a wafer, and a carrier, and then a wire connection, the wire should be placed on the carrier of the wafer bonding contact. Contact 2:: an outer frame on the carrier plate and the inner edge of the outer frame surrounds the entire crystal, the sheet, and then filled with a glue-coated wafer and loaded with the package method before the filling of the sealant, first set - The outer 2 outer frame surrounds the wafer' so that when filling the sealant The flow and distribution range of the kicking, and thus the thickness and tension of the retanning region are extracted. Therefore, the present invention is compared with the prior art, and the invention provides a package structure and a packaging method for an electronic component. The setting of the frame limits the flow and distribution range of the sealant, thereby homogenizing the thickness and tensile force of the cover area of the sealant, so that the carrier plate is not bent or deformed due to uneven tension, causing the wafer to be broken or broken, thereby increasing =^ Reliability, no material occurs in the surface adhesion process (SMT), in addition, because this frame limits the flow and distribution of the sealant, the sealant hardens to form a ghost-like shape with a flatter top surface. ', '冓, instead of half arc like the previous technology, so = there will be: the table is not easy to accurately grab the component' and it is easy to cause the component to scatter the film and so on. 'There is no stamping is not easy to be clear, beautiful = female If the contact area with the heat sink is too small, the result is η: the title 'and because the outer frame is added, the sealing can be limited: 2] Some embodiments of the next floor of fine detail description are described below, but too ,, hundred Shu illustrating purposes. That is, x can be widely used in other embodiments, that is, the scope of the present invention is not limited by the example of the embodiment of the present invention. Each element in the display bites: drought: ... The following description as a limited cognition, that is, the limit of the number of gods and applications, the finer and method of the present invention, the structure of several elements or structures coexisting In this specification, the various portions of the various elements of the elements of the present disclosure are not drawn to the extent that they are in accordance with the dimensions, and some of the dimensions are exaggerated or simplified as compared to other related dimensions to provide a clearer description to enhance the understanding of the present invention. The prior art of the present invention, which is used in the prior art, is only referred to in the context of the present invention. As shown in FIG. 1 and FIG. 1 , it is a preferred embodiment of the package structure of the present invention. The package structure comprises a wafer (2 〇), a carrier (50), and an adhesive layer ( 40), at least one wire (3 turns), one outer frame (6 inches) and a glue (10). The wafer (2〇) is provided with at least one wafer bonding contact (21), which may be a pad, a pad or a bare % road, and the carrier board (50) is provided with a plurality of carrier wires. a contact, wherein the &, 邛 邛 打 打 接 ( 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片 晶片(gold finger) or a bare circuit. The carrier board (50) is a printed circuit board or a substrate on which a circuit or a patterned circuit and a carrier wire bonding contact (51) are formed, and the carrier board ($ 〇) can be provided with several electrical connections. The component pins of the external circuit or other components (52). In the package structure shown in the second figure, an adhesive layer (40) is disposed between the wafer (20) and the carrier (50) for bonding the wafer (2〇) to the carrier (5G). The wire (10) is electrically connected between the wafer wire bonding contact (21) and the carrier wire bonding contact (51) of the corresponding wafer wire bonding contact (21) as a wafer (2〇) and the carrier plate (5〇). The connection box 10 200905815 t frame (10) is placed on the carrier board (10), and the carrier board, y is placed inside the wafer (20) and the space available for filling the sealant (10): box (6〇) The edge can surround the wafer (2〇), but does not cover the inner edge of the two middle piece (20), and even the outer frame (6〇) can surround the wire (30) and the carrier wire bonding joint according to different requirements: (10), and the outside of the basin = less than the carrier plate (10) without exceeding or protruding the horizontal direction of the carrier (5.): surface. However, in other embodiments of the invention, the outer frame may be a surface that is equal to the carrier size and that does not exceed the horizontal direction of the J output board, depending on the packaging requirements. The two-person sealant (10) is filled in the outer frame (60) and the carrier (5〇) shape of the vacant space Φ^ @ & 2 and covers the entire wafer (20) and part of the carrier plate to Cover the wire (30) with the carrier wire bonding point (51), 1:!: in the filling or filling into the outer frame (6.) and the carrier plate (10) shape = after 'because the sealant (1 °) at this time Still in a fluid state or in the liquid and: the outer frame (10) restricts its flow or distribution in the two compartments, which causes the sealant (10) to be poured into a container like a liquid, while in the outer frame (60) The volume formed with the carrier (5〇) = a horizontal plane, so that the sealant covered by each area. Therefore, 'after the sealant is hardened', the top surface will form a plane of ==, and the sealant of the prior art package structure (such as the figure) will not form a semi-arc shape, and the seals of each region have the same height. The same strict #.隹 "~y cover the area of the cover of the thick cover of each seal, / pull, so that the carrier will not be bent due to uneven tension 11 200905815 rupture or wire off, thereby increasing its The plate or deformation causes the wafer to be in abutment. In the package structure of η glue and moon, the adhesive layer (40) may be a defect piece: f, % epoxy, silver glue or the like; : The carrier is bonded and fixed. The wire (10) has good electrical conductivity! Wire, Ming wire or other glue, the sealant (10) is - (10) glue or black material. ~, used in packaging Referring to FIG. 3A, the sealant for protecting the package structure is a cross-sectional view of the sealing and sealing embodiment of the present invention, and the basin is the first one, and the other is the second image of the present invention. In this embodiment The shape and material of the outer frame (60), but can be recorded by one: the second: 'the same shape and material, which can be borrowed = L mechanism or structure to carry out the outer frame (10) 0 or even 'in the other invention, the other frame of the invention is formed into a body, and the outer frame of the carrier itself can be combined with the picture of the present invention. - The more detailed sectional view, the sealing structure shown by the sealing = is not the same, the different land =: The outer frame (10) of the package structure shown in Figure 1 2009 05815 -A is straight money Board _ and _ not other institutions or structures to carry out the design of the outer frame (60) ^, the package structure _, the outer frame (10), shown in the third three-graph, combined with the carrier, by at least The two fixing mechanisms (61) are realized by at least two mechanisms (53). The package shown in the third figure is provided with at least two fixing mechanisms at the bottom of the outer frame (6〇) and one on the carrier board (50'). Then, an engagement mechanism (53) of at least two fixing mechanisms (8) corresponding to the outer frame (10),) is provided, and the outer frame (10), the fixed frame) and the engagement mechanism on the carrier plate (5) are included. ) The binding frame & 'and the outer frame (10),) is firmly fixed on the carrier (50,). In this example, 'as shown in the third figure, the outer frame (10),) The 疋 mechanism (61) is a positioning cassette or a positioning pin, and the carrier (5) of the engaging mechanism (53) is - corresponding to the positioning card or the positioning pin on the outer frame (6 (),) (8)) The positioning hole or the positioning pin hole 'Ove frame (60) is inserted by the positioning pin or positioning pin (8) into the corresponding positioning hole of 1 (9) ') or the positioning pin hole (53), and (6〇 ,) is fixed on the carrier board (50,). However, the invention is not limited to the fixing mechanism (61) - the positioning card or the positioning latch, and the engaging mechanism (53) is not a positioning hole or Positioning the mortise lock hole, the fixing mechanism on the outer frame of the present invention may be a fixed hole or a m vertical hole, and the engaging mechanism on the carrier plate is a corresponding outer: the upper positioning hole or the positioning pin hole Positioning card or positioning pin 0 13 200905815 - Furthermore, in another embodiment of the invention, the fixing on the outer frame is: the outer frame itself can be the outer frame itself and the engaging mechanism on the carrier plate is - corresponding outer frame Fixture or slot, by clamping the frame on the carrier board, or inserting the bottom of the frame into the slot to fix the frame to the carrier board The present invention also provides a packaging method. Referring to FIGS. 5A to 4C, a preferred embodiment of a packaging method according to the present invention is shown in a cross-sectional view, and the content thereof is shown in the package shown in FIG. How the structure is made. The packaging method first, with reference to FIG. 4A, provides a carrier (50) and a wafer (20) provided with a plurality of carrier bonding contacts (51), and bonding the wafer (2) to the carrier (5〇), the wafer (20) is fixed on the carrier (10), and the wafer (10) is provided with a wafer bonding contact (21) corresponding to at least a portion of the carrier bonding contacts (51), and then, the wiring (30) The wire bonding contact (21) on the wire bond wafer (2〇), and the carrier wire bonding contact (51) corresponding to the wafer bonding contact (21) on the carrier board (50), and electrically connecting the chip (2) Next, referring to the fourth figure, a frame (6〇) is fixed on the carrier (5〇) to form a valley wafer (2〇) and a fillable sealant (10) with the carrier (50). Space, the inner edge of the outer frame (60) can surround the wafer (2 〇), but the wafer (20) is not covered, and even the inner edge of the outer frame (6 〇) can surround the wire (30) according to different packaging requirements. Wire the contact with the carrier board 14 200905815 (), the outer edge is less than or equal to the surface of the carrier (50) without exceeding or protruding in the horizontal direction. The outer frame (6〇) can be directly set. = (G) on the 'the invention does not limit this - the outer frame (10)) shape j shell, but different shapes and materials can be used according to the needs of the package, which can be by an adhesive 皙 (一 (_ _ is set on the carrier board 1:, and the outer frame is used to set the outer frame (10). Other mechanisms or structures are required to take the fourth C picture of the tea, filling a glue (10) in the outer frame (10) = (10). In the accommodating space, the entire wafer (10) is coated with the surface of the carrier (5 〇), and even the coated wire (10) is punched with the carrier 51). After the sealant is filled or filled into the spare space formed by the outer frame (60) and & (50), the sealant ((8) is still in a fluid state, and the outer frame (10) limits its flow or distribution. Scope in the space, will cause the sealant (10) to be poured into a container like a liquid - forming a horizontal plane - in the outer frame (10) and the carrier (forming a horizontal plane, so that each area is covered, * ^ therefore, etc. After the sealant is hardened, the seals covered by the regions are all of the same thickness and have a flat surface on the top surface instead of a half-curve, and thus the thickness of each sealant retanning area is The tension between the embodiment cymbal (20) and the carrier (5 〇) shown in the fourth to fourth c diagrams is achieved by placing a viscous 15 200905815 - layer ( 40) disposed between the wafer (20) and the carrier (50), and the wafer (20) is adhesively fixed to the carrier (5〇). The adhesive layer (4〇) can be - an adhesive material requiring high temperature baking For example, resin layer, epoxy or silver glue can be used directly to adhere the fixed adhesive, or a need High temperature baking to fix the wafer (20) to the carrier (50 Å adhesive material, such as anoxic glue or thermosetting resin, etc., which can be cured by high temperature drying. Therefore, when the adhesive layer (4) is an anoxic glue or a thermosetting resin An adhesive material that can be cured by high-temperature baking, such as an anoxic adhesive or a thermosetting resin, etc. After the adhesive sheet 2 (10) is placed on the carrier (50), it needs to be high-baked to cure and fix the wafer (20). Formed on the carrier (50). Form: LY encapsulant (10) on the outer frame (10) and the carrier (5.) plate & working to cover the entire wafer (20) and part of the carrier C 5 0) surface In the step, the carrier and the carrier plate (10) are formed: two: the full outer frame (10) or the adens Π η λ, two, and the top of the outer frame is aligned, the space is accommodated, and the scoop is filled with the outer frame (6〇) ) (50) formed with the carrier (5 〇), the entire wafer (20), the wire and part of the carrier frame (10) are two degrees lower than the height of the outer frame (6 〇) without the outer rubber material And after sealing, it can be regarded as the sealing material used, (10) glue, vinyl or other thermosetting sealant for the department, the purpose of the four brewing steps To cure the sealant, a little, eve, it takes about 8 hours of high, and ## times, although the above-mentioned seals are succinct, the dish is baked. The 疋 encapsulation method can get a seal top. For a 16 200905815 • Flat surface and not semi-arc package structure, with a flatter § 郫 main ^ 疋 疋 in order to make the top of the seal one. 卩 surface, can be filled in &" After curing, a grinding process is performed. Filling the win (1〇) sub-references from the fifth to fifth c-pictures, another preferred method of the method & μ. „ ^ ^ The contents of the package are: all are represented by a sectional view, which is displayed” The first and second figures show the package structure of the five-figure to the fifth figure. The method of encapsulation that is not displayed by the younger brother is different from the method of encapsulation of the five-figure _ 所 _ , 在于 在于 在于 在于 在于 在于 在于 在于 在于 在于 在于 在于 在于The carrier board (50,) provided by the encapsulation method has at least a part of the carrier board (5) except for a plurality of carrier board wiring contacts (5); ^ point (51) is connected to the motor, and the 曰Η Γ 9 η ί 戟 打 plate is connected to the T The wafer should be wire-bonded (21) on the cymbal (20), and there are two jointing devices (53), and the outer frame (10), having at least two fixed skirts (10), and The joint between the frame (6〇,) and (5〇,) is the combination of the fixing device (61) on the 0) frame and the carrier plate (5〇,) and the fixed corresponding engagement device (53). The outer frame (6〇,) is firmly fixed to the carrier (50,), and the other steps are substantially the same as those shown in the fourth to fourth embodiments. First, referring to FIG. 5A, a carrier (50) and a wafer (2) provided with a plurality of carrier wire bonding contacts (51) and to 2 bonding devices (53) are provided, and 5 曰 is connected. The die (20) and the carrier (5), and the wafer (20) is fixed on the carrier (50), and the wafer (2) is provided with a wafer bonding corresponding to at least a portion of the carrier bonding contacts (51) Contact (21), then wire bonding the wafer bonding contact (21) on the wafer (20) with the wire (30), and the carrier (50) 17 200905815 should be placed on the Ba wire bonding contact (21) Board wire contact (51). For the reference, refer to the fifth B diagram, combined with the fixing (61) on the outer frame (6〇) and the joint J (53) corresponding to the fixing device (61) on the carrier plate (50), and the outer frame (10),) firmly fixed to the carrier board (5〇,) on the wide carrier board (50,) to form a receiving wafer (2〇) and a space for the filling, 0: 'outer frame (10)') The inner edge can surround the wafer (), but does not cover and seal the wafer (20), even within the outer frame (6〇,): the wire (3〇) can be surrounded by the carrier, and the spring can be connected according to different packaging requirements. Point (51)' and its outer edge is less than or equal to the carrier carrier (5〇,) without exceeding or protruding the surface of the carrier carrier (5〇,) horizontally. The outer frame (60') can be directly disposed on the carrier board (50,). The present invention does not determine the shape and material of the outer frame (60), but can be different according to the package. Shape and material, which can be adhered to the carrier carrier (50) by an adhesive substance (not shown) without any other mechanism or structure for the outer frame Settings. Finally, according to the fifth C picture, a piece of glue (丨〇) is filled in the accommodating space formed by the outer frame (6 〇,) and the carrier plate (50,), and the entire wafer (2 〇) and the part are covered. The surface of the carrier (50,), even the covered wire (3〇) and the carrier wire bonding (51). After the sealant is filled or filled into the accommodating space formed by the outer frame (6〇,) and the carrier plate (50,), the sealant (1〇) is still in a fluid state or a liquid state, and the outer frame ( 60,) Limiting the flow or distribution range 18 200905815 In the accommodating space t, a water is formed in the same device; / the sealant (10) is like a liquid poured into the space formed by the two sides; All are equal. Therefore, wait ~: the rubber surface is hard: the covered sealant is equal and the flat surface is formed by a common;;::::degree: and the thickness and tension of the top cover surface of the sealant :Arc 7' and then homogenize each of the same 1 stem and the packaging method shown in the fourth to fourth c-pictures... 9n A to 5 c show the encapsulation method, the Japanese and Japanese films (20) The bonding between the carrier and the carrier (5〇,) can be directly adhered to the adhesive material by using, for example, a resin layer or an epoxy resin, or a fixed heat sealing. The adhesive material 晶片 of the wafer (20) on the carrier (10) is disposed as an adhesive layer (40) between the wafer (10) and the carrier, and the wafer (20) is adhered to the carrier (5 〇). In this embodiment, the packaging method shown in the fourth to fourth c-graphs is filled with a plastic (1〇) in the outer frame (6〇,) and the carrier (5〇). In the space, the sealant (10) can fill the accommodating space formed by the outer frame and the carrier plate (50,), and is aligned with the top of the outer frame (6 〇,), or the sealant (10) is not Fill the outer frame (6〇,) with the loading space of the carrier (5〇,) shape j, and the height of the sealant (10) is lower than the orientation of the outer frame (6〇,) without the outer frame ( 60,) Cut. After filling a piece of glue, it can be used according to the sealing material, glue or other thermosetting material used to make the sealant cure. If the sealant is baked at the south temperature. Secondly, although the top of the sealant is a flat surface, in order to make the sealant have the sealant (10) filled and sealed. If the sealing material is COB glue or black, it needs to be carried out. For the high-temperature baking step, the black glue is required. It takes about 8 hours to obtain a flatter top surface of the package which is not semi-arced by the above-mentioned packaging method. After (1〇) curing, 'perform a grinding system, outside' in the packaging method shown in the fifth A to fifth figure and the packaging method shown in the second: Figure C, the carrier board is wired. .', (51) corresponds to the wafer wire contact (2ι) on the Japanese film (20). It can be a nipple, a solder joint, a gold finger (_仏(4) j is an exposed The carrier board (50) is a printed circuit board or a substrate on which a circuit or a patterned circuit and a carrier wire bonding contact (Η) are formed, and the carrier board (50) can be provided with several electrical properties. The component pin (52) is connected to the external circuit or other components. As can be seen from the above, the packaging method and the sealing structure of the electronic component of the present invention can obtain a better shape by the outer frame during the curing process. This way, not only the appearance of the components is more beautiful, but also on the surface. The process (SMT) and the labeling of the components provide a better application for the user. The invention also limits the flow and distribution of the sealant in the hardening by the outer frame, so that the amount of glue in the front, rear, left and right sides of the wafer is equal to 20 200905815 and components The upper part is flat, the pulling force is relatively average during the hardening process of the sealant, and the smaller carrier plate is produced, and the amount of black glue in the front, back, left and right is average, the thermal expansion and contraction are uniform, so the component deformation is less, relative reliability. Shishi: A lot of improvement, because the outer frame is added, the amount of black glue can be limited within a certain range, so the amount of black glue is obviously reduced. [Simplified drawing] Top view and partial section first figure: is a conventional package The second drawing is a top view and a partial cross-sectional view of the present invention. The package structure is a preferred embodiment. FIG. A is a third B diagram of the package structure of the second figure: A cross-sectional view of a structural embodiment of the present invention. A plan view. Another preferred embodiment of the fourth through fourth to fourth c. You are a preferred embodiment of the sound-insulating method. Sectional view. 5A to 5C: a cross-sectional view of the structure of the monthly sealing method, respectively, and the packaging of each step of the method [Description of main components] (10) Sealing (2 0 ) Wafer (21) Wafer Bonding Contact 21 200905815 (30) Conductor (40) Adhesive Layer (50), (50') Carrier Plate (51) Carrier Wire Bonding Contact (52) Carrier Plate Component Pin ( 53) Bonding mechanism (60), (60,) frame (61) fixing mechanism (110) vinyl (120) wafer (121) wafer wire bonding (130) aluminum wire (140) anoxic glue (1 5 0 Printed circuit board (1 51) printed circuit board wire bonding contact (152) printed circuit board component pin 22