200843059 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種薄膜覆晶封裝結構，尤其係關於一 種具散熱結構之薄膜覆晶封裝結構。 【先前技術】 隨著半導體製程之發展，晶片之封裝技術也得到不斷 發展’目前之封裝技術主要有：c〇B(Chip on Board，板上 貼裝）、TAB(Tape Automated Bonding，卷帶接合）、 # COG(Chip on Glass，玻璃覆晶）及 c〇F(Chip on Film 或200843059 IX. Description of the Invention: [Technical Field] The present invention relates to a film flip-chip package structure, and more particularly to a film flip chip package structure having a heat dissipation structure. [Prior Art] With the development of semiconductor manufacturing, the packaging technology of wafers has also been continuously developed. The current packaging technologies mainly include: c〇B (Chip on Board), TAB (Tape Automated Bonding) ), # COG(Chip on Glass) and c〇F (Chip on Film or
Chip on Flex，薄膜覆晶）。c〇F係由TAB技術衍生而來 的，其將驅動晶片及被動元件直接與薄膜接合，再以異方 性導電膜（Anisotropic Conductive Film，ACF)作介面材料 結合在玻璃基板上。COF封裝結構之承載驅動晶片之基底 為二層式捲帶結構，驅動晶片與基底下表面間之最小距離 可達30微米，並且可將驅動晶片與被動元件直接焊接至二 層捲帶上。此封裝結構由於體積薄、重量輕、可彎折、設 、計自由度高、容易修復、為高密度間距封裝等優點，已成 為目前最新之發展技術。 、味芩閱圖1，係一種先前技術之薄膜覆晶封裝結構之 截面示意圖。該薄膜覆晶封裝結構10包括一薄膜基底u、 一導線層12、一異方性導電膜13、一驅動晶片14及一阻 焊（Solder Resist)層 16。 該導線層12藉由黏膠黏貼於該薄膜基底u，直亦可 以電鑛之方式形成於該薄膜基底u，該導線層包括複數電 極。該驅動晶片14上具有與該複數電極i2i 一一對應 6 200843059 .之複數突起U1(Bump)，該驅動晶片i4藉由 膜13壓接於該導線居 ^兒 %極121之間之異方拇道帝 ^ 使該驅動晶片14之複數二粒子之絕緣層皮膜破裂，從而 之禝數大起141與該導線層12之複數雷 極121實現電連接，而、力 ^ 電極m之間之異方： = 數突起r與該複數 '、 ‘黾粒子維持絕緣狀悲、，防止該;^ 複數電極121短路。該阻焊層16二 導線層12作為保護膜。 m玄 β 4膜基底11之材質為聚醜亞胺㈣imi岭 (polyamlde)或聚乙稀-對笨二酸月匕Chip on Flex, film flip chip). The c〇F system is derived from the TAB technology, which directly bonds the driving chip and the passive component to the film, and then bonds the glass substrate with an anisotropic conductive film (ACF) as a interface material. The substrate of the COF package carrying the drive wafer is a two-layer tape-reel structure, the minimum distance between the drive wafer and the lower surface of the substrate is up to 30 microns, and the drive wafer and passive components can be directly soldered to the two-layer tape. This package structure has become the latest development technology due to its thin size, light weight, bendability, high degree of freedom of design, easy repair, and high-density pitch packaging. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view showing a prior art thin film flip chip package structure. The film flip chip package structure 10 includes a film substrate u, a wire layer 12, an anisotropic conductive film 13, a driving wafer 14, and a solder resist layer 16. The wire layer 12 is adhered to the film substrate u by an adhesive, and can also be formed on the film substrate u by means of electric ore. The wire layer includes a plurality of electrodes. The driving chip 14 has a plurality of protrusions U1 (Bump) corresponding to the plurality of electrodes i2i in a one-to-one correspondence with the plurality of electrodes i2i. The driving chip i4 is pressed by the film 13 to the opposite side of the wire. The Emperor ^ ruptures the insulating film of the plurality of particles of the driving wafer 14, so that the number of turns 141 is electrically connected to the plurality of lightning electrodes 121 of the wiring layer 12, and the difference between the electrodes and the electrodes m Square: = number of protrusions r and the complex ', '黾 particles remain insulated, and prevent this; ^ complex electrode 121 short circuit. The solder resist layer 16 has a second wiring layer 12 as a protective film. m Xuan β 4 film substrate 11 is made of poly ugly imide (tetra) imiling (polyamlde) or polyethylene-p-benzoic acid
Heithdylene_terePhthalate)。該導電層12為延壓銅或氧化 4、·（n lumTln0xide，IT〇)導電膜。該突起m之材質為 4 ΐ合金(AUSn)或錫鉛合金(PbSn)。該異方性導電膜13: 才質為，硬化黏結劑或樹脂粒子。該阻焊層16為綠漆。 + α亥薄膜覆晶封袭結構1〇被廣泛應用於顯示器之驅 电路，隨著顯示器向更大尺寸及更高解析度 ，：？晶片14之耗電量及發熱量亦更多，若不能及日丄; 過/的熱量散發，將會影響到該驅動晶片二 月匕，§熱置積累到過高時甚至會燒毀該驅動晶 【發明内容】 構實=^此’提供—種具較好散熱效果之薄㈣晶封裝結 —種薄膜覆晶封裝結構，其包括—薄膜基底，I 對之第—表面及第二表面；一導線層，位於該第—表=，且 包括獲數電極’· 一驅動晶片，其包括與該複數電極相對應： 7 200843059 ，複數大起s複數犬起與该複數電極以異方性 及一散熱元件，其位於該第二表面。 接 相較於S前技術’由於該_€晶封裝結構包括一散妖 其可將該驅動晶片產生之熱量均勾分散，從而避免該 薄膜伋日日封裝結構上之驅動晶片之溫度過高。 【實施方式】 、請參閱圖2,係本發明薄膜覆晶封裝結構第一實施方 式之截面示意圖。該薄膜覆晶封裝結構2{)包括—薄膜基底 ^ 21、一導線層22 ' -異方性導電膜23、一驅動晶片24、 阻焊層26及一散熱元件27。 該薄膜基底21包括相對之第—表面2ΐι及第二表面 212’該導線層22藉由黏膠黏貼於該薄膜基底21之第一表 面211 ’其亦可以電鍍之方法形成於該第一表面211。該導 線層包括複數電極221，該驅動晶片24具有與該複數電極 221 對應之複數突起241。該驅動晶片24藉由該異方 性導電膜23壓接於該導線層22上，夾在該複數突起冰 1該複數電極221之間之異方性導電粒子之絕緣層皮膜破 =，從而使該驅動晶片24與該導線層22實現電連接，而 ’又有夾在該複數突起241與該複數電極221之間之異方性 導電粒子維持絕緣狀態，防止該複數突起241或該複數電 極221紐路。该阻焊層26喷覆於該導線層上作為保護 ，。忒散熱tl件27為一金屬散熱層，其為延壓銅箔或鋁 泊，其係藉由黏膠黏貼於該薄膜基底21之第二表面 上，或者以電鑛之方法形成於該第二表面212上。 該薄膜基底21之材質為聚酰亞胺（Polyimide)、聚酰胺 8 200843059 •㈣yamide)或聚乙稀·對笨二酸 ㈣yethyiene-t⑽phthalate)，其厚度為 18 曰 該導電層22為延壓銅或氧化鋼錫導電膜 8 : …：。該突起241之材質為錫金合金或錫:為合= 兴方性導電膜23之材質為熱硬化黏結劑或樹 / 焊層26為綠漆或油墨。該散熱元件27之材質曰阻 其厚度為5微米至20微米，其面積可與該驅、”、、曰’。：’’ ’ 面積相當或覆蓋整個薄膜基底21之 ^ aB 4之 〜示一衣面212。 f 由於該薄膜覆晶封褒結構2G包括-散敎元件27 1 可將該驅動晶片24產生之熱量均句八 ，、、、牛，” 霜曰射胩钍M _勻刀政，攸而避免該薄膜 覆曰曰封，結構20之驅動晶片24之溫度過高。 <之=閱=’係本發明薄獏覆晶封裝結構第二實施方 31=;該薄：覆晶繼構3〇包括-薄膜基底 V線層32、一異方性導電膜％、一 -阻焊層36及一散熱元件37。 動曰曰片34、 該薄膜基底31包括相對之第—表面3ιι及第 ' 312,該導線層32藉由黏膠黏貼於該薄膜基底31之第-% 線軸複數電極321，該驅動晶…具 片3、Γ/由1=切—對應之複數突起341。該驅動晶 §亥複數犬起341與該複數電極32!之間之異方性導 之絕緣層皮膜破裂，從而使含亥 ' 私/、 實現電連+ 片34與該導線層32 ' . ^央在該複數突起341與該複數電極321 =間之異方/導電粒子维持絕緣狀態，防止該複數突起 電極321短路。該阻痒層36嘴覆於該導線層 9 200843059 32上作為保護膜。該散熱元件37為一金屬散熱層，其係 藉由黏膠黏貼於該薄膜基底31之第二表面312上，或者以 電鍍之方法形成於該第二表面312。 該薄膜覆晶封裝結構30與該薄膜覆晶封裝結構2〇相 比，其區別僅在於：該薄膜基底31包括複數導熱孔313， 忒複數導熱孔313之位置與該複數電極321相對應或相錯 開該4數導熱孔313内填充具良好熱傳導性之絕緣物 質，如矽膠，以便於該驅動晶片34上之熱量更好的傳導至 該散熱元件37。 练上所述，本發明確已符合發明專利之要件，爰依法 提出專利申請。惟，以上所述者僅為本發明之較佳實施方 =，士發明之範圍並不以上述實施方式為限，舉凡熟習本 =技蟄之人士援依本發明之精神所作之等效修飾或變化， 皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 面示意圖。 式之截面示意 圖1係一種先前技術薄膜覆晶封裝結構之截 圖2係本發明薄膜覆晶封裝結構第一實施方 圖 〇 =係本發明薄膜覆晶封裝結構第二實施方式之截面示意 ^主要元件符號說明】 4膜覆晶封裝結構2〇、3〇 >專膜基底 21、31 導線層 μ n 散熱元件 電極 突起 27 > 37 221 、 321 241 、 341 200843059 ’ 異方性導電膜 23、 33 第一表面 211 、 311 驅動晶片 24、 34 弟—表面 212、312 阻焊層 26、 36 導熱孔 313Heithdylene_terePhthalate). The conductive layer 12 is a copper or oxidized 4, (n lumTln0xide, IT〇) conductive film. The material of the protrusion m is a 4 ΐ alloy (AUSn) or a tin-lead alloy (PbSn). The anisotropic conductive film 13 is made of a hardening adhesive or resin particles. The solder resist layer 16 is green lacquer. + α海膜覆覆封封结构1〇 is widely used in display drive circuits, as the display is larger and higher resolution, :? The power consumption and heat generation of the chip 14 are also more. If it is not possible, the heat dissipation of the wafer 14 will affect the driving chip in February, and even if the heat is accumulated too high, the driving crystal may even be burnt. SUMMARY OF THE INVENTION [FIG. 1] provides a thin (tetra) crystal package with a better heat dissipation effect, a film flip chip package structure, including a film substrate, a first surface and a second surface; a wire layer, located in the first table = and comprising a number of electrodes '· a driving wafer, comprising: corresponding to the plurality of electrodes: 7 200843059, a plurality of large s s dogs and the plurality of electrodes are anisotropic and one a heat dissipating component located on the second surface. Compared with the S-pre-technology, the heat-generating heat generated by the driving wafer can be prevented from being excessively high due to the heat dissipation of the driving wafer. [Embodiment] Please refer to Fig. 2, which is a schematic cross-sectional view showing a first embodiment of a film flip chip package structure of the present invention. The film flip chip package structure 2{) includes a film substrate ^ 21, a wire layer 22' - an anisotropic conductive film 23, a driving wafer 24, a solder resist layer 26, and a heat dissipating member 27. The film substrate 21 includes a first surface 211 and a second surface 212 ′. The wire layer 22 is adhered to the first surface 211 ′ of the film substrate 21 by an adhesive. The first surface 211 can also be formed by electroplating. . The wiring layer includes a plurality of electrodes 221 having a plurality of protrusions 241 corresponding to the plurality of electrodes 221. The driving wafer 24 is pressure-bonded to the wiring layer 22 by the anisotropic conductive film 23, and the insulating layer film of the anisotropic conductive particles sandwiched between the plurality of protruding electrodes 221 is broken. The driving chip 24 is electrically connected to the wire layer 22, and the anisotropic conductive particles sandwiched between the plurality of protrusions 241 and the plurality of electrodes 221 are maintained in an insulated state, and the plurality of protrusions 241 or the plurality of electrodes 221 are prevented. New Road. The solder resist layer 26 is sprayed onto the wire layer for protection. The heat-dissipating tl member 27 is a metal heat-dissipating layer which is a copper foil or an aluminum-plated layer which is adhered to the second surface of the film substrate 21 by an adhesive or formed in the second by an electric ore method. On surface 212. The film substrate 21 is made of polyimide (Polyimide), polyamide 8 200843059 (y) yamide, or polyethylene yethyiene-t(10) phthalate, and has a thickness of 18 曰. The conductive layer 22 is a copper or copper. Iron oxide tin conductive film 8 : ...:. The material of the protrusion 241 is a tin-gold alloy or tin: the material of the composite conductive film 23 is a heat-curing adhesive or the tree/weld layer 26 is a green paint or ink. The heat dissipating component 27 is made of a material having a thickness of 5 micrometers to 20 micrometers, and the area of the heat dissipating component 27 may be equal to or larger than the area of the film substrate. The cover surface 212. f. Because the film flip-chip sealing structure 2G includes a heat dissipating component 27 1 , the heat generated by the driving wafer 24 can be equal to eight,,,,,,,,,,,,,,,,,,,,,,,,,, The film is overcoated and the temperature of the drive wafer 24 of the structure 20 is too high. <===== The second embodiment of the thin-film flip-chip package structure of the present invention 31=; the thin: the flip chip relay 3〇 includes a film substrate V-line layer 32, an anisotropic conductive film%, one A solder resist layer 36 and a heat dissipating component 37. The movable film 34, the film substrate 31 includes opposite first surfaces 3 ι and 312, and the wire layer 32 is adhered to the first-% bobbin plural electrode 321 of the film substrate 31 by an adhesive. Sheet 3, Γ / by 1 = cut - corresponds to the plurality of protrusions 341. The drive film § 复 复 犬 犬 341 与 与 与 与 与 与 与 与 与 与 与 与 与 与 与 与 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 341 The intermediate/conductive particles between the plurality of protrusions 341 and the plurality of electrodes 321 are maintained in an insulated state, and the plurality of protruding electrodes 321 are prevented from being short-circuited. The anti-itch layer 36 is overlaid on the wire layer 9 200843059 32 as a protective film. The heat dissipating component 37 is a metal heat dissipating layer which is adhered to the second surface 312 of the film substrate 31 by an adhesive or formed on the second surface 312 by electroplating. The film flip chip package structure 30 is different from the film flip chip package structure 2 in that the film substrate 31 includes a plurality of heat conduction holes 313, and the positions of the plurality of heat conduction holes 313 correspond to the plurality of electrodes 321 or The four thermal conduction holes 313 are staggered with an insulating material having good thermal conductivity, such as silicone, so that heat on the driving wafer 34 is better conducted to the heat dissipating member 37. As described above, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above is only the preferred embodiment of the present invention. The scope of the invention is not limited to the above embodiments, and those skilled in the art will be able to modify the equivalent modifications according to the spirit of the present invention. Changes should be covered by the following patents. [Simple description of the diagram] 1 is a schematic view of a prior art thin film flip chip package structure. FIG. 2 is a first embodiment of the film flip chip package structure of the present invention. FIG. 2 is a cross-sectional view of a second embodiment of the film flip chip package structure of the present invention. DESCRIPTION OF REFERENCE NUMERALS 4 film-wrapped package structure 2〇, 3〇>Special film substrate 21, 31 Conductor layer μ n Heat dissipating element electrode protrusion 27 > 37 221 , 321 241 , 341 200843059 ' Anisotropic conductive film 23, 33 The first surface 211, 311 drives the wafer 24, 34 - surface 212, 312 solder resist 26, 36 thermal via 313