200845860 九、發明說明： 【發明所屬之技術領域】 尤其涉及一種製 本發明涉及一種製作電路板之方法 作具有斷差結構之電路板之方法。 【先前技術】 隨著電子產 彺體積小型化 g. , ^ a ^ a, ° 月匕夕樣化方向之私 :夕“路板由於大幅度增加電路板 ： 傳輸量從而獲得廣泛之應用。並且，隨著電路㈣ 同厚度及不同剛撓性之要求 路板各區域不 為具有斷差結構之電路板叙夕層電路板已漸發展 立如=23所示’為一種具有斷差結構之電路板之剖面示 =1路板於不同之區域具有不同之層數，層數少之區 或居度小、剛性小，層數多之區域具有高線路密度，同時 具有較大之厚度及較大之剛度。由此，該種具有斷差結構 之電路板具有優異之整體性能，既可實現大 輸，又具有適當之剛撓性。 、傳 圖17至圖22為先前技術中積層法製作此種電路板之 方法不意圖。參閱圖17，將第一覆銅層壓板（c〇^erCiad Laminate，CCL) 100、第一黏合層200、第二覆銅層壓板3〇〇 進行疊層壓合。參閱圖18至圖19，壓合後，於第一覆銅層 壓板100及第二覆銅層壓板300上蝕剡線路。蝕刻線路時， 先於第一覆銅層壓板1〇〇及第二覆銅層壓板3〇〇上分別貼 一層乾膜101、301，但由於第一覆銅層壓板1〇0與第二覆 銅層壓板300長度不一致，於第一覆銅層壓板1〇〇與第二 7 200845860 覆銅層壓板300之間存在_齡兰 畊是、、、。構，於斷差結構附近乾 朕101彎曲而不能緊密貼人於铪 ^ R 系山貼D於弟—覆銅層壓板100及第二 覆銅層壓板300之表面，豆n古— # ^ τ /、間存在一孔隙102。於蝕刻銅層 日守，飯刻溶液從該孔隙1〇2中样 gφ 、 中坟入，使弟一覆銅層壓板100 及弟—復銅層壓板300之蜗緩jg、〇 η 銅層。 心、、巴、、、彖層叉到侵蝕而不能有效保護 除線路製作外，電路板之劁柞！ a & … a 私纷伋之衣作逖包括一導通孔之製作 乂私。茶閱圖20至圖22，先於雷政μ μ又 舜 私路板上鑽通孔，再於第一 復銅層壓板100及第二覆銅声愿 设別層垃板300上貼附乾膜102、302 =線路圖案’㈣由曝光、顯影，進行通孔鍍銅。由於 t 搬於斷差結構處存在—孔隙⑽，從而於進行 =錄銅之時候亦會於此處形成銅屑3Gi，既 之導通路徑，又影響產品之外顴口所，^舌& 口木 率。 < yr嬈口口貝，厫重降低產品之良 有鑑於此，有必要提供一種於製作過 層與導電層產生損害之製作且右齡# μ避免對、、、巴緣 、去 s σ <衣忭具有断差結構之電路板之方 【發明内容】 =下以實施例說明於製作過程中避免對電路板内 :層與絕緣層產生損害之製作具有斷差結構之電路板之方 :種製作具有斷差結構之電路板之方法，包括步驟： 〃弟基板、黏合層及第二基板，所述第一基板包括〜 土材層及形成於所述基材層上之第一導電層，所: 8 200845860 開口，所述黏：；：:層第於所述黏合層上預定區域形成 基材層中形成—第—切口側刀口’從而於所述 述第-開口側面對應，並使第—二 切口侧面與所 接觸、黏合層㈣ml基板之基材層與黏合層相 .… /、弟—基板相接觸，將所述第一美柄、勒八 ¥、弟一基板依次疊層壓合得 心 "^ -基板之第-㈣層^ 路板；㈣所述第 -第-切口贴 該第一導電層具有 弟一切口側面，並使所述第二切口 第一開口側面相對庫.、VL掷 刀口側面、 =切輕對應於黏合層開口，使得所述第二切口、第 除區，去二去裁:邊界於物 相較：先/區從而形成—具有斷差結構之電路板。 路板==術，方案製作具有斷差_ 通孔導通時，帝路=點:於電路板上形成線路圖案或者 層剝離、斷心不【之：：：！構？在，因此可避免銅 你 、义 生，提问產品良率。其次，於费 作過程中’電路板表面沒有縣形成之刀σ 化、 溶液從刀口中^^ 』避免化孥 又具有優異之外觀品質。 口口既/、有π良率 【實施方式】 200845860 20及第二基板 請參閱圖1，提供第一基板10、勒人 cr嘴 30 ° 及形成於所述基材 11具體結構依待製 而定，其可為單層 。本實施例中，所 所述第一基板10包括一基材層u 層11上之第一導電層12。所述基材層 作之具有斷差結構之電路板之具體結; 絕緣層或為導電層與絕緣層之疊加结;^ 述基材層11為一絕緣層。 所述第二基板30至少包括一層導命 $層’其具體結構亦 可依待製作之具有斷差結構之電路被/ 乂具體結構而定。本實200845860 IX. Description of the invention: [Technical field to which the invention pertains] In particular, the invention relates to a method of fabricating a circuit board as a method of a circuit board having a stepped structure. [Prior Art] With the miniaturization of electronic calving volume g. , ^ a ^ a, ° 匕 样 样 样 : : : : 夕 夕 夕 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路 路With the same thickness and different rigidity requirements of the circuit (4), the circuit board is not a circuit board with a fault structure. The circuit board has gradually developed as shown in = 23, which is a circuit with a fault structure. The section of the board shows that the road board has different layers in different areas, the area with few layers is small or small, the rigidity is small, the area with many layers has high line density, and has a large thickness and a large thickness. Therefore, the circuit board having the stepped structure has excellent overall performance, and can realize both large transmission and appropriate rigidity. 17 to 22 are the prior art lamination method. The method of the circuit board is not intended. Referring to Figure 17, the first copper clad laminate (CCL), the first adhesive layer 200, and the second copper clad laminate 3 are laminated and laminated. Referring to Figures 18 to 19, after pressing, the first copper is applied. The pressure plate 100 and the second copper-clad laminate 300 are etched on the circuit. When the circuit is etched, a dry film 101, 301 is respectively applied to the first copper-clad laminate 1 and the second copper-clad laminate 3, respectively. However, since the length of the first copper clad laminate 1〇0 and the second copper clad laminate 300 are inconsistent, the first copper clad laminate 1〇〇 and the second 7 200845860 copper clad laminate 300 are present. ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, — # ^ τ /, there is a pore 102. In the etching of the copper layer, the rice solution is sampled from the pore 1〇2, gφ, and the grave, the brother-clad laminate 100 and the brother-copper layer The pressure plate 300 is slowed by jg and 〇η copper layer. The heart, the bar, the 彖, the 彖 layer fork to the erosion can not effectively protect the circuit board except the circuit production! a & ... a private clothing逖 一 一 一 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶 茶The pressure plate 100 and the second copper-clad embossed layer 300 are attached with a dry film 102, 302 = line pattern '(4) by exposure and development, and through-hole copper plating. Since t is moved to the fault structure, there is a void (10), so that when the copper is recorded, the copper chip 3Gi will be formed here, which is the conduction path, and affects the mouth of the product, the tongue & mouth rate. < yr娆 口 口, In view of the fact that it is important to reduce the product, it is necessary to provide a production that causes damage to the printed layer and the conductive layer, and the right age #μ avoids the pair, the bar edge, and the s σ < Circuit board side [Summary of the invention] = The following is an embodiment to avoid damage to the board: the layer and the insulating layer during the manufacturing process to produce a circuit board with a fault structure: a circuit having a stepped structure The method of the board includes the steps of: a substrate, an adhesive layer, and a second substrate, wherein the first substrate comprises a soil layer and a first conductive layer formed on the substrate layer, wherein: 8 200845860 opening, Said sticky:;:: layer is on the predetermined area on the adhesive layer Forming a first-cut side edge in the substrate layer so as to correspond to the first-open side, and making the second-cut side and the contact layer, the adhesive layer (four) ml substrate of the substrate layer and the adhesive layer .... The younger brother-substrate is in contact with each other, and the first beautiful handle, the Leba, and the other one are sequentially laminated and pressed together to form the first-(four) layer of the substrate; (4) the first-first- The slit is attached to the first conductive layer to have a side surface of the first opening, and the first opening side of the second slit is opposite to the side of the library, the VL throwing edge, and the light cut corresponds to the opening of the adhesive layer, so that the second slit, the second slit In addition to the zone, go to the second cut: the boundary is compared with the object: the first/zone to form a circuit board with a fault structure. Road board == surgery, the scheme has a fault _ When the through hole is turned on, the emperor road = point: the line pattern is formed on the circuit board or the layer is peeled off, and the broken heart is not [::::! Structure? Therefore, you can avoid copper, you, and ask questions about product yield. Secondly, in the process of the fee-making process, the surface of the circuit board has no sigma formed by the county, and the solution is removed from the edge of the knife to avoid phlegm and has excellent appearance quality. The mouth is both / and has a π yield [Embodiment] 200845860 20 and the second substrate, please refer to FIG. 1 , providing the first substrate 10 , the Le human cr nozzle 30 ° and the specific structure formed on the substrate 11 according to It can be a single layer. In this embodiment, the first substrate 10 includes a first conductive layer 12 on a substrate layer u layer 11. The substrate layer is a specific junction of the circuit board having the stepped structure; the insulating layer is a superposed layer of the conductive layer and the insulating layer; and the substrate layer 11 is an insulating layer. The second substrate 30 includes at least one layer of conductive layer. The specific structure may also depend on the specific structure of the circuit having a stepped structure to be fabricated. Real
施例中，所述第二基板3 0為一覆麵I ; R 々堡板（Copper Clad Laminate，CCL)，包括第二絕緣層3l爲μ 及弟二導電層32。 所述基材層11、第一導電層12、釉人ρ ★6合層20、笔-維緣 層31及第二導電層32之材料可依電路 一β / $略板之具體需求性能 而定。通常來說，第一導電層12及第二導電層32之最常 用材質為銅，但亦可為其他金屬，如銀、金等' 黏合層2〇 一般為塗料或樹脂。當所製作之電路板為剛性電路板時， 其絕緣層之材吳可為送自盼搭樹脂、環氧樹脂、聚酯樹脂 及樹脂與玻璃布之混合物中之一種。當所製作之電路板為 柔性電路板時，其絕緣層之材質可選自聚醯亞胺（Polyimide， PI)、鐵氟龍（Teflon)、聚硫胺（Polyamide)、聚曱基丙稀酸曱 酯（Polymethylmethacrylate)、聚碳酸酯（Polycarbonate)、聚 乙烯對苯二酸酯（Polyethylene Terephtalate，PET)或聚隨亞 胺-聚乙稀-對苯二曱酯共聚物（Polyamide Polyethylene-Terephthalate copolymer)或者其組合物。 200845860 併，閱圖2及圖3，其令圖3為圖2中之黏人 •之俯視圖，於所述黏合層20上預定區域 〜厂 開口21可利用模具沖出，亦可利用到刀刮除二他方:开述 ΐ電預定區域與待製作之具有_構 秋㈣目Μ 具體產品結構設計而定。舍 二，之結構，開σ 21可為不同形狀，如圓形田、 矩形或其他多邊形等。太眚絲如Λ uφ 因此，所述黏合層20呈有第一門口’:述開口 21為矩形。 面212ϋ / 側面211、第二開口側 弟二開口側面213及第四開口側面214 一開口側面2Π與第二開口側面212 ^ 213與第四開口侧面214相對。 弟一開口側面 ”心利用雷射切割第一基㈣中基材㈣之 ^域形成一第；切口 11〇。形成第_切口 HO後，所述 二封：U具有一弟一切口側面111。雷射種類可根據所述 二“1之性質進行相應選擇。一般來說，捧敛紀銘石榴 衝相、玄:YAG雷射器發射之雷射波長較短，屬紫外波段，脈 =㈣高’既可應用於導電層之切割，亦可用於絕緣層 、° co2雷射器發射之雷射波長較長，屬中紅外波段， =吊僅應用於絕緣層之切割。當然，亦可選擇混合雷射系 缝展即’以Nd:YAG雷射切割導電層，以co2雷射切割絕 — 本κ加例中，基材層11為絕緣層，故以C〇2雷射進 行切割即可。 用 、杬選地，可於第一基板10上形成一工具孔（圖未示）， 於進行雷射切割時之定位。 11 200845860 請參閱5,使所述第一切口側自所述第一開口 側面211對應，並使第一基板10之基材層η與黏合層20 相接觸、黏合層20肖第二基板3〇之第二絕緣層31相接觸， 將所述第-基板10、黏合層20、第二基板30順次壓合， 壓合後得到預製電路板40。 第-切口側面ln與第一開口側自211之間可呈有一 定誤差距離，該誤差距離應為2毫米以内。優選地，第一 切口側面111與第一開口側面211相齊平。 上开地’可於第—基板1G、黏合層2G及第二基板30 至少一個對應之定位孔，如此，於黏合層20上挖 開口 21、於第—基板1〇上形成第一切口 ιι〇及將第一^ 二 10二黏合層2〇及第二基板3〇進行疊層壓合時均可定： L為芩照，進行定位對準。 形成閱圖6,關所述第一基板10之第一導電層12 12呈有切口120。形成第二切口120後’該第-導電層 第—、弟—切口側面121，並使所述第二切口側面121、 切口側面111及第一開口側面211相對應。 側面=第—切π側面m、第一開口側自川與第二切口 述第之間可具有2毫米以内之誤差距離。優選地，所 如才;側面121、第一切口側* 111及第—開口側面 曝光所=二細12G藉由似α藝形成，包括塗覆光随、 一 ^餘刻等步驟。優選地，所述第二切口 12〇可 ¥屯層12、第二導電層32之線路圖案同時形成。冬 12 ^0845860 然，其亦可於第一導電屛一一 •成之前或之後形成。^ 、弟一導電層32之線路圖案形 .圖案、第二導二切口 120、第-導電層12之線路 通孔、將通孔案之前或之後’可包括-鑽 二導電層32,使第—墓：驟，以導通第一導電層12與第 現訊號傳輪。如果、屯層12與第二導電層32之間可實 二導電芦Me & k孔壁電鍍製程係第一導電層12、第 〒甩增32之線路圖幸 前應於第一導17一 ^成之後進行，則進行孔壁電鍍之 不 層12及篦-道帝& 護線路圖案。 弟—导电層32表面貼覆乾膜以保 :併㈣圖7及圖8,圖8為 不思圖，沿裁切邊界401掏+77仏I 刀Π炙口〗面 切邊界4〇1與黏合層2〇之開^預製電路板40,所述裁 120、第一切σ 汗 相對應，使得第二切口 7 110、開口 21 i 粦士 77、息田，Μ 40上定義出-去除區410。/、裁切邊界401於預製電路板 不同妒狀裁邊界4G1依具體產品結構設計而定，其可為 /狀，如圓形、矩形或其他多 ' 所述裁切邊界401為矩形，因此4包二例中， 與第二邊界•相對之第三邊界 具體之’所述第—邊界4G2 * k 1 4〇5° 路板結構而定，所述第…#/ ^成之具有斷差結構之電 疋所迷弟一邊界4〇2應盥 相齊平或位於第一開口側面211 開口側面212 間，所述第三邊界404岸鱼第開口側面如之 於第三開口側面213與第四開口側面丄=相：平或位 丄4之間，所述第四 13 200845860 邊界405應與第四開σ側面213相齊平或位於第三開口側 面2=與第四開口側面214之間。從而，所述裁切邊界術 可與第二切口 120、第一切口 11〇、開口 21形成—與開口 21對應之去除區410。 由於開口 21處之黏結材料已事先去除，故所述去除區 ^10亚未黏附於第二基板3Q，可從所述預製電路板上脫 洛’從而’形成-如圖9所示之具有斷差結構之電路板42〇。 本實施例中第一基板10僅包括—層導電層，第二基板 30亦僅包括-層導電層，因此，形成部分區域為單層:另 一部分區域為兩層之電路板42〇。當然，僅需改變第一基板 10、第二基板3G之導電層層數，即可形成具有其他斷差結 構之電路板，滿足各種設計需求。 圖10至圖16為第二實施例之製作具有斷差結構之電 路板之方法示意圖。 參閱圖10，提供第一基板50、黏合層 冗。所述第-基…括一基材層51及形成 層51上之第一導電層52。本實施例中，所述基材層包 括第二絕緣層511與第二導電層512。所述第二基板7〇包 括依次疊加之第三絕緣層71、第三導電層72、第二黏合層 75、第四絕緣層73及第四導電層74。所述第二導電層512、 第三導電層72已預先形成線路圖案。 參閱圖11，於所述黏合層60上預定區域形成開口 61， 從而，於所述黏合層60上形成一第一開口側面6“。 參閱圖12,本實施例中，採用混合雷射系統切割基材 14 200845860 層51之第二絕緣層511、第二導電層512之預定區域以形 成第一切口 510。具體之，先採用摻鈥釔鋁石榴石Nd:YAG 雷射切割基材層51之第二導電層512，再以C〇2雷射切割 第二絕緣層511。雷射切割形成第一切口 510後，所述基材 層51具有一第一切口側面511。 當然，雷射切割時可利用工具孔進行定位。 參閱圖13，使所述第一切口侧面511與所述第一開口 側面611對應，並使基材層51之第二導電層512與黏合層 60相接觸、黏合層60與第二基板70之第三絕緣層71相接 觸，將所述第一基板50、黏合層60、第二基板70順次壓 合，壓合後得到預製電路板80。 參閱圖14,於第一導電層52預定區域形成一第二切口 520，從而於第一導電層52上形成一第二切口侧面521，並 使得第一切口侧面511、第一開口側面611與第二切口侧面 521相互對準。另外，於預製電路板80上製作一導通孔， 並於第一導電層52、第四導電層74上形成線路圖案， 具體之，可首先於預製電路板80上進行一鑽通孔之步 驟，其次將所鑽通孔進行孔壁電鍍製程，再次，於第一導 電層52、第四導電層74上貼覆乾膜，同時形成線路圖案及 第二切口 520。 參閱圖15，沿裁切邊界801裁切所述預製電路板80。 所述裁切邊界801與開口 61相對應，使得所述第二切口 520、第一切口 510、開口 61與所述裁切邊界801於所述預 製電路板上80定義出一與開口 61對應之去除區810。由於 15 200845860 事先已開口 61處無黏結材料，故所述去除區8ι〇 於第二基板70,可從所述預製電路板8〇上脫落從而= —如圖16所示之具有斷差結構之電路板82〇。 4 本實施例形成部分區域為兩層，另_部分 之電路板820。當然，僅需改變第—基板％、第二其層 之導電層層數’即可形成具有其他斷差結構之電路‘。〇 本技㈣案之製作具有斷差結構之電路板方法之優點 ^•先’於電路板上形成線路圖案或者通孔士， 電路板上並益斷異έ士 m rn 、^守’ H、、“冓’因此可避免銅層剝離、斷 良之產生’提高產品良率。其次 、不 表面、力古箱土 π上 孓衣作過耘中，電路板 -有預先形成之刀口’可避免生產溶液從刀 入，造成電路板不良。再次，+身 中 <又 確、邊緣光滑，生產二使得切口定位準 觀品質。 I 口既具有商良率又具有優異之外 提二 1::，本發明確已符合發明專利之要件，遂依法 弋^ 明。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本荦之申士主 仏戶、轭方 技蓺之人八申明專利乾圍。舉凡熟悉本案 應涵y 斤作之寻效修飾或變化，皆 風於以下申請專利範圍内。 【圖式簡單說明】 實施例之製作具有斷差 二實施例之製作具有斷 圖1至圖9係本技術方案第一 結構之電路板之方法示意圖。 、，圖10至圖Ιό係本技術方案第 差結構之電路板之方法示意圖。、 16 200845860 圖17至圖22係先前技術製作具有斷差結構之^電路板 之方法示意圖。 圖2 3係具有斷差結構之電路板之不意圖。 '【主要元件符號說明】 10、50 第一基板 11、51 基材層 110、510 第一切口 111 、 511 第 一切口侧面 120、520 第二切口 121 > 521 第 二切口侧面 12、52 第一導電層 20、60 黏合層 21 > 61 開口 211、 611 第 一開口侧面 212 第二開口侧面 213 第 三開口侧面 214 第四開口側面 30、70 第 二基板 31、511 第二絕緣層 32 > 512 第 二導電層 40、80 預製電路板 401、801裁切邊界 402 第一邊界 403 第 二邊界 404 第三邊界 405 第四邊界 410、810去除區 420、820具有斷差結構之電路板 71 第三絕緣層 72 第 三導電層 75 第二黏合層 73 第四絕緣層 74 第四導電層 17In the embodiment, the second substrate 30 is a cladding I; a Copper Clad Laminate (CCL), and the second insulating layer 31 is a μ and a second conductive layer 32. The material of the substrate layer 11, the first conductive layer 12, the glaze ρ ★6 layer 20, the pen-dimensional edge layer 31 and the second conductive layer 32 may be according to the specific performance of the circuit - β / $ slab set. Generally, the most common material of the first conductive layer 12 and the second conductive layer 32 is copper, but other metals such as silver, gold, etc., the adhesive layer 2 is generally a coating or a resin. When the circuit board to be fabricated is a rigid circuit board, the material of the insulating layer may be one of a mixture of a resin, an epoxy resin, a polyester resin, and a mixture of a resin and a glass cloth. When the fabricated circuit board is a flexible circuit board, the material of the insulating layer may be selected from the group consisting of polyimide (PI), Teflon, polyamide, polyacrylic acid Polymethylmethacrylate, Polycarbonate, Polyethylene Terephtalate (PET) or Polyamide Polyethylene-Terephthalate Copolymer Or a composition thereof. 200845860, and FIG. 2 and FIG. 3, FIG. 3 is a plan view of the adhesive body of FIG. 2, a predetermined area on the adhesive layer 20~ the factory opening 21 can be punched out by a mold, or can be scraped by a knife. In addition to the other side of the party: the opening of the scheduled area of the electricity and the production of the _ qi autumn (four) directory specific product structure design. The structure of the second, the opening σ 21 can be different shapes, such as round fields, rectangles or other polygons. Therefore, the adhesive layer 20 has a first door opening: the opening 21 is rectangular. The surface 212 ϋ / side surface 211, the second opening side, the second opening side surface 213, and the fourth opening side surface 214, an opening side surface 2 Π and the second opening side surface 212 213 are opposed to the fourth opening side surface 214. The younger side of the open side "heart" is formed by laser cutting the base (4) of the first base (four) to form a first; the slit 11 is formed. After forming the first cut HO, the second seal: U has a divergent side 111. The type of laser can be selected according to the nature of the two "1". In general, the holding of Ji Ming pomegranate phase, Xuan: YAG laser emits a shorter wavelength of the laser, is the ultraviolet band, pulse = (four) high 'can be used for the cutting of the conductive layer, can also be used for the insulation layer, ° The co2 laser emits a long laser wavelength, which belongs to the mid-infrared band. = The crane is only used for the cutting of the insulation layer. Of course, it is also possible to choose a hybrid laser sewn exhibition, that is, to cut the conductive layer by Nd:YAG laser, and to cut it with a co2 laser. In the case of the κ addition, the substrate layer 11 is an insulating layer, so C〇2 Lei Shoot and cut. Alternatively, a tool hole (not shown) may be formed on the first substrate 10 for positioning during laser cutting. 11 200845860 Please refer to 5, the first slit side is corresponding to the first opening side surface 211, and the base material layer η of the first substrate 10 is in contact with the adhesive layer 20, and the second layer 3 is bonded to the second layer 3 The second insulating layer 31 is in contact with each other, and the first substrate 10, the adhesive layer 20, and the second substrate 30 are sequentially pressed together, and pressed to obtain a prefabricated circuit board 40. The first slit side ln and the first opening side may have a certain error distance from 211, and the error distance should be within 2 mm. Preferably, the first slit side 111 is flush with the first open side 211. At least one corresponding positioning hole may be formed on the first substrate 1G, the adhesive layer 2G and the second substrate 30, so that the opening 21 is dug on the adhesive layer 20, and the first slit is formed on the first substrate 1 When the first bonding layer 2 黏 2 〇 and the second substrate 3 〇 are laminated and pressed, it can be determined: L is a photographic exposure, and positioning is performed. Forming FIG. 6, the first conductive layer 12 12 of the first substrate 10 is provided with a slit 120. After the second slit 120 is formed, the first conductive layer first and the second slit side 121 are opposed to each other, and the second slit side surface 121, the slit side surface 111, and the first opening side surface 211 are associated. The side surface = the first π side surface m, and the first opening side may have an error distance within 2 mm from the second and the second slit. Preferably, the side 121, the first slit side * 111, and the first open side surface exposure = two thin 12G are formed by an alpha-like technique, including a step of coating light, a moment, and the like. Preferably, the second slit 12 is formed simultaneously with the line pattern of the second layer 12 and the second conductive layer 32. Winter 12 ^ 0845860 However, it can also be formed before or after the first conductive 屛. ^, the wiring pattern of the conductive layer 32, the pattern, the second guiding slit 120, the line through hole of the first conductive layer 12, before or after the through hole case may include - drill two conductive layers 32, so that - Tomb: Step to turn on the first conductive layer 12 and the current signal transmission wheel. If, between the ruthenium layer 12 and the second conductive layer 32, the real two-electrode reed Me & k hole wall electroplating process is the first conductive layer 12, the third 〒甩 32 circuit diagram should be before the first guide 17 After the formation, the hole wall plating is performed without the layer 12 and the 篦-道帝 & Guard circuit pattern. Brother—the surface of the conductive layer 32 is covered with a dry film to ensure that: (4) Figure 7 and Figure 8 are inconspicuous, along the cutting boundary 401 掏 +77 仏 I Π炙 〗 面 面 面 〇 〇 〇 〇 与The adhesive layer 2 is opened to the prefabricated circuit board 40, and the cut 120 and the first cut σ sweat correspond to each other, so that the second slit 7 110, the opening 21 i, the gentleman 77, the interest field, and the Μ 40 define a-removal area. 410. /, the cutting boundary 401 in the prefabricated circuit board different 裁-shaped border 4G1 according to the specific product structure design, which can be / shape, such as a circle, a rectangle or other multiple 'the cutting boundary 401 is a rectangle, therefore 4 In the case of the second case, the third boundary is opposite to the third boundary, and the first boundary is 4G2 * k 1 4〇5°, and the first ...#/^ has a fault structure. The boundary of the electric 一 一 〇 〇 〇 〇 〇 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或 或The opening side 丄=phase: between flat or position ,4, the fourth 13 200845860 boundary 405 should be flush with the fourth open σ side 213 or between the third open side 2 == and the fourth open side 214. Thus, the cutting boundary can be formed with the second slit 120, the first slit 11A, and the opening 21 - a removal region 410 corresponding to the opening 21. Since the bonding material at the opening 21 has been removed in advance, the removal region 10 is not adhered to the second substrate 3Q, and can be detached from the prefabricated circuit board to form a - as shown in FIG. The circuit board 42 of the difference structure. In this embodiment, the first substrate 10 includes only a layer of conductive layer, and the second substrate 30 also includes only a layer of conductive layer. Therefore, the partial region is formed as a single layer: the other portion is a two-layer circuit board 42A. Of course, it is only necessary to change the number of conductive layers of the first substrate 10 and the second substrate 3G to form a circuit board having other fault structures, which satisfies various design requirements. Fig. 10 through Fig. 16 are views showing a method of fabricating a circuit board having a stepped structure in the second embodiment. Referring to Figure 10, a first substrate 50, adhesive layer redundancy is provided. The first base includes a base material layer 51 and a first conductive layer 52 formed on the layer 51. In this embodiment, the substrate layer includes a second insulating layer 511 and a second conductive layer 512. The second substrate 7 includes a third insulating layer 71, a third conductive layer 72, a second adhesive layer 75, a fourth insulating layer 73, and a fourth conductive layer 74 which are sequentially stacked. The second conductive layer 512 and the third conductive layer 72 have previously formed a line pattern. Referring to FIG. 11, an opening 61 is formed in a predetermined area on the adhesive layer 60, thereby forming a first opening side surface 6" on the adhesive layer 60. Referring to FIG. 12, in this embodiment, a hybrid laser system is used for cutting. Substrate 14 200845860 A predetermined area of the second insulating layer 511 and the second conductive layer 512 of the layer 51 to form a first slit 510. Specifically, the ytterbium-doped aluminum garnet Nd:YAG laser cutting substrate layer 51 is first used. The second conductive layer 512 further cuts the second insulating layer 511 by C〇2 laser. After the laser cutting forms the first slit 510, the substrate layer 51 has a first slit side 511. When the cutting is performed, the tool hole can be used for positioning. Referring to FIG. 13, the first slit side surface 511 is corresponding to the first opening side surface 611, and the second conductive layer 512 of the base material layer 51 is bonded to the adhesive layer 60. The contact and adhesion layer 60 is in contact with the third insulating layer 71 of the second substrate 70, and the first substrate 50, the adhesive layer 60, and the second substrate 70 are sequentially pressed together, and pressed to obtain a prefabricated circuit board 80. 14. Forming a second slit 520 in a predetermined area of the first conductive layer 52, thereby being first A second slit side surface 521 is formed on the conductive layer 52, and the first slit side surface 511, the first opening side surface 611 and the second slit side surface 521 are aligned with each other. Further, a through hole is formed on the prefabricated circuit board 80, and Forming a line pattern on the first conductive layer 52 and the fourth conductive layer 74. Specifically, the step of drilling a through hole may be first performed on the prefabricated circuit board 80, and then the through hole is drilled into the hole wall plating process, again, The dry film is pasted on the first conductive layer 52 and the fourth conductive layer 74 while forming the wiring pattern and the second slit 520. Referring to Fig. 15, the prefabricated circuit board 80 is cut along the cutting boundary 801. The boundary 801 corresponds to the opening 61, such that the second slit 520, the first slit 510, the opening 61 and the cutting boundary 801 define a removal area 810 corresponding to the opening 61 on the prefabricated circuit board 80. Since 15 200845860 has previously opened 61 non-bonded material, the removal area 8 is immersed in the second substrate 70 and can be detached from the prefabricated circuit board 8 从而 = - as shown in FIG. 16 with a fault structure The circuit board 82〇. 4 This embodiment is shaped The partial area is two layers, and the other part is the circuit board 820. Of course, it is only necessary to change the number of the first substrate and the second layer of the conductive layer to form a circuit having other fault structures. (4) Advantages of the circuit board method with the structure of the fault ^• Firstly, the circuit pattern or the through-hole is formed on the circuit board, and the circuit board is also beneficial to the different gentlemen m rn , ^ 守 'H,, 冓'Therefore, it can avoid the peeling of the copper layer and the production of the broken one to improve the product yield. Secondly, no surface, force ancient box soil π on the 作 作 ,, the circuit board - has a pre-formed knife edge 'can avoid the production solution from the knife, resulting in poor board. Again, + body < and indeed, smooth edges, production two makes the incision positioning accurate quality. I port has both good business and excellent performance. 1: 1: The invention has indeed met the requirements of the invention patent, and is stipulated according to law. However, the above is only a preferred embodiment of the present invention, and it is not possible to limit the patents of the applicants of the Shenshi, the yoke, and the yoke. Anyone familiar with the case should be able to modify or change the effect, which is within the scope of the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS The fabrication of the embodiment has a variation. The fabrication of the embodiment has a schematic diagram of the method of the circuit board of the first structure of the present technical scheme. Fig. 10 to Fig. 10 are schematic diagrams showing the method of the circuit board of the poor structure of the technical solution. 16 200845860 FIG. 17 to FIG. 22 are schematic diagrams showing a method of fabricating a circuit board having a fault structure in the prior art. Fig. 2 is a schematic view of a circuit board having a stepped structure. '[Main component symbol description] 10, 50 first substrate 11, 51 base material layer 110, 510 first slit 111, 511 first slit side surface 120, 520 second slit 121 > 521 second slit side surface 12, 52 first conductive layer 20, 60 adhesive layer 21 > 61 opening 211, 611 first opening side 212 second opening side 213 third opening side 214 fourth opening side 30, 70 second substrate 31, 511 second insulating layer 32 > 512 second conductive layer 40, 80 prefabricated circuit board 401, 801 crop boundary 402 first boundary 403 second boundary 404 third boundary 405 fourth boundary 410, 810 removal area 420, 820 circuit with a fault structure Plate 71 third insulating layer 72 third conductive layer 75 second adhesive layer 73 fourth insulating layer 74 fourth conductive layer 17