200845226 P950239 22550twf.doc/006 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電晶體元件的製造方法，且特別 是有關於一種臨場修補電漿損害基底的方法。 【先前技術】 由於積體電路產業的蓬勃發展，元件的積集度也隨之 曰益提高。在這樣的趨勢之下，如何避免元件微縮所導致 〇 的短通道效應，以及元件間彼此緊鄰所造成的漏電與短路 等問題，一直是業界研究的重點。 一般來說’為了讓相鄰電晶體的閘極可以隔離開來， 閘極的兩側會設置有間隙壁(spacer)。而且，間隙壁也可以 用末作為形成電晶體之源極/没極的重摻雜(heaVy d〇ping) 罩幕。以目前的製程進程看來，間隙壁已經可以稱得上是 母個電晶體的必備構件之一了。 迄今常見的間隙壁形成作法為，先在已經形成閘極的 Q ^底上沈積—層間隙雜料層。然後，在電絲刻反應腔 至中]進行非等向性蝕刻製程。非等向性蝕刻製程的原理 為’對於基底所在的基板施以偏壓，此偏壓會吸引帶正電 的離子並且使其加速，而後轟擊基底，以去除部分間隙壁 材料層並於閘極的側壁形成一對間隙壁。然而，電⑽刻 製程卻也同時伴隨著—些問題，其中之-歧電漿損害 (plasma damage)的發生。 电水軸]的&性就是以高能量粒子轟擊基底，這些粒 牙、了大部分帶正電的離子之外，還包括了微量的紫外光 200845226 Ρ950239 22550twf.doc/〇〇6 與χ射線等輻射。者浐此 將會損傷基絲^且 =對撞擊基底時， 何修整受到電襞損金件祕造成傷害。因此，如 變降到^ 使得電晶體效能所受到的影 3降到取低，是值得研究的問題。 【發明内容】 的方i發是在提供—種臨場修補電聚損害基底 Γ 受到” a墼㈣來移除铜隨形成的過程當中， 又至〗私漿轟擊而党損的基底表面。 方法本目的就是在提供一種電晶體元件的製造 以確保電晶體元件的效能。# ^的基底表面 2發明提出-種臨場修補賴損害基朗方法，此方 主成=法=成此構件的步驟包括一含電聚之 軟式㈣射丨^括’錢仃錄㈣歡機台進行 漿射m程，以移除部份基底。 :使用之電力為低於聰之該含電裝之主二= 依照本發_實補所叙臨場修 =，上述之軟式電裝_呈是用以形成間 =明的實_所述之臨場修補電漿損害基底的方法，二 ΐ蝕：：壁之材質包括二氧化矽或氮化矽且上述之軟式電 蝕刻製程所使用之電力例如是50至i50w。 依照本發日㈣實施綱狀臨場修補電漿損害 …其愧主制製程是用㈣成祕結構且該軟式電 6 200845226 P950239 22550twf.doc/006 漿钱刻製程所使用之電力為0至5〇W。 依照本發_實_所述之臨鄉補 方法，上述之軟式電漿侧製程所使 二基底的 物、氧氣與惰性氣體。 礼體例如是氟化 依照本發明的實施例所述之臨場修 方法，上述之氟化物例如是氟烴化物。“ ^基底的 Γ 依照本發明的實施例所述之臨場修補tip+ # + 方法，上述之氟烴化物例如是巩、咖3補；^=基底的 依照本發，實施例所述之臨場修補“ / ，上述之氟烴化物的流量範圍例如是1〜— 方法依㈣的t例所述之臨場修補電漿損害基底的 去上述之虱氣的流量範圍例如是30〜50sccm。 方法依實施例所述之臨場修補電漿損害基底的 万忐，上述之惰性氣體例如是氬氣。 依，本發明的實關所叙臨場修補電漿損害基底的 / ，上述之虱氣的流量範圍例如是100〜200sccm。 本發明另提出一種電晶體元件的製造方法，此方法包 社槿歹首先’提供基底。然後，於基底上形成閘極 辟接著’經由沈積與含電裝之主姓刻製程於閘極結構 2壁形成一對含氮化石夕或氧化石夕的間隙壁。之後，在進 7刻製程之機台進行軟式電漿钱刻製程，以移除部份基 =制軟式電漿餘刻製程所使用之電力為低於鳩之該主蝕 1衣私之電力。繼之’於基底上形成源極/汲極區。 依知、本發明的實施例所述之電晶體元件的製造方法， 200845226 P950239 22550twf.doc/006 上述之軟式電漿蝕刻製程所使用之電力例如0 150W。 依照本發明的實施例所述之電晶體元件的製造方法， 上述之軟式電漿侧製程所使用的氣體例 2 氣與惰性氣體。 & ^ 、依照本發明的實施例所述之電晶體元件的製造方法， 上述之氟化物例如是氟烴化物。 、、依照本發明的實施例所述之電晶體元件的製造方法， 上述之氟烴化物例如是CF4、CHF3、CHA或cH#。 依照本發明的實施例所述之電晶體元件的製造方法， 上述之氣烴化物的流圍例如是丨〜·cm。 依，本發明的實施例所述之電晶體元件的製造方法， 述之氧氣的流量範圍例如是30〜50sccm。 依^本發明的實施例所述之電晶體元件的製造方法， 上述之惰性氣體例如是氬氣。 本發明的貫施例所述之電日日日體元件的製造方法， 处之乳氣的流量範圍例如是100〜200sccm。 德，軟式電製程來移除於_刻製程 +曰^=貝告的基底表面，以確保經過接續製程後所形成的 包曰曰體=件可以具有高可靠性與的效能。 為讓本發明之上述和其他目的、特徵和優點能更明顯 下’下文特舉實施例，並配合所附圖式，作詳細說明如 卜0 【實施方式】 8 200845226 P950239 22550twf.doc/〇〇6 圊1A至圖1C疋依照本發明實施例所纟會示之電晶體元 件的製造流程剖面示意圖。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of fabricating a transistor element, and more particularly to a method of repairing a substrate by repairing a plasma. [Prior Art] Due to the booming development of the integrated circuit industry, the accumulation of components has also increased. Under such a trend, how to avoid the short channel effect caused by the miniaturization of components and the leakage and short circuit caused by the close proximity of components are always the focus of the industry research. In general, in order to isolate the gates of adjacent transistors, spacers are provided on both sides of the gate. Moreover, the spacers can also be used as a heavily doped (heaVy d〇ping) mask that forms the source/depolarization of the transistor. In the current process, the spacers can already be regarded as one of the necessary components of the mother transistor. A conventional method of forming a spacer is to deposit a layer of interstitial layers on the Q^ bottom where the gate has been formed. Then, an anisotropic etching process is performed in the process of electrically injecting the reaction chamber to the middle. The principle of the anisotropic etching process is to 'bias the substrate on which the substrate is placed. This bias attracts and accelerates the positively charged ions, and then bombards the substrate to remove a portion of the spacer material layer and the gate. The side walls form a pair of spacers. However, the electric (10) engraving process is accompanied by some problems, among them, the occurrence of plasma damage. The electric axis of the electric water shaft is to bombard the substrate with high-energy particles. In addition to most of the positively charged ions, these particles also include trace amounts of ultraviolet light 200845226 Ρ950239 22550twf.doc/〇〇6 and xenon rays. Equal radiation. In this case, it will damage the base wire ^ and = when it hits the base, the repair is damaged by the electric damage. Therefore, if the drop to ^ causes the effect of the transistor to be reduced to a low value, it is worth studying. SUMMARY OF THE INVENTION The present invention is to provide a kind of on-site repairing electropolymerization damage to the substrate 受到 by "a 墼 (4) to remove the formation of copper, and to the surface of the substrate damaged by the private pulp bombardment. The purpose is to provide a fabrication of a transistor component to ensure the performance of the transistor component. The substrate surface 2 of the invention is proposed to provide a method for repairing the damage. The method of forming the component includes a method. The soft type containing electricity (4) shots ^ including 'Qian Yu Lu (4) Huan machine to carry out the pulping m process to remove part of the substrate. : The power used is lower than the Cong of the containing electric 2 = according to this _ 实 补 述 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修 修矽 or tantalum nitride and the electric power used in the above-mentioned soft electro-etching process is, for example, 50 to i50w. According to the present day (4), the surface repairing plasma damage is performed... The main manufacturing process is (4) the secret structure and the soft type Electric 6 200845226 P950239 22550twf.doc/006 pulp money engraving process The electric power used is 0 to 5 〇 W. According to the Linxiang supplement method described in the present invention, the above-mentioned soft plasma side process enables the two substrates, oxygen and inert gas. According to the field repair method of the embodiment of the present invention, the above fluoride is, for example, a fluorocarbonate. "^ Substrate Γ According to the embodiment of the present invention, the spot repair tip + # + method, the above fluorocarbon compound, for example According to the present invention, the above-mentioned fluorocarbon compound flow rate range is, for example, 1 to - the method according to (t) The flow rate of the helium gas to the above-mentioned helium gas is, for example, 30 to 50 sccm. The method according to the embodiment of the present invention repairs the plasma to damage the substrate, and the inert gas is, for example, argon. The flow rate range of the above-mentioned helium gas is, for example, 100 to 200 sccm. The present invention further provides a method for manufacturing a transistor element, which first provides a substrate. Then, Yu Ji Forming a gate on the bottom and then forming a pair of spacers containing nitride or oxidized stone on the wall of the gate structure 2 through the deposition of the main electrode of the electric device. After that, the machine is in the process of 7-step process. Performing a soft plasma etching process to remove part of the base = soft plasma remnant process, the power used is less than the power of the main eclipse, and then the source is formed on the substrate. The invention relates to a method for fabricating a transistor element according to an embodiment of the invention, 200845226 P950239 22550twf.doc/006 The power used in the above-mentioned soft plasma etching process is, for example, 0 150 W. According to an embodiment of the invention The method for producing a transistor according to the above, wherein the gas used in the soft plasma side process is a gas of 2 gas and an inert gas. & ^ The method for producing a transistor according to the embodiment of the present invention, wherein the fluoride is, for example, a fluorocarbonate. According to a method of manufacturing a transistor device according to an embodiment of the present invention, the fluorocarbon compound is, for example, CF4, CHF3, CHA or cH#. According to the method of manufacturing a transistor element according to the embodiment of the present invention, the flow of the gas hydrocarbon compound described above is, for example, 丨··cm. According to a method of manufacturing a transistor element according to an embodiment of the present invention, the flow rate of oxygen is, for example, 30 to 50 sccm. According to a method of manufacturing a transistor device according to an embodiment of the invention, the inert gas is, for example, argon. In the method for producing a solar day and solar element according to the embodiment of the present invention, the flow rate of the milk gas is, for example, 100 to 200 sccm. De, the soft electric process is removed from the substrate surface of the engraving process to ensure that the package body formed after the continuous process can have high reliability and performance. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the appended claims appended claims <RTIgt; </RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; 6 圊 1A to FIG. 1C are schematic cross-sectional views showing a manufacturing process of a transistor element according to an embodiment of the present invention.
、请苓照圖1Α，提供基底100，基底1〇〇例如是矽基底 或其他合適之半導體材料。然後，於基底1〇〇上形成閑極 結構102。、閘極結構1〇2是由閘介電層1〇4與閘極導體層 =6所組成。在一實施例中，閘介電層1〇4之材質例如^ 乳化石夕；、閘極導體層1()6例如是由多㈣層與金屬石夕化物 層所組成。上述，閘極結構1〇2的形成方法例如是，先在 ，底，上形成氧化⑧㈣層（未㈣），其形成方法例如 是熱氧化法。然後’在氧化材料層上先後形成多晶石夕材料 層（未緣示)與金屬石夕化物材料層㈤會示）。接著，進 製程與侧製程’以圖案化氧化材料層、多晶⑪材料層^ 金屬石夕化物材料層，而分別形成閘介電層刚 ^體 層 106。 ^ 再來，請參照1B，於閘極結構1〇2之側 間隙壁⑽。間隙壁⑽的材質例如是 $ ^ ° _壁應的形成方法例如是先在基底⑽上^一 :^壁Γ料層（未緣示）。間隙壁材料層的形成方法例如 法。繼之，移除部份間隙壁材料層，以於 3對間隙壁議。移除部份間隙 j枓層的方法例如是進行_向性主侧製程。复中， 性侧製程例如是電漿㈣製程。舉說，、 =製程的步驟例如是，首1將基底⑽置於電裝^ 應腔室（未緣示）中’然後，對基底100施加偏壓，以於 9 200845226 P950239 22550twf.doc/006 反應腔室内形成一外加電場。電漿當中帶正電的離子，會 因為這個與基底100相垂直的電場的驅動以及加速，而義 擊基底100。部份間隙壁材料層因此被移除而形成間隙壁 108。在一實施例中，間隙壁材料層之材質為氧化矽；反應 的氣體例如是氟烴化物如CF4、CHF3、CH#2,或CH3F、氧 氣(〇2)以及惰性氣體如氬氣之混合氣體；電力為6〇〇3至7〇〇 瓦(W);壓力為10亳托。Referring to Figure 1, a substrate 100 is provided, such as a germanium substrate or other suitable semiconductor material. Then, a dummy structure 102 is formed on the substrate 1''. The gate structure 1〇2 is composed of the gate dielectric layer 1〇4 and the gate conductor layer=6. In one embodiment, the material of the gate dielectric layer 〇4 is, for example, emulsified; and the gate conductor layer 1 (6) is composed of, for example, a plurality of (four) layers and a metal lithium layer. As described above, the gate structure 1 2 is formed by, for example, forming an 8 (four) layer of oxide (not (4)) on the bottom, bottom, and a method of forming it, for example, a thermal oxidation method. Then, a polycrystalline stone material layer (not shown) and a metal lithium material layer (f) are sequentially formed on the oxidized material layer. Next, the process and the side process are performed to pattern the oxidized material layer, the polycrystalline 11 material layer, and the metal lithium material layer to form the gate dielectric layer 106, respectively. ^ Again, please refer to 1B, on the side of the gate structure 1〇2, the spacer (10). The material of the spacer (10) is, for example, a method of forming a wall surface, for example, first on the substrate (10): a wall layer (not shown). A method of forming the spacer material layer is, for example, a method. Following this, a portion of the spacer material layer is removed for discussion of the 3 pairs of spacers. The method of removing a part of the gap j 枓 layer is, for example, performing a _ directional main side process. In the middle, the sexual side process is, for example, a plasma (four) process. For example, the step of the process is, for example, that the first substrate (10) is placed in the electrical device chamber (not shown), and then the substrate 100 is biased to 9 200845226 P950239 22550twf.doc/006 An applied electric field is formed in the reaction chamber. The positively charged ions in the plasma will strike the substrate 100 due to the driving and acceleration of this electric field perpendicular to the substrate 100. A portion of the spacer material layer is thus removed to form the spacers 108. In one embodiment, the material of the spacer material layer is ruthenium oxide; the reacted gas is, for example, a mixed gas of a fluorocarbon such as CF4, CHF3, CH#2, or CH3F, oxygen (〇2), and an inert gas such as argon. The power is 6〇〇3 to 7〇〇W (W); the pressure is 10亳.
Ο 丨…小土 「牙M文早僧裢構外，在一實施 間隙壁1G8還可叹雙層的結構，例如是由氧切補償間 隙壁與氮切間隙壁所構成。然而，上述的電漿姓刻製程 基底100表面的原子鍵結，使得部份基底 理'r電漿損害:尤其是’當間隙壁材料 “接菩基絲面遭妓害的情形非常嚴重。 接者，§月參照圖1C，在形成間隙壁1〇8的 =臨場移除翻魏财㈣錄絲面 。的，方法例如是進行軟式電 = 漿_製程中所使用的4^ ==的_ °軟式電 108之蝕刻製程的電力广二施例：j蝕刻形成間隙壁 程所使用的電力是低於 施例中，軟式電裝崎程所使 用的電力範圍例如是在5()〜15 刻製程所使 製程中所制的反應氣m如是含軟式電漿钱刻 疋3百稀潯的氟化物的混合 200845226 P950239 22550twf.doc/006 氣體如氟化物、氧氣以及惰氣所混合的氣體，或是氧氣以 及惰氣所混合的氣體。氟化物例如是氟烴化物氣體，例如 是CF4、CHF3、CH#2或CH^F。惰氣可以是氬氣。軟式電 漿蝕刻製程的壓力係大於先前蝕刻形成間隙壁1〇8之蝕刻 製程者，以減少轟擊基底1〇〇之粒子的方向性。在一實施 例當中，氟烴化物氣體的流量範圍例如是氧氣 的流量範圍例如是在30〜5〇Sccm之間；&氣的流量範圍例 〇 如是在1〇0〜200sccm之間；其壓力為100毫托至200毫托。 由於在形成間隙壁108的蝕刻步驟中，未被閘極結構 =2—所覆蓋的部份基底表面110會受到電漿的轟擊而受到 才貝告，此軟式電漿蝕刻製程即可以輕微蝕刻基底表面 110，以移除受損的基底表面U0，確錢續製程完成的電 晶體元件效能以及可靠度。此外，值得一提的是，此乾式 =製程與形成_壁⑽的步驟，是在同—偏刻反應 腔室當中完成。如此的設計，—方面可以降低製程的成本二 c g #面也避免了晶#在各式半導體設備之間的運送過程 中，遭文微塵粒子等不潔物污染的可能性。 σ接著，於基底100上形成源極/汲極區112。源極/汲極 區112的形成方法例如是進行離子植入製程。後續完成電 晶體7〇件之製程為習知技術者所周知，在此*再資述。 在以上的實施例中，是以間隙壁製程之後進行軟式電 Τ餘刻製程來說明之。然而，本發明之軟式電_刻製程 “不限於此。例如，軟式電漿细製程亦可來修補餘 亥’形成閘極結構之主餘刻製程所造成之基底表面的損壞。 11 200845226 P950239 22550twf.doc/006 在一實施例中，軟式電漿姓刻製程所使用的電力是低於30 %之主侧製程之電力。在-實施例中，軟 程所使用的電力是简之主靖程之i;:二; 施電漿钱刻製程所使用的電力範圍例如是在 Γ 如a人;軟式·射彳製財所義的反應氣體例 气氟化物的混合氣體如氟化物、氧氣以及惰 所心的乳體’或是氧氣以及惰氣所混合的氣體。敦化 物例如是？烴化物氣體，例如是CF4、CHF;、或 乳可以疋鼠氣。軟式電衆钱刻製程的壓力係大於 先别形成祕結構之主烟製程者，以減少轟擊基底1〇〇 的陡。在一實施例當中’氟烴化物氣體的流量 乾圍例如{ iW ;氧氣的流量範圍例如是在 30〜5〇Sccm之間；氬氣的流量範圍例如是在1〇〇〜職咖 之間，其壓力為100毫托至200毫托。 本發明之電晶體元件的製造方法，係以軟式電裝 製程修補於閘極結構或間隙壁製程中所造成之破損美底表 ^以確保經過後續製程所完成的電晶體树效能不受影 此外’由於修補基底的電漿伽彳製程與閘極結構 或間隙壁形成製程躲同-個電漿_反應腔室當中即可 先後完成，因此，可以節省製程成本。 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明’任何熟習此技藝者’在不脫離本發明之精神和 圍内’當可作些許之更動與卿，因此本發明之保護範圍 12 200845226 P950239 22550twf.doc/006 當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1A至圖1C是依照本發明實施例所繪示之電晶體元 件的製造流程剖面示意圖。 【主要元件符號說明】 100 :基底 102 :閘極結構 104 :閘介電層 106 :閘極導體層 108 :間隙壁 110 :受損之基底表面 112 :源極/汲極 13Ο 丨 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小 小The atomic bond on the surface of the substrate 100 is caused by the surname, so that some of the substrates are damaged by the 'r plasma: especially when the spacer material is damaged. Receiver, § month refer to Figure 1C, in the formation of the gap 1 〇 8 = on the spot to remove the Wei Cai (4) recorded silk surface. For example, the method of performing the etching process of 4^ == _ ° soft electric 108 used in the soft electric_pulp_process is widely used: the electric power used for forming the gap wall by j etching is lower than that of the application. In the example, the electric power range used in the soft electric equipment is such as a mixture of the reaction gas m produced in the process of 5 () to 15 engraving process, such as a fluoride containing a soft plasma. 200845226 P950239 22550twf.doc/006 Gases such as fluoride, oxygen and inert gas, or a mixture of oxygen and inert gas. The fluoride is, for example, a fluorocarbon gas such as CF4, CHF3, CH#2 or CH^F. The inert gas can be argon. The pressure of the soft plasma etching process is greater than that of the etching process which previously etched the spacers 1 to 8 to reduce the directivity of the particles bombarding the substrate. In one embodiment, the flow rate range of the fluorocarbon gas is, for example, a flow rate of oxygen of, for example, between 30 and 5 〇 Sccm; and the flow rate of the gas is, for example, between 1 〇 0 and 200 sccm; It is from 100 mTorr to 200 mTorr. Since in the etching step of forming the spacers 108, part of the substrate surface 110 not covered by the gate structure = 2 is subjected to plasma bombardment, the soft plasma etching process can slightly etch the substrate. The surface 110 is used to remove the damaged substrate surface U0 to ensure the performance and reliability of the completed transistor component. In addition, it is worth mentioning that the dry process and the process of forming the wall (10) are performed in the same-polarization reaction chamber. Such a design can reduce the cost of the process. The c g #face also avoids the possibility that the crystal # is contaminated by impurities such as fine dust particles during transportation between various semiconductor devices. σ Next, a source/drain region 112 is formed on the substrate 100. The method of forming the source/drain regions 112 is, for example, an ion implantation process. The subsequent completion of the transistor 7 process is well known to those skilled in the art and will be re-stated here. In the above embodiment, the soft electric power remnant process is explained after the spacer process. However, the soft electric etch process of the present invention is "not limited thereto. For example, the soft plasma fine process can also repair the damage of the substrate surface caused by the main remnant process of forming the gate structure by Yu Hai." 11 200845226 P950239 22550twf .doc/006 In one embodiment, the power used by the soft plasma surname process is less than 30% of the power of the main side process. In the embodiment, the power used by the soft path is the master of the simple process. i;: 2; The range of electric power used in the electro-mechanical process is, for example, a person; a soft type of reaction gas, a reaction gas such as fluoride, a mixed gas such as fluoride, oxygen, and an idler. The heart's milk' is a gas mixed with oxygen and inert gas. For example, hydrocarbons such as CF4 and CHF, or milk can be used for squirrels. The pressure system of the soft electric system is greater than the first. Do not form the main smoke process of the secret structure to reduce the steepness of the bombardment of the substrate. In one embodiment, the flow of the fluorocarbon gas is, for example, {iW; the flow rate of oxygen is, for example, 30~5〇Sccm. Between; the flow rate of argon gas, for example The pressure of the transistor element of the present invention is between 100 Torr and 200 mTorr. The manufacturing method of the transistor component of the present invention is caused by the soft electrical assembly process repaired in the gate structure or the spacer process. Damaged beauty table ^ to ensure that the performance of the transistor tree after the subsequent process is not affected. 'Because the plasma galax process of repairing the substrate is hidden from the gate structure or the spacer formation process - a plasma_reaction chamber The process can be completed in succession, and therefore, the process cost can be saved. Although the invention has been disclosed in the above embodiments, it is not intended to limit the invention 'any skilled person' without departing from the spirit and scope of the invention. There may be some changes and modifications, so the scope of protection of the present invention 12 200845226 P950239 22550twf.doc/006 is subject to the definition of the patent application scope. [Simplified Schematic] FIG. 1A to FIG. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a manufacturing process of a transistor element according to an embodiment of the invention. [Main element symbol description] 100: Substrate 102: Gate structure 104: Gate dielectric layer 106: Gate conductor layer 108: Spacer is 110: damage to the surface of the substrate 112: the source / drain 13