200830437 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種半導體封裝件及其製法，尤指一 種感測式封裝件及其製法。 【先前技術】 傳統影像感測式封裝件（Image sens〇r package)主要係 將感測晶片（Sensor chip)接置於一晶片承載件上，並透過 銲線加以電性連接該感測晶片及晶片承载件後，於該感測 _晶片上方封蓋住-玻璃，以供影像光線能為該感測晶片所 擷取。如此，該完成構裝之影像感測式封裝件即可供系統 廠進行整合至如印刷電路板（pCB)等外部裝置上，以供如 =位相機（DSC)、數位攝影機（DV)、光學滑鼠、行動電話 等各式電子產品之應用。相關之技術係如美國專利第 6,262,479、6,590,269 及 5,962,81〇 號案等所揭示者。 請參閱第1目，係為顯示美國專利第6,262,479所揭 鲁不之感測式封裝件，其係透過一模壓（m〇lding)製程以於平 面格柵陣列^^“&^沿以〜^^彡基板丨丨上形成攔壩結 構13’並將感測晶片1〇接置於該基板丨丨上為該攔壩結構 U所圍繞之外露區域且透過銲線丨2電性連接該感測晶片 10及基板11，最後，將玻璃15黏置於攔壩結構13上 成該封裝件。 70 對應於前述之感測式半導體封裝件而言，由於其於基 板11側邊形成有半孔之電性導通孔11G，因此在透過鲜ς 材料16而利用表面黏著技術（SMT)以該將該封裝件銲結至 5 19804 200830437 ' 如印刷電路板（PCB)17之外部裝置時，該銲錫材料16可充 ' 分結合該封裝件及印刷電路板，以提升銲結性，同時易於 檢查銲接點之品質。 惟該感測式封裝件中為避免形成於基板U周圍之攔 壩結構13的樹脂材料沿該半孔之電性導通孔11〇而滲漏至 基板11背面，故而必須於該基板i丨上對應半孔之電性導 通孔I10位置預先覆盍一膠片（tape)14,再行進行封裝模壓 作業’以於該膠片14上形成攔壩結構13。 .· ㈣由於膠片容易吸濕’如此即會造成攔壩結構與基 板間發生脫層現象，且因該膠片的使用亦增加製輕成本及 步驟；再者，前述感測式封裝件之製程，主要係於一呈陣 列排列（array)有複數基板的基板模組片上採用批次方式製 作，其中相鄰基板間設有複數電性導通孔，因此在完成覆 蓋膠片於電性導通孔上、進行封裝模壓以形成摘塌結構、 以及進行置晶與覆盍玻璃|，即可進行切單作業，而當切 #割刀具沿相鄰基板間裁切至該膠片時，即易連同將該膠片 材料帶出，造成膠片殘留問題。 因此’如何提供-種可於基板周圍形成具半孔結構之 電性導通孔的感測式封裝件及其製法，同時毋需使用膠片 以避免攔壩結構脫層及膠片殘留問題，確為相關領域上所 需迫切面對之課題。 【發明内容】 鑑於前述習知技術之缺失，本發明之主要目的係 供-種可於基板周圍形成具半孔結構之電性導通孔的感測 19804 6 200830437 k 式封裝件及其製法。 卜费之另—目的係在提供—種毋需於電性導通孔 1膠片以節省成本及步驟之感測式封裝件及其製法。 ，發月之又-目的係在提供一種毋需於電性導通孔 是1膠片以避免膠片殘留及攔壩結構脫層之感測式封 件及其製法。 為達所述及其他目的，本發明之感測式封裝件之製法 =要係包括·提供—呈陣列排列（_y)有複數基板之基板 吴組片’且於相鄰基板間設有複數電性導通孔，並於該電 性導通孔中及表面填充一導電材料；於該基板模組片上對 應相鄰基板間形成攔塌結構，其中該攔壩結構係覆蓋該導 電材料，於基板上對應該攔壩結構所圍、燒之區支或中接置並 電ϋ連接至少一感測晶片；以及於該搁壤結構上接置透光 體，以使該透光體遮覆該感測晶片，並沿各該基板間進行 切割，以形成複數感測式封裝件。該導電材料例如為鲜錫 _材料（solder)，以先置於相鄰基板間之電性導通孔上，再透 過回銲（reflow)作業，以使該銲錫材料填滿且覆蓋該電性 通孔。 ' 本發明復揭露一種感測式封裝件，係包括··具相對之 第一表面及第二表面之基板，該基板第一及第二表面設有 複數導電線路，並透過形成於該基板邊緣之電性導通孔而 相互電性連接；導電材料，係填充於該基板邊緣之電性導 通孔中及表面；攔壩結構，係環設於該基板第一表面邊緣， 且覆蓋該導電材料；感測晶片，係接置於該基板第一表面 7 19804 200830437 由該攔壩結構所圍繞之區域中，並電性連接至該基板第一 -表面之導電線路；以及透光體，係接置於該攔壩結構上並 遮覆該感測晶片。前述感測式封裝件中該基板邊緣之電性 導通孔為半孔結構。 。亦即，本發明之感測式封裝件及其製法主要係提供一 排列有複數基板之基板模組片，且於相鄰基板間設 ，&文電導通孔，以將如銲錫之導電材料，置於基板模 =中相鄰基板間之電性導通孔上，再透過回銲㈣― 錢該銲㈣料填滿且覆蓋該電性導祕，接著於 =二板板且片上相鄰基板間透過如封裝模壓方式形成攔壩 =、’並使該攔壩結構係覆蓋該導電材料，其中由於該電 攔二：中f填滿且覆盍有導電材料’如此將可避免構成 = 料沿該電性導通孔而滲漏至基板另一表面， ==需在電性導通孔位置預先覆蓋一膠片⑽e)，避免 =片及濕而導致攔壩結構與基板間發生脫層問題；之後即 連2基板上對應該攔壩結構所圍繞之區域中接置並電性 透j測晶片’及於該攔壩結 置遮覆該感測晶片之 透先體，進而在後續進行切單^中，沿各談 切割時，其切割路徑將通. 以土日仃 ^ ^ ^ ^ 、匕基板、相鄰基板間之電性導通 =結構’其巾因導電材料已填滿且覆蓋該電性導通 =:=Γ順利將該電性導通孔切割形成半孔 ;!導::=測式封裂件，藉以避免習知技術中於 ^通孔上覆盍膠片時，當切割刀具裁切至該勝 -易連同將該膠片材料帶出，造成膠片殘留問題。 19804 8 200830437 ‘ 【實施方式】 ' 以下係藉由特定的具體實施例說明本發明之實施方 式，熟習此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點與功效。 請參閱第2A至2F圖，係為本發明之感測式封裝件及 其製法之示意圖。 如第2A及2B圖所示，其中該第2B圖係為對應第2A 圖之剖面示意圖，首先，提供一呈陣列排列有複數基板21 •之基板模組片21A，且於相鄰基;^ 21間設有複數電性 孔 210 〇 ' ，基板21具相對之第一表面211及第二表面212，該 、板第及第一表面211,212設有複數導電線路213，並 透過形成於各該相鄰基板21間之電性導通孔21〇而相互電 性連接，另於該基板第一及第二表面211，212上覆蓋有一 拒銲層214，且該拒銲層214形成有開孔以外露出該導電 籲線路加之終端，以作為電性輸入/輸出端，以及外露出該 電性導通孔210，俾供後續之銲錫導電材料得以鲜接於該 電性導通孔210上。 如第2C及2D圖所示，對應各該電性導通孔21〇位置 上置-如銲錫⑽der)之導電材料24，並透過回銲作業 (refl〇W)以使該導電材料24填充及覆蓋該電性導通孔210。 如第2E圖所示’利用如封裝模壓作業以於該基板模 :且片21A上對應相鄰基板21間形成攔壩結構^，其中該 摘壩結構23係覆蓋該導電材料24，並於基板21上對應該 19804 9 200830437 攔％、、、σ構23所圍繞之區域中接置並電性連接至少一感測 曰曰片20 ’其中該感測晶片20係透過銲線22而電性連接至 該基板21第一表面上外露出該拒銲層214開孔之導電線路 213之終端。 如第2F圖所示，於該攔壩結構23上接置如玻璃之透 光體25，以使該透光體25遮覆該感測晶片2〇，並沿各該 基板21間進行切割，其中該切割之路徑係通過該基板2卜 ^鄰基板間之電性導通孔21〇及攔壩結構23，其中由於先 .刖已使導電材料24填滿且覆蓋該電性導通孔21〇，因此切 割刀具將可順利將該電性導通孔21〇切割並形成半孔結 構，以形成複數感測式封裝件。 透過丽述之製法，本發明復揭露一種感測式封裝件， 包括:—具相對之第一表面及第二表面之基板2卜該基板 第一及第二表面設有複數導電線路213,並透過形成於該 基板21邊緣之半孔結構之電性導通孔21〇而相互電性連 修接；導電材料24，係填充於該基板邊緣之電性導通孔21〇 中及表面；攔壩結構23，係環設於該基板21第一表面邊 緣，且覆盍該導電材料24;感測晶片20,係接置於該基板 21第一表面由該攔壩結構23所圍繞之區域中，並電性連 接至該基板21第一表面之導電線路213;以及透光體25， 係接置於該攔壩結構23上並遮覆該感測晶片2〇。同時於 該基板21邊緣對應該半孔結構之電性導通孔12〇表面即形 成有導電材料24’以供後續將該感測式封裝件利用表面黏 著技術（SMT)而接置於如印刷電路板之外部裝置（未圖示） 19804 10 200830437 上0 因此’本發明之感測式封裝件及其製& =陣列排财魏錢之基板频片，且於㈣基板間設 有複數電性導通孔’以將如銲錫之導電材料，置於基板模 組片中相鄰基板間之電性導通孔上，再透過回録㈣㈣ 作業’以使該鮮錫材料填滿且覆蓋該電性導通孔，接著於 =板模^上相鄰基板間透過如料模壓方式形成摘壤 亚：該攔壩結構係覆蓋該導電材料，其中由於該電 k孔中已填滿且覆蓋有導電材料，如此將可避免構成 攔壩結構之材料沿該電性導通孔而滲基板另一表面， ，時亦毋需在電性導通孔位置預先覆蓋-膠片（tape)，避免 膠片吸濕而導致攔壩結構與基板間發生脫層問題；之後即 y於該基板上對應該咖結構所目繞之區域巾接置 ===該攔壩結構上接置遮覆該感測晶片之 透先體4而在後績進行切單作業中，沿各該 ::割時，其切割路徑將通過基板、相鄰基板間：電= 及：壩結構，其中因導電材料已填滿且覆蓋該電性導通 半孔=於切割作業時即可順利切割該電性導通孔而形成 +孔、、、。構，㈣錢數n切裝件，藉 :於!Π通孔上覆轉片時，當切割刀具裁切至該= 守，：=同將該膠片材料帶出，造成膠片殘留問題。 :::限制本發明，任何熟習此項技藝不： 明之精神及範訂，對上述實_進行修飾與改 19804 11 200830437 變。因此，本發明之權利保護範圍，應如後述之申請專利 範圍所列。 【圖式簡單說明】 第1圖係美國專利第6,262,479號案所揭露之感測式 封裝件示意圖；以及 第2A至2F圖係本發明之感測式封裝件及其製法示意 圖〇 主要元件符號說明 10 感測晶片 11 基板 110 電性導通孔 12 銲線 13 攔壩結構 14 膠片 15 玻璃 16 銲錫材料 17 印刷電路板 20 感測晶片 21 基板 21A 基板模組片 210 電性導通孔 211 第一表面 212 弟二表面 213 導電線路 12 19804 200830437 214 拒銲層 22 銲線 23 搁塌結構 24 導電材料 25 透光體200830437 IX. Description of the Invention: [Technical Field] The present invention relates to a semiconductor package and a method of fabricating the same, and more particularly to a sensing package and a method of fabricating the same. The prior art image sensing package (Image sens〇r package) mainly connects a sensor chip to a wafer carrier and electrically connects the sensing chip through a bonding wire. After the wafer carrier, the glass is capped over the sensing wafer for image light to be captured by the sensing wafer. In this way, the completed image sensing package can be integrated by the system factory into an external device such as a printed circuit board (pCB) for, for example, a DS camera, a digital camera (DV), and an optical device. The application of various electronic products such as mouse and mobile phone. Related art is disclosed in U.S. Patent Nos. 6,262,479, 6, 590, 269, and 5,962, 81. Please refer to the first item, which is a sensing package disclosed in U.S. Patent No. 6,262,479, which is passed through a molding process to planar array arrays. Forming a dam structure 13' on the substrate 并将 and placing the sensing wafer 1 on the substrate 为 is an exposed area surrounded by the dam structure U and electrically connected through the bonding wire 丨 2 The wafer 10 and the substrate 11 are measured, and finally, the glass 15 is adhered to the dam structure 13 to form the package. 70 Corresponding to the foregoing sensing semiconductor package, a half hole is formed on the side of the substrate 11. The electrical via 11G is thus soldered to the 5 19804 200830437 'external device such as a printed circuit board (PCB) 17 by the surface mount technology (SMT) through the fresh enamel material 16 The material 16 can be combined with the package and the printed circuit board to improve the solderability and to easily check the quality of the solder joint. However, in the sensing package, the dam structure 13 formed around the substrate U is avoided. The resin material leaks to the base along the electrical via 11 of the half hole The back surface of the board 11 is required to cover a film 14 at a position corresponding to the semi-hole electrical via hole I10 on the substrate i, and then perform a package molding operation to form a dam structure 13 on the film 14. (4) Because the film is easy to absorb moisture, this will cause delamination between the dam structure and the substrate, and the use of the film will also increase the cost and steps; furthermore, the process of the above-mentioned sensing package The method is mainly performed on a substrate module sheet having a plurality of substrates arranged in an array, wherein a plurality of electrical via holes are disposed between adjacent substrates, so that the covering film is formed on the electrical via holes. The package molding is performed to form the collapse structure, and the crystallization and the glazing are performed, so that the singulation operation can be performed, and when the cutting tool is cut along the adjacent substrate to the film, the film is easily combined with the film. The material is brought out, causing film residual problems. Therefore, 'how to provide a sensing package capable of forming an electrical via hole having a half-hole structure around the substrate and a method for manufacturing the same, and there is no need to use film to avoid dam blocking The problem of delamination and film residue is an urgent problem in the related art. SUMMARY OF THE INVENTION In view of the above-mentioned shortcomings of the prior art, the main object of the present invention is to provide a semi-hole around the substrate. Sensing of electrical vias of the structure 19804 6 200830437 k-type package and its method of manufacture. The purpose of the invention is to provide a sensing package that requires electrical vias 1 film to save cost and steps. And the method of making the same. The purpose of the method is to provide a sensing seal which is required for the electrical via to be a film to avoid film residue and delamination of the dam structure and the method of manufacturing the same. And other purposes, the method for manufacturing the sensing package of the present invention includes: providing - providing an array arrangement (_y) of a substrate having a plurality of substrates" and providing a plurality of electrical vias between adjacent substrates. And filling a conductive material in the electrical via hole and the surface; forming a collapse structure on the substrate module sheet corresponding to the adjacent substrate, wherein the dam structure covers the conductive material, and the dam structure is corresponding to the substrate Surrounded by Connecting and electrically connecting at least one sensing wafer; and connecting the light transmissive body to the grounding structure, so that the transparent body covers the sensing wafer and is performed between the substrates Cutting to form a complex sensing package. The conductive material is, for example, a fresh tin powder, which is first placed on an electrical via between adjacent substrates, and then reflowed to fill the solder material and cover the electrical flux. hole. The present invention discloses a sensing package comprising: a substrate having a first surface and a second surface, wherein the first and second surfaces of the substrate are provided with a plurality of conductive lines and are formed on the edge of the substrate The electrically conductive material is electrically connected to each other; the conductive material is filled in the electrical via hole and the surface of the edge of the substrate; the dam structure is disposed on the edge of the first surface of the substrate and covers the conductive material; a sensing wafer is attached to the first surface of the substrate 7 19804 200830437 in a region surrounded by the dam structure, and electrically connected to the first-surface conductive line of the substrate; and the light-transmitting body is connected The dam structure is covered on the dam structure. The electrical via of the edge of the substrate in the sensing package is a half-hole structure. . That is, the sensing package of the present invention and the manufacturing method thereof mainly provide a substrate module sheet in which a plurality of substrates are arranged, and a dielectric via hole is disposed between adjacent substrates to conductive materials such as solder. Placed on the electrical via of the adjacent substrate between the substrate molds, and then through the reflow soldering (4) - the solder (four) material fills and covers the electrical guide, followed by the = two boards and the adjacent substrates on the chip Forming a dam by, for example, encapsulation molding, and 'and making the dam structure cover the conductive material, wherein the electric barrier 2: filled with f and covered with conductive material' will avoid composition = material edge The electrical via hole leaks to the other surface of the substrate, and == a film (10)e) needs to be pre-covered at the position of the electrical via hole to avoid delamination between the dam structure and the substrate due to the sheet and the wetness; Connected to the area surrounded by the dam structure and connected to the dam, and the dam is covered with the transparent precursor of the sensing wafer, and then cut in the subsequent processing. When cutting along each, the cutting path will pass. To Earth Day ^ ^ ^ ^ Electrical conduction between the substrate and the adjacent substrate = structure 'the towel is filled with the conductive material and covers the electrical conduction =:=Γ smoothly cut the electrical via hole to form a half hole; !导::= The type of cracking member can avoid the problem of film residue when the cutting tool is cut to the film material when the film is covered on the through hole. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Please refer to Figures 2A to 2F, which are schematic diagrams of the sensing package of the present invention and a method of manufacturing the same. As shown in FIG. 2A and FIG. 2B, wherein FIG. 2B is a cross-sectional view corresponding to FIG. 2A, firstly, a substrate module piece 21A having a plurality of substrates 21 arranged in an array is provided, and adjacent to the base; 21 is provided with a plurality of electrical holes 210 〇 ′, and the substrate 21 has a first surface 211 and a second surface 212 opposite to each other. The plate and the first surface 211 , 212 are provided with a plurality of conductive lines 213 and are formed through the respective phases. The electrically conductive vias 21 between the adjacent substrates 21 are electrically connected to each other, and the first and second surfaces 211, 212 of the substrate are covered with a solder resist layer 214, and the solder resist layer 214 is formed with openings. The conductive call line is added to the terminal as an electrical input/output terminal, and the electrical via hole 210 is exposed, so that the subsequent solder conductive material can be freshly connected to the electrical via hole 210. As shown in FIGS. 2C and 2D, the conductive material 24, such as solder (10) der, is placed corresponding to each of the electrical vias 21, and is reflowed (refl〇W) to fill and cover the conductive material 24. The electrical via 210 is provided. As shown in FIG. 2E, the dam structure is formed by using a package molding operation, and a dam structure is formed between the adjacent substrates 21 on the sheet 21A, wherein the dam structure 23 covers the conductive material 24 and is on the substrate. 21 corresponding to 19804 9 200830437, in the region surrounded by the %,, and σ structures 23, electrically connected to at least one sensing cymbal 20', wherein the sensing wafer 20 is electrically connected through the bonding wire 22 The terminal of the conductive line 213 on which the solder resist layer 214 is opened is exposed on the first surface of the substrate 21. As shown in FIG. 2F, a light-transmissive body 25 such as glass is attached to the dam structure 23, so that the light-transmitting body 25 covers the sensing wafer 2, and is cut along each of the substrates 21. Wherein the cutting path is through the electrical via 21 and the dam structure 23 between the substrate 2, wherein the conductive material 24 is filled and covers the electrical via 21 by first 刖, Therefore, the cutting tool can smoothly cut the electrical via 21 and form a half-hole structure to form a complex sensing package. The invention discloses a sensing package, comprising: a substrate 2 having a first surface and a second surface; a plurality of conductive lines 213 are disposed on the first and second surfaces of the substrate, and The conductive vias 21 are electrically connected to each other through the electrical vias 21 of the half-hole structure formed on the edge of the substrate 21; the conductive material 24 is filled in the electrical vias 21 and the surface of the edge of the substrate; the dam structure 23, a ring is disposed on the edge of the first surface of the substrate 21, and covers the conductive material 24; the sensing wafer 20 is connected to the first surface of the substrate 21 surrounded by the dam structure 23, and A conductive line 213 electrically connected to the first surface of the substrate 21; and a light transmissive body 25 is attached to the dam structure 23 and covers the sensing wafer 2''. At the same time, a conductive material 24 ′ is formed on the surface of the electrical via 12 对 corresponding to the edge of the substrate 21 corresponding to the half-hole structure for subsequent mounting of the sensing package by a surface mount technology (SMT), such as a printed circuit. External device of the board (not shown) 19804 10 200830437 0 Therefore, the sensing package of the present invention and its system & = array of chips of Wei Qian's substrate frequency, and (4) between the substrates are provided with multiple electrical properties The via hole 'places the conductive material such as solder on the electrical via hole between the adjacent substrates in the substrate module sheet, and then passes through the recording (4) (4) operation to fill the black tin material and cover the electrical conduction. a hole, and then forming an exfoliation between the adjacent substrates on the plate mold by a molding method: the dam structure covers the conductive material, wherein the electric k hole is filled and covered with a conductive material, It will be avoided that the material constituting the dam structure penetrates the other surface of the substrate along the electrical via hole, and it is also unnecessary to pre-cover the tape at the position of the electrical via hole to prevent the film from absorbing moisture and causing the dam structure. Debonding between the substrate and the substrate Then, y is placed on the substrate corresponding to the area of the coffee bean structure. === The dam structure is attached to the transparent body 4 covering the sensing wafer, and the singulation operation is performed in the subsequent work. , along each:: cutting, its cutting path will pass through the substrate, between adjacent substrates: electricity = and: dam structure, where the conductive material is filled and covers the electrical conduction half hole = when cutting operation The electrical via holes are smoothly cut to form + holes, and . Structure, (4) Money number n cutting parts, borrow: When the Π through hole is overturned, when the cutting tool is cut to the = 守,: = the same film material is taken out, causing film residual problems. ::: Limitation of the present invention, any skill in the art is not: The spirit and scope of the invention, and the modification and modification of the above-mentioned real _ 19804 11 200830437. Therefore, the scope of protection of the present invention should be as set forth in the scope of the patent application to be described later. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of a sensing package disclosed in U.S. Patent No. 6,262,479; and Figs. 2A to 2F are schematic diagrams of the sensing package of the present invention and a method for manufacturing the same, 10 sensing wafer 11 substrate 110 electrical via 12 bonding wire 13 dam structure 14 film 15 glass 16 solder material 17 printed circuit board 20 sensing wafer 21 substrate 21A substrate module sheet 210 electrical via 211 first surface 212 2nd surface 213 Conductive line 12 19804 200830437 214 Solder resist layer 22 Bond wire 23 Leakage structure 24 Conductive material 25 Translucent body