200839498 ---- —, 〇TW 23597twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於-種關機的方&，且特別{有關於一 種確保關機完成的方法。 ' 【先前技術】 電源管理是-般桌上型電職依賴電池供應電力之可 攜式周邊設備（例如筆記型電腦）的一項重要功能。以目 丽來說，A彡的電腦系統會支援先進架構電源介面 (Advanced Configuration and Power Interface，Acpi)標準 來進行電源的管理。先進架構電源介面根據使用者與;業 系統之間的互動，而以作業系統取代m〇s來下指令管理 電源，因此可以增加電源管理之效率。先進架構電源介面 能夠將電源有效地分配傳送至系統元件，搭配硬體偵測主 機板溫度、風扇轉速和電源供應器（P〇Wer Supply) '的電 壓等資訊，進而提供適當的電源與主機工作頻率，來達到 省電與效率並存的目標。 在透過先進架構電源介面的管理之下，電腦系統能夠 在 SO、si、S2、S3(suspend to RAM)、S4(hibemate、suspend to disk)、S5(soft off)等不同的電源模式下運作，以因應不 同的需求。舉例來說：在S0模式之下，所有 鱼 邊設備都在猶離態之T ;在S1模紅下，中央= 器（Central Processor Unit，CPU)停止工作，以降低中央處 理器功率祕；在S2模式之下，中央處理賴會關閉； 在S3模紅下’為了避纽憶體巾儲存的作n统狀態 5 200839498 ^^υ/υυ/υΤ\ν 23597twf.doc/n 隨著電源關閉而消失以及達到省電的效果，電力 記憶體讓記憶體運作。當回到S0模式時，:業系統 透過存取記憶體，而能快速地恢復作業系統狀熊、·、、、即可 模式之下，則是將S3模式巾贿在雜體巾^ 狀態儲存至硬碟，亦即是說在S4模式下，不需再提 力給記憶體，也能將作業系統狀態保存，因此電 = 進入關機狀態，以節省電力；在S5模式之下，電腦系^ Γ 同樣是進入關機狀態，但是作業系統的狀態不會如S4; 式般被保存在硬碟中。 果 當系統開機進入so的模式時，首先基本輸入輪出系 ，（Basic lnput/0utput System，m〇s)會將各項周邊與控制 晶片啟動，接著才會開始讀取硬碟等儲存裝置的開^磁 區以啟動作業糸統，並且把電源管理的控制權交給作業 系統處理。相對地，在系統關機進入S4或S5的模式時， 作業系統將各個應用程式關閉、儲存使用者設定，接著作 〔 業系統送出關機訊號，而進入到系統管理中斷處理程序 (System Management Interrupt handler，SMI handler)，電源 管理的控制權由作業系統交回到基本輸入輸出系統以進行 關機程序，而對南北橋等控制晶片組進行關機。 然而，在關機的過程中，若控制晶片組間彼此溝通的 過程出現問題而未能完成關機時，系統的關機程序便無法 繼續進行，使得電腦系統無法完成關機。從使用者的觀點 來說，由於作業系統已經結束，甚至連螢幕也已經關閉， 因此使用者無從判斷關機程序是否出現問題，只有在等待 6 200839498 iruu /υυ /〇TW 23597twf.doc/n -間之後，才發現系統無法正常關機完成。此時，使 用者便需要去按壓電源按轉續4秒，強制將電源關閉。 亦即疋祝’使用者在關機之後，還必須費時地等待與確認 關機疋否完成。此外，在控制晶片組無法正常關機時，使 用者必須麻煩地進行第二次關，增加了使壯的不便。 【發明内容】 本發明提供一種確保系統關機完成的方法，在對控制 晶片組關機時，即倒數一段預設時間，並在倒數結束而關 機仍未完成時，直接將電源關閉，以確保關機完成。 本發明提出一種確保系統關機完成的方法，適用於確 保系統關機完成，此方法包括下列步驟：首先接收關機訊 號，以進入系統中斷程序。接著開始倒數預設時間。再來 對系統之控制晶片組進行關機程序。最後當預設時間倒數 完畢時，直接關閉系統之電源。 在本發明之一實施例中，在倒數預設時間時更包括判 斷系統之控制晶片組是否完成關機程序，若控制晶片組的 關機程序完成’則停止倒數預設時間，並關閉系統之電源。 在本發明之一實施例中，開始倒數預設時間的步驟包 括發送關機倒數指令給基板管理控制器（Baseboard Management Controller，BMC)，使基板管理控制器開始倒 數預設時間。其中，關機倒數指令為透過智慧型平台管理 介面（Intelligent Platform Management Interface，IPMI)傳送 給基板管理控制器。而此關機倒數指令為智慧型平台管理 介面指令。 200839498 i^uu/uu/oTW 23597twf.doc/n f本發明之-實施射，直接__之電源 包括當預設_倒數完料，由基板管理控制器發送關機 减給南橋晶片。接著由南橋晶片傳送關機訊號气 電源供應器的針腳，以關閉系統之電源。 σ/''' 在本發明之-實施例中，開始倒數預設時間的步驟包 ^計時，中奴-組舰時間。然後啟動計時器開始倒200839498 -----, 〇TW 23597twf.doc/n IX. Description of the invention: [Technical field of the invention] The present invention relates to a kind of shutdown & and in particular {a method for ensuring the completion of shutdown . [Prior Art] Power management is an important function of a portable peripheral device (such as a notebook computer) that relies on battery power supply. For the sake of the eye, A's computer system supports the Advanced Configuration and Power Interface (Acpi) standard for power management. The advanced architecture power interface reduces the efficiency of power management by replacing the m〇s with the operating system to manage power according to the interaction between the user and the system. The advanced architecture power interface enables efficient power distribution to the system components, with hardware to detect board temperature, fan speed and power supply (P〇Wer Supply) 'voltage, etc., to provide appropriate power and host operation Frequency to achieve the goal of coexistence of power saving and efficiency. Under the management of the advanced architecture power interface, the computer system can operate in different power modes such as SO, Si, S2, S3 (suspend to RAM), S4 (hibemate, suspend to disk), and S5 (soft off). In response to different needs. For example: in the S0 mode, all the fish-side devices are in the T state; in the S1 mode, the Central Processor Unit (CPU) stops working to reduce the CPU power; Under the S2 mode, the central processing will be turned off; in the S3 mode red, in order to avoid the storage of the body towel, the state of the system is 5 200839498 ^^υ/υυ/υΤ\ν 23597twf.doc/n With the power off Disappear and achieve the effect of power saving, power memory allows memory to work. When returning to the S0 mode, the industry system can quickly restore the operating system-like bears by accessing the memory, and then the S3 mode towel is stored in the miscellaneous towel. To the hard disk, that is to say, in the S4 mode, the operating system state can be saved without further effort to the memory, so the power = enter the shutdown state to save power; in the S5 mode, the computer system ^ Γ It is also in the shutdown state, but the status of the operating system will not be saved on the hard disk as in S4; When the system is booted into the so mode, the basic input and output system (Basic lnput/0utput System, m〇s) will start the peripheral and control chips, and then start to read the storage device such as the hard disk. The magnetic zone is opened to start the operation system, and the control of the power management is given to the operating system for processing. In contrast, when the system is shut down and enters the S4 or S5 mode, the operating system closes and stores the user settings, and then the system sends a shutdown signal to the system management interrupt handler (System Management Interrupt handler, SMI handler), the power management control is transferred back to the basic input and output system by the operating system to perform the shutdown procedure, and the control chipset such as the north and south bridge is shut down. However, during the shutdown process, if the process of controlling the communication between the chipsets fails and the shutdown is not completed, the shutdown process of the system cannot continue, and the computer system cannot complete the shutdown. From the user's point of view, since the operating system has ended, even the screen has been closed, so the user has no way to determine whether there is a problem with the shutdown program, only waiting for 6 200839498 iruu /υυ /〇TW 23597twf.doc/n - After that, it was discovered that the system could not be shut down normally. At this point, the user needs to press the power button for 4 seconds to force the power to turn off. That is to say, the user must wait for the time and wait for the shutdown to be completed after the shutdown. In addition, when the control chip set cannot be shut down normally, the user has to perform the second off in trouble, which increases the inconvenience. SUMMARY OF THE INVENTION The present invention provides a method for ensuring that a system shutdown is completed. When the control chipset is powered off, that is, a predetermined period of time is counted down, and when the countdown ends and the shutdown is still not completed, the power is directly turned off to ensure that the shutdown is completed. . The present invention provides a method for ensuring that the system is shut down, and is suitable for ensuring that the system is shut down. The method includes the following steps: first receiving a shutdown signal to enter a system interrupt routine. Then start the countdown preset time. Then, the system's control chipset is shut down. Finally, when the preset time countdown is completed, the power of the system is directly turned off. In an embodiment of the present invention, at the countdown time, it is further included whether the control chipset of the system is determined to complete the shutdown process, and if the shutdown process of the control chipset is completed, the countdown time is stopped and the power of the system is turned off. In an embodiment of the invention, the step of starting the countdown preset time comprises sending a shutdown countdown command to the Baseboard Management Controller (BMC) to cause the baseboard management controller to start counting down the preset time. The shutdown countdown command is transmitted to the baseboard management controller through the Intelligent Platform Management Interface (IPMI). The shutdown countdown command is a smart platform management interface command. 200839498 i^uu/uu/oTW 23597twf.doc/n f The invention-implementation, direct __ power supply includes the default _ countdown material, the base management controller sends a shutdown to the south bridge chip. The pins of the shutdown signal gas power supply are then transmitted by the south bridge chip to turn off the power to the system. σ/''' In the embodiment of the present invention, the step of starting the countdown preset time is timed, the slave-team time. Then start the timer and start to pour
數預设4間。其中’上述之計時器為看門狗計時器 (watchdog timer)。 口口 在本發明之-實施例中，在計時器倒數預設時間時更 匕括判斷系統之控制晶片岐否完成關機程序，若控制晶 片組完成關機程序’則停止計時器之倒數，並關閉$ = ，。另収可包括將計時器回復為縣的（defauit)設 定。 ^本發明之-實施财，對系統之控制晶片組進行關 機程序的步驟包括將關機訊號寫人系統之輸人輪出璋⑻ port)，而使控制晶片組自動進行關機程序。 在本發明之-實施例中，接收關機訊號，以進入系統 I斷程序的倾包括接收由“之健线發送之關機指 7。接者，發送系統中斷訊號給系統之處理器，而進入系 統中斷程序。 ♦在本I明之例中，上述之關機指令包括在系統 p源按練按下時所鼓。再者，_齡也包括在系 ^之使用者”面上之關機選項或休眠選項被選取時所產 生0 8 200839498 uruu/υυ /oTW 23597twf.doc/n 在本發明之一實施例中，上述之系統中斷程序包括系 統管理中所處理程序、控制晶片組包括北橋晶片與南橋晶 片其中之一，而預設時間包括4秒。 在本發明之一實施例中，接收到關機訊號時是代表系 統進入包括休眠（hibernate)與軟體關機（soft 0ff)其中之一 的狀態。 本發明透過在關閉控制晶片組之前即開始倒數一段 預設時間，當預設時間倒數完畢時，則直接關閉電源，而 可確保系統能完成關機。當控制晶片組無法正常關機時， 使用者不需要費時地等待與確認關機的正常與否，也不需 麻煩地按壓電源按鈕進行二度關機。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 舉較佳實施例，並配合所附圖式，作詳細說明如下。 【實施方式】 為了確保糸統此完成關機而不會受到控制晶片组無 法正常關機的影響，以下各個實施例即針對控制晶片的關 ’機時程訂定一段預設時間，而在對控制晶片組進行關機程 序之别，即開始倒數此預設時間，當預設時間倒數完畢時， 則表示此控制晶片組無法正常關機，而直接將系統的電源 關閉。詳細的過程請參照以下各實施例的說明。 星二實施例 、圖1為本發明第-實施例之確保系統關機完成的方法 之流程圖。請麥考圖1，首先進行步驟sn〇，在系統接收 由作業系統發送之關機指令之後，即會發送一個系統中斷 9 200839498 ΐ^υ/υυ/orw 23597twf.doc/n 訊號給處理器，而進入系統中斷程序。其中，當系統接收 ^關機訊料，代表纽會進行休眠或是軟^機，也就 是先進架構電源介面的S4或S5模式，而此系統中斷程序 例如為系統管理中斷處理程序。在本實施例中，上述之關 機指令包括在系統之電源按紐被按下時所產生，或是在系 統之使用者介面上之關選項或休眠選項被選取時所產 生，而不限制其範圍。 為了要確保系統的控制晶片組能夠在一段預設時間 =機’因此在進人純情程序之後，在料、統的控制 曰曰片組進行關程序之前，進行步驟sm，開始倒數一段 預設時間。由於控制晶片組關機的時程固定，而且通常僅 ^個中央處理器週期（CPUcycle)。因此，工程師可以依 =際的情形適當地較時間，也就是將預設時間設定 ”、、足以完成控制晶片組關機又不會讓使用者等待太久的時 間，例如設為4秒等。 在開始倒數預設時間之後，即可接著進行步驟si3〇， 子糸統的控制晶片組做設定，以進行關機程序。例如將一 =機訊號寫人系統之輸人輸出埠，而使控制晶片組進行 ，以進人S4或S5的模式。其中，控制晶片組包 括北橋晶片與南橋晶片。 最後進行辣SM0，當職咖健完料，直接關 、、=統之電源。也就是說在經過預設時間之後，系統仍無 應二機便直接送出強制關機的訊號給電源供應器的對 應針腳，而將電源關閉。 10 200839498 ir^/^/uTW 23597twf.doc/n f得-提的是’本實施例在對㈣晶仏進行關機程 序之$即倒數一段預設時間，當預設時間倒數完畢之後， 便直接將系統電源_。對於使用者來說，使用者不需面 對系統因為控制晶片組無法正常«的問題。當控制晶片 組無=正常_時，使用者不需㈣時地等待與確認關機 的正常與否，也不需麻煩地按壓電源按鈕進行二度關機。 名二實施例 3本實施例為第—實闕的延伸，其差異處在於本實施 例是透過^板管理控制器來進行倒數以及關閉電源。其 中、，基板官理控制器藉由在基板上嵌入一顆晶片，作為硬 體^ 口言理的集中處理器。此基板管理控制器可透過智慧 平堂官理匯流排（Intdligent platf〇rm Management Bus， IPMB)與主機板内建的感·裝置與晶片連接，而據以達 到測與管理電腦效能以及電源控制的功效。 、圖2為本發明第二實施例之確保系統關機完成的方法 之流程圖。請參考目2，首先進行步驟S210，在系統接收 由作業系統發送之關機指令之後，即會發送一個系統中斷 訊號給處理器，而進入系統中斷程序。 在對系統之控制晶片組進行關機程序之前，進行步驟 S220三透過智慧型平台管理介面發送關機倒數指令傳送給 基板管理控制器，使基板管理控制器開始倒數預設時間。 其中，此關機倒數指令為智慧型平台管理介面指令，而可 由原始叹備製造商（〇riginal EqUipment Manufacturer， OEM)自行訂定。以預設時間4秒為例，本實施例可透過 23597twf.doc/n 200839498The number is preset to 4 rooms. The above timer is a watchdog timer. In the embodiment of the present invention, when the timer countdown is preset, the control chip of the judgment system is further determined whether the shutdown process is completed, and if the control chipset completes the shutdown procedure, the countdown of the timer is stopped, and the timer is turned off. $ = ,. Additional receipts may include returning the timer to the county's (defauit) setting. In the present invention, the step of performing a shutdown procedure on the control chipset of the system includes writing the shutdown signal to the input terminal of the system (8) port, and causing the control chipset to automatically perform the shutdown procedure. In the embodiment of the present invention, receiving the shutdown signal to enter the system I disconnects the program including receiving the shutdown finger 7 sent by the "wire" line. The receiver sends the system interrupt signal to the processor of the system, and enters the system. The program is interrupted. ♦ In the example of the present invention, the shutdown command includes the drum when the system p source is pressed. In addition, the _ age includes the shutdown option or the sleep option on the user side of the system. When selected, 0 8 200839498 uruu/υυ /oTW 23597twf.doc/n In one embodiment of the present invention, the system interrupt program described above includes a program processed in the system management, and the control chip set includes a north bridge wafer and a south bridge wafer. One, and the preset time includes 4 seconds. In an embodiment of the invention, when the shutdown signal is received, the representative system enters a state including one of hibernate and software shutdown (soft 0ff). The present invention begins to count down a predetermined period of time before the control chipset is turned off. When the preset time is counted down, the power is directly turned off, and the system can be surely shut down. When the control chipset cannot be shut down normally, the user does not need to wait for time and confirm the normality of the shutdown, and does not need to press the power button to perform a second shutdown. The above described features and advantages of the present invention will become more apparent from the following description. [Embodiment] In order to ensure that the shutdown of the system is not affected by the failure of the control chipset to be properly shut down, the following embodiments respectively set a preset time for controlling the off-time of the wafer, and in the control chip. The group performs the shutdown procedure, that is, starts counting down the preset time. When the preset time countdown is completed, it indicates that the control chipset cannot be shut down normally, and the system power is directly turned off. For a detailed procedure, please refer to the description of each of the following embodiments. Star 2 Embodiment FIG. 1 is a flowchart of a method for ensuring completion of system shutdown according to a first embodiment of the present invention. Please take the test, first, step sn〇, after the system receives the shutdown command sent by the operating system, it will send a system interrupt 9 200839498 ΐ^υ/υυ/orw 23597twf.doc/n signal to the processor, and Enter the system interrupt program. Among them, when the system receives the shutdown message, the representative will sleep or soft, that is, the S4 or S5 mode of the advanced architecture power interface, and the system interrupt program is, for example, a system management interrupt handler. In this embodiment, the shutdown command is generated when the power button of the system is pressed, or when the option or the sleep option of the user interface of the system is selected, without limiting the scope. . In order to ensure that the system's control chipset can be in a preset time = machine's, after the intensive program, before the process of controlling the chip group to perform the closing process, the step sm is performed to start the countdown period. . Since the time range for controlling the chipset shutdown is fixed, and usually only one CPU cycle. Therefore, the engineer can appropriately set the time according to the situation, that is, set the preset time, enough to complete the control of the chipset shutdown without letting the user wait too long, for example, set to 4 seconds, etc. After the last countdown time is started, the step si3〇 can be performed, and the sub-system control chip set is set to perform the shutdown process. For example, the input chip of the system signal is input to the control chipset. Performing to enter the mode of S4 or S5, wherein the control chipset includes a north bridge wafer and a south bridge wafer. Finally, the spicy SM0 is performed, and the service is completed, and the power is directly turned off, and the system is powered. After setting the time, the system still sends the forced shutdown signal to the corresponding pin of the power supply without turning the machine, and the power is turned off. 10 200839498 ir^/^/uTW 23597twf.doc/nf In the embodiment, the (four) crystal wafer is shut down for a predetermined period of time, and after the preset time is counted down, the system power is directly supplied. For the user, the user does not need to face the system. In order to control the problem that the chipset cannot be normal «When the control chipset is not normal_, the user does not need to wait for (4) to wait and confirm the normality of the shutdown, and does not need to press the power button to perform a second shutdown. The second embodiment is an extension of the first embodiment, and the difference is that the embodiment is to perform the countdown and turn off the power through the board management controller. wherein, the substrate management controller is embedded on the substrate. A chip, as a centralized processor for hardware and vocalization. This substrate management controller can communicate with the built-in device and device through the Intdligent platf〇rm Management Bus (IPMB). The wafer is connected to achieve the function of measuring and managing the computer performance and the power control. Figure 2 is a flow chart of the method for ensuring the shutdown of the system according to the second embodiment of the present invention. Referring to item 2, step S210 is first performed. After the system receives the shutdown command sent by the operating system, it will send a system interrupt signal to the processor and enter the system interrupt program. Before the shutdown process is performed, the step S220 is sent to the baseboard management controller through the smart platform management interface to send the shutdown countdown command, so that the baseboard management controller starts the countdown preset time. The shutdown countdown command is the smart platform management interface. The instruction can be set by the original singular manufacturer (OEM). The preset time is 4 seconds. This example can be accessed through 23597twf.doc/n 200839498.
xx ±^/\j / \j\j / VTW 智慧型平台管理介面送出像是’’Chassis Shutdown Command with 4 seconds”的關機倒數指令給基板管理控制 器，以讓基板管理控制器在4秒後對系統進行關機。更詳 細來說，此關機倒數指令可為智慧型平台管理介面 之 ’’Chassis net function(OO)’’ 的 ’’Chassis control command(2)”，以讓系統進入S4或S5的模式。在關機倒 數指令傳送給基板管理控制器的步驟完成後，則可進行步 驟S230,對系統的控制晶片組做設定，以進行控制晶片組 的關機程序。 在倒數預设時間的期間進行步驟S240 ’判斷系統之控 制晶片組所進行的關機程序是否完成，若控制晶片組的關 機程序完成，則停止倒數預設時間，並關閉系統之電源（步 驟 S250)。 最後進行步驟S260，當預設時間倒數完畢時，表示系 統之控制晶片組發生問題而無法正常關機，因此由基板管 理控制為直接關閉系統之電源。更進一步來說，步驟幻6〇 包括S262以及S264兩個子步驟。步驟S262 :當預設時間 倒數完畢時，由基板管理控制器、發送關機訊I給南橋晶 片；步驟S264·•由南橋晶片傳送關機訊號給系統之電源: 應态的針腳’以關閉系統之電源。 第三實施例 圖3為本發明第三實施例之確保系統關機完成的方法 之流程圖。本實施例亦為第—實施例的延伸，其差里 於本實施例是_計時时進行峨。請參相3,同样 12 200839498 iri^u/uu/oTW 23597twf.doc/n 地，本實施例亦先接收關機指令，而發送一個系統中这二 號給處理器’進入系統中斷程序（步驟S31〇) μ。 咕訊 在對系統之控制晶片組進行關機程序之前，進疒牛 S320，開始倒數預設時間。其中，步驟S32〇包括 及S324兩個子步驟。步驟S322 :在計時器上設定一凡u 設時間；步驟S324 :啟動計時器開始倒數預 '^預 之計時器例如是一個看門狗計時器，且此看門狗 ^述 控制電源供應器關閉。 Q寸為可 序制晶片祕設定，以進行關機程 =(々驟S330)。接者進行步驟S34〇,判斷系統之 完成關機程序。^控制晶片組完成關機程序’ ' 。十日守為之倒數，並透過發送訊號給電源供廊哭备 而將系統之電源關閉（步驟S35〇)。此外，在停^時 為倒數時’更可回復計時器為縣的設定，例如將時哭 :=值設回預設時間’以在下次關機時再從預設; 經過預如mm 閉 源。亦即是說，在 出強制_ b1 4 ’线仍紐議時，計時器便直接送 閉。請的峨給電源供應器的對應針腳，而將電源關 統進透過在接收到關機訊號時，要求系 前，執行預„時=’亚在對控制晶片組進行關機程序之 仃預，又日守間的倒數，當預設時間倒數完畢時，則直 13 200839498 ir^w/uu/〇rW 23597twf.doc/n 接關閉電源’以雜系統關機完成 常關機時，制者Μ要費時轉待與確關機的Γ常i 否，也不需麻煩地按壓電源按鈕進行二度關機。 /、 —雖然本發明已崎佳實施例揭露如上，然其並非用以 限疋本發明，任何所屬技術領域中具有通常知識者，在 脫離本發明之精神和範_，當可作些許之更動與潤傅， 因此本發明之保錄圍當視後附之Φ請專職酸界定 為準。 【圖式簡單說明】 圖1為本發明第一實施例之確保系統關機完成的方法 之流程圖。 圖2為本發明第二實施例之確保系統關機完成的方法 之流程圖。 圖3為本發明苐二實施例之確保系統關機完成的方法 之流程圖。 【主要元件符號說明】 S110〜S140 :本發明第一實施例之確保系統關機完成 的方法之各步驟 S210〜S264 :本發明第二實施例之確保系統關機完成 的方法之各步驟 S310〜S360 :本發明第三實施例之確保系統關機完成 的方法之各步驟 14Xx ±^/\j / \j\j / VTW The intelligent platform management interface sends a shutdown countdown command like ''Chassis Shutdown Command with 4 seconds' to the baseboard management controller to let the baseboard management controller after 4 seconds Shut down the system. In more detail, the shutdown countdown command can be the ''Chassis control command(2)' of the 'Chassis net function(OO)'' of the intelligent platform management interface, so that the system can enter the S4 or S5. Mode. After the step of transmitting the shutdown count command to the baseboard management controller is completed, step S230 may be performed to set the control chipset of the system to control the shutdown process of the chipset. During the countdown time period, step S240' is performed to determine whether the shutdown process performed by the control chipset of the system is completed. If the shutdown process of the control chipset is completed, the countdown preset time is stopped, and the power of the system is turned off (step S250). . Finally, in step S260, when the preset time countdown is completed, it indicates that the control chipset of the system has a problem and cannot be shut down normally, so the substrate management control is to directly turn off the power of the system. Further, the step 612 includes two sub-steps of S262 and S264. Step S262: When the preset time countdown is completed, the substrate management controller sends a shutdown signal I to the south bridge chip; step S264·• transmits the shutdown signal to the power supply of the system by the south bridge chip: the pin of the state is used to turn off the power of the system. . Third Embodiment Fig. 3 is a flow chart showing a method of ensuring completion of shutdown of a system according to a third embodiment of the present invention. This embodiment is also an extension of the first embodiment, and the difference is that the present embodiment performs _ timing. Please refer to phase 3, the same 12 200839498 iri^u/uu/oTW 23597twf.doc/n, this embodiment also receives the shutdown command, and sends the second number in the system to the processor 'enter the system interrupt program (step S31) 〇) μ. Before entering the shutdown program of the control chipset of the system, enter the yak S320 and start counting down the preset time. Wherein, step S32 〇 includes two sub-steps of S324. Step S322: setting a time on the timer; step S324: starting the timer to start the countdown, the timer is, for example, a watchdog timer, and the watchdog control power supply is turned off. . The Q inch is a programmable wafer secret setting for the shutdown process = (step S330). The receiver proceeds to step S34, and determines that the system completes the shutdown procedure. ^ Control the chipset to complete the shutdown procedure ' '. The tenth day is counted down, and the power of the system is turned off by sending a signal to the power supply gallery (step S35〇). In addition, when the stop time is countdown, the timer can be reset to the county setting, for example, when the time is crying: = the value is set back to the preset time' to be preset from the next shutdown; after the mm is closed. That is to say, the timer is directly closed when the mandatory _ b1 4 ’ line is still in progress. Please send the corresponding pin of the power supply to the power supply, and when the power is turned off, the system is required to perform the pre-cutting time before the system is turned off. The countdown of the keeper, when the preset time countdown is completed, then straight 13 200839498 ir^w/uu/〇rW 23597twf.doc/n Connect the power supply to shut down the power system when the system is shut down, the system will take time to transfer And if it is turned off, it is not necessary to press the power button to perform a second shutdown. /, - Although the present invention has been disclosed as above, it is not intended to limit the present invention, any technical field. Those who have the usual knowledge, in the spirit of departure from the spirit and scope of the present invention, can make some changes and Runfu. Therefore, the Φ of the present invention should be defined as the full-scale acid. 1 is a flow chart of a method for ensuring completion of shutdown of a system according to a first embodiment of the present invention. FIG. 2 is a flow chart of a method for ensuring completion of shutdown of a system according to a second embodiment of the present invention. Ensure system shutdown Flowchart of the method for completing the machine. [Description of main component symbols] S110~S140: Steps S210 to S264 of the method for ensuring completion of shutdown of the system according to the first embodiment of the present invention: the second embodiment of the present invention ensures that the shutdown of the system is completed. Steps S310 to S360 of the method: Step 14 of the method for ensuring completion of shutdown of the system according to the third embodiment of the present invention