200839260 九、發明說明 【發明所屬之技術領域】 本發明係關於絕緣檢查裝置及絕緣檢查方法，更詳言 之’係關於用以進行形成於基板之複數配線圖案間的絕緣 檢查之絕緣檢查裝置及絕緣檢查方法。 本發明並不限定於印刷配線基板，可適用於例如撓性 基板、多層配線基板、液晶顯示器或電漿顯示器用的電極 板、及半導體封裝用的封裝基板或薄膜載體（film carrier )等各種基板之電性配線的檢查，本說明書中，將此等種 種的配線基板統稱爲「基板」。 【先前技術】 以往，具有複數配線圖案的基板（電路基板），係藉 由在絕緣檢查裝置中對各配線圖案，進行檢查對象的配線 圖案與其他配線圖案之絕緣狀態的良否（是否有確保充分 的絕緣性）的判定，來進行檢查基板是否爲良品的絕緣檢 查。 該絕緣檢查係在一邊的配線圖案施加電壓，藉由測定 流動至另一邊之配線圖案的電流，來算出此等配線圖案間 的電阻値，並從該電阻値檢查絕緣狀態。 例如，專利文獻1記載的公報中，有揭示進行檢查對 象之配線圖案的絕緣檢查（短路檢查）之技術，具體來說 ，係藉由在檢查對象的配線圖案與其他的配線圖案之間施 加特定電壓，來算出配線圖案間的電阻値，以進行配線圖 200839260 案間之絕緣狀態的檢查。 〔專利文獻1〕日本專利第3 546046號公報 【發明內容】 〔發明所欲解決之課題〕 近年來，隨著形成於基板之配線圖案的微細化，基板 的配線圖案持續高密度化與複雜化。因此，配線圖案數量 增加，進行導通及絕緣檢查的次數也增加。尤其，在絕緣 檢查中，當配線圖案的數量增加時，檢查次數也會增加， 並且進行絕緣檢查所導致之對其他配線圖案的電性影響會 變大，所以具有一次的檢查時間增長的問題。 本發明係有鑑於此種問題而開發者，其目的在於提供 一種藉由縮短絕緣檢查所需要的時間，可以良好效率來進 行絕緣檢查的絕緣檢查裝置及絕緣檢查方法。 〔用以解決課題之手段〕 申請專利範圍第1項的發明係提供一種在形成有複數 配線圖案的被檢查基板中，從上述複數配線圖案選擇成爲 檢查對象的配線圖案，且進行該配線圖案的絕緣檢查之絕 緣檢查裝置，其特徵爲，具有：記憶手段，上述基板之配 線圖案的面積係按每個配線圖案被記憶爲面積資訊；選出 手段，從上述複數的配線圖案依據檢查順序選出成爲檢查 對象的配線圖案；電源手段，將電壓施加於上述檢查對象 的配線圖案與其他配線圖案之間的檢查對象間；檢測手段 -5- 200839260 ，檢測上述電源手段施加電壓時之上述檢查對象間的電性 特性；和算出手段，依據上述電性特性，算出用以判定上 述檢查對象間之絕緣狀態的電阻値，並且上述選出手段係 將上述面積資訊最大的配線圖案選出作爲最先的檢查對象 〇 申請專利範圍第2項的發明係提供一種申請專利範圍 第1項之絕緣檢查裝置，其中，上述面積資訊最大的配線 圖案係電源·接地圖案。 申請專利範圍第3項的發明係提供一種申請專利範圍 第1或2項之絕緣檢查裝置，其中，上述選出手段係從上 述面積資訊較大的配線圖案依序選出作爲檢查對象。 申請專利範圍第4項的發明係提供一種申請專利範圍 第3項之絕緣檢查裝置，其中，上述選出手段係將成爲檢 查對象的配線圖案設爲第一組，將形成於基板的剩餘配線 圖案設爲第二組而選出，且已被選爲上述第一組一次的配 線圖案，就不會被選爲上述第二組。 申請專利範圍第5項的發明係提供一種絕緣檢查方法 ，係在形成有複數配線圖案的被檢查基板中，從上述複數 配線圖案選出成爲檢查對象的配線圖案，且進行該配線圖 案的絕緣檢查之絕緣檢查方法，其特徵爲：將上述配線圖 案的面積按每個配線圖案記憶爲面積資訊，依據上述面積 資訊，選出成爲檢查對象的配線圖案，上述被選出之最先 的配線圖案係具有面積最大之資訊的上述面積資訊之配線 圖案。 -6 - 200839260 申請專利範圍第6項的發明係提供一種申請專利範圍 第5項之絕緣檢查方法，其中，上述最先的配線圖案係電 源·接地圖案。 藉由提供此等發明，可解決上述所有的課題。 〔發明之功效〕 根據申請專利範圍第1或5項的發明，進行絕緣檢查 時，係選擇面積最大的配線圖案作爲最先的檢查對象，所 以在設置於基板的配線圖案中最先進行電性影響最大之配 線圖案的絕緣檢查，依此，可以良好的效率進行絕緣檢查 〇 根據申請專利範圍第2項的發明，由於面積資訊最大 的配線圖案係電源·接地圖案，故可從該電源•接地圖案 進行絕緣檢查。因此，可從面積最大且電性影響最大的電 源·接地圖案，進行絕緣檢查，依此，可以良好效率進行 絕緣檢查。 根據申請專利範圍第3項的發明，由於係從面積較大 的配線圖案進行絕緣檢查，故可進行從電性影響較大的配 線圖案至電性影響較小之配線圖案的絕緣檢查，依此，可 以良好效率進行絕緣檢查。 根據申請專利範圍第4項的發明，由於被選爲第一組 作爲檢查對象的配線圖案，就不會被選爲第二組，所以從 面積較大的配線圖案至面積較小的配線圖案依序被選爲第 一組來進行絕緣檢查，依此，可以良好效率進行絕緣檢查 200839260 【實施方式】 說明實施本發明之最佳實施型態。 本發明的絕緣檢查裝置及絕緣檢查方法，係 人針對微細化及複雜化的基板進行絕緣檢查時， 可縮短檢查時間且以良好的效率來進行，而開發 案的順序。 說明成爲本絕緣檢查之對象的基板。第1圖 實施型態之基板的構成剖面圖。在該基板CB中 A側設有形成配線間距之間隔較窄的配線圖案（ 倒裝晶片（flip chip )面，於另一面B側設有形 距之間隔較廣的配線圖‘案（銲墊）之球柵（ball 〇 此外，第1圖所示的基板CB在說明的合適 上下所述的條件形成，但是不特別受限於此。 在該基板CB中，爲了說明方便，於一面A丨 個銲墊，於另一面B顯示有11個銲墊。 此等銲墊VI〜銲墊V8與銲墊P3、銲墊P】 P 1.1係藉由配線W9相互連接，該配線圖案（網） 示電源·接地圖案（電源·接地網）。 銲墊S1與銲墊P1係藉由配線W1相互連接 圖案（網）W1係表示信號網。又，同樣地，銲室 墊P2係藉由配線W2相互連接，銲墊S3與銲_ 本案發明 致力設法 其配線圖 係表示一 ，於一面 銲墊）之 成配線間 grid)面 情況係以 顯不有1 6 .0與銲塾 W9係表 ，該配線 》S2與銲 5 P4係藉 -8 - 200839260 由配線W3相互連接’銲墊S4與銲墊？5係藉由配線^4 相互連接，銲墊s 5與靜墊P 6係藉由配線W 5相互連接’ 銲墊S 6與銲墊P7係藉由配線W 6相互連接，銲墊S 7與 銲墊P8係藉由配線W7相互連接，銲墊S8與銲墊P9係 藉由配線W 8相互連接’表示作爲信號圖案（信號網）° 再者，該基板CB中，被設置於一面A之信號圖案的 銲墊S與電源·接地圖案的銲墊V係交互配置。 φ 電源•接地圖案一般具有防止因流動於信號網之電流 所產生的 EMI ( Electromagnetic Interference )干擾的作 用，所以具有比信號網更大的面積。 此外，本說明書所示的「電源•接地圖案的面積」或 「信號圖案的面積」之面積，係表示形成於基板時之配線 圖案本身的面積，像多層配線基板那樣形成多層時，係表 示各層配線的加總面積。 面積資訊係表示各配線圖案（網）所具有的該面積。 φ 因此，面積資訊係按每個配線圖案來設定，並且其大 小係依據所形成的配線圖案而不同。 再者’該配線圖案所具有的面積資訊也包含與設置於 配線圖案上之檢查點的數量相關的資訊，也可設定成隨著 該檢查點之數量的增加，面積因而變大。 此外’該檢查點的增加在與檢查點接觸之接觸探針的 數量中也可進行同樣的設定。 第1圖的基板CB中，作爲電源•接地圖案的配線圖 案W9係表示具有最大面積的配線圖案。又，作爲信號圖 -9- 200839260 案之配線圖案w 1與配線圖案W2係表示信號圖案具有比 較大的面積之配線圖案。 此外，在該第1圖所示的基板CB所具有的配線圖案 之面積中，係以配線圖案W9的面積最大，配線圖案W1 的面積次大，接著，按照從配線圖案W2、配線圖案W3 至配線圖案W8的順序，面積依序變小的方式來設定。 該第1圖中的配線圖案的面積只不過是一個實施型態 ，並不限定於此。 第2圖係本發明之絕緣檢查裝置之一實施型態的槪略 構成圖。該第2圖所示的基板CB係進一步槪略地表示第 1圖所示的基板CB，配線圖案P1係表示電源•接地圖案 ，配線圖案P2至配線圖案P4的三條配線圖案係表示信號 圖案。 在該第2圖的基板CB中，爲了使配線圖案之面積的 大小容易理解，故將該配線圖案的形狀形成一字狀、T字 狀或十字狀，但是並沒有特別限定。又，因此，將作爲電 源·接地圖案的配線圖案P 1以十字狀來表示。 本發明之絕緣檢查裝置1具有電源手段2、電壓檢測 手段3、檢測手段4、記憶手段5 1、算出手段5 3、判定手 段52、選出手段6、切換手段7、第一端子8、第二端子9 與顯示手段1 0。 又’該絕緣檢查裝置1係使用用以壓接於上述說明的 基板CB所形成之複數配線圖案p上所設定之檢查點的探 針（接觸探針）CP。利用該探針CP，可對特定檢查點施 -10- 200839260 加特定電位，或從特定檢查點檢測電性特性。 對此等配線圖案P各顯示有一條探針C P，然而設定 於配線圖案P之檢查點的數量或位置並沒有限定，可按照 配線圖案的數量或位置來設定，進行配線圖案的絕緣檢查 時，必須是一條探針至少與一條配線圖案接觸。 此外，在該第2圖所示的絕緣檢查裝置1中，係使用 一端子測定法算出配線圖案間的電阻値，但是亦可使用四 φ 端子測定法算出配線圖案間的電阻値。 電源手段2係在檢查對象的配線圖案與其他配線圖案 之間的配線圖案間（檢查對象間），施加用以進行絕緣檢 查的電位差（電壓）。該電源手段2可使用例如可變電壓 源’可將用以進行絕緣檢查而施加特定電位的電壓加以適 當調整來供給。 該電源手段2係設定成可在檢查對象間施加0〜500V 左右之大小的電壓。 • 電壓檢查手段3係檢測檢查對象間的電位差（電壓） 。該電壓檢查手段3可使用例如電壓計，但是並沒有特別 的限制。由於該電壓檢測手段3可檢測檢查對象間的電壓 ，所以可管理電源手段2所施加之檢查對象間的電壓。 此外，也可以在該電壓檢測手段3中確認電源手段2 所施加之檢查對象間的電壓。 檢測手段4係用來檢測電源手段2將特定的電壓供給 至檢查對象間時之檢查對象間的電性特性。該檢測手段4 係用來檢測檢查對象間的電性特性’更具體來說’係檢測 -11 - 200839260 電'源手段2施加特定電壓時之檢查對象間的電流大小。因 此’檢測手段4可使用電流計。藉由該電流計的檢測値， 可檢測流動於檢查對象間的電流値。 記憶手段5 1係將形成於成爲檢查對象之基板CB的配 線圖案的面積，按每個配線圖案來記憶。 例如，在第1圖的基板CB中，配線圖案W1至配線 圖案W9之配線圖案所具有的面積係按每個配線圖案來記 憶。當配線圖案W1具有面積D1時，配線圖案W1與面積 資訊D 1係對應而記憶。 此外，當配線圖案 W1.........W8的面積具有面積 D1.........D8 ( Dl > D2 > ......... > D7 > D8 )的面積時，面積 資訊D 1...........W8也可分別與配線圖案對應而記憶。又， 當作爲電源·接地圖案的配線圖案W9爲面積D9時，可 記憶配線圖案W9與面積資訊D9。 又，第2圖所示的基板CB也如上述的說明，配線圖 案P1至配線圖案P4所具有的面積D1至面積D4係對應 而被記憶於記憶手段5 1。 記憶該配線圖案的面積時，係以事先賦予表示配線圖 案爲電源·接地圖案或信號圖案之識別資訊來記憶爲佳。 一般來說，配線圖案的面積大多是電源•接地圖案的 面積比信號圖案的面積大。所以，區分配線圖案的面積時 ，可容易地在具有比較大面積的電源·接地圖案群、與具 有比較小面積的信號圖案群的兩組，區分配線圖案群。 記億於該記憶手段5 1的面積資訊，係如上所述那樣 -12 - 200839260 記憶關於配線圖案之面積的資訊，然而 每個配線圖案之檢查點的數量作爲面積 多數檢查點之數量的配線圖案，係爲更 因此，在具有2個檢查點的配線圖 點的配線圖案中，具有4個檢查點的配 的面積資訊。 算出手段53係從檢測手段4所檢 出檢查對象之配線圖案與其他配線圖案 電阻値。 該算出手段5 3所進行之具體的電 係從電壓檢測手段3檢測的電壓値與檢 流値，算出檢查對象間的電阻値。以此 可算出檢查對象間的電阻値，且可判定 狀態。 判定手段52係從算出手段53的算 ，判定作爲檢查對象之配線圖案與其他 查對象間的絕緣的良否。 該判定手段52進行的判定，係可 値設定作爲基準値，藉由比較該算出結 判定其良否。 進行絕緣檢查時，檢查對象間的絕 維持乃問題所在，所以當算出結果大於 爲絕緣狀態良好，算出結果小於基準値 ，也可記億設定於 資訊。此時，具有 大面積的配線圖案 案與具有4個檢查 線圖案具有比較大 測的電性特性，算 間之檢查對象間的 阻値之算出方法， 測手段4檢測的電 方式，藉由算出， 檢查對象間的絕緣 出結果（電阻値） 配線圖案之間之檢 事先將良品的電阻 果與基準値，即可 緣性是否可確實地 基準値時，則判斷 時，則判斷爲絕緣 -13- 200839260 狀態不良。此外’該基準値可按每個檢查對象間或每個特 定群組來設定。 該判定手段52對基板CB進行良品•不良品的判定後 ，在後述的顯示手段1 〇進行良品或不良品的顯示。 選出手段6從基板CB的複數配線圖案P，選出成爲 檢查對象間的兩組配線圖案，並特定檢查對象的配線圖案 P。該選出手段6係以藉由特定檢查對象的配線圖案P， 依序進行絕緣檢查的方式選出配線圖案。 本發明之檢查對象的配線圖案P係表示從複數配線圖 案P選出之特定的一條配線圖案P，例如也可表示與電源 手段2之上游側（正電極側）連接的配線圖案P，也可表 示與電源手段2之下游側（負電極側）連接的一條配線圖 案P。 例如，將與電源手段2之上游側連接的配線圖案P設 爲檢查對象時，形成檢查對象間的配線圖案P係並聯，並 且與電源手段2的下游側連接。 又，將與電源手段2之下游側連接的配線圖案P設爲 檢查對象時，檢查對象間的配線圖案P係並聯，並且與電 源手段2的上游側連接。藉此方式連接，來設定檢查對象 的配線圖案P與其他配線圖案的檢查對象間。 如上所述，選出手段6係以將成爲檢查對象的一條配 線圖案設爲第一組，將與該第一組的配線圖案形成檢查對 象間的配線圖案設成第二組以進行分組的方式連接，選出 第一組與第二組作爲該檢查對象間。 •14- 200839260 該選出手段6的動作係依據記憶於記憶手段51之配 線圖案的面積資訊來動作，當選出手段6如上述那樣地進 行分組時’係藉由獲得與記憶手段51之配線圖案相關的 資訊來進行。 該選出手段6選出的配線圖案，首先係選出具有最大 面積的配線圖案。如上所述藉由先選出具有最大面積的配 線圖案，將電性影響較大的配線圖案優先設爲檢查對象， 即可達成檢查時間的縮短。 就具有此種最大面積的配線圖案來說，係以選出被形 成作爲最大面積之配線圖案的電源•接地圖案爲佳。該電 源•接地圖案在基板CB的實際使用時，其他配線圖案的 影響最大’故以先將該電源•接地圖案設爲檢查對象爲合 適。 該選出手段6選出之作爲檢查對象的第一組所選出的 配線圖案Ρ，係以不會被選爲第二組的方式動作爲佳。此 乃因藉由以此方式動作，成爲一次檢查對象的配線圖案， 即不會被選出於檢查對象間，可防止造成絕緣檢查時的電 性影響之故。 第3圖係表示第2圖所示之基板CB成爲檢查對象時 的選出手段所選出的檢查順序。 若爲該第2圖的基板CB時，首先面積最大的配線圖 案Ρ 1 (電源•接地圖案）被選爲檢查對象的第一組（第3 圖的點線圓部分），其餘的配線圖案Ρ2被選爲第二組（ 第3圖的一點鏈線圓部分）（第1次的絕緣檢查）。 -15- 200839260 繼之，由於配線圖案P1已被選爲第一組，故將配線 圖案p 1從絕緣檢查對象的配線圖案去除，實行第2次的 絕緣檢查。此時，剩餘的配線圖案中，面積最大的配線圖 案P3被選爲第一組，配線圖案P2與配線圖案P4被選爲 第二組。 接著，由於配線圖案P3被選爲第一組，故將配線圖 案P3從絕緣檢查對象的配線圖案去除，實行第3次的絕 緣檢查。此時，剩餘的配線圖案中，面積最大的配線圖案 P4被選爲第一組，配線圖案P2被選爲第二組。 以此方式進行基板CB的絕緣檢查。 此外，就該基板CB的絕緣檢查順序來說，選出手段 6亦可依據記億於記憶手段5 1的面積資訊，來算出其順序 ，然而，也可事先使檢查順序記憶於記憶手段5 1。 切換手段7係由與各接觸探針CP導通連接的複數開 關元件SW構成。該切換手段7係藉由來自選出手段6的 動作信號，控制ON/ OFF的動作。因此，藉由該切換手 段7的開關動作，可進行成爲檢查對象之配線圖案的選出 〇 電源供給端子8爲了供給檢測對象間的電壓，而經由 接觸探針CP與各配線圖案P連接。 該電源供給端子8具有：連接電源手段2的上游側（ 正極側）與配線圖案的上游側電源供給端子8 1 ;和連接電 源手段2的下游側（負極側）或檢測手段4與配線圖案P 的下游側電源供給端子82。 -16- 200839260 如第1圖所示，該電源供給端子8的上游側電源供給 端子8 1及下游側電源供給端子82，係經由保護電阻R相 對於配線圖案P而設置。 此等上游側電源供給端子8 1與下游側電源供給端子 82，各自具有切換手段7的開關元件SW，藉由該切換手 段7之開關元件SW的ON/ OFF切換，可設定連接狀態 /未連接狀態。 該保護電阻R係靜電放電（electro — static discharge )保護用的電阻。 電壓檢測端子9爲了檢測用以檢測檢查對象間之電性 特性的電壓，係經由接觸探針CP與各配線圖案P連接。 該電壓檢測端子9具有：連接電壓檢測手段3的上游 側（正極側）與配線圖案P的上游側電壓檢測端子9 1 ; 和連接電壓檢測手段3的下游側（負極側）與配線圖案P 的下游側電壓檢測端子92。 如第1圖所示，該電壓檢測端子9的上游側電壓檢測 端子9 1及下游側電壓檢測端子92，係經由保護電阻R相 對於配線圖案P而設置。 此等上游側電壓檢測端子91與下游側電壓檢測端子 92係與電源供給端子8同樣各自具有切換手段7的開關元 件SW，藉由該切換手段7之開關元件SW的ON / OFF切 換，可設定連接狀態/未連接狀態。 電源供給端子8與電壓檢測端子9係如第2圖所示那 樣，相對於與配線圖案P導通連接的一條接觸探針CP， -17- 200839260 配置四個端子，並且具有進行各端子之ON/ OFF控制的 四個開關元件SW。 此外，第2圖中，將控制上游測電源供給端子81之 動作的開關元件設爲符號SW1，將控制上游側電壓檢測端 子9 1之動作的開關元件設爲SW3，將控制下游測電源供 給端子82之動作的開關元件設爲符號SW2，將控制下游 側電壓檢測端子92之動作的開關元件設爲符號SW4來表 ^j\ ° 顯示手段1 0係顯示絕緣檢查結果。該顯示手段1 0所 顯示之絕緣檢查的顯示方法，可以例如對進行檢查的基板 ’顯示「良品」或「不良品」的方式來發揮功能。 以上係本發明之絕緣檢查裝置1之構成的說明。 說明本發明之絕緣檢查裝置的動作。 第4圖係表示本發明之絕緣檢查裝置的動作之流程圖 °第5圖至第7圖係用以說明第3圖之絕緣檢查裝置的動 作之槪略構成圖。 首先，將成爲檢查對象之基板CB的配線圖案P的面 積當作面積資訊記憶在絕緣檢查裝置1的記憶手段5 1 ( Si) 〇 記憶手段5 1可記憶基板CB之配線圖案間的面積資訊 ’基板CB被配置在可進行檢查的檢查台（沒有顯示圖） 〇 此時’記憶手段5 1除了記憶配線圖案的面積資訊外 ’還記憶檢查基板CB之配線圖案P時需要的資訊（例如 -18- 200839260 檢查點的數量資訊、該檢查點的位置資 順序資訊）等。 當面積資訊被記憶於記憶手段5 1， 特定的檢查裝置時，可對基板CB實施 絕緣檢查）。 就基板CB的檢查來說，先進行各j 檢查，進行配線圖案P的導通確認。該 施絕緣檢查前進行檢查爲佳。此外，進 被發現不良的基板CB會被當作不良品 緣檢查。 進行基板CB的導通檢查，被判斷 可進行絕緣檢查。 在該絕緣檢查中，首先從複數配線 大面積之面積資訊的配線圖案P作爲第 基板CB之其餘的所有配線圖案P被選 )° 此時，第一組與第二組之間成爲用 查對象間。 此外，本實施型態中的該第一組配 接地圖案。 第一組與第二組的配線圖案P分別 5圖），首先，以可相對於第一組的配: 對象間施加特定電壓的方式，進行開關 例如，第5圖中表示配線圖案P1 訊或檢查點的選擇 基板CB被配置於 良否檢查（導通· 配線圖案P的導通 導通檢查係以在實 行該導通檢查時， 回收，不會進行絕 f爲良品的基板CB 圖案P選擇具有最 一組。又，同時， 擇作爲第二組（S2 以算出電阻値的檢 線圖案P係電源· 被選出時（參照第 線圖案P1，在檢查 元件S W的控制。 被選爲檢查對象之 -19- 200839260 第一組的情形。以連接於該配線圖案p1的開關元件sW 1 與開關元件SW3成爲ON的方式動作。又，另一方面，以 連接於配線圖案P2至配線圖案P4的開關元件SW2與開 關元件SW4成爲ON的方式分別動作。 選出第一組與第二組而設定檢查對象間時，可在該檢 查對象間施加絕緣檢查用的電壓（S 3 )。 接著，實施該檢查對象間的絕緣檢查。此時，以在第 一組與第二組之間施加特定電壓的方式，將電流供給到第 一組的配線圖案P 1。繼之，當第一組與第二組之間被設 定成特定電壓時，測定第一組與第二組之檢查對象間的電 流値（S4)。 測定檢查對象間的電流値時，藉由特定電壓値與該電 流値可算出檢查對象間的電阻値（S5 )，將該電阻値與判 定絕緣狀態之良否的基準値相比較，來判定絕緣狀態的良 否（S 6 )。 然後，結束以配線圖案P1作爲檢查對象的絕緣檢查 〇 當配線圖案p1的絕緣檢查結束時，經由記憶手段5 1 從配線圖案P 1以外的配線圖案P群，選出面積資訊最大 的配線圖案P3 ( S7與S8 )。 接著，以該配線圖案P3作爲檢查對象來實施絕緣檢 查，選爲第一組。此時，剩餘的配線圖案P2與配線圖案 P4被選爲第二組（S2)。 此時，如上述說明所示，第一組與第二組被設定爲檢 -20- 200839260 查對象間，且配線圖案P3成爲檢查對象而連接（參照第 6圖）。 以配線圖案P3成爲檢查對象的方式連接時，可設定 檢查對象間，所以與上述的說明同樣，可在檢查對象間施 加特定電壓，算出該檢查對象間的電阻値（S3〜S5 )。 算出檢查對象間的電阻値時，比較基準値與該電阻値 ，來判定絕緣狀態的良否（S 6 )。 然後，結束以配線圖案P3作爲檢查對象的絕緣檢查 〇 繼之，當配線圖案P3的絕緣檢查結束時，經由記憶 手段51從配線圖案P1與配線圖案P3以外的配線圖案P 群，選出面積資訊最大的配線圖案P4 ( S7與S8)。 接著，以該配線圖案P4作爲檢查對象來實施絕緣檢 查，選爲第一組。此時，剩餘的配線圖案P2被選爲第二 組（S 2 )。 此時，如上述說明所示，第一組與第二組被設定爲檢 查對象間，且配線圖案P4成爲檢查對象而連接（參照第 7圖）。 以配線圖案P4成爲檢查對象的方式連接時，可設定 檢查對象間，所以與上述說明同樣，可在檢查對象間施加 特定電壓，可算出該檢查對象間的電阻値（S3〜S5 )。 算出檢查對象間的電阻値時，比較基準値與該電阻値 ’判定絕緣狀態的良否（S 6 )。 然後，結束以配線圖案P4作爲檢查對象的絕緣檢查 -21 - 200839260 此時，配線圖案P群所有的絕緣檢查結束，基板CB 的絕緣檢查結束。 此外，此處係表示將檢查對象的配線圖案（被選爲第 一組的配線圖案）連接於電源手段2的上游測（正極側） ，以進行絕緣檢查的方法，然而，亦可將檢查對象的配線 圖案連接於電源手段2的下游側（負極側），以進行絕緣 檢查。 再者，上述絕緣檢查裝置的動作中，係將配線圖案的 面積大小當作面積資訊使用，然而使用檢查點的數量作爲 面積資訊時，係從檢查點的數量較多的配線圖案依序設定 爲檢查對象的配線圖案。 以上係本發明之絕緣檢查裝置之動作的說明。 【圖式簡單說明】 第1圖係表示一實施型態之基板的構成剖面圖。 第2圖係本發明之絕緣檢查裝置之一實施型態的槪略 構成圖。 第3圖係第2圖所示之基板CB成爲檢查對象時的選 出手段所選出的檢查順序。 第4圖係表示本發明之絕緣檢查裝置的動作之流程圖 〇 第5圖係用以說明第3圖之絕緣檢查裝置的動作之槪 略構成圖。 -22- 200839260 第6圖係用以說明第3圖之絕緣檢查裝置的動作之槪 略構成圖。 第7圖係用以說明第3圖之絕緣檢查裝置的動作之槪 略構成圖。 【主要元件符號說明】 1 :絕緣檢查裝置200839260 IX. Description of the Invention [Technical Field] The present invention relates to an insulation inspection device and an insulation inspection method, and more particularly to an insulation inspection device for performing insulation inspection between a plurality of wiring patterns formed on a substrate Insulation inspection method. The present invention is not limited to a printed wiring board, and can be applied to, for example, a flexible substrate, a multilayer wiring board, an electrode plate for a liquid crystal display or a plasma display, and a package substrate or a film carrier for a semiconductor package. In the inspection of the electrical wiring, in the present specification, these various types of wiring boards are collectively referred to as "substrate". [Prior Art] In the case of a substrate (circuit board) having a plurality of wiring patterns, it is possible to ensure the insulation state of the wiring pattern to be inspected and the other wiring patterns for each wiring pattern in the insulation inspection device. The insulation is judged to check whether the substrate is a good insulation inspection. This insulation inspection is performed by applying a voltage to one of the wiring patterns, and measuring the current flowing through the wiring pattern on the other side to calculate the resistance 此 between the wiring patterns, and checking the insulation state from the resistance 値. For example, in the publication described in Patent Document 1, there is a technique for inspecting an insulation inspection (short-circuit inspection) of a wiring pattern to be inspected, and specifically, by applying a specificity between a wiring pattern to be inspected and another wiring pattern. The voltage is used to calculate the resistance 値 between the wiring patterns to check the insulation state between the wiring diagram 200839260. [Problem to be Solved by the Invention] In recent years, as the wiring pattern formed on the substrate is miniaturized, the wiring pattern of the substrate is continuously increased in density and complexity. . Therefore, the number of wiring patterns is increased, and the number of conducting and insulating inspections is also increased. In particular, in the insulation inspection, when the number of wiring patterns is increased, the number of inspections is also increased, and the electrical influence on other wiring patterns caused by the insulation inspection is increased, so that there is a problem that the inspection time increases once. The present invention has been made in view of such a problem, and an object thereof is to provide an insulation inspection apparatus and an insulation inspection method which can perform insulation inspection with good efficiency by shortening the time required for insulation inspection. [Means for Solving the Problem] The invention of claim 1 is characterized in that, in the substrate to be inspected in which the plurality of wiring patterns are formed, the wiring pattern to be inspected is selected from the plurality of wiring patterns, and the wiring pattern is formed. An insulation inspection device for insulation inspection, comprising: a memory means, wherein an area of a wiring pattern of the substrate is stored as area information for each wiring pattern; and a selection means is selected from the plurality of wiring patterns in accordance with an inspection order to be inspected a wiring pattern of the object; a power source means for applying a voltage between the inspection target between the wiring pattern and the other wiring pattern; and detecting means-5-200839260, detecting the electric power between the inspection targets when the voltage is applied by the power source means And the calculation means, the resistance 値 for determining the insulation state between the inspection targets is calculated based on the electrical characteristics, and the selection means selects the wiring pattern having the largest area information as the first inspection target. The invention of the second item of the patent scope provides Species range patent insulation test apparatus of Item 1, wherein the area of the largest information-based power supply and grounding wiring pattern pattern. The invention of claim 3 is the insulation inspection apparatus according to the first or second aspect of the invention, wherein the selection means is selected in order from the wiring pattern having a large area information as described above. The invention of claim 4 is the insulation inspection apparatus according to the third aspect of the invention, wherein the selection means is to set the wiring pattern to be inspected to the first group, and to set the remaining wiring pattern formed on the substrate. The wiring pattern selected for the second group and selected as the first group once is not selected as the second group. The invention of the fifth aspect of the invention provides an insulation inspection method in which a wiring pattern to be inspected is selected from the plurality of wiring patterns in an inspection substrate on which a plurality of wiring patterns are formed, and an insulation inspection of the wiring pattern is performed. The insulation inspection method is characterized in that the area of the wiring pattern is stored as area information for each wiring pattern, and a wiring pattern to be inspected is selected based on the area information, and the selected first wiring pattern has the largest area. The wiring pattern of the above area information of the information. -6 - 200839260 The invention of claim 6 is the insulation inspection method of claim 5, wherein the first wiring pattern is a power supply/ground pattern. By providing these inventions, all of the above problems can be solved. [Effects of the Invention] According to the invention of claim 1 or 5, when the insulation inspection is performed, the wiring pattern having the largest area is selected as the first inspection target, so that the wiring is first placed in the wiring pattern of the substrate. Insulation inspection of the wiring pattern that affects the most, and thus insulation inspection can be performed with good efficiency. According to the invention of the second application of the patent application, since the wiring pattern having the largest area information is a power supply/ground pattern, the power supply and the grounding can be used. The pattern is inspected for insulation. Therefore, insulation inspection can be performed from the power supply/ground pattern with the largest area and the greatest electrical influence, and insulation inspection can be performed with good efficiency. According to the invention of claim 3, since the insulation inspection is performed from the wiring pattern having a large area, it is possible to perform insulation inspection from a wiring pattern having a large electrical influence to a wiring pattern having a small electrical influence. , insulation inspection can be performed with good efficiency. According to the invention of the fourth aspect of the patent application, since the wiring pattern selected as the first group to be inspected is not selected as the second group, the wiring pattern having a larger area is smaller than the wiring pattern having a small area. The order is selected as the first group to perform the insulation inspection, and accordingly, the insulation inspection can be performed with good efficiency. 200839260 [Embodiment] The best mode for carrying out the invention will be described. In the insulation inspection apparatus and the insulation inspection method of the present invention, when the insulation inspection is performed on the substrate which is made finer and more complicated, the inspection time can be shortened and the efficiency can be improved with good efficiency. The substrate to be the object of this insulation inspection will be described. Fig. 1 is a cross-sectional view showing the structure of a substrate of an embodiment. On the A side of the substrate CB, a wiring pattern (flip chip surface) having a narrow interval of wiring pitch is formed, and a wiring pattern having a wide interval of the distance is provided on the other surface B side (pad) In addition, the substrate CB shown in Fig. 1 is formed under the conditions described above, but is not particularly limited. In the substrate CB, for the convenience of explanation, one side is used for one side. The pad has 11 pads on the other side B. These pads VI~pad V8 and pad P3, pad P] P 1.1 are connected to each other by wiring W9, the wiring pattern (network) shows the power supply Grounding pattern (power supply/grounding grid) The pad S1 and the pad P1 are connected to each other by a wire W1 (network) W1 to indicate a signal network. Similarly, the pad pad P2 is connected to each other by a wire W2. , solder pad S3 and soldering _ The invention is trying to find that its wiring diagram shows that the wiring surface of a wiring pad is not shown in the case of the wiring compartment. S2 and solder 5 P4 are borrowed -8 - 200839260 by wiring W3 interconnected 'pad S4 and pad? 5 is interconnected by wiring ^4, and pad s 5 and pad P 6 are connected to each other by wiring W 5 ' Solder pad S 6 and pad P7 are connected to each other by wiring W 6 , pad S 7 and The pad P8 is connected to each other by a wire W7, and the pad S8 and the pad P9 are connected to each other by a wire W8' as a signal pattern (signal net). Further, the substrate CB is disposed on one side A. The pad S of the signal pattern is alternately arranged with the pad V of the power supply/ground pattern. φ Power supply • The ground pattern generally has a larger area than the signal network to prevent EMI (electromagnetic interference) interference caused by current flowing through the signal network. In addition, the area of the "area of the power supply/ground pattern" or the "area of the signal pattern" shown in the present specification indicates the area of the wiring pattern itself when formed on the substrate, and when the multilayer wiring board is formed as a multilayer wiring board, the layers are shown. The total area of wiring. The area information indicates the area of each wiring pattern (web). φ Therefore, the area information is set for each wiring pattern, and the size varies depending on the wiring pattern to be formed. Further, the area information of the wiring pattern also includes information relating to the number of checkpoints provided on the wiring pattern, and may be set such that the area becomes larger as the number of the checkpoints increases. Furthermore, the increase in the checkpoint can be made the same in the number of contact probes in contact with the checkpoint. In the substrate CB of Fig. 1, a wiring pattern W9 as a power supply/ground pattern indicates a wiring pattern having the largest area. Further, the wiring pattern w 1 and the wiring pattern W2 as signal diagrams -9-200839260 indicate wiring patterns having a larger area than the signal pattern. Further, in the area of the wiring pattern included in the substrate CB shown in FIG. 1, the area of the wiring pattern W9 is the largest, and the area of the wiring pattern W1 is the second largest, and then, from the wiring pattern W2 to the wiring pattern W3. The order of the wiring pattern W8 is set so that the area is gradually reduced. The area of the wiring pattern in the first drawing is merely an embodiment, and is not limited thereto. Fig. 2 is a schematic structural view showing an embodiment of an insulation inspection device of the present invention. The substrate CB shown in Fig. 2 further schematically shows the substrate CB shown in Fig. 1, the wiring pattern P1 indicates a power supply/ground pattern, and the three wiring patterns from the wiring pattern P2 to the wiring pattern P4 indicate signal patterns. In the substrate CB of Fig. 2, the shape of the wiring pattern is formed in a straight line, a T shape, or a cross shape in order to make the size of the wiring pattern easy to understand, but is not particularly limited. Further, therefore, the wiring pattern P 1 as the power supply/ground pattern is indicated in a cross shape. The insulation inspection device 1 of the present invention includes a power source means 2, a voltage detecting means 3, a detecting means 4, a memory means 51, a calculating means 53, a determining means 52, a selecting means 6, a switching means 7, a first terminal 8, and a second Terminal 9 and display means 10. Further, the insulating inspection apparatus 1 uses a probe (contact probe) CP for crimping a checkpoint set on the plurality of wiring patterns p formed by the substrate CB described above. With this probe CP, a specific potential can be applied to a specific inspection point, or a specific characteristic can be detected from a specific inspection point. Although one probe CP is displayed for each of the wiring patterns P, the number or position of the inspection points set in the wiring pattern P is not limited, and may be set according to the number or position of the wiring patterns, and when the insulation inspection of the wiring pattern is performed, It must be a probe that is in contact with at least one wiring pattern. Further, in the insulation inspection device 1 shown in Fig. 2, the resistance 値 between the wiring patterns is calculated by the one-terminal measurement method, but the resistance 値 between the wiring patterns can be calculated by the four φ terminal measurement method. The power source means 2 applies a potential difference (voltage) for performing an insulation inspection between the wiring patterns between the inspection target and the other wiring patterns (between the inspection targets). The power source means 2 can be supplied by appropriately adjusting a voltage for applying a specific potential by performing an insulation inspection using, for example, a variable voltage source. The power source means 2 is set to apply a voltage of about 0 to 500 V between the inspection targets. • The voltage check means 3 detects the potential difference (voltage) between the inspection targets. The voltage check means 3 can use, for example, a voltmeter, but is not particularly limited. Since the voltage detecting means 3 can detect the voltage between the inspection targets, the voltage between the inspection targets applied by the power source means 2 can be managed. Further, the voltage detecting means 3 may confirm the voltage between the inspection targets applied by the power source means 2. The detecting means 4 is for detecting the electrical characteristics between the inspection targets when the power source means 2 supplies a specific voltage between the inspection targets. This detecting means 4 is for detecting the electrical characteristics between the inspection targets. More specifically, the detection is performed. -11 - 200839260 The magnitude of the current between the inspection targets when the electric source means 2 applies a specific voltage. Therefore, the detecting means 4 can use an ammeter. By detecting the enthalpy of the galvanometer, the current 流动 flowing between the objects to be inspected can be detected. The memory means 51 is an area of a wiring pattern formed on the substrate CB to be inspected, and is stored for each wiring pattern. For example, in the substrate CB of Fig. 1, the area of the wiring pattern of the wiring pattern W1 to the wiring pattern W9 is recorded for each wiring pattern. When the wiring pattern W1 has the area D1, the wiring pattern W1 is stored in correspondence with the area information D1. Further, when the area of the wiring patterns W1 ... ... W8 has an area D1 ... D8 ( Dl > D2 > ... ... > D7 When the area of > D8 ) is used, the area information D 1........W8 can be memorized in correspondence with the wiring pattern. Further, when the wiring pattern W9 as the power supply/ground pattern is the area D9, the wiring pattern W9 and the area information D9 can be memorized. Further, as described above, the substrate CB shown in Fig. 2 is stored in the memory means 51 in accordance with the area D1 to the area D4 of the wiring pattern P1 to the wiring pattern P4. When the area of the wiring pattern is memorized, it is preferable to store the identification information indicating that the wiring pattern is a power supply/ground pattern or a signal pattern in advance. In general, the area of the wiring pattern is often such that the area of the power supply/ground pattern is larger than the area of the signal pattern. Therefore, when the area of the wiring pattern is distinguished, the wiring pattern group can be easily distinguished between the power supply/ground pattern group having a relatively large area and the signal pattern group having a relatively small area. The area information of the memory means 5 1 is as described above -12 - 200839260. The information about the area of the wiring pattern is memorized, but the number of check points of each wiring pattern is used as the number of wiring patterns of the majority of the inspection points. In addition, in the wiring pattern of the wiring pattern having two inspection points, the area information of the four inspection points is included. The calculation means 53 detects the wiring pattern of the inspection target and the other wiring pattern resistance 从 from the detecting means 4. The specific electric power generated by the calculation means 53 is calculated from the voltage 检测 and the 値 detected by the voltage detecting means 3, and the resistance 値 between the inspection targets is calculated. In this way, the resistance 値 between the inspection targets can be calculated and the state can be determined. The determination means 52 determines whether or not the insulation between the wiring pattern to be inspected and the other inspection target is good or not from the calculation by the calculation means 53. The determination by the determination means 52 is made as a reference 値, and the comparison is judged to determine whether it is good or not. When the insulation inspection is performed, the maintenance between the inspection objects is a problem. Therefore, when the calculation result is larger than the insulation state, the calculation result is smaller than the reference 値, and it is also possible to set the information to 100%. In this case, the wiring pattern having a large area has a comparatively large electrical characteristic with four inspection line patterns, the calculation method of the resistance between the inspection objects, and the electrical method detected by the measuring means 4 are calculated by Insulation result between the inspection objects (resistance 値) Check between the wiring patterns. If the resistance of the good product is compared with the reference 事先 before, if the edge is positively 値, then the judgment is judged as insulation-13. - 200839260 Bad condition. In addition, the reference can be set for each inspection object or for each specific group. When the determination means 52 determines the good or defective product on the substrate CB, it displays the good or defective product in the display means 1 to be described later. The selection means 6 selects two sets of wiring patterns to be inspected from the plurality of wiring patterns P of the substrate CB, and specifies the wiring pattern P to be inspected. In the selection means 6, the wiring pattern is selected in such a manner that the insulation pattern inspection is sequentially performed by the wiring pattern P of the specific inspection target. The wiring pattern P to be inspected in the present invention is a specific one of the wiring patterns P selected from the plurality of wiring patterns P. For example, the wiring pattern P connected to the upstream side (positive electrode side) of the power source device 2 may be indicated. A wiring pattern P connected to the downstream side (negative electrode side) of the power source means 2. For example, when the wiring pattern P connected to the upstream side of the power source means 2 is set as the inspection target, the wiring patterns P between the inspection targets are connected in parallel, and are connected to the downstream side of the power source means 2. When the wiring pattern P connected to the downstream side of the power source means 2 is to be inspected, the wiring patterns P between the inspection objects are connected in parallel and connected to the upstream side of the power source means 2. By this connection, the wiring pattern P to be inspected and the inspection target of the other wiring pattern are set. As described above, the selection means 6 is such that one wiring pattern to be inspected is set to the first group, and the wiring pattern between the wiring patterns forming the inspection target of the first group is set to the second group to be grouped. , the first group and the second group are selected as the inspection object. • 14- 200839260 The operation of the selection means 6 is based on the area information of the wiring pattern stored in the memory means 51, and when the selection means 6 is grouped as described above, the relationship is obtained by obtaining the wiring pattern of the memory means 51. Information to carry out. The wiring pattern selected by the selection means 6 first selects the wiring pattern having the largest area. As described above, by selecting the wiring pattern having the largest area first, the wiring pattern having a large electrical influence is preferentially set as the inspection target, and the inspection time can be shortened. In the case of a wiring pattern having such a maximum area, it is preferable to select a power supply/ground pattern which is formed as a wiring pattern of the largest area. This power supply/ground pattern has the greatest influence on the other wiring patterns when the substrate CB is actually used. Therefore, it is appropriate to set the power supply/ground pattern as the inspection target first. The selected one of the selected wiring patterns 作为 selected as the object to be inspected by the selecting means 6 is preferably operated in such a manner that it is not selected as the second group. By operating in this manner, the wiring pattern to be inspected at a time is not selected, and the electrical influence during the insulation inspection can be prevented. Fig. 3 is a view showing an inspection sequence selected by the selection means when the substrate CB shown in Fig. 2 is to be inspected. In the case of the substrate CB of the second drawing, the wiring pattern Ρ 1 (power supply/ground pattern) having the largest area is selected as the first group to be inspected (the dotted circle portion of the third drawing), and the remaining wiring patterns Ρ 2 It is selected as the second group (the one-point chain circle part of Fig. 3) (the first insulation inspection). -15-200839260 Then, since the wiring pattern P1 has been selected as the first group, the wiring pattern p1 is removed from the wiring pattern of the insulation inspection target, and the second insulation inspection is performed. At this time, among the remaining wiring patterns, the wiring pattern P3 having the largest area is selected as the first group, and the wiring pattern P2 and the wiring pattern P4 are selected as the second group. Then, since the wiring pattern P3 is selected as the first group, the wiring pattern P3 is removed from the wiring pattern of the insulation inspection target, and the third insulation inspection is performed. At this time, among the remaining wiring patterns, the wiring pattern P4 having the largest area is selected as the first group, and the wiring pattern P2 is selected as the second group. Insulation inspection of the substrate CB is performed in this manner. Further, in the order of the insulation inspection of the substrate CB, the selection means 6 may calculate the order based on the area information of the memory means 51. However, the inspection order may be memorized in advance in the memory means 51. The switching means 7 is constituted by a plurality of switching elements SW which are electrically connected to the respective contact probes CP. The switching means 7 controls the ON/OFF operation by the operation signal from the selecting means 6. Therefore, the switching operation of the switching means 7 allows the selection of the wiring pattern to be inspected. The power supply terminal 8 is connected to each wiring pattern P via the contact probe CP in order to supply the voltage between the detection targets. The power supply terminal 8 includes an upstream side (positive side) that connects the power source means 2 and an upstream side power supply terminal 8 1 of the wiring pattern; and a downstream side (negative side) that connects the power source means 2 or the detecting means 4 and the wiring pattern P The downstream side power supply terminal 82 is provided. As shown in Fig. 1, the upstream power supply terminal 81 and the downstream power supply terminal 82 of the power supply terminal 8 are provided via the protection resistor R with respect to the wiring pattern P. The upstream power supply terminal 81 and the downstream power supply terminal 82 each have a switching element SW of the switching means 7, and the ON/OFF switching of the switching element SW of the switching means 7 can set the connection state/unconnected. status. The protective resistor R is a resistor for electrostatic discharge (electro-static discharge) protection. The voltage detecting terminal 9 is connected to each wiring pattern P via a contact probe CP in order to detect a voltage for detecting an electrical property between the inspection targets. The voltage detecting terminal 9 includes an upstream side (positive side) of the connection voltage detecting means 3 and an upstream side voltage detecting terminal 9 1 of the wiring pattern P; and a downstream side (negative side) of the connection voltage detecting means 3 and a wiring pattern P. The downstream side voltage detecting terminal 92. As shown in Fig. 1, the upstream side voltage detecting terminal 9 1 and the downstream side voltage detecting terminal 92 of the voltage detecting terminal 9 are provided via the protective resistor R with respect to the wiring pattern P. Similarly, the upstream side voltage detecting terminal 91 and the downstream side voltage detecting terminal 92 have the switching element SW of the switching means 7 similarly to the power supply terminal 8, and can be set by switching ON/OFF of the switching element SW of the switching means 7. Connection status / unconnected status. As shown in FIG. 2, the power supply terminal 8 and the voltage detecting terminal 9 are provided with four terminals for one contact probe CP, -17-200839260 that is electrically connected to the wiring pattern P, and have ON/ for each terminal. The four switching elements SW controlled by OFF. In addition, in the second drawing, the switching element that controls the operation of the upstream power supply terminal 81 is referred to as symbol SW1, and the switching element that controls the operation of the upstream voltage detecting terminal 91 is set to SW3, and the downstream power supply terminal is controlled. The switching element of the operation of 82 is denoted by reference numeral SW2, and the switching element that controls the operation of the downstream side voltage detecting terminal 92 is denoted by reference numeral SW4. The display means 10 displays the insulation inspection result. The display method of the insulation inspection displayed by the display means 10 can function, for example, by displaying "good" or "defective" on the substrate </ /> to be inspected. The above is the description of the configuration of the insulation inspection device 1 of the present invention. The operation of the insulation inspection device of the present invention will be described. Fig. 4 is a flow chart showing the operation of the insulation inspection apparatus of the present invention. Fig. 5 to Fig. 7 are diagrams for explaining the operation of the insulation inspection apparatus of Fig. 3. First, the area of the wiring pattern P of the substrate CB to be inspected is stored as the area information in the memory means 5 1 (Si) of the insulation inspection apparatus 1 and the area information between the wiring patterns of the memory board C1 can be memorized. The substrate CB is placed on an inspection table (not shown) where inspection is possible. In this case, the memory means 5 1 stores information necessary for checking the wiring pattern P of the substrate CB in addition to the area information of the memory wiring pattern (for example, -18). - 200839260 The number of checkpoints, the location information of the checkpoints, etc.). When the area information is memorized in the memory means 5 1, a specific inspection apparatus, the substrate CB can be subjected to an insulation inspection). In the inspection of the substrate CB, each j inspection is performed first, and the conduction of the wiring pattern P is confirmed. It is better to check before the insulation inspection. In addition, the substrate CB which is found to be defective will be regarded as a defective edge inspection. Conduction inspection of the substrate CB is performed, and it is judged that the insulation inspection can be performed. In the insulation inspection, first, the wiring pattern P of the area information of the plurality of wirings is selected as the remaining wiring patterns P of the first substrate CB.) At this time, the first group and the second group become the objects to be inspected. between. Furthermore, the first set of grounding patterns in this embodiment mode. The wiring patterns P of the first group and the second group are respectively shown in FIG. 5 . First, the switching is performed such that a specific voltage can be applied between the objects of the first group: for example, the wiring pattern P1 is indicated in FIG. 5 or The selection substrate CB of the inspection point is placed in the quality inspection (the conduction/conduction inspection of the conduction/wiring pattern P is performed when the conduction inspection is performed, and the substrate CB pattern P which is not good is not selected. At the same time, when the second group (S2 is used to calculate the resistance line 检, the line pattern P power supply is selected (refer to the line pattern P1, the control element SW is controlled. -19-200839260 selected as the inspection target) In the case of the first group, the switching element sW 1 and the switching element SW3 connected to the wiring pattern p1 are turned on. On the other hand, the switching element SW2 and the switch connected to the wiring pattern P2 to the wiring pattern P4 are connected. When the first group and the second group are selected and the inspection target is set, a voltage for insulation inspection can be applied between the inspection targets (S 3 ). Inspecting the insulation between the objects. At this time, current is supplied to the wiring pattern P1 of the first group in a manner of applying a specific voltage between the first group and the second group. Then, when the first group and the second group When the group is set to a specific voltage, the current 値 between the first group and the second group is measured (S4). When the current 値 between the objects to be inspected is measured, the specific voltage 値 and the current 値 can be calculated and checked. The resistance 値 (S5) between the objects is compared with the reference 判定 which determines the quality of the insulation state, and the insulation state is determined (S6). Then, the insulation inspection using the wiring pattern P1 as the inspection object is completed. When the insulation inspection of the wiring pattern p1 is completed, the wiring pattern P3 having the largest area information (S7 and S8) is selected from the wiring pattern P group other than the wiring pattern P1 via the memory means 5 1. Next, the wiring pattern P3 is used as an inspection. The object is subjected to insulation inspection and selected as the first group. At this time, the remaining wiring pattern P2 and the wiring pattern P4 are selected as the second group (S2). At this time, as shown in the above description, the first group and the second group are as shown in the above description. Is set to Detecting -20- 200839260 Between the objects to be inspected, and the wiring pattern P3 is connected to the inspection target (see Fig. 6). When the wiring pattern P3 is connected as the inspection target, the inspection target can be set. A specific voltage can be applied between the inspection targets, and the resistance 値 (S3 to S5) between the inspection targets can be calculated. When the resistance 値 between the inspection targets is calculated, the reference 値 and the resistance 比较 are compared to determine whether the insulation state is good or not (S 6 ) Then, the insulation inspection by the wiring pattern P3 is completed, and when the insulation inspection of the wiring pattern P3 is completed, the area information is selected from the wiring pattern P1 and the wiring pattern P group other than the wiring pattern P3 via the memory means 51. Maximum wiring pattern P4 (S7 and S8). Then, the wiring pattern P4 was used as an inspection object to perform an insulation inspection, and was selected as the first group. At this time, the remaining wiring pattern P2 is selected as the second group (S 2 ). At this time, as described above, the first group and the second group are set as the inspection targets, and the wiring pattern P4 is connected to the inspection target (see Fig. 7). When the wiring pattern P4 is connected so as to be inspected, the inspection target can be set. Therefore, similarly to the above description, a specific voltage can be applied between the inspection targets, and the resistance 値 (S3 to S5) between the inspection targets can be calculated. When the resistance 値 between the inspection targets is calculated, the comparison 値 and the resistance ’ ' determine whether or not the insulation state is good (S 6 ). Then, the insulation inspection using the wiring pattern P4 as the inspection target is completed. -21 - 200839260 At this time, all the insulation inspections of the wiring pattern P group are completed, and the insulation inspection of the substrate CB is completed. In addition, here, the wiring pattern (the wiring pattern selected as the first group) to be inspected is connected to the upstream side (positive side) of the power source means 2 to perform the insulation inspection. However, the inspection object may be also inspected. The wiring pattern is connected to the downstream side (negative side) of the power source means 2 to perform insulation inspection. Further, in the operation of the insulation inspection device, the area size of the wiring pattern is used as the area information. However, when the number of inspection points is used as the area information, the wiring pattern having a large number of inspection points is sequentially set to Check the wiring pattern of the object. The above is the description of the operation of the insulation inspection device of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing the structure of a substrate of an embodiment. Fig. 2 is a schematic structural view showing an embodiment of an insulation inspection device of the present invention. Fig. 3 is an inspection sequence selected by the selection means when the substrate CB shown in Fig. 2 is to be inspected. Fig. 4 is a flow chart showing the operation of the insulation inspection apparatus of the present invention. Fig. 5 is a schematic view for explaining the operation of the insulation inspection apparatus of Fig. 3. -22- 200839260 Fig. 6 is a schematic diagram for explaining the operation of the insulation inspection apparatus of Fig. 3. Fig. 7 is a schematic structural view for explaining the operation of the insulation inspection device of Fig. 3. [Main component symbol description] 1 : Insulation inspection device
2 :電源手段 3 :電壓檢測手段 4 :檢測手段 5 1 :記憶手段 52 :判定手段 5 3 :算出手段 6 :選出手段 P :配線圖案 CB :基板 -23-2 : Power supply means 3 : Voltage detection means 4 : Detection means 5 1 : Memory means 52 : Determination means 5 3 : Calculation means 6 : Selection means P : Wiring pattern CB : Substrate -23-