200819716 九、發明說明： 【發明所屬之技術領域】 本案係關於一種溫度感測電路及方法，特別是關於一種應用於 積體電路(1C)的溫度感測電路及方法。 【先前技術】 一 士類，常生活中常常運用到溫度資料，例如空調系統、冰箱及 消防為材等。用來感測溫度的元件有多種，它可能是利用電阻的變 化、電動勢的產生、顏色的改變或體積的改變等各種方式來表現溫200819716 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a temperature sensing circuit and method, and more particularly to a temperature sensing circuit and method applied to an integrated circuit (1C). [Prior Art] A class of people often uses temperature data in their daily lives, such as air-conditioning systems, refrigerators, and fire-fighting materials. There are many types of components used to sense temperature. It may be used to express temperature by various changes in resistance, generation of electromotive force, change in color, or change in volume.
Ο 度的變化，而半導體材料其導電性受溫度的影響很大，因此以半導 體材料所構成的積體電路(IC)之導電性也會受到溫度的影響，由此 可利用積體電路特性隨溫度來改變的方式以製造感溫用的積體電 路0 、 ^ 一敢賴脰笔路所使用之溫度感測器，許多採用全客戶設計，較 系見之杀構由溫度感測器、參考源電路及類比數、 三個單元域4巾，溫度«騎常是轉殊触雙j m晶體祕互補式金氧半(CMQS)製程之寄生性基底或水平式 J®taBa^(parasitic substrate or lateral bipolar transistor)^i 成，t功能主要用來產生隨溫度變化之電壓或電流， 源，1於&能縣產生與溫度無_能’考電壓或電流 電壓差&流溫麟㈣齡麵電路兩者之 器之、 i===，S3i 的面積以及消耗更多的功率。 ^此彺彺冒佔據更大 5 200819716 戍偏i二iti術皆採用全客戶方式設計’所有元件尺寸與偏屋 i皆需寺性而隨之調整或改變’每次製程—微縮或轉 重新下線驗^可git重iff 尺寸，必要時還需 缺失，因此，如何改善上述習知手段之 究，ίΓίϋί案發日狀餘上述習職術之缺失，經悉心之研 及方法γ $的精神，終創作出本案之『全數位溫度感測電路 【發明内容】 的變化，她m度再據㈣換為對應之數位值 流源，使結構及校正變得簡單，進而縮小電 路所佔用的體積，並減少功率的消耗。 數位想為：提出―種全數位溫度感測電路及方法，以 iif ’不需再採用全客戶方式設計，可節省試 數有利於大型積體電路與系統晶片整合此種全 罩ί構ϊ ’本案之全數位溫度感測電路包括—溫度脈鐘遮 早兀及-計數器；其中，溫度脈鐘遮罩訊號轉 ΐ^ϊΐ階訊號’並據以產生—脈鐘遮罩訊號，脈鐘遮罩訊號的 度Ik溫度的改變而改變；計數器根據—第—參考脈鐘 轉換脈鐘鮮訊料寬度成―對應之數位值。 拖时為I f據溫度的變化產錄鐘遮罩訊號，溫度脈鐘遮罩訊號轉 換:=括-全數位延遲單元及―互斥或閘；其中，全數位延以 ϊί收ϊί步階喊’在㈣—傳輸延遲時間後’輸出一結束步階 錢’、、、。束步階訊號的延遲時間長度隨溫度的改變而改變；互斥或 200819716 =3或_運算啟始步階訊號與結束步階訊號，據讀出脈鐘 度鐘遮罩訊躺麟寬度對應於結束步階訊號的傳輸延 單元號轉換單元之一較佳實施例中，全數位延遲 較轉施射，全數位延遲 ί，式遲早兀、一循環計數器及-脈數比較器； ^舰歧料711触啟鱗階職，雜喊生一循環 :财期隨溫度的改變而改變；循環計數器用以ΐί ί^ ί ’並產生—脈波計數值；脈數比較器預先設ί一 步階訊，用以比較脈波計數值麵設循環次數，並產生結束 位元二is:广改變而改變;循環計數器具有複數個 最衝之週期數；正反器用以檢測循環計數哭之 取同位兀的轉態，並產生結束步階訊號。 Τ歎时之 -數=線上式延遲單元包括-固定脈衝產生器及 參考jt、鐘，並r ^ 衝ΐ生!"接收啟始步階訊號與一第二 ^ + 見又固疋脈衝；數位延遲線用以延遲寬;# ^疋脈衝-延遲時間並回授至岐脈衝產生哭 衝應於該延遲時間，並隨溫度的改變而·^脈 車乂”由上34之固定脈衝產生器包括一第一正衫、又 反盗、-覓度計數器、_寬度比較器及— ^正 ^收循環脈衝’用以檢職環脈衝的上升緣1' ^ 号=用叫數*二*考脈鐘的週期數 設定，寬度數值’用以比較寬度 、又、I S清除致能訊號；或閑用以產生寬度固定脈 7 200819716 衝。 在溫度脈鐘遮罩訊號轉換單元之一入 波，震魏’並據以產生一震盡脈 ίίϊΐΐί 生—脈波計數值；脈數_預先設定- 步階訊號。 tbl邊波計餘翻設練缝’並產生結束The conductivity of the semiconductor material is greatly affected by the temperature, and therefore the conductivity of the integrated circuit (IC) composed of the semiconductor material is also affected by the temperature, thereby utilizing the characteristics of the integrated circuit. The temperature changes to the way to manufacture the integrated circuit for temperature sensing. 0, ^ One of the temperature sensors used by the daring pen, many of them adopt the design of the whole customer, and the structure is compared with the temperature sensor, reference Source circuit and analogy, three unit domain 4 towel, temperature «riding is often a parasitic base of the double-jm crystal secret complementary MOSQS process or horizontal J®taBa^ (parasitic substrate or lateral Bipolar transistor)^i, t function is mainly used to generate voltage or current with temperature change, source, 1 in & energy generation and temperature without _ can' test voltage or current voltage difference & flow temperature Lin (four) age surface The circuit of both, i ===, the area of S3i and consume more power. ^This sneak occupies a larger 5 200819716 戍 partial i iti is designed in a full customer design 'all component sizes and partial housing i need to be temples and then adjust or change 'every process - micro or re-offline Test ^ can git heavy iff size, if necessary, need to be missing, therefore, how to improve the above-mentioned conventional means, ίΓίϋ ί 发 案 日 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述 上述Created the change of the full-scale temperature sensing circuit [invention] of the present case, and then changed the data to the corresponding digital value stream source according to (4), which makes the structure and correction simple, thereby reducing the volume occupied by the circuit. Reduce power consumption. The number of thoughts is: put forward a kind of all-digital temperature sensing circuit and method, so that iif 'does not need to adopt the whole customer mode design, which can save the test number and facilitate the integration of large integrated circuit and system chip. The full-scale temperature sensing circuit of the present case includes a temperature clock and a counter-counter; wherein the temperature pulse mask is turned to a signal and is generated to generate a clock mask signal, a clock mask The degree of the signal changes with the change of the temperature of the Ik; the counter converts the pulse width of the pulse clock into a "corresponding digit value" according to the -first reference clock. When dragging, I f produces a clock mask signal according to the change of temperature, temperature pulse bell mask signal conversion: = bracket - all digit delay unit and "mutual exclusion or gate", wherein all digits are extended by ϊί收ϊί step 'At (4) - after the transmission delay time 'output one end step money', ,,. The length of the delay time of the beam step signal changes with the change of temperature; mutual exclusion or 200819716 = 3 or _ operation start step signal and end step signal, according to the read clock clock mask, the width of the signal corresponds to In a preferred embodiment of the transmission delay unit number conversion unit of the end step signal, the full digit delay is compared to the shifting, the full digit delay is ί, the formula is sooner or later, the loop counter and the pulse number comparator; 711 touches the scales, and the screams a cycle: the financial period changes with the change of temperature; the loop counter is used to ΐί ί^ ί 'and generates the pulse count value; the pulse comparator presets the step by step. It is used to compare the pulse count value and set the number of cycles, and generate the end bit two is: wide change and change; the loop counter has a plurality of cycles of the most rush; the flip flop is used to detect the cycle count crying and take the same position 兀 turn State, and generate an end step signal. The sigh-time = online delay unit includes - fixed pulse generator and reference jt, clock, and r ^ rushing! " receiving start step signal and a second ^ + see and solid pulse; The digital delay line is used to delay the width; #^疋pulse-delay time and feedback to the 岐 pulse to generate the crying impulse should be at the delay time, and with the change of temperature, the pulse 乂” is a fixed pulse generator of 34 Including a first shirt, anti-theft, - 觅 计数器 counter, _ width comparator and - ^ ^ ^ loop pulse 'for the rising edge of the guard ring pulse 1 ' ^ number = use number * two * test The number of cycles of the pulse clock is set, the width value is used to compare the width, and the IS is cleared to enable the signal; or the idle is used to generate the width of the fixed pulse 7 200819716. In the temperature pulse clock, the signal conversion unit enters the wave, the earthquake Wei's and according to the generation of a blast ίίϊΐΐί - pulse count value; pulse number _ pre-set - step signal. tbl side wave count over the practice seam 'and end
閘；其中，數位位可觸發震盪器包括—數位延遲線及-反及 間的長度隨溫度的改變遲訊號—延遲時間’延遲時 步階訊號衫準简^ ㈣步階域，於啟始 輸入端，據簡環輸出震盪脈波。“雜並回授至數位延遲線之 僂幹度ί變化產生脈鐘遮罩訊號’啟始步階訊號經過一 改增產生—結束步階訊號，傳輸延遲時間的長度隨溫 斥翅係運算啟始步階訊號與結束步 為了產生結束步階訊號，一較佳方法敘述如下：啟 數循ϊίί的週鑛溫度的改變而改變，計算魏脈衝經過 階訊號。田^ ^脈衝經過的週期數達到預設數值時，產生結束步 去π 生猶5脈衝，一較佳方法敘述如下：供應一第二參 二參二-於么用t—寬度固定脈衝，寬度固定脈衝之寬度約略為第 問^月的倍數，延遲寬度固定脈衝一延遲時間，延遲時 曰又、k而改遞迴重複產生寬度固定脈衝及延遲時間， 8 200819716 形成週期為延遲 為了產生結束挪訊號，一 時間的循環脈衝 盛脈波，震盡脈波的佳方法敘述如下:/靖產生一震 的週期數，當震盡脈度的改變而改變，計算震盪脈波經過 階訊號。 波、、、工過的週期數達到預設數值時，產生結束步 生-產^^脈波’ 一較佳方法敘述如下：啟動轉態，產 而改變，雜能第—準位一延遲時間，延遲時間隨溫度的改變 態，形成間產的生兩^^1波遞迴重複延遲時間及轉 【實施方式】 細％=nt ΐ楚本案所提出之全數位溫度感測電路及方法之詳 11，原理，下面列舉複數個實施例加以說明： Μ 弟J ’其為本案所提出之全數位溫度感測電路之電路 梦中，全數位溫度感測電路7G包括一溫度脈 ϋ- "ULI、早703及一計數器4;其中，溫度脈鐘遮罩訊號轉 ϋΐ—啟始步階訊號Sstart，並據以產生—脈鐘遮罩訊號 二罩訊，Sekms #遮罩寬度T—sk隨溫度的改變而改 =:/之L端電連接於溫度脈鐘遮罩減轉換單元 ’弟-==-第-參考脈鐘_，_轉換脈鐘遮罩 Sckms的遮罩寬度Tmask成一對應之數位值。 …睛，•，閱$二圖’其為本案所提出之溫度脈鐘遮罩訊號轉換 早兀之弟-較佳實施例之電路功能方塊圖與時序圖。在第二 溫度脈鐘料訊雜換單元3包括—全數位延遲單元31及一 或閘32 ·’其中’全數位延遲單元31接收啟始步階訊號如姐，在 經過-傳輸延遲時間後’輸出-結束步階訊號s卿，傳輸延 間的長度隨溫度的改變而改變；互斥或閘32之第—輸人端電 於全數位延遲單元31 ’第-輸人端接收啟始步卩皆訊號如奶，以互 斥或關係運算啟始步階訊號Sstart與結束步階訊號如叩，輸 I里遮罩§fl號Sckms ’脈鐘遮罩訊號Sckms的遮罩寬度Tmask對應 9 200819716 而全數位延遲單元31在較簡單的情形下 如欲全數位延遲單元31係為數位延遲線祀時， 則需使用為數=之^遮罩寬度T_k， 犯；因此進一步提出全婁 =仏组3f=長4之數t延遲線 式大幅擴展其延遲時間遲據 遮罩訊號Sckms。 虿足约‘罩見度Tmask的脈鐘 單元ί^ί以:之之溫度脈鐘遮罩訊號轉換 -脈數比較器314 ;其中，數位循*衣卞數為313及 訊號Sstart，並據以產生一彳^^ 12接收啟始步階 溫度的改變而改變；循環計1=；^脈衝SCPS的週期隨 illr Scps ? 5 設=:===== 佳實施:之電 s福產生循 式延遲單元312接收啟始步階訊號Gate; wherein, the digits can trigger the oscillator to include - the digital delay line and - the length of the reverse direction with the temperature change delay - delay time 'delay time step signal shirt accurate ^ (four) step domain, at the start input At the end, according to the simple ring output shock pulse. “The hybrid 回 回 至 至 ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' The first step signal and the end step are used to generate the end step signal. A preferred method is described as follows: the number of cycles is changed according to the change of the temperature of the weekly ore, and the number of cycles of the pulse passing through the field is calculated. When the preset value is used, the end step is generated to π 5 pulses. A preferred method is described as follows: Supply a second parameter two-parameter two--use t-width fixed pulse, the width of the fixed-width pulse is about the first question ^ Multiplier of the month, delay width fixed pulse-delay time, delay time 曰 again, k and retransmission back to repetitively generate width fixed pulse and delay time, 8 200819716 Forming period is delay in order to generate end of the signal, one time of the pulse pulse Wave, the best way to recover the pulse wave is as follows: /Jing produces the number of cycles of a shock, changes when the shock pulse changes, and calculates the oscillating pulse wave through the order signal. When the number of cycles has reached the preset value, the end step-produced ^^ pulse wave is generated. A preferred method is described as follows: start transition, change in production, change in the first level of the energy - delay time, delay time with temperature The change state, the formation of the production of two ^ ^ 1 wave recursive repeat delay time and turn [implementation] fine % = nt ΐ 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本A number of embodiments are described to illustrate: Μ Brother J', in the circuit dream of the full digital temperature sensing circuit proposed by the present invention, the full digital temperature sensing circuit 7G includes a temperature pulse - "ULI, early 703 and one Counter 4; wherein, the temperature clock mask signal is switched to - start step signal Sstart, and according to the generation - pulse clock mask signal two cover, Sekms # mask width T - sk change with temperature = : / L terminal is electrically connected to the temperature pulse bell mask minus conversion unit 'di--=---- reference clock _, _ conversion pulse mask Sckms mask width Tmask into a corresponding digit value. •, read $2's for the temperature pulse clock mask signal proposed by the case The circuit function block diagram and timing diagram of the preferred embodiment. The second temperature clock signal exchange unit 3 includes an all-digital delay unit 31 and an OR gate 32 · 'where the full-digit delay unit 31 receiving the start step signal such as the sister, after the - transmission delay time 'output-end step signal s Qing, the length of the transmission delay changes with the change of temperature; mutual exclusion or gate 32 - the input end The all-digital delay unit 31 'the first-input terminal receives the start-up steps, such as the milk, and uses the mutual exclusion or relational operation to start the step signal Sstart and the end step signal such as 叩, the input I mask §fl No. Sckms 'The mask width of the clock mask signal Sckms Tmask corresponds to 9 200819716 and the full digit delay unit 31 in the simpler case if the full digit delay unit 31 is a digital delay line ,, then the number = ^ Mask width T_k, guilty; therefore further proposed full 娄 = 仏 group 3f = length 4 number t delay line type greatly expands its delay time delay mask signal Sckms. The pulse clock unit of the 'mask' Tmask is 温度 之 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 温度 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; Generate a 彳 ^ ^ 12 to receive the change of the starting step temperature and change; cycle meter 1 =; ^ pulse SCPS cycle with illr Scps ? 5 set =: ===== Good implementation: the electric sfu production cycle Delay unit 312 receives the start step signal
Sstart亚據以產生-舰脈衝Seps，循環脈 的改•變而改變；循環計數器313電連接於數 ^ 3i2，具有複數個餘，肋計數循環脈衝 定為ί準位，脈鐘輸入端CLK電連接^ ίί結^訊“環計數器313之最高位元轉態時， 接著介紹產生循環脈衝SCps之電路，請繼續參閱第五圖，其 10 200819716 ，本案所提出之數位循環式延遲單元 二;式=單元312包括-固定脈=== 43=，,，f脈衝產生器3122之第—輸人端接收啟 弟二輸入端接收一第二參考脈鐘Sdk2，並據以 產生哭SWldP ;触延觀3121電連接棚定脈衝 屋生态3122,輸出端電連接於固定脈衝產生器 遲ίί?定脈衝Sw•一延遲時間並回授至固定二 生扣3122，使再z人觸發產生寬度固定脈衝Swidp並進行延遲 循環叫的週期對應於延遲時間，並The Sstart is changed according to the generation of the ship pulse Seps, and the cycle pulse is changed. The cycle counter 313 is electrically connected to the number ^3i2, and has a plurality of remainders. The rib count cycle pulse is set to the ί level, and the pulse clock input terminal CLK is charged. When the highest bit of the ring counter 313 is turned, the circuit for generating the cyclic pulse SCps is introduced. Please refer to the fifth figure, which is 10 200819716, the digital cyclic delay unit 2 proposed in this case; = unit 312 includes - fixed pulse === 43 =,,, the first input terminal of the f pulse generator 3122 receives the second reference clock Sdk2, and generates a cry SWldP; View 3121 electrical connection shed fixed pulse house ecology 3122, the output is electrically connected to the fixed pulse generator, the delay pulse Sw• a delay time and feedback to the fixed two-buckle 3122, so that the z-person triggers to generate the width fixed pulse Swidp And the period of the delayed loop call corresponds to the delay time, and
接著介紹產生寬度固定脈衝Swidp之，請繼續參閱第六 圖’其為本案所提$之@定脈魅生力能桃圖。在第六 圖中，固定脈衝產生器3122包括一第一正反器31221、一第二正 反器31222、一或閘31223、一寬度計數器31224及一寬度比較器 31225 ;其中，第一正反器31221之資料輸入端〇設定為高準位， 脈鐘輸入端CLK接收循環脈衝Scps，用以檢測循環脈衝Scps的上 升緣；第二正反器31222之資料輸入端D設定為高準位，脈鐘輸 入端CLK接收啟始步階訊號Sstart，用以檢測啟始步階訊號Sstart 的上升緣，或閘31223之第一輸入端電連接於第一正反器31221， 第二輸入端電連接於第二正反器31222，輸出端電連接於寬度計數 态31224之清除輸入端CLR，當第一正反器31221接收循環脈衝 Scps的上升緣或第二正反器31222接收啟始步階訊號Sstart的上升 緣，使或閘31223輸出轉態為高準位，解除寬度計數器31224之清 除輸入端CLR之清除功能，讓寬度計數器31224開始計數；寬度 計數器31224之脈鐘輸入端CLK接收第二參考脈鐘Sclk2,用以計 數第二參考脈鐘Sclk2的週期數，並產生一寬度計數值；寬度比較 器31225之第一輸入端P電連接於寬度計數器31224，第二輸入端 Q設定一預設寬度數值Μ，輸出端同時電連接於第一正反器31221 之清除輸入端CLR、第二正反器31222之清除輸入端CLR與寬度 計數器31224之致能輸入端ΕΝ，用以比較寬度計數值與預設寬度 200819716 止寬度計數器Gi2，1 S二正反器31222，並停 以清除寬度計數器助4之寬度，、、;ϋ·^ 一下降緣’ Swidp的產生，JL寬产约略Α亚兀成一次見度固定脈衝 設寬度數值）。 略&二_脈鐘Sdk2週期_倍(預 單元ΐ^'ΐί^ϊ七圖’其為本案所提出之溫度脈鐘遮罩訊押換 S Γί細狀f路辦_®。在第七财全Ϊΐί 括一數位可觸發震盈器316、—循環計數哭313月-Next, we will introduce the Swidp with a fixed width. Please continue to refer to the sixth figure, which is the $ @ 魅 魅 魅 魅 魅 魅. In the sixth figure, the fixed pulse generator 3122 includes a first flip-flop 31221, a second flip-flop 31222, a gate 31223, a width counter 31224, and a width comparator 31225; wherein, the first positive and negative The data input terminal 〇 of the device 31221 is set to a high level, and the clock input terminal CLK receives the cyclic pulse Scps for detecting the rising edge of the cyclic pulse Scps; the data input terminal D of the second flip-flop 31222 is set to a high level. The clock input terminal CLK receives the start step signal Sstart for detecting the rising edge of the start step signal Sstart, or the first input end of the gate 31223 is electrically connected to the first flip-flop 31221, and the second input is electrically connected. In the second flip-flop 31222, the output terminal is electrically connected to the clear input terminal CLR of the width count state 31224, when the first flip-flop 31221 receives the rising edge of the cyclic pulse Scps or the second flip-flop 31222 receives the start step signal. The rising edge of Sstart causes the output of the gate 31223 to be turned into a high level, and the clear function of the clear input terminal CLR of the width counter 31224 is released, so that the width counter 31224 starts counting; the pulse clock input terminal CLK of the width counter 31224 receives the first The reference clock clock Sclk2 is used to count the number of cycles of the second reference clock clock Sclk2 and generate a width count value; the first input terminal P of the width comparator 31225 is electrically connected to the width counter 31224, and the second input terminal Q is set to a preset The width value Μ is set, and the output terminal is electrically connected to the clear input terminal CLR of the first flip-flop 31221, the clear input terminal CLR of the second flip-flop 31222, and the enable input terminal 宽度 of the width counter 31224 for comparing the width meter. The value and the preset width 200819716 stop the width counter Gi2, 1 S two flip-flops 31222, and stop to clear the width counter to help the width of 4,,; ϋ·^ a falling edge 'Swidp generation, JL wide production about Α 亚兀 一次 一次 一次 固定 固定 固定 固定 fixed pulse set width value). Slightly & 2 _ pulse clock Sdk2 cycle _ times (pre-unit ΐ ^ 'ΐ ί ^ ϊ 图 ' 其 其 其 其 其 其 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 为本 温度 细 细 细 细 细 细 细 细 细 细 细 细 细 细 细 细 细财全Ϊΐ Include a digit to trigger the shock 316, - cycle count cry 313 months -
Sstan, 的改變而改變，·循環盧脈波S⑽的週期隨溫度 用以計數震盪脈波S〇U週I可f f震盪器训， 較器314第-輸入端P電連接 生。脈波计數值；脈數比 定一般猶環次數，用以第："輸入端Q設 計數ΐί=，-致時，產生結束步當脈波 為本案所提出之數閱第八圖’其 3162;其中，數位证、严綠^括數位延遲線3161及一反及閘 延遲時間的長度隨溫度的改變而^遲延遲時間， 電連接於數位延遲線3⑹，第 1 62之弟一輸入端 輸出端電連接於數位延遲線3161^ S_， a'經過延遲時間後再次轉態並 湯' 61之輸 晨碰波_的週期為延遲時間的兩倍據輸出辰盟脈波S〇SC， 之體積内建位之元件，有利於縮小溫度感測器 線、計數Ϊ 使用標準元件如數位延遲 標準化與触化的触。、 更於不同製關轉換’達成 12 200819716 目的所設^ m全數位溫度麵電路及方細實能達到發明 熟悉本案技蓺之I上所述者僅為本案之較佳實施例’舉凡 應涵蓋於以;的巾請補it案精神所作之等效㈣或變化，皆 本案得藉打顺式及詳細制，俾得更深人之了解： 【圖式簡單說明】 H· ti所提出之全數位溫度感測電路之電路功能方塊圖· 電料訊_解元之第—較佳實Sstan, changes and changes, · cycle Lu pulse S (10) cycle with temperature used to count the shock pulse S〇U week I can f f oscillator training, comparator 314 first-input P is electrically connected. Pulse wave count value; pulse number ratio is generally the number of times of the loop, used for: " input Q design number ΐ ί =, - when the end step is generated, the pulse wave is the eighth figure in the case 3162; wherein, the digital certificate, the strict green digital delay line 3161, and the length of a reverse gate delay time change with temperature, delay delay time, electrically connected to the digital delay line 3 (6), the first input of the first 62 The output terminal is electrically connected to the digital delay line 3161^S_, a' after the delay time and then transitions again, and the period of the '61 morning collision wave_ is twentieth of the delay time according to the output of the ancestor pulse S〇SC, The built-in components of the volume help to reduce the temperature sensor line, count Ϊ using standard components such as digital delay normalization and touch. And more than the different types of control conversions to achieve 12 200819716 purpose set the full digital temperature surface circuit and the square can achieve the invention is familiar with the technology of the case I is only the preferred embodiment of the case 'to cover The equivalent (4) or change made by the spirit of the towel in the case of the case, the case can be borrowed from the cis-style and the detailed system, and the deeper understanding is obtained: [Simple description of the schema] All the digits proposed by H·ti Circuit function block diagram of temperature sensing circuit · Electricity message _ solution of the first element - better
;電==溫度脈_訊_單元之第二較佳實 第四圖：本案所提出之溫度脈鐘—斤一 施例之電路功能方塊圖； σ〜軺換早兀之乐二較佳實 U所提出之數位循環式延遲單元 弟/、圖·本案所提出之固定 塊圖’ 第七圖··本案所提出之溫度脈鐘遮罩;^$力，方塊圖； ，之電路功能方塊圖；及又㈣罩如虎轉換早破第四較佳實 第八圖：杨所提出之數位可觸發震細之電路魏方塊圖。 【主要元件符號說明】 70 ··全數位溫度感測電路 3:溫度脈鐘遮罩訊號轉換單元 4 :計數器 31 ·全數位延遲單元 311、3121、3161 :數位延遲線 32 ·互斥或閘 312 :數位循環式延遲單元 3122 :固定脈衝產生器 31221 :第一正反器 13 200819716 31222 :第二正反器 31223 :或閘 31224 :寬度計數器 31225 :寬度比較器 313 :循環計數器 314 :脈數比較器 315 :正反器 316 :數位可觸發震盪器 3162 ··反及閘The second best picture of the unit is the temperature pulse clock proposed in this case. The block diagram of the circuit function of the example of the case is σ~轺The digital cyclic delay unit proposed by U/, the fixed block diagram proposed in the present case, the seventh figure, the temperature clock mask proposed in this case; ^, force, block diagram; And (4) cover, such as the tiger conversion prematurely break the fourth best real eighth picture: Yang proposed by the digital can trigger the shock of the circuit Wei block diagram. [Main component symbol description] 70 · Full digital temperature sensing circuit 3: Temperature pulse mask signal conversion unit 4: Counter 31 · Full digital delay unit 311, 3121, 3161: Digital delay line 32 · Mutual exclusion or gate 312 : Digital cyclic delay unit 3122 : fixed pulse generator 31221 : first flip-flop 13 200819716 31222 : second flip-flop 31223 : or gate 31224 : width counter 31225 : width comparator 313 : loop counter 314 : pulse number comparison 315: flip-flop 316: digitally triggers the oscillator 3162 ··anti-gate
Sstart :啟始步階訊號 ( Sckms :脈鐘遮罩訊號Sstart: Start step signal (Sckms: pulse bell mask signal)
Tmask :遮罩寬度 Sclkl :第一參考脈鐘 Sstop :結束步階訊號 Scps :循環脈衝 Sclk2 :第二參考脈鐘 Swidp :寬度固定脈衝 Sclr :清除致能訊號 Sosc :震盪脈波Tmask : mask width Sclkl : first reference clock Sstop : end step signal Scps : cyclic pulse Sclk2 : second reference pulse Swidp : width fixed pulse Sclr : clear enable signal Sosc : shock pulse