200818291 九、發明說明 【發明所屬之技術領域】 本發明關於基板處理方法及基板處理裝置， 對形成有熱氧化膜及含有雜質之氧化膜的基板進 基板處理方法。 【先前技術】 具備經由熱氧化處理而形成之熱氧化膜，以 CVD處理等而形成之含有雜質之氧化膜、例如 Boron Phosphorous Silicate Glass)膜的半導體裝 圓（基板）爲習知者。BPSG膜，係作爲在多晶形 該多晶矽膜之一部分露出而被形成，於多晶矽膜創 爲硬質遮罩之功能。熱氧化膜則構成閘極氧化膜。 此種基板，在多晶矽膜蝕刻後並不除（蝕刻） 膜，而是被要求選擇性除去BPSG膜。 蝕刻氧化膜時，通常使用CF系氣體電漿，隹 氣體電漿不僅蝕刻BPSG膜，亦蝕刻熱氧化膜，g 確保BPSG膜對於熱氧化膜之選擇比，無法選擇 BPSG 膜。 針對此而有提案不使HF氣體或HF氣體與Η 之混合氣體電漿化而使用的蝕刻方法（參照專利$ 。該方法可藉由HF氣體與Η20之結合產生之氟酸 去含有雜質之氧化膜，結果可以選擇性蝕刻B P S G 專利文獻1 :特開平〇 6 — 1 8 1 1 8 8號公報 別關於 處理的 及經由 BPSG ( :置用晶 7膜上使 3!刻時作 熱氧化 ‘ CF系 丨此難以 性鈾刻 2〇氣體 :獻1 ) 〖優先除 膜。 -4- 200818291 【發明內容】 (發明所欲解決之課題） 但是，使用HF氣體或HF氣體與H20氣體之 體蝕刻BPSG膜時，Si02與氟酸之反應會產生殘留 殘留物會附著於半導體裝置用晶圓之表面。該殘留 起由該晶圓製造而成之半導體裝之短路等不良情況 本發明目的在於提供基板處理方法及基板處理 其可以容易除去氟酸引起之殘留物。 (用以解決課題的手段） 爲達成上述目的，申請專利範圍第1項之基板 法，係對基板進行處理者，該基板具有：藉由熱氧 而形成之第1氧化膜，及含有雜質之第2氧化膜； 爲具備：HF氣體供給步驟，用於對上述基板供給 體；及洗淨氣體供給步驟，用於對被供給上述HF 上述基板供給至少含有NH3氣體的洗淨氣體。 申請專利範圍第2項之基板處理方法，係於申 範圍第1項之基板處理方法中，於上述HF氣體供 不供給H20氣體。 申請專利範圍第3項之基板處理方法，係於申 範圍第1或2項之基板處理方法中，上述基板具有 於上述第1氧化膜上、而且被上述第2氧化膜覆蓋 層，上述第2氧化膜之一部分露出上述含矽層，上 混合氣 物，該 物會引 〇 裝置， 處理方 化處理 其特徵 HF氣 氣體之 請專利 給步驟 請專利 :形成 的含矽 述含矽 -5 - 200818291 層，係於上述HF氣體供給步驟之前被蝕刻。 爲達成上述目的，申請專利範圍第4項之基板 法，係對基板進行處理者，該基板具有：藉由熱氧 而形成之第1氧化膜，及含有雜質之第2氧化膜； 爲具備：HF氣體供給步驟，用於對上述基板供給 體；及基板加熱步驟，用於加熱被供給上述HF氣 述基板。 申請專利範圍第5項之基板處理方法，係於申 範圍第4項之基板處理方法中，於上述基板加熱步 於N2氣體環境下加熱上述基板。 申請專利範圍第6項之基板處理方法，係於申 範圍第4或5項之基板處理方法中，於上述基板加 ，係加熱上述基板至1 5 0 °C以上。 爲達成上述目的，申請專利範圍第7項之基板 置，係對基板進行處理者，該基板具有：藉由熱氧 而形成之第1氧化膜，及含有雜質之第2氧化膜； 爲具備：HF氣體供給裝置，用於對上述基板供給 體；及洗淨氣體供給裝置，用於對被供給上述HF 上述基板供給至少含有NH3氣體的洗淨氣體。 爲達成上述目的，申請專利範圍第8項之基板 置，係對基板進行處理者，該基板具有：藉由熱氧 而形成之第1氧化膜，及含有雜質之第2氧化膜； 爲具備：HF氣體供給裝置，用於對上述基板供給 體；及基板加熱裝置，用於加熱被供給上述HF氣 處理方 化處理 其特徵 HF氣 體之上 請專利 驟，係 請專利 熱步驟 處理裝 化處理 其特徵 HF氣 氣體之 處理裝 化處理 其特徵 HF氣 體之上 -6- 200818291 述基板。 【實施方式】 參照圖面說明本發明實施形態。 首先說明本發明第1實施形態之具備基板處理裝置的 基板處理系統。 圖1爲本實施形態之具備基板處理裝置的基板處理系 統之槪略構成平面圖。 於圖1，基板處理系統1 0具備：第1製程部1 1，用 於對半導體裝置用晶圓（以下單稱爲「晶圓」）W (基板 )進行電漿處理；第2製程部1 2 (基板處理裝置），和 第1製程部1 1平行被配置，用於對第1製程部1 1進行電 漿處理後之晶圓W進行後述之特定處理；及作爲矩形狀 共通搬送室的載入（Loader )模組13，分別連接於第1 製程部1 1及第2製程部1 2。 於載入模組1 3，除上述第1製程部1 1與第2製程部 12 之外，另外連接有：3 個 FOUP ( Front Opening Unified Pod，晶圓搬運盒）載置台15，其分別載置收容 25片晶圓W之作爲容器的FOUP ( Front Opening Unified Pod，晶圓搬運盒）14;定位器16，用於對由FOUP14被 搬出之晶圓W之位置進行前置定位；及第1、第2IMS ( Integrated Metrology System、Therma-Wave, Inc. ) 17、 1 8，用於計測晶圓W之表面狀態。 第1製程部1 1與第2製程部12，係連接於沿著載入 200818291 模組1 3之長邊方向之側壁之同時，挾持載入模組1 3而和 3個FOUP載置台15呈對向配置，定位器16被配置於載 入模組13之長邊方向之相關之一端，第1IMS17被配置 於載入模組13之長邊方向之相關之另一端，第2IMS 18 係和3個FOUP載置台15並列配置。 載入模組1 3具有：配置於內部，搬送晶圓W的標量 (scalar )型雙臂式之搬送臂機構19 ;及以和各FOUP載 置台1 5對應的方式，作爲配置於側壁之晶圓W之投入口 的3個載入口（ load port ) 20。搬送臂機構19，係由 FOUP載置台15載置之F0UP14將晶圓W經由載入口 20 取出，使該取出之晶圓W對第1製程部1 1、第2製程部 12、定位器16、第1IMS17或第2IMS18進行搬出入。 第1IMS17爲光學系監控器，具有：載置台21，用於 載置被搬入之晶圓W;及光學感測器22，用於定向該載 置台21上載置之晶圓W ;可測定晶圓W之表面形狀、例 如多晶矽膜之膜厚及配線溝或閘極等之 CD ( Critical Dimension)値。第 2IMS18亦爲光學系監控器，和第 1 IMS 17同樣具有：載置台23 ;及光學感測器24。 第1製程部Π具有：第1製程模組2 5，用於對晶圓 W進行電漿處理；及第1真空隔絕模組27，內藏有連結 型單一夾頭（Single Pick)型之第1搬送臂部26用於對 第1製程模組2 5進彳了晶圓W之收付。 第1製程模組25，具有圓筒狀之處理室容器（腔室 )，及配置於該腔室內的上部電極與下部電極（均未圖示 -8- 200818291 )，該上部電極與下部電極間之距離設爲對晶圓W進行 作爲電漿處理的蝕刻處理之適當間隔。又，下部電極於其 頂部具有ESC28可藉由庫侖力等挾持晶圓W。 於第1製程模組25，係於腔室內部導入含CF系氣體 之處理氣體，於上部電極與下部電極間產生電場使導入之 處理氣體電漿化，而產生離子與自由基，藉由該離子與自 由基對晶圓W進行蝕刻處理。 於第1製程部1 1，載入模組1 3之內部壓力被維持於 大氣壓，第1製程模組25之內部壓力被維持於真空。因 此，第1真空隔絕模組（1 0 a d 1 〇 c k u n i t ) 2 7，係於其和第 1製程模組25之連結部具備真空閘閥29之同時，於其和 載入模組1 3之連結部具備大氣閘閥3 0，依此而構成爲可 調整其之內部壓力的真空預備搬送室。 於第1真空隔絕模組2 7內部，於大略中央部設置第 1搬送臂部26，在較第1搬送臂部26更靠近第1製程模 組2 5側設置第1緩衝部3 1，在較第1搬送臂部2 6更靠 近載入模組13側設置第2緩衝部3 2。第1緩衝部3 1與 第2緩衝部32被配置於支撐部（pick) 33移動之軌道上 ，該支撐部3 3用於支撐配置於第1搬送臂部26前端部之 晶圓W，使進行電漿處理後之晶圓W暫時待避於支撐部 3 3之軌道上方，如此則，未進行餓刻處理之晶圓 w與進 行蝕刻處理完畢之晶圓W之於第1製程模組2 5之圓滑替 換成爲可能。 第2製程部1 2具有：第2製程模組34 ,用於對晶圓 -9- 200818291 w進行後述之特定處理；及第2真空隔絕模組3 7，內藏 有連結型單一夾頭型之第2搬送臂部36，其介由真空閘 閥3 5連接於第2製程模組3 4，而且可對第2製程模組3 4 收/付受晶圓W。 圖2爲圖1之第2製程模組之斷面圖，圖2(A)爲 圖1之沿I一 I線之斷面圖，圖2(B)爲圖2(A)之A 部分之擴大圖。 於圖2 ( A)，第2製程模組3 4具有：圓筒狀之處理 室容器（腔室）3 8 ;配置於該腔室3 8內的晶圓W之載置 台39;配置於腔室38之上方、和載置台39呈對向的噴 氣頭40 ;對腔室38內之氣體等進行排氣的TMP ( Turbo Molecular Pump) 41 ;及配置於腔室38與TMP41之間， 控制腔室38內之壓力的作爲可變式蝶型閥之 APC ( Adaptive Pressure Control)閥 42。 . 噴氣頭40由圓板狀之下層氣體供給部43 (洗淨氣體 供給裝置）及圓板狀之上層氣體供給部44 ( HF氣體供給 裝置）構成，於下層氣體供給部43重疊上層氣體供給部 44。下層氣體供給部43及上層氣體供給部44分別具有第 1緩衝室45及第2緩衝室46。第1緩衝室45及第2緩衝 室46分別介由氣體通氣孔47、48連通於腔室38內。 噴氣頭40之下層氣體供給部43之第1緩衝室45， 係連接於NH3 (氨）氣體供給系（未圖示），該NH3 (氨 )氣體供給系對第1緩衝室45供給NH3氣體（洗淨氣體 )。該被供給之NH3氣體介由氣體通氣孔47被供給至腔 -10- 200818291 室38內。 噴氣頭40之上層氣體供給部44之第2緩衝室46 係連接於HF氣體供給系，該HF氣體供給系對第2緩 室46供給HF氣體。該被供給之HF氣體介由氣體通氣 48被供給至腔室38內。噴氣頭40之上層氣體供給部 內藏有加熱器（未圖示）、例如加熱元件，該加熱元件 制第2緩衝室46內之HF氣體之溫度。 又，如圖2(B)所示，於噴氣頭40，其往氣體通 孔47、48中之腔室38內之開口部形成爲末端擴大狀。 此則，可使NH3氣體或HF氣體有效擴散至腔室38內 又，通氣孔47、48之斷面呈現蜂腰形狀，可防止腔室 內產生之沈積物往通氣孔4 7、4 8、亦即往第1緩衝室 或第2緩衝室46之逆流。 又，於第2製程模組3 4，腔室3 8之側壁內藏有加 器（未圖示）、例如加熱元件，可將腔室3 8內之環境 度設爲高於常溫，可促進後述之藉由氟酸除去BPSG膜 。又，側壁內之加熱元件，藉由加熱側壁可防止藉由氟 除去BPS G膜63時產生之殘留物附著於側壁內側。 載置台3 9具有冷媒室（未圖示）作爲調溫機構。 該冷媒室被供給特定溫度之冷媒、例如冷卻水或全氟聚 油液（Galden)，藉由該冷媒之溫度而控制載置台39 上面載置之晶圓W之溫度。 回至圖1，第2真空隔絕模組3 7具有框體狀之搬 室（腔室）49。載入模組1 3之內部壓力被維持於大氣 衝 孔 44 控 氣 依 〇 38 4 5 熱 溫 6 3 酸 於 醚 之 送 壓 -11 - 200818291 ’第2製程模組3 4之內部壓力被維持於大氣壓以下、例 如真空。因此，第2真空隔絕模組3 7，係於其和第2製 程模組3 4之連結部具備真空閘閥3 5之同時，於其和載入 模組1 3之連結部具備大氣門閥5 5，依此而構成爲可調整 其之內部壓力的真空預備搬送室。 又，基板處理系統1 0具備：配置於載入模組1 3之長 邊方向之一端的操作面板56。操作面板56具有例如LCD (Liquid Crystal Display)構成之顯示部，該顯示部顯示 基板處理系統1 0之各構成要素之動作狀況。 但是，於圖3 ( A )所示矽基材60上，在藉由熱氧化 處理形成之S i Ο 2構成之熱氧化膜6 1 (第1氧化膜）、多 晶矽膜6 (含矽層）、及藉由CVD處理等形成之BPSG膜 63 (第2氧化膜）被積層而成的晶圓W，欲選擇性蝕刻 BPSG膜63時，如上述說明，不使HF氣體或HF氣體與 H20氣體之混合氣體電漿化。另外，BPSG膜63，係於多 晶矽膜6 2之蝕刻後使熱氧化膜6 1之一部分露出。 本發明人針對提升BPSG膜63對熱氧化膜61之選擇 比的各種實驗進行之結果發現，在幾乎不存在H20環境 下，不供給H20氣體而對晶圓w僅供給HF氣體時，如 圖4之分布圖所示，熱氧化膜61之鈾刻速率停留於5nm /分，BPSG膜63之蝕刻速率可提升至500 nm/分。亦即 ，發現BPSG膜63對熱氧化膜61之選擇比可提升至1000 。另外，本發明人於上述條件下TEOS膜發現之鈾刻速率 可提升至20nm /分。 -12- 200818291 本發明人針對上述高選擇比實現的機制進行硏究而推 斷出以下之假設說明。 HF氣體與H20結合成爲氟酸’該氟酸侵入而除去氧 化膜。在幾乎不存在H20環境下，HF氣體欲成爲氟酸時 ，需要和氧化膜含有之水（H2〇 )分子結合。 BPSG膜63藉由CVD處理等之蒸鍍而形成之故，膜 之構造爲疏構造，容易吸附水分子。因此於BpSG膜63 含有某一程度之水分子。到達BPSG膜63之HF氣體與該 水分子結合而成爲氟酸，該氟酸侵入BPSG膜63。 另外，熱氧化膜61係於800 °C〜9 00°C環境下之熱氧 化處理被形成，膜形成時不含水分子，膜之構造爲密構造 ，不容易吸附水分子。因此於熱氧化膜61幾乎不含水分 子，因爲不含水分子，即使被供給之HF氣體到達熱氧化 膜6 1亦不會成爲氟酸，結果，熱氧化膜6 1不被侵入。 如此則，在幾乎不存在H20環境下，不供給H20氣 體而對晶圓W僅供給HF氣體時，BPSG膜63對熱氧化膜 61之選擇比可提升至1 000。 但是，藉由氟酸除去BPSG膜63時，BPSG膜63中 之Si02與氟酸（HF )會引起以下之式所示之化學反應：[Technical Field] The present invention relates to a substrate processing method and a substrate processing apparatus, and a substrate processing method for a substrate on which a thermal oxide film and an oxide film containing impurities are formed. [Prior Art] A semiconductor package (substrate) having a thermal oxide film formed by thermal oxidation treatment and an oxide film containing impurities, such as a Boron Phosphorous Silicate Glass film formed by CVD treatment or the like, is known. The BPSG film is formed by exposing a part of the polycrystalline germanium film in a polycrystalline form, and functions as a hard mask in the polycrystalline germanium film. The thermal oxide film constitutes a gate oxide film. Such a substrate does not remove (etch) the film after the polysilicon film is etched, but is required to selectively remove the BPSG film. When the oxide film is etched, a CF-based gas plasma is usually used, and the 气体 gas plasma not only etches the BPSG film but also etches the thermal oxide film, and ensures the selection ratio of the BPSG film to the thermal oxide film, and the BPSG film cannot be selected. In response to this, there is an etching method which does not use a plasma of HF gas or a mixed gas of HF gas and krypton (see Patent US). This method can be oxidized by the fluoric acid produced by the combination of HF gas and hydrazine 20 to contain impurities. As a result, the BPSG can be selectively etched. Patent Document 1: Unexamined Patent Publication No. 6 - 1 8 1 1 8 8 Regarding the treatment and via BPSG (: using a crystal 7 film to thermally oxidize 3! This is a difficult uranium engraving gas: 1) 〖Priority of film removal. -4- 200818291 [Explanation] The problem to be solved by the invention However, the body is etched with HF gas or HF gas and H20 gas. In the case of a film, the reaction between SiO 2 and fluoric acid causes residual residue to adhere to the surface of the wafer for a semiconductor device. This residue causes defects such as short-circuiting of the semiconductor package fabricated from the wafer. The method and the substrate treatment can easily remove the residue caused by the hydrofluoric acid. (Means for Solving the Problem) In order to achieve the above object, the substrate method of the first aspect of the patent application is for processing a substrate. The substrate includes: a first oxide film formed by thermal oxygen and a second oxide film containing impurities; and an HF gas supply step for supplying the substrate supply body; and a cleaning gas supply step for The HF gas is supplied with the cleaning gas containing at least the NH 3 gas. The substrate processing method of the second aspect of the invention is the substrate processing method according to the first aspect of the invention, wherein the HF gas is supplied without supplying the H20 gas. The substrate processing method according to the first or second aspect of the invention, wherein the substrate has the first oxide film and the second oxide film layer, the second One part of the oxide film exposes the above-mentioned ruthenium-containing layer, the upper gas mixture, and the material will be introduced into the sputum device, and the HF gas gas is treated by the treatment. The patent is given to the patent: the formed description contains 矽-5 - 200818291 The layer is etched before the HF gas supply step. To achieve the above object, the substrate method of claim 4 is for processing a substrate, the substrate having: a first oxide film formed by hot oxygen and a second oxide film containing impurities; and an HF gas supply step for supplying the substrate supply body; and a substrate heating step for heating the supplied HF gas The substrate processing method of the fifth aspect of the invention is the substrate processing method according to the fourth aspect of the invention, wherein the substrate is heated in the substrate heating step in an N 2 gas atmosphere. The method of the substrate processing method according to Item 4 or 5, wherein the substrate is heated to 150 ° C or higher on the substrate. To achieve the above object, the substrate of claim 7 is applied. The substrate is processed by: a first oxide film formed by thermal oxygen and a second oxide film containing impurities; and an HF gas supply device for supplying the substrate; and cleaning The gas supply device supplies a cleaning gas containing at least NH 3 gas to the substrate to which the HF is supplied. In order to achieve the above object, the substrate of claim 8 is processed by a substrate having a first oxide film formed by thermal oxygen and a second oxide film containing impurities; An HF gas supply device for processing the substrate supply body; and a substrate heating device for heating the HF gas to be supplied to the HF gas treatment process, and applying the patent thermal process to the assembly process The HF gas is processed and processed to characterize the HF gas above the substrate -6-200818291. [Embodiment] An embodiment of the present invention will be described with reference to the drawings. First, a substrate processing system including a substrate processing apparatus according to a first embodiment of the present invention will be described. Fig. 1 is a schematic plan view showing a substrate processing system including a substrate processing apparatus according to the embodiment. In FIG. 1, the substrate processing system 10 includes a first processing unit 1 1 for performing plasma processing on a semiconductor device wafer (hereinafter simply referred to as "wafer") W (substrate); and a second processing unit 1 2 (substrate processing apparatus) is disposed in parallel with the first processing unit 1 1 , and performs specific processing to be described later for the wafer W after the plasma processing of the first processing unit 1 1 ; and a rectangular common transfer chamber The loader module 13 is connected to the first process unit 1 1 and the second process unit 12, respectively. In the loading module 13 , in addition to the first processing unit 1 1 and the second processing unit 12 , three FOUP (Front Opening Unified Pod) mounting stations 15 are separately connected. a FOUP (Front Opening Unified Pod) 14 as a container for accommodating 25 wafers W; a positioner 16 for prepositioning the position of the wafer W carried out by the FOUP 14; The second IMS (Integrated Metrology System, Therma-Wave, Inc.) 17, 18 is used to measure the surface state of the wafer W. The first processing unit 1 1 and the second processing unit 12 are connected to the side wall along the longitudinal direction of the module 18 3 loaded in 200818291, and are held by the loading module 13 and the three FOUP mounting tables 15 In the opposite configuration, the locator 16 is disposed at one of the relevant ends of the long-side direction of the loading module 13, and the first IMS 17 is disposed at the other end of the long-side direction of the loading module 13, the second IMS 18 system and the third The FOUP mounting tables 15 are arranged side by side. The loading module 13 has a scalar type double-arm type transfer arm mechanism 19 that is disposed inside to transport the wafer W, and a crystal that is disposed on the side wall so as to correspond to each FOUP mounting table 15 Three load ports 20 of the input port of the circle W. In the transfer arm mechanism 19, the F0UP 14 placed on the FOUP mounting table 15 takes out the wafer W through the loading port 20, and the taken wafer W is applied to the first processing unit 1 1 , the second processing unit 12 , and the positioner 16 . The first IMS 17 or the second IMS 18 is carried in and out. The first IMS 17 is an optical monitor having a mounting table 21 for placing the loaded wafer W and an optical sensor 22 for orienting the wafer W placed on the mounting table 21; The surface shape of W, such as the film thickness of the polysilicon film and the CD (critical Dimension) of the wiring trench or gate. The second IMS 18 is also an optical system monitor, and has a mounting table 23 and an optical sensor 24 as well as the first IMS 17. The first process unit Π has a first process module 25 for plasma processing the wafer W, and a first vacuum isolation module 27 having a single type of connection type single chuck (Single Pick) The transfer arm unit 26 is configured to receive and receive the wafer W to the first process module 25. The first process module 25 has a cylindrical processing chamber container (chamber), and an upper electrode and a lower electrode disposed in the chamber (both not shown in -8-200818291), and between the upper electrode and the lower electrode The distance is set to an appropriate interval for performing etching processing on the wafer W as a plasma treatment. Further, the lower electrode has an ESC 28 at the top thereof to hold the wafer W by Coulomb force or the like. In the first process module 25, a processing gas containing a CF-based gas is introduced into the chamber, and an electric field is generated between the upper electrode and the lower electrode to plasmaize the introduced processing gas to generate ions and radicals. The wafer W is etched by ions and radicals. In the first process unit 1 1, the internal pressure of the load module 13 is maintained at atmospheric pressure, and the internal pressure of the first process module 25 is maintained at a vacuum. Therefore, the first vacuum isolation module (1 0 ad 1 〇ckunit ) 277 is connected to the load module 13 at the same time as the connection portion of the first process module 25 is provided with the vacuum gate valve 29 The unit is provided with an atmospheric gate valve 30, and is configured as a vacuum pre-conveying chamber in which the internal pressure can be adjusted. The first transfer arm unit 26 is provided in the center of the first vacuum isolation module 2, and the first transfer unit 3 is provided closer to the first process module 25 than the first transfer arm unit 26. The second buffer portion 3 2 is provided closer to the loading module 13 than the first transfer arm portion 26. The first buffer portion 3 1 and the second buffer portion 32 are disposed on a rail on which the support portion 33 moves, and the support portion 33 supports the wafer W disposed at the front end portion of the first transfer arm portion 26 so that the wafer The wafer W after the plasma treatment is temporarily prevented from being above the track of the support portion 33. Thus, the wafer w that has not been subjected to the starvation process and the wafer W that has been subjected to the etching process are applied to the first process module 25 Smooth replacement is possible. The second process unit 1 2 has a second process module 34 for performing specific processing described later on the wafer-9-200818291 w, and a second vacuum isolation module 3 7 having a connected single chuck type The second transfer arm unit 36 is connected to the second process module 34 via the vacuum gate valve 35, and can receive/pay the wafer W to the second process module 34. 2 is a cross-sectional view of the second process module of FIG. 1, FIG. 2(A) is a cross-sectional view taken along line I-I of FIG. 1, and FIG. 2(B) is a portion of FIG. 2(A) Expand the map. In FIG. 2(A), the second process module 34 has a cylindrical processing chamber container (chamber) 38, a mounting table 39 of the wafer W disposed in the chamber 38, and is disposed in the cavity. Above the chamber 38, a jet head 40 facing the mounting table 39; a TMP (Turbo Molecular Pump) 41 for exhausting gas or the like in the chamber 38; and a chamber 38 and a TMP 41, and a control chamber The pressure inside the chamber 38 serves as an APC (Adaptive Pressure Control) valve 42 of a variable butterfly valve. The air jet head 40 is composed of a disk-shaped lower layer gas supply unit 43 (a cleaning gas supply device) and a disk-shaped upper layer gas supply unit 44 (HF gas supply device), and the lower layer gas supply unit 43 overlaps the upper layer gas supply unit. 44. The lower gas supply unit 43 and the upper gas supply unit 44 have a first buffer chamber 45 and a second buffer chamber 46, respectively. The first buffer chamber 45 and the second buffer chamber 46 communicate with each other through the gas vent holes 47, 48, respectively. The first buffer chamber 45 of the lower gas supply unit 43 of the air jet head 40 is connected to an NH 3 (ammonia) gas supply system (not shown) that supplies NH 3 gas to the first buffer chamber 45 ( Washing gas). The supplied NH3 gas is supplied into the chamber 38 through the gas vent hole 47 to the chamber -10- 200818291. The second buffer chamber 46 of the upper gas supply unit 44 of the air jet head 40 is connected to an HF gas supply system that supplies HF gas to the second buffer chamber 46. The supplied HF gas is supplied into the chamber 38 via the gas vent 48. The upper gas supply unit of the air jet head 40 contains a heater (not shown), for example, a heating element, which is a temperature of the HF gas in the second buffer chamber 46. Further, as shown in Fig. 2(B), in the air jet head 40, the opening portion in the chamber 38 in the gas passage holes 47, 48 is formed to have a tip end enlarged shape. In this way, the NH3 gas or the HF gas can be effectively diffused into the chamber 38, and the cross-sections of the vent holes 47 and 48 are in the shape of a bee waist, which can prevent the deposit generated in the chamber from flowing into the vent hole 47, 48, That is, it flows back to the first buffer chamber or the second buffer chamber 46. Further, in the second process module 34, the side wall of the chamber 38 has an adder (not shown), for example, a heating element, which can set the environmental degree in the chamber 38 to be higher than normal temperature, thereby promoting The BPSG film is removed by hydrofluoric acid as described later. Further, the heating element in the side wall prevents the residue generated when the BPS G film 63 is removed by fluorine from adhering to the inside of the side wall by heating the side wall. The mounting table 39 has a refrigerant chamber (not shown) as a temperature regulating mechanism. The refrigerant chamber is supplied with a refrigerant of a specific temperature, for example, cooling water or a perfluoropolycarbonate (Galden), and the temperature of the wafer W placed on the mounting table 39 is controlled by the temperature of the refrigerant. Returning to Fig. 1, the second vacuum isolation module 37 has a housing-like chamber (chamber) 49. The internal pressure of the loading module 13 is maintained at atmospheric punching 44. The gas is controlled by the gas. 38 4 5 The hot temperature is 6 3 The acid is fed to the ether -11 - 200818291 The internal pressure of the 2nd process module 3 4 is maintained. Below atmospheric pressure, such as vacuum. Therefore, the second vacuum insulation module 3 7 is provided with a vacuum gate valve 35 at the connection portion with the second process module 34, and has an atmospheric gate valve 5 at the connection portion with the load module 13 According to this, it is configured as a vacuum preparation transfer chamber in which the internal pressure can be adjusted. Further, the substrate processing system 10 includes an operation panel 56 disposed at one end of the long direction of the loading module 13. The operation panel 56 has a display unit configured by, for example, an LCD (Liquid Crystal Display), and the display unit displays the operation status of each component of the substrate processing system 10 . However, on the tantalum substrate 60 shown in Fig. 3 (A), a thermal oxide film 6 1 (first oxide film) composed of S i Ο 2 formed by thermal oxidation treatment, and a polycrystalline tantalum film 6 (including a tantalum layer) are formed. And the wafer W in which the BPSG film 63 (second oxide film) formed by the CVD process or the like is laminated, when the BPSG film 63 is selectively etched, as described above, the HF gas or the HF gas and the H20 gas are not allowed. The mixed gas is plasmated. Further, the BPSG film 63 is exposed to a portion of the thermal oxide film 61 after etching of the polysilicon film 62. As a result of various experiments for increasing the selection ratio of the BPSG film 63 to the thermal oxide film 61, the inventors have found that, in the case where there is almost no H20 atmosphere, when the H20 gas is not supplied and only the HF gas is supplied to the wafer w, as shown in FIG. As shown in the distribution diagram, the uranium engraving rate of the thermal oxide film 61 is maintained at 5 nm/min, and the etching rate of the BPSG film 63 can be increased to 500 nm/min. Namely, it has been found that the selection ratio of the BPSG film 63 to the thermal oxide film 61 can be increased to 1000. Further, the inventors have found that the uranium engraving rate of the TEOS film can be increased to 20 nm/min under the above conditions. -12- 200818291 The present inventors have inferred the following hypothetical explanations for the mechanism of the above-described high selection ratio. The HF gas combines with H20 to form hydrofluoric acid. The hydrofluoric acid invades and removes the oxide film. In the case where there is almost no H20 environment, when HF gas is to be hydrofluoric acid, it needs to be combined with water (H2〇) molecules contained in the oxide film. The BPSG film 63 is formed by vapor deposition such as CVD treatment, and the structure of the film is a sparse structure, and it is easy to adsorb water molecules. Therefore, the BpSG film 63 contains a certain degree of water molecules. The HF gas reaching the BPSG film 63 is combined with the water molecule to form hydrofluoric acid, which invades the BPSG film 63. Further, the thermal oxide film 61 is formed by thermal oxidation treatment in an environment of 800 ° C to 900 ° C, and the film is formed without water molecules, and the structure of the film is a dense structure, and it is not easy to adsorb water molecules. Therefore, the thermal oxide film 61 contains almost no moisture, and even if the supplied HF gas reaches the thermal oxide film 61, it does not become hydrofluoric acid, and as a result, the thermal oxide film 61 is not invaded. Thus, in the case where there is almost no H20 environment, when the H20 gas is not supplied and only the HF gas is supplied to the wafer W, the selection ratio of the BPSG film 63 to the thermal oxide film 61 can be raised to 1,000. However, when the BPSG film 63 is removed by hydrofluoric acid, SiO 2 and fluoric acid (HF ) in the BPSG film 63 cause a chemical reaction as shown by the following formula:
Si02+ 4HF— SiF4+ 2H20 个Si02+ 4HF— SiF4+ 2H20
SiF4 + 2HF-> H2SiF6 而產生殘留物（H2SiF6 )。 相對於此，本實施形態中使用NH3除去殘留物。具 體言之爲，藉由對H2SiF6 )供給NH3氣體而引起以下之 -13- 200818291 式所示之化學反應：。 H2SiF6 + 2NH3~^2NH4F + SiF4 个 產生NH4F (氟化氨）與SiF4(四氟化矽 氟化氨）爲容易昇華之物質，只要設定環境溫 常溫即可昇華，因而容易除去。 亦即，本實施形態中使Si02及氟酸之反 H2SiF6 )經由和NH3之反應及昇華而除去。 以下說明本實施形態之基板處理方法。 圖5爲圖1之基板處理系統執行之基板處 程圖。 首先，準備在熱氧化膜61上均勻形成多E 且於多晶矽膜62上依據特定圖案形成BPSG ® 晶矽膜62之一部分露出的晶圓W。將該晶圓 製程模組25之腔室內，載置於ESC28上。 之後，對腔室內導入含CF系氣體的處理 部電極與下部電極間產生電場使處理氣體電漿 子及自由基，藉由該離子及自由基進行露出 62之蝕刻處理（步驟S5 1 )。此時，多晶矽腹 形成導孔（via hole )或溝。又，一部分之熱I 出（圖 3 (A))。 之後，自第1製程模組25之腔室搬出晶 載入模組1 3搬入第2製程模組34之腔室3 8 圓W載置於載置台39。 之後，藉由APC閥42設定腔室38內之SiF4 + 2HF-> H2SiF6 produces a residue (H2SiF6). On the other hand, in the present embodiment, NH3 is used to remove the residue. Specifically, by supplying NH3 gas to H2SiF6), the following chemical reaction of the formula -13-200818291 is caused: H2SiF6 + 2NH3~^2NH4F + SiF4 The NH4F (fluorinated ammonia) and SiF4 (fluorinated ammonium tetrafluoride) are substances that are easy to sublimate. They can be sublimated as long as the ambient temperature is normal, so they are easily removed. That is, in the present embodiment, SiO 2 and the counter-H2SiF6 of hydrofluoric acid are removed by reaction and sublimation with NH 3 . The substrate processing method of this embodiment will be described below. Figure 5 is a substrate diagram of the substrate processing system of Figure 1. First, a wafer W in which a plurality of E is uniformly formed on the thermal oxide film 61 and a portion of the BPSG ® wafer film 62 is formed on the polysilicon film 62 in accordance with a specific pattern is prepared. The chamber of the wafer process module 25 is placed on the ESC 28. Thereafter, an electric field is generated between the processing portion electrode and the lower electrode into which the CF-containing gas is introduced into the chamber, and the processing gas plasmons and radicals are etched by the ions and radicals 62 (step S5 1). At this time, the polycrystalline belly forms a via hole or a groove. In addition, part of the heat I is out (Fig. 3 (A)). Thereafter, the chamber is loaded from the chamber of the first process module 25, and the loading module 1 is carried into the chamber 38 of the second process module 34. The circle W is placed on the mounting table 39. Thereafter, the chamber 38 is set by the APC valve 42.
)。NH4F ( 度稍微高於 應殘留物（ 理方法之流 晶矽膜62， I 63而使多 W搬入第1 氣體，於上 化而產生離 之多晶矽膜 [62被蝕刻 氧化膜61露 圓W，經由 內。此時晶 壓力爲1 . 3 X -14- 200818291 10〜1 . 1 x 10 Pa ( 1〜8Torr )，藉由側壁內之加熱器設定 腔室38內之溫度爲40〜60 °C。之後，自噴氣頭40之上 層氣體供給邰4 4以流量4 0〜6 〇 S C C Μ對晶圓W供給H F 氣體（HF氣體供給步驟）（步驟s52)(圖3(B))。 又，此時，由腔室3 8內除去大部分之水分子，又，對腔 室38內不供給Η2〇氣體。 其中’到達BPSG膜63之HF氣體和BPSG膜63含 有之水分子結合而成爲氟酸，該氟酸侵入B P S G膜6 3，結 果’ B P S G膜6 3被選擇性蝕刻，但β p S G膜6 3中之S i Ο 2 與氟酸（HF )反應而產生殘留物64，沈積於多晶矽膜62 或露出之熱氧化膜61上。 之後’停止HF氣體對腔室38內之供給後，自噴氣 頭40之下層氣體供給部43將nh3氣體供給至晶圓W ( 洗淨氣體供給步驟）（步驟S 5 3 )(圖3 ( D )。此時， ΝΑ氣體和構成殘留物64之H2SiF6反應而產生NH4F ( 氟化氨）與SiF4(四氟化矽）。只要設定腔室38內之環 境溫度稍微高於常溫即可使NH4F昇華（圖3 ( E )。 之後，自第2製程模組3 4之腔室3 8搬出晶圓W，結 束本處理。 依據圖5之處理，對具有熱氧化膜61及BPSG膜63 之晶圓W供給HF氣體，再對該晶圓W供給NH3氣體。 由HF氣體產生之氟酸使b p S G膜6 3被選擇性蝕刻，但會 產生由H2SiF6構成之殘留物64，NH3氣體和H2SiF6反應 而產生NH4F與SiF4aNH4F容易昇華。因此，可經由和 -15- 200818291 Ν Η 3氣體之反應及昇華而除去殘留物6 4。如此則，可以 容易除去H2SiF6構成之殘留物64。 於圖5之處理，對晶圓W供給HF氣體時，由腔室 3 8內之水分子幾乎都被除去，而且對腔室3 8內不供給 H20氣體。因此於幾乎不含水分子的熱氧化膜61中，不 會產生HF氣體與水分子之結合，幾乎不產生氟酸，結果 ，熱氧化膜6 1幾乎不被侵入。如此則，更能確實進行 BPSG膜63之選擇性蝕刻。 於圖5之處理，多晶矽膜62係於HF氣體之供給而 除去B P S G膜6 3之前被蝕刻。如此則，多晶矽膜6 2之鈾 刻時，可以BPSG膜63作爲硬質遮罩使用，因此可以更 確實蝕刻多晶矽膜62成爲所要形狀。 於圖5之處理，腔室38內之水分子幾乎都被除去， 而且H20氣體不被供給至腔室38內。另外，晶圓W中之 BPSG膜63含有的水分子使用於Si02與氟酸之反應而被 消費掉，因此可維持腔室3 8內於極爲乾燥狀態。結果， 可抑制水分子引起之微粒或晶圓W上之水痕之產生，更 能提升晶圓W製造之半導體裝置之信賴性。 又，於圖5之處理，殘留物64之除去時，僅NH3氣 體被供給至腔室3 8內，但被供給之氣體不限定於此，亦 可供給NH3氣體與其他氣體、例如n2氣體之混合氣體。 又，於圖5之處理，BPSG膜63之選擇性蝕刻及殘留 物6 4之除去，可以同樣於第2製程模組3 4進行。如此則 ，可達成基板處理系統1 0之小型化。 -16- 200818291 以下說明本發明第2實施形態之具備基板處理裝置的 基板處理系統。 本實施形態之構成或作用基本上和第1實施形態相同 ，僅第2製程部之構成和第1實施形態不同。因此，省略 相同構成之說明，以下僅說明和第1實施形態不同之構成 或作用。 圖6爲本實施形態之具備基板處理裝置的基板處理系 統之槪略構成平面圖。 於圖6，基板處理系統77具備：第1製程部1 1 ;第 2製程部65 (基板處理裝置），用於對第1製程部1 1進 行電漿處理後之晶圓 W進行後述之特定處理；及載入模 組13。 第2製程部65具有：第2製程模組66，用於對晶圓 W進行後述之選擇性蝕刻處理；第3製程模組68，其介 由真空閘閥67連接於第2製程模組66，用於對晶圓W進 行後述之加熱處理；及第2真空隔絕模組3 7。 圖7爲圖6中第2製程模組之斷面圖，圖7(A)爲 沿圖6中11 一 Π線之斷面圖，圖7 ( B )爲圖7 ( A )中A 部之擴大圖。又，第2製程模組66之構成或作用基本上 和第1實施形態之第2製程模組3 4相同，僅噴氣頭之構 成和第2製程模組34不同。因此，省略相同構成或作用 之說明。 於圖7(A)，第2製程模組6 6具有：配置於腔室 38之上方的噴氣頭69。噴氣頭69具有圓板狀之氣體供給 -17- 200818291 部70 ( HF氣體供給裝置），氣體供給部70具有緩衝室 71。緩衝室71介由氣體通氣孔72連通於腔室38內。 又，噴氣頭6 9之氣體供給部7 0之緩衝室71 ,係連 接於HF氣體供給系，該HF氣體供給系對緩衝室7丨供給 HF氣體。該被供給之HF氣體介由氣體通氣孔72被供給 至腔室38內。噴氣頭69之氣體供給部70內藏有加熱器 (未圖示）、例如加熱元件，該加熱元件控制緩衝室71 內之HF氣體之溫度。 又，如圖7 ( B )所示，於噴氣頭6 9，和噴氣頭4 0之 氣體通氣孔47、48同樣，其往氣體通氣孔72中之腔室 3 8內之開口部形成爲末端擴大狀。 回至圖6 ’第3製程模組68具有：框體狀之處理室 谷窃（fe室）73，平台加熱器74(基板加熱裝置），配 置於腔室73內，作爲晶圓w之載置台；緩衝臂部75，配 置於平台加熱器74附近，可將平台加熱器74載置之晶圓 W往上推；及氣體導入部（未圖示），可對腔室73內導 入例如N2氣體之惰性氣體。 平台加熱器74，係由表面形成有氧化覆膜之鋁構成 ，藉由內藏之電熱線等構成之加熱器加熱載置之晶圓W 至特定溫度。緩衝臂部75，係使被進行選擇性蝕刻處理 的晶圓W暫時迴避於第2搬送臂部3 7之移動軌道上方， 而使第2製程模組66或第3製程模組68中晶圓W之圓 滑替換成爲可能。 於基板處理系統7 7，載入模組1 3之內部壓力被維持 -18- 200818291 於大氣壓，第2製程模組6 6及第3製程模組6 8之內部 力被維持於真空或大氣壓以下。因此，第2真空隔絕模 3 7，係於其和第3製程模組6 8之連結部具備真空閘閥 〇). NH4F (the degree is slightly higher than the amount of the residue (the flow of the crystal film 62, I 63, so that more W is carried into the first gas, and the polycrystalline ruthenium film is removed from the upper layer [62 etched oxide film 61 is rounded W, Through the inside, the crystal pressure is 1. 3 X -14- 200818291 10~1 . 1 x 10 Pa (1~8 Torr), and the temperature in the chamber 38 is set to 40~60 °C by the heater in the side wall. Then, the HF gas (HF gas supply step) is supplied to the wafer W from the gas supply 邰4 4 of the gas jet head 40 at a flow rate of 4 0 to 6 〇SCC ( (step s52) (Fig. 3(B)). At this time, most of the water molecules are removed from the chamber 38, and no gas is supplied to the chamber 38. The HF gas reaching the BPSG film 63 and the water molecules contained in the BPSG film 63 are combined to become fluorine. The acid, the hydrofluoric acid invades the BPSG film 63, and as a result, the BPSG film 63 is selectively etched, but the S i Ο 2 in the β p SG film 63 reacts with the hydrofluoric acid (HF) to form a residue 64, which is deposited on The polysilicon film 62 or the exposed thermal oxide film 61. After "stopping the supply of the HF gas into the chamber 38, the gas supply portion 43 from the lower portion of the gas jet head 40 will Nh3 gas is supplied to the wafer W (clean gas supply step) (step S 5 3 ) (Fig. 3 (D). At this time, the helium gas reacts with H2SiF6 constituting the residue 64 to generate NH4F (fluorine fluoride) and SiF4. (Plutonium tetrafluoride). The NH4F is sublimated by setting the ambient temperature in the chamber 38 slightly above normal temperature (Fig. 3(E). Thereafter, the wafer is lifted out of the chamber 38 of the second process module 34. W. The process is completed. According to the process of Fig. 5, HF gas is supplied to the wafer W having the thermal oxide film 61 and the BPSG film 63, and the NH3 gas is supplied to the wafer W. The fluoric acid produced by the HF gas makes bp SG The film 63 is selectively etched, but a residue 64 composed of H2SiF6 is generated, and the NH3 gas reacts with H2SiF6 to produce NH4F and SiF4aNH4F which are easily sublimed. Therefore, it can be reacted and sublimated by the gas with -15-200818291 Ν 3 gas. The residue 64 is removed. Thus, the residue 64 composed of H2SiF6 can be easily removed. In the process of Fig. 5, when the HF gas is supplied to the wafer W, almost all the water molecules in the chamber 38 are removed, and No H20 gas is supplied into the chamber 38. Therefore, the thermal oxide film 61 is hardly containing water molecules. In the middle, the combination of the HF gas and the water molecules does not occur, and the hydrofluoric acid is hardly generated. As a result, the thermal oxide film 61 is hardly invaded. Thus, the selective etching of the BPSG film 63 can be surely performed. The polycrystalline germanium film 62 is etched before the BPSG film 63 is removed by the supply of HF gas. Thus, when the polycrystalline germanium film 6 is uranium engraved, the BPSG film 63 can be used as a hard mask, so that the polycrystalline germanium film 62 can be more reliably etched into a desired shape. In the processing of Fig. 5, almost all of the water molecules in the chamber 38 are removed, and the H20 gas is not supplied into the chamber 38. Further, the water molecules contained in the BPSG film 63 in the wafer W are consumed by the reaction of SiO 2 and hydrofluoric acid, so that the chamber 38 can be kept extremely dry. As a result, the generation of water marks on the particles or the wafer W caused by the water molecules can be suppressed, and the reliability of the semiconductor device manufactured by the wafer W can be improved. Further, in the treatment of Fig. 5, when the residue 64 is removed, only the NH3 gas is supplied into the chamber 38, but the supplied gas is not limited thereto, and the NH3 gas and other gases such as n2 gas may be supplied. mixed composition. Further, in the process of Fig. 5, the selective etching of the BPSG film 63 and the removal of the residue 64 can be performed in the same manner as in the second process module 34. In this way, the miniaturization of the substrate processing system 10 can be achieved. -16-200818291 A substrate processing system including a substrate processing apparatus according to a second embodiment of the present invention will be described below. The configuration or operation of the present embodiment is basically the same as that of the first embodiment, and only the configuration of the second processing unit is different from that of the first embodiment. Therefore, the description of the same configuration will be omitted, and only the configuration or action different from the first embodiment will be described below. Fig. 6 is a schematic plan view showing the structure of a substrate processing system including a substrate processing apparatus according to the embodiment. In FIG. 6, the substrate processing system 77 includes a first processing unit 1 1 and a second processing unit 65 (substrate processing apparatus). The wafer W for performing plasma processing on the first processing unit 1 1 is described later. Processing; and loading module 13. The second processing unit 65 includes a second process module 66 for performing a selective etching process to be described later on the wafer W, and a third process module 68 connected to the second process module 66 via a vacuum gate valve 67. It is used to heat the wafer W to be described later, and the second vacuum isolation module 37. Figure 7 is a cross-sectional view of the second process module of Figure 6, Figure 7 (A) is a cross-sectional view taken along line 11 of Figure 6, and Figure 7 (B) is the A part of Figure 7 (A) Expand the map. Further, the configuration or function of the second process module 66 is basically the same as that of the second process module 34 of the first embodiment, and only the configuration of the air jet head is different from that of the second process module 34. Therefore, the description of the same configuration or function will be omitted. In FIG. 7(A), the second process module 6 6 has a jet head 69 disposed above the chamber 38. The air jet head 69 has a disk-shaped gas supply -17-200818291 portion 70 (HF gas supply device), and the gas supply portion 70 has a buffer chamber 71. The buffer chamber 71 communicates with the chamber 38 via a gas vent 72. Further, the buffer chamber 71 of the gas supply portion 70 of the air jet head 6 is connected to an HF gas supply system that supplies HF gas to the buffer chamber 7A. The supplied HF gas is supplied into the chamber 38 through the gas vent 72. The gas supply unit 70 of the air jet head 69 contains a heater (not shown), for example, a heating element that controls the temperature of the HF gas in the buffer chamber 71. Further, as shown in Fig. 7(B), in the same manner as the gas vent holes 47, 48 of the gas jet head 40, the opening portion of the gas vent hole 72 in the chamber 38 is formed as an end. Expanded. Returning to Fig. 6, the third process module 68 has a frame-shaped processing chamber, a plaque 73, and a platform heater 74 (substrate heating device) disposed in the chamber 73 as a mounting table for the wafer w. The buffer arm portion 75 is disposed in the vicinity of the stage heater 74 to push up the wafer W placed on the stage heater 74, and a gas introduction portion (not shown) for introducing, for example, N2 gas into the chamber 73. Inert gas. The stage heater 74 is made of aluminum having an oxide film formed on its surface, and the placed wafer W is heated to a specific temperature by a heater composed of a built-in electric heating wire or the like. The buffer arm portion 75 temporarily avoids the wafer W subjected to the selective etching process from being above the moving track of the second transfer arm portion 37, and causes the wafer in the second process module 66 or the third process module 68. The smooth replacement of W is possible. The internal pressure of the loading module 13 is maintained at -18-200818291 at atmospheric pressure, and the internal forces of the second process module 6 6 and the third process module 68 are maintained below vacuum or atmospheric pressure. . Therefore, the second vacuum insulation mold 37 is provided with a vacuum gate valve at the joint portion thereof with the third process module 68.
Si02與氟酸反應產生之H2SiF6藉由加熱而如以下 示被分解： H2SiF6+Q (熱能）—2HF+SiF4 个 產生HF與SiF4。 本實施形態中，利用上述式所示Η 2 S i F 6之分解， Si〇2與氟酸反應產生之殘留物之H2SiF6藉由加熱分解 除去。 以下說明本實施形態之基板處理方法。 圖8爲圖6之基板處理系統執行之基板處理方法之 程圖。 首先，執行圖5之處理之步驟S 5 1。之後，自第1 程模組25之腔室搬出晶圓W，經由載入模組1 3搬入第 製程模組66之腔室3 8內。此時晶圓W載置於載置台 〇 之後，執行圖5之處理之步驟S 5 2，自第2製程模 6 6之腔室3 8搬出晶圓W，將晶圓W搬入第3製程模 68之腔室73內。此時，晶圓W載置於平台加熱器74 。藉由平台加熱器74加熱所載置之晶圓W基板處理裝 特定溫度' 具體言之爲，1 5 0 °C以上（基板加熱步驟） 步驟S81)。又’氣體導入部對腔室73內導入N2氣體 壓 組 7 6 所 使 而 流 製 2 3 9 組 組 上 置 -19- 200818291 該導入之N2氣體依據TMP41之減壓而形成氣體流。此時 ，構成殘留物64之H2SiF6藉由加熱被分解爲HF與SiF4 ，分解之HF與SiF4被捲入氣體流而除去。 之後，自第3製程模組68之腔室73搬出晶圓W，結 束本處理。 依據圖8之處理，對具有熱氧化膜61及BPSG膜63 之晶圓W供給HF氣體，再對該晶圓W加熱。由HF氣體 產生之氟酸使BPS G膜63被選擇性蝕刻，但會產生由 H2SiF6構成之殘留物64。該殘留物64藉由加熱被分解爲 HF與SiF4。因此，可經由加熱分解而除去殘留物64。如 此則，可以容易除去H2SiF6構成之殘留物64。 於圖8之處理，對晶圓W供給HF氣體及對晶圓W 之加熱，係於個別之製程模組進行，但彼等處理亦可於1 個製程模組進行，具體言之爲，如圖9所示，於第2製程 模組66之載置台3 9內配置加熱器7 8，於腔室3 8內藉由 氟酸除去BPSG膜63之後，不使晶圓W搬出腔室38，而 使停留於載置台39上，藉由加熱器78加熱晶圓W至150 。(：以上。Si02與氟酸反應產生之H2SiF6可於150°C以上 被分解。因此藉由加熱將H2SiF6分解爲HF與SiF4之後 可以確實除去。 於圖8之處理，加熱晶圓W時於腔室73內導入N2 氣體而形成氣體流，因此，分解之HF與SiF4被捲入氣體 流而可以確實除去。 上述各實施形態中，說明選擇性鈾刻BPS G膜63，但 -20- 200818291 被選擇性鈾刻之氧化膜不限定於此，只要是至少較熱氧化 膜61含有更多雜質的氧化膜即可，具體言之爲，可爲 TEOS ( Tetra Ethyl Ortho Silicate )膜或 BPS ( Boron Silicate Glass )膜。又，被除去之殘留物亦不限定於 H2SiF6，只要是藉由氟酸之氧化膜除去時所產生之殘留物 之除去均可適用本發明。 又，各實施形態之具備基板處理裝置的基板處理系統 ，係以2個製程部平行配置者加以說明，但基板處理系統 之構成不限定於此，具體言之爲，可爲多數個製程模組以 縱列狀配置者或以群組狀配置者。 於圖5之處理或圖8之處理進行之基板不限定於半導 體裝置用晶圓，可爲LCD或FPD (Flat Panel Display) 等使用之各種基板或光罩、CD基板、印刷機板等。 本發明之目的，係藉由將實現上述各實施形態功能的 軟體程式碼記錄於記憶媒體，將該記憶媒體供給至系統或 裝置，該系統或裝置之電腦（或CPU、MPU等）讀出記 憶於記憶媒體之程式碼予以執行而達成。 此情況下，由記憶媒體讀出之程式碼本身成爲實現上 述各實施形態之功能，該程式碼及記憶該程式碼之記憶媒 體則構成本發明。 又，作爲供給程式碼之記憶媒體，可爲例如軟碟（註 冊商標）、硬碟、光磁碟、CD - ROM、CD - R、CD— RW 、DVD— ROM、DVD— RAM、DVD—RW、DVD+RW 等之 光碟、磁帶、非揮發性記憶卡、ROM等。又，亦可藉由 -21 - 200818291 網路下載程式碼。 又，不僅藉由執行電腦讀出之程式碼，而實現上述各 實施形態之功能，就連依該程式碼之指示，使電腦上稼動 之OS (操作系統）等進行實際處理之一部分或全部，藉 由該處理而實現各實施形態之功能之情況亦被包含。 又，由記憶媒體讀出之程式碼，被寫入插入電腦之功 能擴張板或連接於電腦之功能擴張模組具備之記憶體後， 依該程式碼之指示，使該擴張功能於擴張板或功能擴張模 組具備之CPU等進行實際處理之一部分或全部，藉由該 處理而實現上述各實施形態之功能者亦被包含。 (發明效果） 依據申請專利範圍第1項之基板處理方法及申請專利 範圍第7項之基板處理裝置，係對具有藉由熱氧化處理而 形成之第1氧化膜，及含有雜質之第2氧化膜的基板供給 HF氣體，再對該基板供給至少含有NH3氣體的洗淨氣體 。由HF氣體產生之氟酸可選擇性蝕刻第2氧化膜，但會 產生殘留物。NH3氣體會和該殘留物反應而產生容易昇華 之物質。因此，殘留物可經由和NH3氣體之反應及昇華 而被除去。如此則，容易除去氟酸引起之殘留物。 依據申請專利範圍第2項之基板處理方法，於上述 HF氣體供給步驟不供給H20氣體，因而在幾乎不含H20 的第1氧化膜中，幾乎不產生HF氣體與H20之結合，不 產生氟酸，因此第1氧化膜幾乎不被蝕刻。因此可以更確 -22- 200818291 實選擇性蝕刻第2氧化膜。 依據申請專利範圍第3項之基板處理方法，含矽層係 於HF氣體供給之前被蝕刻。如此則，含矽層之鈾刻時， 可以第2氧化膜作爲硬質遮罩使用，因此可以確實蝕刻含 矽層成爲所要形狀。 依據申請專利範圍第4項之基板處理方法及申請專利 範圍第8項之基板處理裝置，係對具有藉由熱氧化處理而 形成之第1氧化膜，及含有雜質之第2氧化膜的基板供給 HF氣體，再度加熱該基板。由HF氣體產生之氟酸可選 擇性蝕刻第2氧化膜，但會產生殘留物。該殘留物藉由加 熱被分解昇華之物質。因此，殘留物可經由加熱分解而被 除去。如此則，容易除去氟酸引起之殘留物。 依據申請專利範圍第5項之基板處理方法，係於N2 氣體環境下加熱上述基板。N2氣體形成氣體流，可以捲 入、搬運被分解之殘留物。如此則’可以確實除去氟酸引 起之殘留物。 依據申請專利範圍第6項之基板處理方法，係加熱上 述基板至15〇 °C以上。氟酸引起之殘留物於150°C以上被 分解。因此，可以確實除去氟酸引起之殘留物。 【圖式簡單說明】 圖1爲本發明第1實施形態之具備基板處理裝置的基 板處理系統之槪略構成平面圖。 圖2爲圖1中第2製程模組之斷面圖，圖2(A)爲 -23- 200818291 圖1中沿I 一 I線之斷面圖，圖2 ( B )爲圖2 ( A )中A 部之擴大圖。 圖3爲圖1之基板處理系統執行之基板處理方法之工 程圖。 圖4爲氧化膜種類與蝕刻速率之關係分布圖。 圖5爲圖1之基板處理系統執行之基板處理方法之流 程圖。 圖6爲本發明第2實施形態之具備基板處理裝置的基 板處理系統之槪略構成平面圖。 圖7爲圖6中第2製程模組之斷面圖，圖7(A)爲 沿圖6中11 — 11線之斷面圖，圖7 ( B )爲圖7 ( A )中A 部之擴大圖。 圖8爲圖6之基板處理系統執行之基板處理方法之流 程圖。 圖9爲圖7之第2製程模組之變形例之斷面圖。 【主要元件符號說明】 W :晶圓 1 0、7 7 :基板處理系統 1 1 :第1製程部 12、65 :第2製程部 1 3 :載入模組The H2SiF6 produced by the reaction of SiO2 with hydrofluoric acid is decomposed by heating as follows: H2SiF6+Q (thermal energy) - 2HF + SiF4 HF and SiF4 are produced. In the present embodiment, H2SiF6, which is a residue of the reaction between Si〇2 and hydrofluoric acid, is removed by heat decomposition by decomposition of Η 2 S i F 6 represented by the above formula. The substrate processing method of this embodiment will be described below. Figure 8 is a process diagram of a substrate processing method performed by the substrate processing system of Figure 6. First, the step S 5 1 of the process of FIG. 5 is performed. Thereafter, the wafer W is carried out from the chamber of the first pass module 25, and is carried into the chamber 38 of the process module 66 via the load module 13. At this time, after the wafer W is placed on the mounting stage, the process S 5 2 of the process of FIG. 5 is performed, the wafer W is carried out from the chamber 38 of the second process mode 66, and the wafer W is carried into the third process mode. Inside the chamber 73 of 68. At this time, the wafer W is placed on the stage heater 74. The substrate W is heated by the stage heater 74 to process the substrate W. The specific temperature is, in particular, 150 ° C or higher (substrate heating step), step S81). Further, the gas introduction portion introduces the N2 gas pressure group 76 into the chamber 73 to flow the liquid portion of the group -19-200818291. The introduced N2 gas forms a gas flow according to the pressure reduction of the TMP41. At this time, H2SiF6 constituting the residue 64 is decomposed into HF and SiF4 by heating, and the decomposed HF and SiF4 are taken up into the gas stream and removed. Thereafter, the wafer W is carried out from the chamber 73 of the third process module 68, and the process is terminated. According to the process of FIG. 8, HF gas is supplied to the wafer W having the thermal oxide film 61 and the BPSG film 63, and the wafer W is heated. The fluoric acid produced by the HF gas causes the BPS G film 63 to be selectively etched, but a residue 64 composed of H2SiF6 is generated. This residue 64 is decomposed into HF and SiF4 by heating. Therefore, the residue 64 can be removed by thermal decomposition. Thus, the residue 64 composed of H2SiF6 can be easily removed. In the processing of FIG. 8, the HF gas is supplied to the wafer W and the heating of the wafer W is performed in a separate process module, but the processing may be performed in one process module, specifically, As shown in FIG. 9, the heaters 7 are disposed in the mounting table 39 of the second process module 66. After the BPSG film 63 is removed by the hydrofluoric acid in the chamber 38, the wafer W is not carried out of the chamber 38. The wafers W to 150 are heated by the heater 78 while staying on the mounting table 39. (: Above. H2SiF6 produced by the reaction of SiO2 with hydrofluoric acid can be decomposed above 150 °C. Therefore, H2SiF6 can be surely removed by decomposing H2SiF6 into HF and SiF4 by heating. In the treatment of Fig. 8, the wafer W is heated in the cavity. Since the N2 gas is introduced into the chamber 73 to form a gas flow, the decomposed HF and SiF4 are caught in the gas flow and can be surely removed. In each of the above embodiments, the selective uranium engraved BPS G film 63 is described, but -20-200818291 was The oxide film for selective uranium engraving is not limited thereto, and may be an oxide film containing at least more impurities than the thermal oxide film 61, specifically, TEOS (Tetra Ethyl Ortho Silicate) film or BPS (Born Silicate) Further, the residue to be removed is not limited to H2SiF6, and the present invention can be applied as long as it is removed by removal of an oxide film of hydrofluoric acid. The substrate processing system of the device is described in which two process units are arranged in parallel. However, the configuration of the substrate processing system is not limited thereto. Specifically, a plurality of process modules may be arranged in a column or The substrate to be processed in the process of FIG. 5 or the process of FIG. 8 is not limited to the wafer for a semiconductor device, and may be various substrates or masks or CD substrates used for LCD or FPD (Flat Panel Display). A printer board or the like. The object of the present invention is to provide a software medium for realizing the functions of the above embodiments to a memory medium, and to supply the memory medium to a system or device, the computer or system (or CPU, The MPU, etc.) is implemented by reading the code stored in the memory medium and executing it. In this case, the code itself read by the memory medium is a function for realizing the above embodiments, the code and the memory medium for storing the code. The present invention is also a memory medium for supplying a code, such as a floppy disk (registered trademark), a hard disk, an optical disk, a CD-ROM, a CD-R, a CD-RW, a DVD-ROM, or a DVD. CDs, tapes, non-volatile memory cards, ROMs, etc. for RAM, DVD-RW, DVD+RW, etc. Also, you can download the code from the network from -21 to 200818291. Program In order to realize the functions of the above embodiments, the OS (operating system) or the like on the computer performs some or all of the actual processing according to the instruction of the code, and the functions of the embodiments are realized by the processing. The situation is also included. Further, the code read by the memory medium is written into the memory expansion board of the computer or the memory of the function expansion module connected to the computer, and the expansion is performed according to the instruction of the code. Some or all of the actual processing is performed on the expansion board or the CPU provided in the function expansion module, and the functions of the above embodiments are also included in the processing. According to the substrate processing method of the first aspect of the invention, and the substrate processing apparatus of the seventh aspect of the invention, the first oxide film formed by thermal oxidation treatment and the second oxide containing impurities are provided. The substrate of the film is supplied with HF gas, and a cleaning gas containing at least NH 3 gas is supplied to the substrate. The fluoric acid produced by the HF gas selectively etches the second oxide film, but a residue is generated. The NH3 gas reacts with the residue to produce a substance that is easily sublimed. Therefore, the residue can be removed by reaction and sublimation with NH3 gas. In this way, it is easy to remove the residue caused by the hydrofluoric acid. According to the substrate processing method of the second aspect of the patent application, the H20 gas is not supplied in the HF gas supply step. Therefore, in the first oxide film containing almost no H20, the combination of the HF gas and the H20 is hardly generated, and the hydrofluoric acid is not generated. Therefore, the first oxide film is hardly etched. Therefore, it is possible to more accurately -22-200818291 to selectively etch the second oxide film. According to the substrate processing method of claim 3, the ruthenium-containing layer is etched before the HF gas supply. In this way, when the uranium layer containing the ruthenium layer is used, the second oxide film can be used as a hard mask, so that the ruthenium-containing layer can be surely etched to have a desired shape. The substrate processing method according to the fourth aspect of the invention, and the substrate processing apparatus according to claim 8 are a substrate supply having a first oxide film formed by thermal oxidation treatment and a second oxide film containing impurities. The HF gas is used to heat the substrate again. The hydrofluoric acid generated by the HF gas selectively etches the second oxide film, but a residue is generated. The residue is decomposed and sublimated by heating. Therefore, the residue can be removed by decomposition by heating. In this way, it is easy to remove the residue caused by the hydrofluoric acid. According to the substrate processing method of claim 5, the substrate is heated in an N2 gas atmosphere. The N2 gas forms a gas stream that can be entrained and transported with the decomposed residue. In this case, the residue caused by the hydrofluoric acid can be surely removed. According to the substrate processing method of claim 6, the substrate is heated to 15 ° C or higher. The residue caused by hydrofluoric acid is decomposed above 150 °C. Therefore, the residue caused by the hydrofluoric acid can be surely removed. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic plan view showing a schematic configuration of a substrate processing system including a substrate processing apparatus according to a first embodiment of the present invention. 2 is a cross-sectional view of the second process module of FIG. 1, FIG. 2(A) is a cross-sectional view taken along line I-I in FIG. 1 and FIG. 2(B) is a cross-sectional view of FIG. An enlarged picture of the Ministry A. 3 is a process diagram of a substrate processing method performed by the substrate processing system of FIG. 1. Fig. 4 is a graph showing the relationship between the type of oxide film and the etching rate. Figure 5 is a flow diagram of a substrate processing method performed by the substrate processing system of Figure 1. Fig. 6 is a schematic plan view showing a schematic configuration of a substrate processing system including a substrate processing apparatus according to a second embodiment of the present invention. Figure 7 is a cross-sectional view of the second process module of Figure 6, Figure 7 (A) is a cross-sectional view taken along line 11 - 11 of Figure 6, Figure 7 (B) is a portion A of Figure 7 (A) Expand the map. Figure 8 is a flow diagram of a substrate processing method performed by the substrate processing system of Figure 6. Figure 9 is a cross-sectional view showing a modification of the second process module of Figure 7. [Description of main component symbols] W : Wafer 1 0, 7 7 : Substrate processing system 1 1 : 1st process part 12, 65 : 2nd process part 1 3 : Load module
14 ： FOUP 15 : FOUP載置台 -24- 200818291 1 6 :定位器 1 7 :第 1 IMS 1 8 :第 2IMS 1 8 25 :第1製程模組 3 4 :第2製程模組 38 :腔室 3 9 :載置台 4 0 :噴氣頭 43 :下層氣體供給部 44 :上層氣體供給部 6 0 :矽基材 6 1 :熱氧化膜 62 :多晶矽膜 63 ： BPSG 膜 64 :殘留物 6 8 :第3製程模組 7 4 :平台加熱器 -25-14 : FOUP 15 : FOUP mounting table - 24 - 200818291 1 6 : Positioner 1 7 : 1st IMS 1 8 : 2nd IMS 1 8 25 : 1st process module 3 4 : 2nd process module 38 : Chamber 3 9 : mounting table 40 : air jet head 43 : lower layer gas supply portion 44 : upper layer gas supply portion 6 0 : tantalum base material 6 1 : thermal oxide film 62 : polycrystalline tantalum film 63 : BPSG film 64 : residue 6 8 : 3rd Process Module 7 4: Platform Heater-25-