200803184 .......⑺ Htwf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種資料轉換，且特別是有關於—種 將數位輸入訊號轉換成類比輸出電流的數值類比資料轉換 裔’其適用於譬如有機發光顯示器（OLED)等裝置中的資料 轉換。 貝碑 【先前技術】 馨 數位類比資料轉換器的用途非常廣泛，舉例來說，有 機电光顯示(OLED)面板的驅動器必須利用數位類比二》 料轉換器接收數位控制電路傳送過來的像素(pixel)資料1 轉換成類比電流訊5虎以驅動面板。再者，驅動器還可利^ 另外的兩個數位類比資料轉換器提供使用者自由 的對比與亮度變化。 扳 快閃式（flash)數位類比資料轉換器可分為電壓模式 (voltage-mode)、充電模式（charge-m〇(je)以及電流模 (current-mode)三種模式。其中，電壓模式數位類比資料轉 • ㈣係利用—串電阻器分壓絲示所需的類比輸出值，而 充電模式數位類比資料轉換器係利用多個不同大小的電容 器去表示所需的類比輸出值。然而，上述兩種模式的輪^ 分別會受電阻器以及電容器的精確度之影響，且在晶片上 實現電容器需要極大的面積。 。所以，-般應用上會採用電流模式數位類比資料轉換 為，譬如階層（segment)電流模式數位類比資料轉換器，其 利用參考電机產生為產生定電流，並透過電流鏡(⑽恤 6 200803184 i*” 17317twf doc/g mirror)將之映射至多個電流源，例如接收的數位輸入訊號 為(M+L)位元，則需要2m+L個電流源。然後，利用開關切 換這些電流源來輪出所需要的類比輸出電流。 更詳細地說’先將接收的數位輸入訊號切割為具有Μ 位元的束南有效位元組(m〇st |^ts)以及具有L位 元的最低有效位元組(least significant bits)以分別處理。再 利用/m度σ十解碼器（thermometer decoder)分別解碼最高有 馨 =位兀組與最低有效位元組，並將第一組電流源（其具有 2M個電流源)與第二組電流源(其具有妒個電流源)解碼後 的訊號送至輸出端點，進而產生與數位輸入訊號相應的類 比輸出電流。 ' 明顯地，這種階層電流模式數位類比資料轉換器之電 路架構及功率消耗隨著數位輸入訊號之位元的增加而^ 加，甚至以指數方式增加。因此，需要一種架構更簡單且 功率消耗更低的數位類比資料轉換器，以應付日趨複雜的 電路架構。 $ ^ φ 【發明内容】 本發明的目的其中之一就是在提供一種數位類欠 轉換器及一種數位類比資料轉換方法，其用以將數位 訊號轉換成類比輸出訊號，可適用於譬如有機發光顯 (0LED)等裝置中的資料轉換。 本發明提出一種數位類比資料轉換器，用w脸虹 Μ將數位於 入訊號轉換成類比輸出訊號。數位類比資料轉換哭勺八’ 存器、解碼器、轉換單元以及輸出單元。暫在哭^匕各暫 句廿為用以接收 17317twf.doc/g 200803184 並暫存數位輸人喊，其愤位輸人訊號包含最高有效位 低有效位元組。解碼器電性連接至暫存器，其用 =一 碼最低有效位元組並以解碼過的最低有效 兀、’且控制訊號，以及在第二綱解碼最高有效 並:ΓΓ的最高有效位元組作為第二控制訊號。 轉換早兀電性連接至解碼器，翻 一轉換電流，以及在第二期間根據;:控 制出弟二轉換電流。輪出單^電性連接至轉換單 几，』以在第-期間暫存第一轉換電流， =轉換電流並舆暫存的第一轉換電流結合作 本發明提出-種數位類比資料轉換方法，用以將數位 輸入訊賴換成㈣喊。數 方法 含，，入訊號，其中數位輸入訊號包 元組並以解碼過的最低有效位元組作為第—控=1 最高有效位元組並以解碼過的最高有效位;第解： 制控成第二轉換電= ί流作為舰=訊^弟―轉換電流與放大的第二轉換 本發明之數位類比資料轉換器因採 別對數位輸人職的最低有效位元_最^換早4 行數位類比資料轉換，因此架構簡單。再Ϊ， 17317twf.d〇c/g 200803184 在進行最高有效位元組轉換時所需的電流係基於最 耗。’位元組轉換時所需的電流，因此大幅地降低功率消 易慯為上述和其他目的、特徵和優點能更明顯 明如下。、方杈佳實施例，並配合所附圖式，作詳細說 【實施方式】 換哭：二照t發明一實施例所繪示的數位類比資料轉 。^照圖卜數位類比資料轉換器1〇〇包 :以，點ουτ。其中，暫存㈣。接收數位: =’ 度計解碼器120電性連接至暫存器ιι〇，轉換 电性連接至溫度計解碼器120 ’而輸出單元140 二轉換單元m。此外，輪出單元14G包含輸出 =、電流放大器142以及電流暫存器143。輸出節點 τ電性連接至電流放大器142與電流暫存器ι43， 合電流放大ϋΐ42與電流暫存器143的輸出作為類比輸;; 訊號。 ^暫存益U0用以接收並暫存數位輸入訊號，以供溫度 十解碼态120項取欲處理的資料。轉換單元Bo包含多個 電流供應器丨31〜13X ’且每-個電流供絲分別根據接 收到的控制訊號決定是否提供電流至輸出單元14〇，其中 ^==2^-1。在這裡，可以設計成電流供應器131〜ΐ3χ提供 至輪出單元140的輸出電流實質上相同，此種轉換方式與 9 20080318+ 17317twf.doc/g 傳統的二進制權重(binaryWeighted)轉換不同，而被稱為線 性權重(linearly weighted)轉換。 、依照本發明的觀念，將(M+L)位元的數位輸入訊號切 奢J為具有Μ位元的最高有效位元組以及具有L位元的最低 有效位元組以分別處理，其中M與L為正整數且。 ^第一期間，溫度計解碼器120解碼最低有效位元組並以 ，碼過的最低有效位元組作為第一控制訊號，以控制轉換 單元130根據第一控制訊號輸出第一轉換電流Itmp，l。此 時，在輸出單元140中，輸出開關141切換到端點c，即 鈿點A與C形成通路。因此，輸出開關141導接第一轉換 電流Itmp，l至電流暫存器143，並由電流暫存器143暫存 第一轉換電流Itmp，1。 、，在第二顧，溫度計解碼器]2〇解碼最高有效位元組 並以解碼-過的最高有效位元組作為第二控制減，以控制 轉換單7L 130根據第二控制訊號輪出第二轉換電流 Itmp，2。此時，在輸出單元14〇中，輸出開關i4i切換到 • 端? B，即端點A與B形成通路。因此，輸出開關141導 ，第二轉換電流Itmp，2至電流放大器142，並由電流放大 斋142將第二轉換電流Itmp，2放大斤倍。最後，在輸出節 點OUT結合電流暫存器143輸出的第一轉換電流工卿^ 以及電流放大器142輸出的放大2L倍的第二轉換電流 Itmp，2作為類比輸出訊號。 一般而言，若M+L為偶數則設計成M等於L，若μ+£ 為奇數則設計成Μ等於L-卜如此可用最少的電流供應器 17317twfdoc/g 200803184 以使架構簡單且功率消耗低。 組的轉換單元應用來處理最^者’將4理最低有效位元 位元組轉換後的贼電流訊:^位讀再放大最高有效 別對最低有效位元組盎最^二亦即採㈣—轉換單元分 轉換圖=::Γ:二:=_料 轉換器之方塊圖，;二的數位類比資料 =有:位元的最高有：==元: 取低有效位兀組。圖4綸. υ 哭中、旧产舛醢m。。％、θ為圖2所示數位類比資料轉換 时中皿度推碼為22㈣輸入/輸出之關係。 ，同時參照圖2與圖4，由於數 位輪入訊號’因此暫存器 的暫存器。而且，由於最低有效位元組具有3 口此溫度計解碼器220接收3位元的輸人訊 元的控制訊號。並且’控制訊號的‘-位 Γ24〇 Γ —個電流供應器以決定是否提供電流至輸出單 ㈣供需要7個電流供應器’即轉換單元230包含 包抓供應态231〜237。 個雷t例巾，每—個電流供應11包含—侧關與一 ’，、巾開關根據控制魏決定衫導接電流源的 雨私机至輸出單元。以電流供應器、23 器Ml包含開關250與電流源雇。其中，開關25〇驾 收到邏輯1的控制訊號，開關250 “導通，，，此時開關25〇 刀換到立而點Y (即端點义與γ形成通路)以使電流源鳩的 11 200803184^ 17317twf.doc/g 輸出電流i導接到輸出單元24i反 到邏輯0的控制訊號，開關250 “斷開，、：1若接收 換到端叫即端點X與Z形成通路)以二 ==:r~，低 位元==，，，，位輸人訊號為“_11G”，則最高有效 、、Θ^為_ ’喊做錄元組為“11G”。在帛一期間， 解碼$ 220接收最低有效位元組“UG，，，根據圖4 解碼器輪^輸出關係’溫度計解碼器220將 ^古二:^/⑴⑴〜控制訊號〜⑴⑴”從最左邊的 =有效位疋(即‘‘〇，，)到最右邊的最低有效位元（即“门，這 流㈣電流供應器231〜237的開關，其中電 2。、二了 .、的開關250斷開，而其它電流供應器232〜 61，二=導通。所以’第一轉換電流1吨1之電流值為 輸出^ 241導接第一轉換電流至電流暫存器 ，亚由電流暫存器243暫存第一轉換電流。 你- ^‘者’在第二期間，溫度計解碼器220接收最高有效 r:二且危〇!° ’根據圖4所示的溫度計解碼器輸入/輸出關 味“ ’凰又计解碼态220將輸出控制訊號“0000011，，。控制訊 =\Γ〇0011这七個位兀分別控制電流供應器231〜237的 開關’其中電流供應器231〜235的開關斷開，而電流供 12 17317twf.doc/g 200803184200803184 .......(7) Htwf.doc/g IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a data conversion, and in particular to a method for converting a digital input signal into an analog output. The numerical analog data of current conversion is suitable for data conversion in devices such as organic light-emitting displays (OLEDs). Beibei [Prior Art] The digital digital analog data converter is very versatile. For example, the driver of an organic electro-optic display (OLED) panel must use a digital analog converter to receive pixels transmitted by the digital control circuit (pixel). Data 1 is converted to analog current 5 to drive the panel. In addition, the driver can also provide users with free contrast and brightness changes in the other two digital analog data converters. The flash digital analog data converter can be divided into voltage mode (voltage-mode), charging mode (charge-m 〇 (je) and current mode (current-mode) three modes. Among them, voltage mode digital analogy Data transfer • (4) The use of a string resistor to divide the wire to indicate the desired analog output value, while the charge mode digital analog data converter uses multiple capacitors of different sizes to represent the desired analog output value. However, the above two The mode of the wheel ^ will be affected by the accuracy of the resistor and the capacitor, respectively, and the capacitor needs to be extremely large on the wafer. Therefore, the general application will use the current mode digital analog data to convert to, for example, the segment (segment a current mode digital analog data converter that is generated by a reference motor to generate a constant current and is mapped to a plurality of current sources, such as received digits, through a current mirror ((10) sneaker 6 200803184 i* 17317 twf doc/g mirror) When the input signal is (M+L) bits, 2m+L current sources are required. Then, these current sources are switched by switches to rotate the required analog output current. In more detail, 'the received digital input signal is first cut into bundled south significant bytes (m〇st |^ts) with Μ bits and least significant bits with L bits. Separate processing. Reuse the /m degree sigma decoder to decode the highest sin = 兀 group and the least significant Byte, respectively, and the first set of current sources (which have 2M current sources) and the second The decoded signal from the group current source (which has one current source) is sent to the output terminal to generate an analog output current corresponding to the digital input signal. ' Obviously, the circuit structure of the hierarchical current mode digital analog data converter And the power consumption increases with the increase of the bit of the digital input signal, and even increases exponentially. Therefore, a digital analog data converter with a simpler structure and lower power consumption is needed to cope with the increasingly complicated circuit architecture. $ ^ φ [Summary of the Invention] One of the objects of the present invention is to provide a digital class under-converter and a digital analog data conversion method for converting a digital signal The analog output signal can be applied to data conversion in devices such as organic light-emitting display (0LED). The invention provides a digital analog data converter, which converts the number of incoming signals into analog output signals by using w face rainbow truncation. Data conversion chopping spoon eight 'storage, decoder, conversion unit and output unit. Temporarily crying ^ 匕 each temporary sentence is used to receive 17317twf.doc / g 200803184 and temporarily stored in the number of losers, their indignation The signal contains the most significant bit of the low significant byte. The decoder is electrically connected to the register, which uses the = least code least significant byte and the decoded minimum valid 兀, 'and control signal, and in the second class Decode the most significant and: the most significant byte of the 作为 as the second control signal. The conversion is electrically connected to the decoder, the conversion current is turned over, and the second period is based on; The round-up single-electron connection to the conversion list, in order to temporarily store the first conversion current during the first period, = convert the current and temporarily store the first conversion current junction, the present invention proposes a digital analog data conversion method, Used to replace the digital input message with (4) shouting. The number method includes, and the input signal, wherein the digits are input to the signal packet tuple and the decoded least significant byte is used as the first control = the most significant byte and the most significant bit decoded; the solution: control Into the second conversion power = ί stream as the ship = Xun ^ brother - the second conversion of the conversion current and amplification of the digital analog data converter of the present invention because of the least significant bit of the number of digits input _ the most ^ early 4 Row-to-digital analog data conversion, so the architecture is simple. Again, 17317twf.d〇c/g 200803184 The current required to perform the most significant byte conversion is based on the most expensive. The above-mentioned and other objects, features and advantages are more apparent as the currents required for the conversion of the bits, and thus the power consumption, are substantially reduced. The embodiment of Fang Yijia, in conjunction with the drawings, is described in detail. [Embodiment] Changing the cry: The digital analog data transfer shown in the embodiment of the invention. ^ 照图b digital analog data converter 1 : package: to, point ουτ. Among them, temporary storage (four). Receiving digits: =' The meter decoder 120 is electrically connected to the register ιι, the switch is electrically connected to the thermometer decoder 120' and the output unit 140 is the converting unit m. Further, the wheeling unit 14G includes an output =, a current amplifier 142, and a current register 143. The output node τ is electrically connected to the current amplifier 142 and the current register ι43, and the output of the current amplifier ϋΐ42 and the current register 143 is analogized as a signal; ^Sustaining benefit U0 is used to receive and temporarily store the digital input signal for 120 pieces of data in the temperature decoding state. The conversion unit Bo includes a plurality of current suppliers 丨31 to 13X' and each of the current supply wires determines whether to supply current to the output unit 14A according to the received control signal, wherein ^==2^-1. Here, it can be designed that the output currents supplied from the current suppliers 131 to χ3χ to the wheel-out unit 140 are substantially the same, which is different from the conventional binary weighted conversion of 9 20080318+ 17317 twf.doc/g. Called a linearly weighted conversion. According to the concept of the present invention, the digital input signal of the (M+L) bit is cut into the most significant byte having the Μ bit and the least significant byte having the L bit to be processed separately, where M And L is a positive integer and. During the first period, the thermometer decoder 120 decodes the least significant byte and uses the coded least significant byte as the first control signal to control the conversion unit 130 to output the first conversion current Itmp, according to the first control signal. . At this time, in the output unit 140, the output switch 141 is switched to the end point c, i.e., the points A and C form a path. Therefore, the output switch 141 conducts the first switching current Itmp,1 to the current register 143, and temporarily stores the first switching current Itmp,1 by the current register 143. In the second step, the thermometer decoder reads the most significant byte and decodes the most significant byte as the second control minus to control the conversion list 7L 130 to rotate according to the second control signal. Two conversion currents Itmp, 2. At this time, in the output unit 14A, the output switch i4i is switched to the ??? B, that is, the terminals A and B form a path. Therefore, the output switch 141 conducts, the second switching current Itmp, 2 to the current amplifier 142, and the second conversion current Itmp, 2 is amplified by the current amplification 142. Finally, the output node OUT is combined with the first conversion current of the current register 143 and the second conversion current Itmp, 2 output by the current amplifier 142, which is an analog output signal. In general, if M+L is even, it is designed to be equal to L. If μ+£ is odd, it is designed to be equal to L-b. So the minimum current supply 17317twfdoc/g 200803184 is available to make the architecture simple and low power consumption. . The group's conversion unit is applied to handle the most thief's current thief current after converting the least significant bit byte: ^ bit read and then magnify the most effective pair of the least significant bit group ang ^ ^ also pick (4) - conversion unit sub-conversion map =:: Γ: two: = _ material converter block diagram,; two digit analog data = there are: the highest bit: == yuan: take the low-value group. Figure 4 Lun. 哭 Crying, old 舛醢 m. . % and θ are the relationship between the 22-four input/output of the digital-scale analog code conversion in the digital analog data conversion shown in Fig. 2. Referring to Figures 2 and 4 at the same time, the register is latched by the digits, so the register of the scratchpad. Moreover, since the least significant byte has 3 ports, the thermometer decoder 220 receives the control signal of the 3-bit input signal. And the 'control bit' Γ 24 〇 Γ - a current supply to determine whether to provide current to the output list (four) for the need for 7 current supplies 'that is, the conversion unit 230 includes the package supply states 231 - 237. Each of the current supply 11 includes a side switch and a ', and the towel switch determines the rain source from the current source to the output unit according to the control. With the current supply, the 23 M1 contains the switch 250 and the current source. Wherein, the switch 25 receives the control signal of the logic 1, and the switch 250 is "on", and at this time, the switch 25 is changed to the vertical point Y (ie, the end point and the gamma forming path) to make the current source 鸠 11 200803184^17317twf.doc/g The output current i is connected to the control signal of the output unit 24i to the logic 0. The switch 250 is "disconnected, and: 1 if the receiving end is changed to the end, the endpoint X and Z form a path". ==:r~, low bit ==,,,, bit input signal is "_11G", then the most valid, Θ^ is _ 'calling the recording tuple is "11G". During the first period, decoding $220 receives the least significant byte "UG,, according to Figure 4, the decoder wheel ^ output relationship 'thermometer decoder 220 will ^^2:^/(1)(1)~control signal~(1)(1)" from the far left = valid bit 疋 (ie ''〇,,) to the rightmost least significant bit (ie "gate, this flow (four) current supply 231~237 switch, where the electric 2, the second, the switch 250 Disconnected, while other current supplies 232~61, two = conduction. So 'the first conversion current 1 ton 1 current value is output ^ 241 lead the first conversion current to the current register, sub-current register 243 temporarily stores the first switching current. You - ^ '者' in the second period, the thermometer decoder 220 receives the most significant r: two and dangerous! ° 'The thermometer decoder input/output according to Figure 4 is off" 'The phoenix decoding state 220 will output a control signal "0000011," control signal = \Γ〇0011 these seven bits 控制 respectively control the switches of the current suppliers 231 to 237 'where the current suppliers 231 to 235 are turned off And the current is for 12 17317twf.doc/g 200803184
^ i A A VT 應裔236與237的開關導通。所以，第二轉換電流Itmp，2 之電流值為21，輪出開關241導接第二轉換電流Itmp，2至 電流放大益242 ’並由電流放大器242放大8(=23)倍而變 成161。最後，在輪出節點out結合電流暫存器243輸出 的值為61之第一轉換電流Itmp，l以及電流放大器242輸出 的值為161之第二轉換電流Itmp，2作為類比輸出訊號，因 此對應到數位輸入訊號“〇1〇11〇”的類比輸出訊號之電流值 為 221 〇 圖3A與圖3B繪示為圖2所示數位類比資料轉換器中 電流供應恭的開關之實施例，在此以電流供應器231的開 關25f為例。請參照圖3A，開關25〇的一種實施方法係由 =個三端開關301所構成，三端開關3〇1若接收到控制訊 唬CT的某一位元為邏輯〗則切換到端點γ，若接收到某 位元為邏輯0則切換到端點Z。請參照圖3B，開關250 的另種貫施方法係由兩個二端開關311與312所構成。 一端開關311若接收到控制訊號CT的某一位元為邏輯1 則導接其兩端的訊號，此時另一個二端開關312必須接收 控，訊號〜CT中與上述某—位元相應的位元，故不導接其 兩端1訊號。顯然地，由於控制訊號CT與〜CT互補，所 以一鈿開關311與312其中一個導接訊號則另一個不導接 訊號。 圖5繪不為圖2所示數位類比資料轉換器中轉換單元 23〇之方塊圖。請參照圖5，以電流供應器231為例，其開 關250採用圖3B所示的開關設計方式。另外，電流源260 13 17317twf.doc/g 200803184 由一個NMOS電晶體配合參考電流產生器57〇實現。其 中’參考電W產生态570接收電壓vref，並利用運算放大 裔571作回授控制以更穩定的電壓偏壓電晶體。電晶 體572〜575形成一電流鏡，其將電晶體574的電流映射 到電晶體575的電流，再透過電晶體576產生電壓偏 壓電流源260以產生固定電流I。 圖6為依照本發明再一實施例所緣示的數位類比資料 轉換器之錢目’其與目2所雜鋪比資料轉換哭細 相似。請同時參_ 2朗6，二者不同處在於轉^單元 的設計方式，凡熟習此技藝者應可輕易了解，在此 做描述。雖然上述實施例以具偶數個位元的數位輸入訊 為例，但是㈣修正亦可_於具奇數個位元的數位輸二 訊號。舉例來說，若數位輸入訊號為“1001010”，則最古右 效位元組為‘嘗，，而最低有效位元組為“細，，，t 述具偶數個位元的触以訊號之處财^，即可。 表T、上所述，本發明之數位類比 = ，單元分別對數位輸入_的最低有 =兀組進仃？位類比資料轉換，因此架構簡單。再：， 換單元在進行最高有效位元組轉換時所需的中 有效位元組轉換時所需的電流 雖然本發明已以較佳實施 14 200803184, 17317twfdoc/g 和範圍内，當可作些許之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1為依照本發明一實施例所繪示的數位類比資料轉 換器之方塊圖。 圖2為依照本發明另一實施例所繪示的數位類比資料 轉換器之方塊圖。 圖3A與圖3B繪示為圖2所示數位類比資料轉換器中 電流供應器的開關之實施例。 圖4繪示為圖2所示數位類比資料轉換器中溫度計解 碼器的輸入/輸出之關係。 圖5繪示為圖2所示數位類比資料轉換器中轉換單元 之方塊圖。 圖6為依照本發明再一實施例所繪示的數位類比資料 轉換器之方塊圖。 【主要元件符號說明】 100、200、600 :數位類比資料轉換器 110、210、610 :暫存器 120、220、620 :溫度計解碼器 130、230、630 :轉換單元 131〜13X、231〜237、631〜637 :電流供應器 140、 240、640 :輸出單元 141、 241、641 :輸出開關 142、 242、642 :電流放大器 15 200803184, i7317twf.d〇c/g 143、243、643 ··電流暫存器 250、650 :開關 260、660 :電流源 301 :三端開關 311、312 :二端開關 570 :參考電流產生器 571 :運算放大器 572〜576 :電晶體 R :電阻 OUT :輸出節點 A、B、C、X、Y、Z :節點 Itmp :第一或第二轉換電流 CT、〜CT :控制訊號^ i A A VT 236 and 237 switches are turned on. Therefore, the current value of the second switching current Itmp, 2 is 21, and the turn-off switch 241 leads the second switching current Itmp, 2 to the current amplification benefit 242' and is amplified by the current amplifier 242 by 8 (= 23) times to become 161. Finally, the first conversion current Itmp, which is outputted by the current register 243 in conjunction with the current register 243, and the second conversion current Itmp, 2 outputted by the current amplifier 242 as the analog output signal, therefore correspond to The current value of the analog output signal to the digital input signal "〇1〇11〇" is 221. FIG. 3A and FIG. 3B are diagrams showing an embodiment of the current supply switch in the digital analog data converter shown in FIG. Take the switch 25f of the current supply 231 as an example. Referring to FIG. 3A, an implementation method of the switch 25A is composed of = three-terminal switch 301, and the three-terminal switch 3〇1 switches to the end point γ if it receives a control bit of the control signal CT. If a bit is received as logic 0, it switches to endpoint Z. Referring to FIG. 3B, another method of applying the switch 250 is formed by two two-terminal switches 311 and 312. When the one end switch 311 receives a signal of the control signal CT to be a logical one, the signal of the two ends of the control signal CT is connected. At this time, the other two-terminal switch 312 must receive the control, and the bit corresponding to the above-mentioned bit in the signal ~CT Yuan, so do not connect the signal at both ends. Obviously, since the control signal CT is complementary to the ~CT, one of the switches 311 and 312 conducts a signal and the other does not conduct a signal. Figure 5 is a block diagram of the conversion unit 23 in the digital analog data converter shown in Figure 2. Referring to Figure 5, the current supply 231 is taken as an example, and its switch 250 adopts the switch design shown in Figure 3B. In addition, the current source 260 13 17317twf.doc/g 200803184 is implemented by an NMOS transistor in conjunction with a reference current generator 57A. The 'reference power W generation state 570 receives the voltage vref and uses the operational amplifier 571 for feedback control to bias the transistor with a more stable voltage. The electric crystals 572-575 form a current mirror that maps the current of the transistor 574 to the current of the transistor 575, and the transistor 576 generates a voltage bias current source 260 to generate a fixed current I. Fig. 6 is a view similar to the data conversion of the digital analog data converter according to still another embodiment of the present invention. Please also refer to _ 2 Lang 6, the difference between the two is in the design of the unit. Anyone who is familiar with this technique should be able to understand it easily and describe it here. Although the above embodiment takes a digital input with an even number of bits as an example, the (4) correction may also be a digital input signal having an odd number of bits. For example, if the digital input signal is "1001010", the oldest right-effect byte is 'taste, and the least significant byte is "fine,,, t, the even-numbered bit is touched by the signal. Table T, above, the digital analogy of the present invention =, the unit has a minimum of = 兀 group input _ bit analog data conversion, so the architecture is simple. The current required for the conversion of the medium effective byte required for the most significant byte conversion, although the present invention has been implemented in a preferred embodiment 14 200803184, 17317 twfdoc/g, and when a slight change and retouching is possible, Therefore, the scope of the present invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a digital analog data converter according to an embodiment of the invention. A block diagram of a digital analog data converter in accordance with another embodiment of the present invention. Figures 3A and 3B illustrate an embodiment of a switch for a current supply in the digital analog data converter of Figure 2. Draw as the number shown in Figure 2 Figure 5 is a block diagram of a conversion unit in the digital analog data converter shown in Figure 2. Figure 6 is a block diagram of a conversion unit in the digital analog data converter shown in Figure 2. Figure 6 is a block diagram of a conversion unit in the digital analog data converter of Figure 2. Block diagram of digital analog data converter. [Main component symbol description] 100, 200, 600: digital analog data converter 110, 210, 610: register 120, 220, 620: thermometer decoder 130, 230, 630: Conversion units 131 to 13X, 231 to 237, 631 to 637: current suppliers 140, 240, 640: output units 141, 241, 641: output switches 142, 242, 642: current amplifiers 15 200803184, i7317twf.d〇c/ g 143, 243, 643 · Current register 250, 650: Switch 260, 660: Current source 301: Three-terminal switch 311, 312: Two-terminal switch 570: Reference current generator 571: Operational amplifier 572~576: Electricity Crystal R: resistance OUT: output node A, B, C, X, Y, Z: node Itmp: first or second switching current CT, ~CT: control signal
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