TW200803131A - Generation circuit of reference voltage - Google Patents
Generation circuit of reference voltage Download PDFInfo
- Publication number
- TW200803131A TW200803131A TW95119475A TW95119475A TW200803131A TW 200803131 A TW200803131 A TW 200803131A TW 95119475 A TW95119475 A TW 95119475A TW 95119475 A TW95119475 A TW 95119475A TW 200803131 A TW200803131 A TW 200803131A
- Authority
- TW
- Taiwan
- Prior art keywords
- reference voltage
- current
- bipolar transistor
- voltage
- transistor
- Prior art date
Links
- 238000004088 simulation Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 9
- 239000000872 buffer Substances 0.000 description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 241001649081 Dina Species 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 235000003642 hunger Nutrition 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Landscapes
- Control Of Electrical Variables (AREA)
Abstract
Description
200803131 » 九、發明說明: 【發明所屬之技術領域】 本發明係有關-種參考電壓產生電路,制是_一種能根 據需要調整輸出電壓且幾乎無關溫度變化的參考電壓產生電路。 5 【先前技術】 在電子電財,時常需要參考電壓產生器供應—穩定的參考 電壓。圖1係一傳統的參考電壓產生器10,其包括一能隙參考電 壓電路12供應無關溫度變化的電壓Vbg,電阻則及咫串聯在參 1〇考電壓Vref及接地GND之間,當PM0S電晶體16操作於飽和區時, 運异放大器14透過電阻R1形成負回授,所以電壓Vfb等於電壓 Vbg ’因此參考電壓vref的大小就取決於電阻R1及R2以及電壓 Vbg。在參考電壓產生器1〇中,參考電壓Vref的大小可以達到 (VDD-Vsd),其中,VDD為電源電壓,而Vsd為PM0S電晶體16的源 15極與汲極之間的壓差,但PM0S電晶體16的源極係連接至電源電 壓VDD ’由於源極與閘極之間有追隨的現象,故當電源電壓 、 中有雜訊時,將使PM0S電晶體16閘極上的信號Vg也受到雜訊的 影響,導致PM0S電晶體16進入三極管(triode)區,進而影響到 參考電壓Vref,換言之,參考電壓產生器10具有較差的電源供應 20 抑制率(Power Supply Rejection Ratio; PSRR)。 為了提高參考電壓產生器10的PSRR能力,如圖2所示的參 200803131 考電壓產生器20,一般係將PM0S電晶體16換成NM0S電晶體22, 電源電壓VDD連接NM0S電晶體22的沒極,因此電源電壓vdd中 的雜訊並不影響NM0S電晶體22閘極上的信號Vg,是以參考電壓 產生器20具有較好的PSRR,然而,由於信號Vg與參考電壓Vref 之間有追隨關係,Vg=Vref+Vth,其中Vth係NM0S電晶體22的臨 界電壓,因此,若NM0S電晶體22要維持在飽和區,則參考電壓200803131 » IX. Description of the Invention: [Technical Field] The present invention relates to a reference voltage generating circuit which is a reference voltage generating circuit capable of adjusting an output voltage as needed and having almost no temperature change. 5 [Prior Art] In electronic electricity, it is often necessary to supply a reference voltage generator—a stable reference voltage. 1 is a conventional reference voltage generator 10, which includes a bandgap reference voltage circuit 12 for supplying an irrelevant temperature change voltage Vbg, and a resistor connected in series between the reference voltage Vref and the ground GND, when the PM0S is electrically When the crystal 16 operates in the saturation region, the operational amplifier 14 forms a negative feedback through the resistor R1, so the voltage Vfb is equal to the voltage Vbg'. Therefore, the magnitude of the reference voltage vref depends on the resistors R1 and R2 and the voltage Vbg. In the reference voltage generator 1 ,, the magnitude of the reference voltage Vref can reach (VDD - Vsd), where VDD is the supply voltage and Vsd is the voltage difference between the source 15 and the drain of the PMOS transistor 16, but The source of the PM0S transistor 16 is connected to the power supply voltage VDD ' because of the following phenomenon between the source and the gate. Therefore, when there is noise in the power supply voltage, the signal Vg on the gate of the PM0 transistor 16 is also Under the influence of noise, the PM0S transistor 16 enters the triode region, thereby affecting the reference voltage Vref. In other words, the reference voltage generator 10 has a poor Power Supply Rejection Ratio (PSRR). In order to improve the PSRR capability of the reference voltage generator 10, the reference voltage generator 20 shown in FIG. 2 generally replaces the PMOS transistor 16 with the NMOS transistor 22, and the power supply voltage VDD is connected to the immersed transistor of the NM0S transistor 22. Therefore, the noise in the power supply voltage vdd does not affect the signal Vg on the gate of the NMOS transistor 22, so that the reference voltage generator 20 has a better PSRR. However, since the signal Vg has a follow-up relationship with the reference voltage Vref, Vg=Vref+Vth, where Vth is the threshold voltage of the NM0S transistor 22, therefore, if the NMOS transistor 22 is to be maintained in the saturation region, the reference voltage
Vref必須小於(麵-Vsd-Vth),假如電壓電壓VDD的最低工作電壓 為3V,而所需的參考電壓Vref為2·5ν時,參考電壓產生器加 便不適用。 圖3係根據參考電壓產生器10利用電腦軟體所設計的電路, 其中能隙參考電壓電路30對應圖i中的能隙參考電壓電路12,比 例電壓產生器32對應圖1中運算放大器14、PM0S電晶體16、電 阻R1及R2所組成的放大電路,電路34及36則是輸出緩衝器。 15 圖4係圖3巾能隙參考電壓電路30的輸丨電壓Vbg在不同頻率下 的PSRR模擬圖,其中χ軸係頻率,γ軸係電壓的诎值。圖5係圖 3中比例電壓產生! 32輸出的電壓聰及爾在不同頻衬的 核擬圖,其中X轴係頻率,γ軸係電壓的DB值,曲線38係 電壓vim ’曲線39係電壓職丨。圖6細中輪出緩衝器料輸 出的參考電壓vrt的爾模_,其中χ轴係頻率,γ轴係電壓 的DB值。圖7係圖3中輸出緩衝Vref must be smaller than (face-Vsd-Vth). If the minimum operating voltage of the voltage VDD is 3V and the required reference voltage Vref is 2·5ν, the reference voltage generator is not applicable. 3 is a circuit designed according to the reference voltage generator 10 using a computer software, wherein the bandgap reference voltage circuit 30 corresponds to the bandgap reference voltage circuit 12 in FIG. 1, and the proportional voltage generator 32 corresponds to the operational amplifier 14, PM0S in FIG. Amplifier circuit composed of transistor 16, resistors R1 and R2, and circuits 34 and 36 are output buffers. 15 is a PSRR simulation diagram of the output voltage Vbg of the band gap reference voltage circuit 30 at different frequencies, wherein the χ axis frequency and the γ axis voltage 诎 value. Figure 5 is the proportional voltage generated in Figure 3! The output voltage of 32 is the same as that of the different frequency linings, in which the X-axis frequency, the γ-axis voltage DB value, and the curve 38-series voltage vim' curve 39-series voltage job. In Fig. 6, the modulo _ of the reference voltage vrt output from the buffer material is taken out, wherein the χ-axis frequency and the DB value of the γ-axis voltage. Figure 7 is the output buffer in Figure 3.
輸出的參考電壓聰的PSRR 模擬圖,其中χ軸係頻率,γ軸 你电氩的DB值。《 4顯示能隙參 6 20 200803131 • 1 考電壓電路30所輸出的電壓Vbg的DB值最大是在-28左右,而電 壓Vbg經比例電壓產生器32放大後所得的電壓VRT1及VRM的邡 值最大分別為-4及-6左右,如圖5所示,所以,能隙參考電壓電 路30的PSRR雜比例電壓產生||32良好,因此,若能直接由能 5隙參考電壓電路3G提供參考電壓聰及娜卜應能得到具有良 •好爾的參考電壓VRT及讎。然而,雖然能隙參考電壓電路具 有較佳的PSRR以及能提供無關溫㈣化的穩定電壓之優點,^ 是,習知的能隙參考電壓電路係利用雙極性電晶體來產生電壓, 即使適當的設計雙極性電晶體可以提供無關溫度變化的電壓,作 10習知的能隙參考電壓電路僅能供應1.23V左右的電壓。 — 因此,一種能根據需要調整輸出電壓的參考電壓產生電路, 乃為所冀。 【發明内容】 15本發_目的之―,在於提出—魏根據需要調整輸出電壓 的參考電壓產生電路。 、根據本發明,-種參考電壓產生電路包括—雙極性電晶體接 成-一極體,-電岐接在該參考賴產生電路的輸出端及雙極 性電晶體之間’-第-電流源供應—具有正溫度係數的第一電流 至該電阻,以及-第二電流源,供應一具有負溫度係數的第二: 流至該電阻。 7 200803131 由於本發明增加了具有負溫度係數的該第二電流至該電阻, 因此,本發明可藉由調整第一及第二電流與電阻得到所需要且幾 乎無關溫度變化的參考電壓。 5【實施方式】 圖8係本發明的實施例,在參考電壓產生電路4〇中,自偏電 路401供應電流Iptat ’ PM0S電晶體402及雙極性電晶體明串聯 在電源電壓VDD及接地GND之間,pm〇S電晶體404、電阻R3及雙 極性電晶體Q4串聯在電源電壓vdd及接地GND之間,PMOS電晶體 10 414接成一電容,連接在參考電壓產生電路40的輸出端,以穩定 參考電壓Vref,其中PM0S電晶體402及404鏡射電流Iptat分別 產生電流12及II。在自偏電路401中,PMOS電晶體406及408 與NMOS電晶體410及412形成兩個串疊(cascode)的電流鏡,雙 極性電晶體Q1經電阻R1連接NM0S電晶體412,雙極性電晶體Q2 u則連接NM0S電晶體410,又NM0S電晶體410及412組成電流鏡, 因此節點A及B的電位相等,故可求得通過電阻w的電流The output of the reference voltage is Sonic's PSRR simulation plot, where the χ axis is the frequency, and the γ axis is the DB value of your argon. <<4 Display Energy Gap Parameter 6 20 200803131 • 1 The DB value of the voltage Vbg outputted by the test voltage circuit 30 is at most about -28, and the voltage Vbg is amplified by the proportional voltage generator 32 and the voltages VRT1 and VRM are amplified. The maximum is about -4 and -6, as shown in FIG. 5, therefore, the PSRR of the bandgap reference voltage circuit 30 produces a good ||32, so if it can be directly provided by the 5-band reference voltage circuit 3G The voltage and the Nab should be able to get the reference voltages VRT and 雠 with good and good. However, although the bandgap reference voltage circuit has the advantages of a better PSRR and a stable voltage that can provide an irrelevant temperature, the conventional bandgap reference voltage circuit uses a bipolar transistor to generate a voltage, even if appropriate. Designing a bipolar transistor can provide a voltage that is independent of temperature changes. A conventional gap-free reference voltage circuit can only supply a voltage of about 1.23V. — Therefore, a reference voltage generating circuit that can adjust the output voltage as needed is what it is. SUMMARY OF THE INVENTION The purpose of the present invention is to provide a reference voltage generating circuit for adjusting the output voltage as needed. According to the present invention, the reference voltage generating circuit includes a bipolar transistor connected to a body, and is electrically coupled between the output of the reference generating circuit and the bipolar transistor. Supplying - a first current having a positive temperature coefficient to the resistor, and - a second current source, supplying a second having a negative temperature coefficient: flowing to the resistor. 7 200803131 Since the present invention increases the second current having a negative temperature coefficient to the resistor, the present invention can obtain a reference voltage that is required and hardly related to temperature changes by adjusting the first and second currents and resistances. [Embodiment] FIG. 8 is an embodiment of the present invention. In the reference voltage generating circuit 4, the self-biasing circuit 401 supplies a current Iptat 'PM0S transistor 402 and a bipolar transistor in series with the power supply voltage VDD and the ground GND. The pm 〇S transistor 404, the resistor R3 and the bipolar transistor Q4 are connected in series between the power supply voltage vdd and the ground GND. The PMOS transistor 10 414 is connected to a capacitor and connected to the output of the reference voltage generating circuit 40 for stabilization. The reference voltage Vref, wherein the PM0S transistor 402 and the 404 mirror current Iptat generate currents 12 and II, respectively. In the self-biasing circuit 401, the PMOS transistors 406 and 408 form two cascode current mirrors with the NMOS transistors 410 and 412, and the bipolar transistor Q1 is connected to the NM0S transistor 412 via the resistor R1. The bipolar transistor Q2 u is connected to the NM0S transistor 410, and the NM0S transistors 410 and 412 form a current mirror, so the potentials of the nodes A and B are equal, so the current through the resistor w can be obtained.
Iptat=(Veb2-Vebl)/Rl 公式 1 20其中,Vebl係雙極性電晶體qi的射極與基極之間的壓差,Veb2 係雙極性電晶體Q2的射極與基極之間的壓差。雙極性電晶體Q1 8 200803131Iptat=(Veb2-Vebl)/Rl Equation 1 20 where Veb is the differential pressure between the emitter and the base of the bipolar transistor qi, and Veb2 is the voltage between the emitter and the base of the bipolar transistor Q2. difference. Bipolar transistor Q1 8 200803131
及Q2各接成一二極體,根據PNP 雙極性晶體的二極體電流公式 15 而And Q2 are each connected to a diode, according to the diode current formula 15 of the PNP bipolar crystal
Id=IseffxeVeb/nVtId=IseffxeVeb/nVt
Iseff=AREA><Is 公式3Iseff=AREA><Is Equation 3
Vt=kxT/q 公式4 其中’ Iseff係飽和電流’ AREA係雙極性電晶體的pN才矣 Is係雙極性電晶體的單位面積飽和電流,Vt是埶 n电壓,k係油 曼(Boltzman)常數,q係1電子的電荷量,τ係絕對、、地 於1〜2之間的常數。根據公式2可得 積 為介 公式5Vt=kxT/q Equation 4 where ' Iseff is the saturation current' The PN of the AREA bipolar transistor is the saturation current per unit area of the bipolar transistor, Vt is the 埶n voltage, and the k-system is the Boltzman constant. q is a charge of 1 electron, and τ is a constant between 1 and 2. According to formula 2, the product can be obtained.
Veb2-Vebl=nVtxln(Iseffl/Iseff2) 其中,Iseffl係電晶體Q1的飽和電流,Iseff2係電晶體Q2的飽 和電流。將公式3及4代入公式5中可得Veb2-Vebl = nVtxln(Iseffl/Iseff2) where Iseffl is the saturation current of transistor Q1 and Iseff2 is the saturation current of transistor Q2. Substituting formulas 3 and 4 into formula 5
Veb2-Vebl=[nxkxTx 1 n(AREA1 /AREA2)]/q 公式 6 200803131 其中’ AREA1係雙極性電晶體Q1的尺寸,ARea2係雙極性電晶體 Q2的尺寸,兩個雙極性電晶體的參數Is是相同的。將公式6代入 公式1可得電流 5Veb2-Vebl=[nxkxTx 1 n(AREA1 /AREA2)]/q Equation 6 200803131 where 'AREA1 is the size of bipolar transistor Q1, the size of ARea2 bipolar transistor Q2, the parameter of two bipolar transistors Is Are the same. Substituting Equation 6 into Equation 1 gives current 5
Iptat=[nxkxTxln(AREAl/AREA2)]/(qxRl) 公式 7 其中,n、k、ln(AREAl/AREA2)、q及R1均為定值,因此,當絕對 飢度T上升時,電流iptat將隨著增加,故電流iptat具有正溢 10度係數。 另一方面,PM0S電晶體404及408連接形成一電流鏡,以鏡 射電流Iptat產生電流II至電阻R3,其中PM〇s電晶體4〇4與4〇8 的尺寸比為N : 1,故電流iLlptat,PM0S電晶體402及408 連接开>成一電流鏡,以鏡射電流Iptat產生電流η,其中pM〇s 15電晶體402及408的尺寸比為Μ : 1,故電流i2=MxIptat,電阻R2 連接在雙極性電晶體Q3的射極與基極之間,其上的電流為Iptat=[nxkxTxln(AREAl/AREA2)]/(qxRl) Equation 7 where n, k, ln(AREAl/AREA2), q and R1 are fixed values, therefore, when the absolute hunger T rises, the current iptat will As it increases, the current iptat has a positive 10 degree coefficient. On the other hand, the PMOS transistors 404 and 408 are connected to form a current mirror, and the mirror current Iptat generates a current II to a resistor R3, wherein the size ratio of the PM〇s transistors 4〇4 to 4〇8 is N:1. The current iLlptat, the PM0S transistors 402 and 408 are connected to a current mirror, and the current η is generated by the mirror current Iptat, wherein the size ratio of the pM〇s 15 transistors 402 and 408 is Μ: 1, so the current i2=MxIptat, The resistor R2 is connected between the emitter and the base of the bipolar transistor Q3, and the current on the resistor is
Intat=Veb3/R2 、 ^ 。 公式8 20其中,Veb3係雙極性電晶體q3射極與基極之間的壓差。根據 雙極性電晶體的特性,PNP雙極性電晶體Q3射極與基極之間的壓 200803131 差Veb3係隨溫度上升而降低,換言之,電壓Veb3具有負溫度係 數,故電流Intat也具有負溫度係數。又根據雙極性電晶體的電 流公式可得知,雙極性電晶體q3的基極電流Intat=Veb3/R2, ^. Equation 8 20 wherein Veb3 is the pressure difference between the emitter and base of the bipolar transistor q3. According to the characteristics of the bipolar transistor, the voltage between the emitter and the base of the PNP bipolar transistor Q3 is 200803131. The difference Veb3 decreases with temperature rise. In other words, the voltage Veb3 has a negative temperature coefficient, so the current Intat also has a negative temperature coefficient. . According to the current formula of the bipolar transistor, the base current of the bipolar transistor q3 can be known.
Ib=(I2-Intat)/(/3+l) 公式 9 將公式8代入公式9可得Ib=(I2-Intat)/(/3+l) Equation 9 Substituting Equation 8 into Equation 9
Ib=Mx Iptat/( β +1 )-Veb3/ [ (/3 +1 )xR2 ] 公式 10 其中,/5係雙極性電晶體Q3的電流增益。參考電產生壓電路 輪出的參考電壓 公式11Ib=Mx Iptat/(β +1 )-Veb3/ [ (/3 +1 )xR2 ] Equation 10 where is the current gain of the /5-system bipolar transistor Q3. Reference voltage generated by the reference voltage generating circuit
Vref=VR3+Veb4 15 其中,VR3係電阻R3上的跨壓,veb4係雙極性電晶體q4的射極 與基極之間的壓差。又 公式12 VR3=ItotalxR3 而通過電阻R3的電流 11 20 200803131 I total=11+Intat+ Ib=Nx Iptat+ Intat+ lb 公式 13 將公式7、8及10代入公式13可得Vref=VR3+Veb4 15 where VR3 is the voltage across the resistor R3 and the voltage difference between the emitter and the base of the veb4 bipolar transistor q4. Equation 12 VR3=ItotalxR3 and the current through resistor R3 11 20 200803131 I total=11+Intat+ Ib=Nx Iptat+ Intat+ lb Equation 13 Substituting Equations 7, 8 and 10 into Equation 13
nxkxTxlnCnxkxTxlnC
Itotal = Nx AREA1AREA2 qxRlItotal = Nx AREA1AREA2 qxRl
Veb3 公式14Veb3 formula 14
MxIptat__Jeb3^ + ~^+T_ (^ + 1)xR2 再將公式12及14代入公式11可得參考電壓 nxkxTxlnC^M)MxIptat__Jeb3^ + ~^+T_ (^ + 1)xR2 Substituting the formulas 12 and 14 into the formula 11 gives the reference voltage nxkxTxlnC^M)
Vref = Veb4 + [N x--4EEA2 ( Veb3Vref = Veb4 + [N x--4EEA2 ( Veb3
QxRl R2 公式 15QxRl R2 formula 15
+ Mxlptat Veb3 β + l C^ + l)xR2J 從公式15可看出,只要調整電阻町、咫及肋以及尺寸比 便能調整參考電壓Vref。 圖9顯示利用電腦軟體設計的電路,其中電路5〇係根據圖8 15的參考電壓產生電路40所設計的,電路52及54則是輸出緩衝器。 圖10及圖11是根據圖9的電路所做的模擬圖。圖1〇中最上面^所 12 200803131 示的曲線6G係圖9電路5G所輸出的參考電壓聰在不同田 的模擬圖,巾崎_㈣是· 5Q所輪㈣參考電 在不同溫度時的模擬圖’最下面的曲線64是將曲線6。減去曲線 62後所得_線,其中,χ軸表示溫度,γ轴表示賴值。從圖 10的模擬财可看出,參考電壓聰約為1·5V,參考電壓則 約為2.4V,兩者都高於f知的123V,而且幾乎不受溫度影響。 圖11中上面的曲線7(H系電路50所輸出的參考電壓侧在不同 頻率下的PSRR模擬圖,下面的曲線72係電路5〇所輸出的參考電 壓VRT1在不同頻率下的pSRR模擬圖,其中,χ軸為頻率,γ軸為 電壓的DB值。從圖η中可看出,參考電壓麵及刪的娜 至少都有-28dB。所以’本發_參考電壓產生電路不但具有良好 的PSRR能力,並可以根_要調整所輸㈣幾乎無關溫度變化之 參考電壓。 15【圖式簡單說明】 圖1係習知的參考電壓產生器; 圖2係另一習知的參考電壓產生器; 圖3顯示利用電腦軟體設計的電路; 圖4係® 3中能隙參考電壓電路3〇的輸出電壓㈣的朽服 20模擬圖; 圖5係圖3中比例電壓產生器32輸出的電壓VRT1及呢扮的 13 200803131 PSRR模擬圖; 圖6係圖3中參考電壓VRT的PSRR模擬圖; 圖7係圖3中參考電壓VRB的PSRR模擬圖; 圖8係本發明的實施例; 5 圖9顯示利用電腦軟體設計的電路; 圖10係圖9中參考電壓VRB及VRT在不同溫度時的模擬圖; 以及 圖11係圖9中參考電壓VRB及VRT在不同頻率下的psRR樓 擬圖。 10 【主要元件符號說明】 10 參考電壓產生器 12 能隙參考電壓電路 14 運算放大器 15 16 PM0S電晶體 20 參考電壓產生器 22 電晶體 30 能隙參考電壓電路 32 比例電壓產生器 20 34 輸出緩衝器 36 輸出緩衝器 200803131 38 電壓VRT1的曲線 39 電壓VRB1的曲線 40 參考電壓產生電路 401 自偏電路 5 402 PMOS電晶體 404 PMOS電晶體 406 PMOS電晶體 408 PMOS電晶體 410 NM0S電晶體 ίο 412 丽0S電晶體 414 PMOS電晶體 50 參考電壓產生電路 52 輸出缓衝器 54 輸出缓衝器 is 60 參考電壓VRB1的曲線 - 62 參考電壓VRT1的曲線 64 曲線60減去曲線62後所得的曲線 70 參考電壓VRB1的曲線 72 參考電壓VRT1的曲線 15+ Mxlptat Veb3 β + l C^ + l)xR2J As can be seen from Equation 15, the reference voltage Vref can be adjusted by adjusting the resistance, the ridge and the rib and the size ratio. Figure 9 shows a circuit designed using computer software, wherein circuit 5 is designed in accordance with reference voltage generating circuit 40 of Figure 815, and circuits 52 and 54 are output buffers. 10 and 11 are simulation diagrams made according to the circuit of Fig. 9. Fig. 1〇 The top of the ^^1212 0303131 shows the curve 6G is the simulation of the reference voltage output from the circuit 5G of Fig. 9 in different fields, Kawasaki _ (four) is · 5Q round (four) simulation of reference electricity at different temperatures The lowermost curve 64 of the figure is the curve 6. The _ line obtained after subtracting the curve 62, wherein the χ axis represents temperature and the γ axis represents lag. As can be seen from the simulation of Figure 10, the reference voltage is about 1.5V and the reference voltage is about 2.4V, both of which are higher than the known 123V, and are almost immune to temperature. In the upper curve 7 in FIG. 11 (the PSRR simulation diagram of the reference voltage side outputted by the H-system 50 at different frequencies, the lower curve 72 is the pSRR simulation diagram of the reference voltage VRT1 outputted by the circuit 5〇 at different frequencies, Among them, the χ axis is the frequency, and the γ axis is the DB value of the voltage. As can be seen from the figure η, the reference voltage surface and the deleted dina are at least -28 dB. Therefore, the 'this _ reference voltage generating circuit not only has a good PSRR. Capability, and can adjust the reference voltage that is transmitted (4) almost irrelevant to temperature changes. 15 [Simplified Schematic] FIG. 1 is a conventional reference voltage generator; FIG. 2 is another conventional reference voltage generator; Figure 3 shows the circuit designed with computer software; Figure 4 is the simulation diagram of the output voltage (4) of the bandgap reference voltage circuit 3 in the ® 3; Figure 5 is the voltage VRT1 output by the proportional voltage generator 32 in Figure 3. Figure 13 is a PSRR simulation diagram of the reference voltage VRT in Figure 3; Figure 7 is a PSRR simulation diagram of the reference voltage VRB in Figure 3; Figure 8 is an embodiment of the present invention; a circuit designed using computer software; Figure 1 0 is a simulation diagram of the reference voltages VRB and VRT at different temperatures in FIG. 9; and FIG. 11 is a psRR diagram of the reference voltages VRB and VRT at different frequencies in FIG. 9. 10 [Remarks of main components] 10 Reference voltage Generator 12 Bandgap Reference Voltage Circuit 14 Operational Amplifier 15 16 PM0S Transistor 20 Reference Voltage Generator 22 Transistor 30 Bandgap Reference Voltage Circuit 32 Proportional Voltage Generator 20 34 Output Buffer 36 Output Buffer 200803131 38 Curve of Voltage VRT1 39 Voltage VRB1 curve 40 Reference voltage generation circuit 401 Self-biasing circuit 5 402 PMOS transistor 404 PMOS transistor 406 PMOS transistor 408 PMOS transistor 410 NM0S transistor ί 412 MOS transistor 414 PMOS transistor 50 reference voltage generation circuit 52 Output Buffer 54 Output Buffer is 60 Curve of Reference Voltage VRB1 - 62 Curve of Reference Voltage VRT1 Curve of Curve 60 after subtraction of Curve 62 Curve of Reference Voltage VRB1 72 Curve of Reference Voltage VRT1
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW95119475A TW200803131A (en) | 2006-06-01 | 2006-06-01 | Generation circuit of reference voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW95119475A TW200803131A (en) | 2006-06-01 | 2006-06-01 | Generation circuit of reference voltage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200803131A true TW200803131A (en) | 2008-01-01 |
| TWI313531B TWI313531B (en) | 2009-08-11 |
Family
ID=44765570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW95119475A TW200803131A (en) | 2006-06-01 | 2006-06-01 | Generation circuit of reference voltage |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW200803131A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI416301B (en) * | 2010-07-27 | 2013-11-21 | Alpha Microelectronics Corp | Voltage and current reference circuit |
| US10241535B2 (en) | 2014-02-18 | 2019-03-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flipped gate voltage reference having boxing region and method of using |
| US11269368B2 (en) | 2014-02-18 | 2022-03-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flipped gate voltage reference and method of using |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI407289B (en) * | 2010-02-12 | 2013-09-01 | Elite Semiconductor Esmt | Voltage generator, thermometer and oscillator with the voltage generator |
-
2006
- 2006-06-01 TW TW95119475A patent/TW200803131A/en not_active IP Right Cessation
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI416301B (en) * | 2010-07-27 | 2013-11-21 | Alpha Microelectronics Corp | Voltage and current reference circuit |
| US10241535B2 (en) | 2014-02-18 | 2019-03-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flipped gate voltage reference having boxing region and method of using |
| US11068007B2 (en) | 2014-02-18 | 2021-07-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flipped gate voltage reference and method of using |
| US11269368B2 (en) | 2014-02-18 | 2022-03-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flipped gate voltage reference and method of using |
| US12038773B2 (en) | 2014-02-18 | 2024-07-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flipped gate voltage reference and method of using |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI313531B (en) | 2009-08-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102483637B (en) | Compensation bandgap | |
| TWI505062B (en) | Temperature independent reference circuit | |
| JP5085238B2 (en) | Reference voltage circuit | |
| TW201124812A (en) | Fast start-up low-voltage bandgap reference voltage generator | |
| CN102981545B (en) | Band gap reference voltage circuit with high-order curvature compensation | |
| TWI234645B (en) | Temperature sensing apparatus and methods | |
| CN105974996B (en) | Reference voltage source | |
| TW200937168A (en) | Bandgap reference circuit with reduced power consumption | |
| TW200944989A (en) | Low voltage current and voltage generator | |
| CN207623828U (en) | A kind of band-gap reference circuit of integrated temperature protection and curvature compensation function | |
| CN110515417A (en) | The realization device of Low Drift Temperature a reference source | |
| CN103353782A (en) | Low supply voltage bandgap reference circuit and method | |
| TWI377462B (en) | Low voltage bandgap reference circuit | |
| CN102279618A (en) | A Low-Cost Curvature-Corrected Bandgap Reference Current-Voltage Source Circuit | |
| TW202445978A (en) | Compensation circuit and method for managing curvature compensation in bandgap reference voltage output thereof | |
| CN101315566B (en) | reference voltage generator | |
| TW201024954A (en) | Temperature independent type reference current generating device | |
| CN103365330A (en) | Reference voltage/current generator | |
| TW201804278A (en) | Bandgap reference circuit | |
| US20080061865A1 (en) | Apparatus and method for providing a temperature dependent output signal | |
| JP2013200767A (en) | Band gap reference circuit | |
| CN108469862B (en) | Low temperature drift current source reference circuit | |
| TW200803131A (en) | Generation circuit of reference voltage | |
| TW201342003A (en) | Voltage and reference current generator | |
| CN100570527C (en) | Reference voltage generation circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |