200809722 UMU^n w 18171twf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有關於-種液晶顯示器，且特別 種具有共用電壓補償的液晶顯示器。 、 【先前技術】 靖不马習知的液 m ^ 路:請參：圖丨，在像素電路中’薄膜電 ㈣116電性連接至源極配線1〇1，間極端⑴電性接 ，閘極配線103，而汲極端！ 15則透過並聯 ，像素電極_電性連接至共用電極w。在f 陣列電路先天製程之因素，源極:二 /、電極107之間會存在一寄生電容1〇5。 特殊寄ί電容ig5的影響下，顯示面板在顯示一些 電極I的^ (日以因寄生電容105產生的搞合現象使得共用 稱為共用電廢）產生變化，導致顯干面 面會有輝度不輪^ 圖2所示具有他灰階框等。舉例來說，在顯示 域202與203夕;; 之白晝面時，在黑框201兩側區 不會”域咖或=::105產生的•合現象而 影響，善因寄生電容產生的耦合現象之 但製程改變 ^要料製程之改變來降低寄生電容， 高。^匕會影響—面板的其他碰，且成本也較 200809722 u^iuyjii w 18171twf.doc/g 【發明内容】 有鑑於此’本發明之目的在知:供一種用於液晶顯示哭 的共用電壓補償裝置、一種液晶顯示器以及一種液晶顯示 器驅動方法，來降低顯示面板中寄生電容輕合現象對液晶 顯示器的共用電壓的影響。 為達成上述目的及其他目的，本發明提出一種液晶顯 示器，其用以接收並顯示一影像訊號，此影像訊號包括一 具有多個像素資料的水平線訊號，且這些像素資料中相鄰 兩像素資料極性相反。 此液晶顯不為包括一時序控制器、^一補償電路以及一 顯示面板，而此時序控制器包括一查找表、一資料分析器 以及一極性選擇器。查找表内建多個共用電壓補償數值。 貧料分析器針對水平線訊號之一灰階分佈進行分析，並根 據分析結果對照查找表提供一數值控制訊號，其中數值控 制訊號對應共用電壓補償數值的其中之一。極性選擇器根 據資料分析器之分析結果提供一極性控制訊號。補償電路 根據數值控制訊號及極性控制訊號以提供一共用電壓補償 。顯示面板接收水平線訊號及共用電壓補償訊號，並 藉著共用電壓補償訊號補償共用電壓以顯示水平線訊號。 一本發明另提出一種共用電壓補償裝置，適用於一液晶 顯:器之顯示面板，其係用以接收並顯示一影像訊號，其 2影像訊號包括—具有多個像素資料的水平線訊號，且這 ^像素資料中相鄰兩像素資料極性相反。此共用電壓補償 衣置包括一查找表、一資料分析器、一極性選擇器以及一 200809722 ^^iuvju w 18171twf.doc/g 補償電路。在〆實施例中，當資料分析器分析出該灰階八 佈係水平線訊欽奇㈣像素_巾在—㈣值範圍内: 個數與水平線訊號之赌個像素f料巾在該灰階 之個數二者城大於Μ個且大於N料，㈣ ^ 由數值控綱號㈣償電路對顯示面㈣判 = 償，其中MM為正整數。而可根⑽如顯= 板的水平解析度或顯示面板的大小來做調敕。 本發明又提出一種液晶顯示器驅動方=， 器驅動方法錢收-影像職，其中影像訊號包括 多個像素資料的水平線訊號，且這此傻 /、有 素資料極性相反畫面。此液晶顯;;：=== 線訊號之域分㈣行分析，_灰階分狀分析社= :是，進行共用電壓補償，以及在需進行共用電_上 日寸，决疋補偵之電壓極性以進行共用電壓補償。 、 正因為本發明可以在不需改變製程的條件下， 端資料分析器判斷資料的灰階分佈後，再利賴償 補償因寄生電容所造成的耦合現象，進而改善^ : 對畫面品質的影響。 巧口現象 為J本發明之上述和其他目的、特徵和優點能 易I*，下文特舉較佳實施例，並配合所附 、 明如下。 、I h平細說 【實施方式】 圖3 '，會不為依照本發明之—較佳實施例所繪 顯示器之方塊圖。請參照圖3，液晶顯示器删包括= 200809722 0510^11 W 18171twf.d〇c/g 电壓補<1裝置30〗與顯示面板307。其中，共用電壓補償 叙置301包括時序控制器3〇3和補償電路3〇5，而顯示面 板307包括共用電極基板3〇7a與陣列電路基板兕几。共 用電極基板307a接收一共用電壓訊號，陣列電路基板3〇7b 接收一影像汛號，且兩基板3〇7a與307b之間的液晶分子 受到共用電壓訊號與影像訊號的電壓差所驅動。 補償電路305會依據時序控制器3〇3輸出的數值控制 訊號和極性控制訊號，配合鎖存脈衝(丨atchpulse)訊號:提 供一共用電壓補償訊號到共用電極基板3〇7a，其中鎖存脈 衝訊號係作為源極驅動器資料輸出的控制訊號，一般由時 序控制器303提供。所以，共用電極基板3〇7a除了接收共 用電壓訊麟，還接收共用電壓補償職以補償共用電極 基板307a上的共用電壓受寄生電容的耦合現 壓變化。 …在士實施例中，時序控制器303包括緩衝器3〇9、資 料分析器3U、查找表313和極性選擇器315。緩衝哭· 用以接收並暫存影像訊號，其中影像訊號由連續的晝。面所 組成，每-晝面包括多條水平線訊號，每—條水平線訊號 具有多個像素資料，且這些像素:#料巾婦兩像素資料^ 性相反。資料分析13η接收緩衝器309輸出的影像訊號， 並分別對料訊制每-條斜相號進行㈣分 析0 另外，資料分析器3Π分別電性連接到查找表313、 極性選擇器315和補償電路305。其中，資料分析器犯 200809722 UDiuvjii w 18171 twf.doc/g 會根據灰階分佈之分析結果與查找表313内建的多個共同 電壓補償數值做比對，從查找表313内選擇_共同電厣補 償數值以輸出相應的數值控制訊號到補償電路。而資 料分析器311的灰階分佈之分析結果亦提供到極性選擇= 315做水平線訊號極性的選擇，再經由極性選擇哭/is矜 出相應的極性控制訊號到補償電路3〇5。 别 因此，補償電路305所提供的共用電壓補償訊號之數 值與極性分別由時序控制器303輸出的數值控制訊號與極 性控制訊號來決定，而其時序則是由鎖存脈衝訊號來決 定。一般而言，共用電壓補償訊號送出的時間在鎖存脈衝 訊號的下降緣。 眾所皆知地，一般顯示面板的驅動方式分為晝面反轉 (frame inversion)、行反轉(c〇iulnn inversi〇n)、列反轉(卿 inversion)及點反轉(dot inversi〇n)。藉由改變驅動液晶分子 的電壓之極性，以防止液晶分子的特性變差造成晝面品質 變差。而本發明剌於制譬如點反轉或行反轉驅動方 的液晶顯示器。 此外，一般顯不面板的驅動方式亦分為正常顯白 (normally white)以及正常顯黑(n〇rmally Wack)。對正常顯 白義示面板進行,_時，施加於面板上之白信號與共用 电i的％壓差較小，而黑信號與共用電壓的電壓差較大， 口此黑。fL姻為寄生電容的_合現象會對共用電壓造成較 大的影響。反之’對正常顯黑的顯示面板進行驅動時，白 訊號會對共用電壓造成較大的影響。下面將以正常顯白並 200809722 1 w 18171twf.doc/g 採點反轉驅動方式的顯示面板為例來描述林明，凡孰悉 此技藝者當可輕易將本發明之發明精神應用在正常顯黑或 行反轉驅動方式的顯示面板。 圖4繪示為在顯示面板上顯示一晝面時該晝面的像素 資料之極性分佈示意圖’ H示面板係採點反轉驅動方 式，其中「+」為正極性而「-」為負極性。請參照圖4所 示之顯示面板，在顯示面板上奇數條源極配線依序標示為 401、403、405、…’偶數條源極配線依序標示為402、404、 406、…’而閘極配線依序標示為41〜46。其中，每一源極 配線401〜413和每一閘極配線41〜46交叉處即配置一像 素，此像素可以暫存並顯示一像素資料。為方便說明，定 義源極配線401和閘極配線41交叉處所配置的像素暫存並 顯示之像素資料為P(401，41)，源極配線402和閘極配線41 交叉處所配置的像素暫存並顯示之像素資料為 P(402,41)，其它依此類推。 舉例來說，當以脈衝訊號致動閘極配線41時，透過源 極配線401〜413將一條水平線訊號送到像素中，其中這條 水平線訊號包括像素資料P(401，41)、P(402,41)、 P(4〇3,41).....P(413,41)，且這些像素資料 P(401，41)〜P(413,41)相鄰兩像素資料極性相反。接著，當 閘極配線42被致動時，將另一條包括像素資料 P(401，42)〜P(413,42)的水平線訊號送到像素中，其中像素 資料P(401，42)〜P(413,42)相鄰兩像素資料極性相反，且像 素資料P(401，42)〜P(413,42)與相應位置的像素資料 200809722 U51〇y31I W 18171twf.doc/g P(401，41)〜P(413,41)相鄰兩像素資料極性亦相反。因此， 逐條致動閘極配線41〜46並將相應的像素資料送到像素 中，以產生如圖4所示的像素資料之極性分佈。 此外，若圖4所示為目前畫面的像素資料之極性分 佈’則下一晝面的像素資料之極性分佈須盘目前圭 反，即「+」變為「-」"-」變為「+」：其中每 的極性分伟之反轉由譬如圖3的極性選擇器315所提供的 極性POL決定。例如，當極性P0L為正極性時，像素資 料P(401，41)為正極性而像素資料1>(402,41)為負極性γ反 之，若極性POL為負極性時，像素資料p(4〇1，41)為負極 性而像素資料P(402,41)為正極性。 ’ 、 圖5緣示為圖3所示液晶顯示器_中相關訊號的時 序圖。請同時參照圖3、圖4與圖5,共用電壓補償裝置 301提供一判斷機制來決定是否對共用電壓進行補償:此 判斷機制係由資料分析器311對影像訊號中的每一水平線 訊號之奇數個像素資料中在一灰階值範圍内之個數與水平 線訊號之偶數個像素資料中在該灰階值範圍内之個數進行 分析。其中，若以閘極配線41被致動時送入的水平線訊i 為例’此水平線訊號包括奇數個像素資料p(4〇i4j p(403,41)、…、P(413,41)，以及偶數個像素資料P(4〇i4n、 P(404,41)、…、p(412,41)。 ’ ’ 再者，以8位元灰階(256色階)為例，且其灰階值從〇 (全黑）到255 (全白）。由於採用正常顯白的顯示面板， 號對共用電壓的影響較大，因此只統計奇數個（或偶數個） 200809722 UMU^JI I w 】8171twf.doc/g 像素資料中灰階值落在上述灰階值範圍内之健 施例中，此灰階值範圍譬如為〇〜5〇。 匕貝 當奇數赌素資射在灰階㈣之魅盘 訊號之偶數個像素資料中在該灰階值範圍内之個數二:相 由於奇數個與偶數個像素㈣極 壓的f響互相抵消，因此不需要對共用電麼進行補償电 *可數個像素_巾在灰雜範 訊號之偶數個像素資料中在該灰階 :數水: 於2時，整條水平資料線會對 二資二^ = ’右可數個像素資料為負極性而偶數個 像素貝枓為正極性，則當極性p〇L為正 緣503時，產生降低的共用電二: 503 i，產生升7且在鎖存脈衝訊號的下降緣 ㈣電壓5G5。因此補償電路305根據 補償:號：大小：=== =決定輸出的共用電壓 制訊號決定輪出的二5輸出_^^ 的丘闲雷茂3爲-用電壓補侦讯唬之極性，以產生適當 、一 ” 俏汛號對共用電壓進行補償。 之個’如果奇數個像素資料中在灰階值範圍内 ⑽ 而偶數個像素資料中在灰階值範圍内之個 (^〇〇〇/6〇〇Μ^ί ；； '〇〇 (=1〇〇° ' 6〇〇MiX"§^ U7 示面板的大小將^;據譬如顯示面板的水平解析度或顯 _ Μ與N分別調整為300與2，則上述相差 12 18171twf.doc/g 200809722 τ τ 400個(>Μ個）且相！ ι·67倍⑼倍)之情形將不需要進行 共用電壓補償。 圖6為依照本發明之較佳實施例所繪示的液晶顯示器 驅動方法的流程圖。請同時參照圖3與圖6，首先，在步 驟S601 ’液晶顯示n 3GG接收—影像訊號，其中影像訊號 包括-具衫個像素謂的水平線喊，且這些像素資料 中相鄰兩像素純極性相反。在步驟S6Q3，資料分析器 311/情影像訊制-水平線訊狀灰階分佈進行分析。 接著’在步驟S6G5根據灰階分佈之分析結果判斷是否需 要進行共用㈣補償。若f要進行共用電藝償，則在步 私S607决定所需補償之電壓極性，在步驟§6〇9由補償電 路3〇5產生具有適當大小與極性的共用電壓補償訊號，以 及在$驟S611將共用電壓補償訊號送至顯示面板3〇7。 练上所述，本發明因採用一種共用電壓補償裝置針對 接收的影像訊號之每_水平線訊號進行灰階分佈之分析， 可以在不修改製程下，補償顯示面板的制f壓受到寄生 電容耦合現象的影響，進而改善晝面品質。 雖’、、、:本I明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟胃此技藝者，料_ϊ發明之精神 和範圍内，當可作些許之更動與潤飾，因此本發明之保^ 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1繪不為習知的液晶顯示器之晝素電路。 圖2繪不為黑框兩側之輝度與其他區之差異示意圖。 13 200809722 ud luvji i w 18171 twf.doc/g 圖3為依照本發明之較佳實施例所繪示之液晶顯示器 的方塊圖。 圖4繪示在顯示面板上顯示一晝面時該晝面的像素資 料之極性分佈示意圖。 圖5繪示為圖3所示液晶顯示器中相關訊號的時序圖。 圖6為依照本發明之較佳實施例所繪示之液晶顯示器 驅動方法的流程圖。 【主要元件符號說明】 300 :液晶顯示器 301 :共用電壓補償裝置 303 :時序控制器 305 :補償電路 307 :顯示面板 307a :共用電極基板 307b :陣列電路基板 309 :緩衝器 311 :資料分析器 313 :查找表 315 :極性選擇器 401〜413 :源極配線 41〜46 :閘極配線 P(4〇l，41)〜P(402,41):像素資料 501 :正極性 502 :負極性 14 18171twf.doc/g 200809722 503 :鎖存脈衝訊號的下降緣 504 :降低的共用電壓 505 :升高的共用電壓 S601〜S611 ··流程圖步驟 15200809722 UMU^n w 18171twf.doc/g IX. Description of the Invention: [Technical Field] The present invention relates to a liquid crystal display, and particularly to a liquid crystal display having a common voltage compensation. [Prior Art] Jing Bu Ma knows the liquid m ^ Road: Please refer to: Figure 丨, in the pixel circuit 'thin film electricity (four) 116 is electrically connected to the source wiring 1〇1, the extreme (1) electrical connection, the gate wiring 103 And 汲 extreme! 15 is connected in parallel, and the pixel electrode_ is electrically connected to the common electrode w. In the factor of the innate process of the f array circuit, there is a parasitic capacitance 1〇5 between the source: 2 / and the electrode 107. Under the influence of the special capacitor ig5, the display panel displays some of the electrodes I (the day is caused by the parasitic capacitance 105, the sharing is called the shared electric waste), resulting in a change in the visible surface. Wheel ^ Figure 2 shows his grayscale frame and so on. For example, when the white areas of the display fields 202 and 203 are displayed, the two sides of the black frame 201 do not affect the "combination phenomenon caused by the domain coffee or the =::105, and the coupling due to the parasitic capacitance is good. Phenomenon of process changes ^ need to change the process to reduce parasitic capacitance, high. ^ 匕 will affect - other touches of the panel, and the cost is also higher than 200809722 u^iuyjii w 18171twf.doc / g [invention] In view of this The object of the present invention is to provide a common voltage compensation device for liquid crystal display crying, a liquid crystal display, and a liquid crystal display driving method to reduce the influence of the phenomenon of parasitic capacitance in the display panel on the common voltage of the liquid crystal display. To achieve the above and other objects, the present invention provides a liquid crystal display for receiving and displaying an image signal, wherein the image signal includes a horizontal line signal having a plurality of pixel data, and the adjacent two pixels of the pixel data have opposite polarities. The liquid crystal display does not include a timing controller, a compensation circuit, and a display panel, and the timing controller includes a lookup table. A data analyzer and a polarity selector. The lookup table has a plurality of shared voltage compensation values built in. The poor material analyzer analyzes a gray scale distribution of the horizontal line signal, and provides a numerical control signal according to the analysis result according to the lookup table, wherein The numerical control signal corresponds to one of the shared voltage compensation values. The polarity selector provides a polarity control signal according to the analysis result of the data analyzer. The compensation circuit provides a common voltage compensation according to the numerical control signal and the polarity control signal. The display panel receives the horizontal line. The signal and the shared voltage compensation signal, and the common voltage compensation signal is used to compensate the common voltage to display the horizontal line signal. The invention further provides a common voltage compensation device, which is suitable for a display panel of a liquid crystal display device, which is used for receiving and Displaying an image signal, wherein the 2 image signals include a horizontal line signal having a plurality of pixel data, and the adjacent two pixels of the pixel data have opposite polarities. The shared voltage compensation device includes a lookup table, a data analyzer, a polarity selector and a 200809 722 ^^iuvju w 18171twf.doc/g compensation circuit. In the embodiment, when the data analyzer analyzes the gray-scale eight-cloth horizontal line, the signal is in the range of - (four) values: number and horizontal line The number of gambling pixels of the signal is greater than Μ and greater than N material in the number of gray scales. (4) ^ The numerical control number (4) is used to compensate the display surface (4) = MM is a positive integer. However, the root (10), such as the horizontal resolution of the board or the size of the display panel, is used for tuning. The present invention further provides a liquid crystal display driving method, wherein the image signal includes a plurality of pixel data. The horizontal line signal, and this silly /, the information has the opposite polarity of the picture. This liquid crystal display;;:=== line signal domain division (four) line analysis, _ grayscale fractal analysis agency = : Yes, for common voltage compensation And in the need to share the power _ last day, the voltage polarity of the reconnaissance is used for common voltage compensation. Because the present invention can determine the gray scale distribution of the data without changing the process, the end data compensation can compensate for the coupling phenomenon caused by the parasitic capacitance, thereby improving the effect of the image quality. . The above and other objects, features and advantages of the present invention will be apparent from the following description. IH OVERVIEW [Embodiment] FIG. 3' will not be a block diagram of a display according to the preferred embodiment of the present invention. Referring to FIG. 3, the liquid crystal display includes the following: = 200809722 0510^11 W 18171twf.d〇c/g voltage supplement <1 device 30〗 and display panel 307. The shared voltage compensation stage 301 includes a timing controller 3〇3 and a compensation circuit 3〇5, and the display panel 307 includes a common electrode substrate 3〇7a and an array circuit substrate. The common electrode substrate 307a receives a common voltage signal, the array circuit substrate 3〇7b receives an image nickname, and the liquid crystal molecules between the two substrates 3〇7a and 307b are driven by the voltage difference between the common voltage signal and the image signal. The compensation circuit 305 controls the signal and the polarity control signal according to the value outputted by the timing controller 3〇3, and cooperates with the latch pulse signal to provide a common voltage compensation signal to the common electrode substrate 3〇7a, wherein the pulse signal is latched. The control signal output as the source driver data is generally provided by the timing controller 303. Therefore, in addition to receiving the common voltage, the common electrode substrate 3?7a receives the common voltage compensation operation to compensate for the coupling voltage variation of the common voltage on the common electrode substrate 307a by the parasitic capacitance. In the embodiment, the timing controller 303 includes a buffer 3〇9, a data analyzer 3U, a lookup table 313, and a polarity selector 315. Buffering Cry · Used to receive and temporarily store image signals, where the image signal is continuous. The surface consists of a plurality of horizontal line signals, each horizontal line signal has a plurality of pixel data, and the pixels: #料巾二pixel data^ the opposite. The data analysis 13n receives the image signal outputted by the buffer 309, and performs (4) analysis on each oblique phase number of the material system. In addition, the data analyzer 3 is electrically connected to the lookup table 313, the polarity selector 315 and the compensation circuit, respectively. 305. Among them, the data analyzer commits 200809722 UDiuvjii w 18171 twf.doc/g and compares the analysis results of the gray scale distribution with the plurality of common voltage compensation values built in the lookup table 313, and selects the common electric power from the lookup table 313. The compensation value is used to output a corresponding value control signal to the compensation circuit. The analysis result of the gray scale distribution of the data analyzer 311 also provides the polarity selection = 315 to select the polarity of the horizontal line signal, and then selects the corresponding polarity control signal via the polarity selection to the compensation circuit 3〇5. Therefore, the value and polarity of the shared voltage compensation signal provided by the compensation circuit 305 are determined by the value control signal and the polarity control signal outputted by the timing controller 303, respectively, and the timing is determined by the latch pulse signal. In general, the time that the shared voltage compensation signal is sent is at the falling edge of the latch pulse signal. As is well known, the general display panel driving method is divided into frame inversion, line inversion (c〇iulnn inversi〇n), column inversion (inversion) and dot inversion (dot inversi〇) n). By changing the polarity of the voltage of the liquid crystal molecules, the quality of the liquid crystal molecules is prevented from deteriorating, and the quality of the kneading surface is deteriorated. The present invention is also useful in liquid crystal displays such as dot inversion or line inversion driving. In addition, the general display panel driving mode is also divided into normal white and normal black (n〇rmally Wack). For the normal display panel, when _, the difference between the white signal applied to the panel and the common power i is small, and the voltage difference between the black signal and the common voltage is large, and the mouth is black. The phenomenon of fL marriage as a parasitic capacitance will have a greater impact on the common voltage. On the other hand, when the display panel that is normally black is driven, the white signal has a large influence on the common voltage. In the following, the display panel with normal white and 200809722 1 w 18171twf.doc/g adopting the inversion driving method will be taken as an example to describe Lin Ming. Anyone who knows this skill can easily apply the invention spirit of the present invention to normal display. Black or row reverse drive mode display panel. FIG. 4 is a schematic diagram showing the polarity distribution of the pixel data of the face when a face is displayed on the display panel. The H panel is a reverse rotation driving mode, wherein “+” is positive polarity and “-” is negative polarity. . Referring to the display panel shown in FIG. 4, the odd-numbered source wirings on the display panel are sequentially labeled as 401, 403, 405, ... 'the even-numbered source wirings are sequentially labeled as 402, 404, 406, ...' The pole wiring is labeled as 41~46. Wherein, a pixel is disposed at the intersection of each of the source wirings 401 to 413 and each of the gate wirings 41 to 46, and the pixel can temporarily store and display a pixel data. For convenience of explanation, the pixel data in which the pixel disposed at the intersection of the source wiring 401 and the gate wiring 41 is temporarily stored and displayed is P (401, 41), and the pixel arrangement at the intersection of the source wiring 402 and the gate wiring 41 is temporarily stored. The pixel data displayed is P (402, 41), and so on. For example, when the gate wiring 41 is actuated by the pulse signal, a horizontal line signal is sent to the pixel through the source wirings 401 to 413, wherein the horizontal line signal includes the pixel data P (401, 41), P (402). , 41), P(4〇3, 41).....P(413,41), and the pixel data P(401,41)~P(413,41) are opposite in polarity of the adjacent two pixels. Then, when the gate wiring 42 is actuated, another horizontal line signal including the pixel data P(401, 42)~P(413, 42) is sent to the pixel, wherein the pixel data P(401, 42)~P (413, 42) The polarity of the adjacent two pixels is opposite, and the pixel data P(401, 42)~P(413, 42) and the pixel data of the corresponding position 200809722 U51〇y31I W 18171twf.doc/g P(401,41 ) ~ P (413, 41) adjacent two pixels data polarity is also opposite. Therefore, the gate wirings 41 to 46 are actuated one by one and the corresponding pixel data is sent to the pixels to produce a polarity distribution of the pixel data as shown in FIG. In addition, if the polarity distribution of the pixel data of the current picture is shown in FIG. 4, the polarity distribution of the pixel data of the next picture needs to be in the current state, that is, "+" becomes "-" and "-" becomes " +": The polarity reversal of each of them is determined by the polarity POL provided by the polarity selector 315 of FIG. For example, when the polarity P0L is positive polarity, the pixel data P(401, 41) is positive polarity and the pixel data 1> (402, 41) is negative polarity γ, and if the polarity POL is negative polarity, the pixel data p (4) 〇1, 41) is a negative polarity and the pixel data P (402, 41) is a positive polarity. Figure 5 is a timing diagram of the relevant signals in the liquid crystal display _ shown in Figure 3. Referring to FIG. 3, FIG. 4 and FIG. 5 simultaneously, the common voltage compensating device 301 provides a judging mechanism for determining whether to compensate the common voltage: the judging mechanism is an odd number of each horizontal line signal in the image signal by the data analyzer 311. The number of pixels in a range of grayscale values and the number of pixels in the even-numbered pixel data of the horizontal line signal are analyzed in the range of grayscale values. Wherein, if the horizontal line signal i sent when the gate wiring 41 is actuated is taken as an example, the horizontal line signal includes an odd number of pixel data p (4〇i4j p(403, 41), ..., P(413, 41), And an even number of pixel data P (4〇i4n, P(404,41),...,p(412,41). ' ' Furthermore, taking 8-bit gray scale (256 levels) as an example, and its gray scale The value ranges from 〇 (all black) to 255 (all white). Since the display panel with normal white display has a large influence on the common voltage, only an odd number (or even number) is counted. 200809722 UMU^JI I w 】8171twf .doc/g The grayscale value in the pixel data falls within the above-mentioned grayscale value range. The grayscale value range is, for example, 〇~5〇. 匕贝当奇数 赌素射射在灰阶(四)的魅The number of pixels in the even-numbered pixel data of the disk signal is two: the phase cancels each other due to the odd-numbered and even-numbered pixels (four) extreme voltage f, so there is no need to compensate for the shared power. The pixel_the towel is in the grayscale of the even-numbered pixel data of the gray-like signal: the number of water: at 2 o'clock, the entire horizontal data line will be two-funded two ^ = 'right number of images The prime data is negative polarity and the even number of pixels is positive. When the polarity p〇L is positive edge 503, a reduced common power 2 is generated: 503 i, which generates a rise of 7 and a falling edge of the latch pulse signal (4) The voltage is 5G5. Therefore, the compensation circuit 305 determines the output of the common voltage system signal according to the compensation: number: size: ==== determines the output of the second 5 output _^^ of the Qiu Xiaomao 3 is - using the voltage compensation detector Polarity, in order to generate a proper, one-and-a-half number to compensate for the common voltage. If the odd-numbered pixel data is in the grayscale value range (10) and the even-numbered pixel data is in the grayscale value range (^〇 〇〇/6〇〇Μ^ί ;; '〇〇(=1〇〇° ' 6〇〇MiX"§^ U7 The size of the display panel will be ^; according to the horizontal resolution of the display panel or the display _ Μ and N If it is adjusted to 300 and 2 respectively, the above-mentioned phase difference of 12 18171twf.doc/g 200809722 τ τ 400 (> one) and phase ι·67 times (9) times will not require sharing voltage compensation. A flowchart of a liquid crystal display driving method according to a preferred embodiment of the present invention. Please refer to FIG. 3 together with 6. First, in step S601, the liquid crystal display n 3GG receives the image signal, wherein the image signal includes a horizontal line shouting of the pixel, and the adjacent two pixels of the pixel data have opposite polarities. In step S6Q3, data analysis 311/Emotional Video System-Horizontal Line Grayscale Distribution Analysis Next, 'In step S6G5, according to the analysis result of the grayscale distribution, it is judged whether it is necessary to share (4) compensation. If f is to share the electronic art, then S607 determines the voltage polarity of the required compensation, and generates a common voltage compensation signal having an appropriate size and polarity by the compensation circuit 3〇5 in step §6〇9, and sends the shared voltage compensation signal to the display panel 3〇7 in step S611. . As described above, the present invention uses a common voltage compensation device to analyze the gray scale distribution of each _ horizontal line signal of the received image signal, and can compensate the parasitic capacitance coupling phenomenon of the f panel of the display panel without modifying the process. The impact, which in turn improves the quality of the noodles. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and any skilled person, in the spirit and scope of the invention, may make some changes. And the scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 depicts a pixel circuit that is not a conventional liquid crystal display. Figure 2 depicts a schematic diagram of the difference between the luminance on both sides of the black frame and other regions. 13 200809722 ud luvji i w 18171 twf.doc/g FIG. 3 is a block diagram of a liquid crystal display according to a preferred embodiment of the present invention. FIG. 4 is a schematic diagram showing the polarity distribution of the pixel data of the face when a face is displayed on the display panel. FIG. 5 is a timing diagram of related signals in the liquid crystal display shown in FIG. FIG. 6 is a flow chart showing a driving method of a liquid crystal display according to a preferred embodiment of the present invention. [Main component symbol description] 300: Liquid crystal display 301: Common voltage compensation device 303: Timing controller 305: Compensation circuit 307: Display panel 307a: Common electrode substrate 307b: Array circuit substrate 309: Buffer 311: Data analyzer 313: Lookup table 315: Polarity selectors 401 to 413: Source wirings 41 to 46: Gate wiring P (4〇1, 41) to P (402, 41): Pixel data 501: Positive polarity 502: Negative polarity 14 18171twf. Doc/g 200809722 503: falling edge of latch pulse signal 504: reduced common voltage 505: raised common voltage S601~S611 · Flow chart step 15