200807245 九、發明說明： .【發明所屬之技術領域】 本發明係有關於一種啟動方法，特別是一種重新啟動週邊裝置之方法。 【先前技術】 為因應魔大之功此需求，電腦系統日益複雜，而效能之提昇無法避免 增加電源消耗。由於電源消耗愈多，電腦系統之硬體設備溫度愈高，高溫 容易影響電腦系統之效能。為解決此問題，除了研發低耗能之硬體設備外， 電腦系統之電源管理亦是一重要課題。電腦系統之電源管理規範定義出4 大項電源狀態··整體狀態（Q〇bal State)、裝置狀態（j)evice state)、 處理為狀態（CPU State)與效能狀態（Performance State)。整體狀態為 電腦系統整體運作之狀態；裝置狀態為電腦系紙各個裝置個別運作之狀 悲，處理器狀態為中央處理器運作之狀態，而效能狀態則為中央處理器與 裝置之運作電源狀態。 上述之整體狀態又可分為下列4類：工作（Working)狀態、休眠 (Sleepmg)狀態、軟體關閉（s〇ft 〇ff)狀態與硬體關閉（Mechanicai 〇ff) 狀恶。當電腦系統於使用者正常操作時，電源係處於工作狀態；若作業系 統關閉，則為軟體關閉狀態；若電腦系統之電源開關為關閉或插頭拔除等， 則為硬體關閉狀態；至於電腦系統雖開啟，但作業系統未執行任何工作指 令時，即為休眠狀態，對使用者而言，電腦系統為關閉無法使用，但實際 上仍有部分設備為開啟。而休眠狀態係關閉大部分之硬體設備，僅保留部 为硬體设備之供電，使電腦系統重新進入工作狀態時，不需耗費過多設定 時間’亦可直接回復休眠前之工作狀態。 覌今電腦系統常用於搭配作業系統之電源管理方式係為先進架構電源 介面（Advanced Configuration & Power Interface，ACPI)之電源管理 模式’其提供電腦系統不同方式之休眠狀態以節省電源消耗。先進架構電 源介面之休眠狀態大致可分為以下5種：S1狀態為待命（standby)模式， 200807245 - 中央處理器，（以下簡稱cpu)與記憶tt (如疆）之電源皆保持供應，但不 • 執行任何指令，其餘裝置可切斷電源，因此CPU或晶片組等之内容仍可保 存，故為最耗電之休眠狀悲。S2 .狀態與S1狀態相近，但cpu之電源亦切斷， 因此貢料於S2休眠狀悲結東後需由作業系統回復原始資料。 承接上述，S3狀悲又稱為隨機存取記憶體暫停（Suspend㈣細，㈣ 扠式，僅供應主要記憶體之電源以保留記憶體内之資料，其餘如⑽、週邊 裝置等之電源皆關閉。S4狀態則為硬碟暫停（s卿㈣切祕，咖模 式’所有l置皆關閉’貝料則需先儲存至硬碟内，因此於重新啟動後需耗 f較㈣間回復休眠狀工作狀態，部分電·統會提供34休眠狀態專用 ® 之硬碟區塊’以供其使用。S5狀態則為上述之軟體關閉狀態，僅留下觸發 電腦系統重新啟動之裝置所需之電源。 除了 S5軟體關閉狀態之外，各電腦系統廠商與電源供應器廠商之設計 中’較常用之休眠狀悲為S1與S3，而各休眠狀態中以S3休眠狀態較為省 電，且其喚醒電腦系統方式更為迅速。欲從休眠狀態中使電腦系統楚醒 (驗叩），需重新設定電腦系統之系統參數，亦'需對週邊裝置進行重新啟 動，以重新設定對應週邊裝置之主控制單元的系統參數。例如當電腦系統 自S3狀態喚醒時，部分之先進技術附件（Μν纖d祕㈣卿200807245 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a starting method, and more particularly to a method of restarting a peripheral device. [Prior Art] In order to cope with this demand, computer systems are becoming more and more complex, and the improvement of performance cannot avoid increasing power consumption. The higher the power consumption, the higher the temperature of the hardware of the computer system, and the high temperature easily affects the performance of the computer system. In order to solve this problem, in addition to the development of low-energy hardware devices, power management of computer systems is also an important issue. The power management specification of a computer system defines four major power states: a global state (Q〇bal State), a device state (j)evice state, a state of the CPU (CPU State), and a performance state (Performance State). The overall state is the state of the overall operation of the computer system; the state of the device is the individual operation of the computer-based paper, the state of the processor is the state of operation of the central processing unit, and the performance state is the operational power state of the central processing unit and the device. The above overall state can be further divided into the following four categories: Working state, Sleepmg state, software shutdown (s〇ft 〇 ff) state, and hardware shutdown (Mechanicai 〇 ff). When the computer system is in the normal operation of the user, the power system is in the working state; if the operating system is turned off, the software is in the off state; if the power switch of the computer system is turned off or the plug is removed, the hardware is turned off; as for the computer system Although it is turned on, the operating system does not execute any work instructions, it is in a sleep state. For the user, the computer system is disabled and cannot be used, but actually some devices are still turned on. In the sleep state, most of the hardware devices are turned off, and only the power supply of the hardware devices is reserved, so that when the computer system is re-entered into the working state, it does not need to spend too much set time ’, and can directly reply to the working state before the sleep. The power management method commonly used in today's computer systems for operating systems is the power management mode of the Advanced Configuration & Power Interface (ACPI), which provides different modes of sleep in the computer system to save power consumption. The sleep state of the advanced architecture power interface can be roughly divided into the following five types: S1 state is standby mode, 200807245 - Central processor, (hereinafter referred to as cpu) and memory tt (such as Xinjiang) power supply are maintained, but not • Execute any command, the rest of the device can cut off the power, so the contents of the CPU or chipset can be saved, so it is the most power-hungry sleep. S2. The state is similar to the S1 state, but the power of the cpu is also cut off. Therefore, the sacred material needs to be restored by the operating system after the S2 sleeps. Under the above, S3 sadness is also called random access memory pause (Suspend (four) fine, (four) fork type, only supply the main memory power to retain the data in the memory, and the rest of the power supply such as (10), peripheral devices are turned off. The S4 state is a hard disk pause (sqing (four) secret, coffee mode 'all l are closed'), the bedding needs to be stored in the hard disk first, so after the restart, it needs to consume f more than (four) to return to sleep state Some power systems will provide 34 hard disk blocks for Sleep Mode® for their use. The S5 state is the software-off state described above, leaving only the power required to trigger the computer system to restart. In addition to the software shutdown state, the computer system manufacturers and power supply manufacturers are designed to use the more commonly used sleepy sorrows as S1 and S3, while the sleep state in S3 is more power-saving in each sleep state, and the wake-up computer system is more For the sake of speed. To wake up the computer system from the dormant state, it is necessary to reset the system parameters of the computer system, and also need to restart the peripheral device to reset the corresponding peripheral device. The main control unit of the system parameters. For example, when computer system from state S3 wake portion of the Advanced Technology Attachment (iv Secretary of State [mu] v fineness d
AttaChment，ATA )/ 先進技術附件封包介面（Advanced Technology 響 肋chment Packet interfaCe，層〇之週邊裝置需重新執行開機自我 設定，以重新設定時序（Tlming);執行開機自我設定完畢後，週邊裝置即 進入間置（Idle)狀態，韌體（如基本輸入輸出系統，βΙ⑹將發送軟體 重置（Software Reset)訊號。若先進技術附件/先進技術附件封包介面之 驅動程式（Dnver)仍在執行開機自我設定，但勒體誤發軟體重置訊號時， 週邊裝置之時序可能產生錯誤，造成電腦系統發生錯誤。 " 為使電腦系統可正確發送軟體重置訊號以重新啟動週邊裝置，習知技 術利用週邊k置之狀恕暫存器（StatusReglster)中一忙綠位元（财阶） 之設定狀態來判斷何時可發送軟體重置訊號。當週邊裝置仍在進行開機自 200807245 我ό又疋日彳，此ft:碌位元為含帝 可於-偵測時間内‘：元= 是否完成開機自我設定。但此偵‘^低電位，進而得知週邊= 週邊裝置之不同而有所變化。因此^短係依經驗與測試而得，故因 能於週置仍未執行開機自我物卩^間从，職體重置訊號可 開機自我設定時發送。兩者皆可能造成週週邊'裝置正在執行 問題’因此較長之偵測時間似乎較為保險，伯、_系統時序不-致之 亦不符合自休眠狀態嗔醒電腦時間則浪費時間， 决逑啟動電腦系統之目的。AttaChment, ATA ) / Advanced Technology Attachment Packet Interface (Advanced Technology ch chchment Packet interfaCe, peripheral devices need to re-execute the boot self-setting to reset the timing (Tlming); after the boot self-setting, the peripheral device enters Idle state, firmware (such as basic input and output system, βΙ (6) will send software reset (Software Reset) signal. If the advanced technology accessory / advanced technology accessory package interface driver (Dnver) is still performing boot self-setting However, when the software resets the signal, the timing of the peripheral device may be wrong, causing an error in the computer system. " In order for the computer system to correctly send the software reset signal to restart the peripheral device, the conventional technology utilizes the periphery. The status of a busy green bit (Finance) in the StatusReglster is used to determine when the software reset signal can be sent. When the peripheral device is still booting from 200807245, we are still in the future. This ft: 位 元 含 含 含 含 - - - - - detection time ': yuan = whether to complete the boot self-set. However, this detection '^ low potential, and then know the difference between the surrounding = peripheral devices. Therefore, the short system is based on experience and testing, so it can still be executed in the week. The job reset signal can be sent when the power is turned on. Both of them may cause the peripheral device to be performing problems. Therefore, the longer detection time seems to be more insurance. The system and the system timing are not in compliance with the self-sleep state. It is a waste of time to wake up the computer and decide to start the computer system.
【發明内容】 有鑑於此，本發明提供一種重新啟 狀 休眠«喚_欲諸啟動週邊裝置時，系統自 置狀態，簡進行频啟動。本發日⑽彻訊號傳輸之、進^間 週邊裝置是否就緒。 一否，以判斷 ，本發明之«肋週輕置之方法，係—電腦純自休眠'狀態 時’判斷-週邊裝置是否可進行魏啟動。首錄體發送—判斷訊號至週 邊裝置，使週邊裝置對此判斷訊號進行回應’產生一回覆訊號；接著ϋ韌體 判斷回覆訊號是否為週邊裝置之正常運作訊號，如是則表示週邊裝置=已 就緒，可進行重新啟動；如否則表示週邊裝置尚未就緒，無法進行重新啟 動。韌體於確認回覆訊號為週邊裝置之正常運作訊號後，則重新啟動週迻 裝置；若回覆訊號為週邊裝置之異常運作訊號，韌體再發送判斷訊號至週 邊裝置，直到回覆訊號為正常運作訊號表示週邊裝置可進行重新啟動為止c 【實施方式】 首先，請參閱第一圖，係為本發明之一較佳實施例之方塊圖，其包含 一韋刃體10與一週邊裝置20，其中週邊裝置2〇又包含一暫存器22。本實施 例係一電腦系統自先進架構電源介面（Advanced configuration P()wer 7 200807245 • interiaGe，腿）之53休眠狀態喚醒後，_ ίο對電⑽統中之週邊裝 • 置20，例如先進技術附件/先進技術附件封&介面-7( Advanced Techn〇1〇gySUMMARY OF THE INVENTION In view of the above, the present invention provides a re-starting sleep mode. When the peripheral device is to be activated, the system is self-set and the frequency is activated. On the date of this issue (10), if the signal is transmitted, the peripheral device is ready. First, it is judged that the method of "the rib circumference is lightly set, the system is purely self-sleeping" judges whether the peripheral device can perform Wei start. The first recorded body sends a judgment signal to the peripheral device, so that the peripheral device responds to the determination signal to generate a reply signal; then the firmware determines whether the reply signal is a normal operation signal of the peripheral device, and if so, the peripheral device = ready , can be restarted; otherwise, it means that the peripheral device is not ready and cannot be restarted. After the firmware confirms that the reply signal is the normal operation signal of the peripheral device, the peripheral device is restarted; if the reply signal is the abnormal operation signal of the peripheral device, the firmware sends a judgment signal to the peripheral device until the reply signal is a normal operation signal. [Embodiment] First, referring to a first embodiment, a block diagram of a preferred embodiment of the present invention includes a blade body 10 and a peripheral device 20, wherein the periphery The device 2 further includes a register 22. In this embodiment, after a computer system wakes up from the sleep state of the advanced architecture power supply interface (Advanced configuration P () wer 7 200807245 • interiaGe, leg), the peripheral device of the power system (10) is installed, for example, advanced technology. Accessories / Advanced Technology Accessories & Interface-7 - Advanced Techn〇1〇gy
Attachment/ Advanced Technology Attachment Packet Interface - ATA/删-7)規格的週邊裝置20進行重新啟動，使先進技術附件/先進技 術附件封包介面-7之週邊裝置20之傳輸模式與相對應之一主控制單元 (host controller ’未繪示）之系統參數相符合。 當電腦系統處於S3之休眠狀態時，僅有隨機存取記憶體（未繪示）保 持電源供應，其餘元件及週邊裝置20皆無電源供應。因此，若電腦系統自 S3休眠狀態回復時’各元件及週邊裝置2〇必須重新啟動。如上所述，_ • 裝置20需先執行開機自我設定，完成後始可正常處理軟體重置訊號，同理， 當週邊裝置20於’自我設定過財，騎法處理電腦线所發送之任何 命令。由此可知’若於電腦系統自休眠狀態喚醒後，先測試週邊裝置2〇是 否已開機自我設定完成’且可執行電腦系統之命令，即可得知週邊裝置如 是否已進人閒置狀態。#週邊裝置2G無法輪出表示正常運作之回覆訊號， 即表不該週邊裝置20尚未開機自我設定完畢，則不發送軟體重置訊號。若 週邊裝置20輸出表示正常運作之回覆訊號，即表示該週邊裝置2〇已完成 開機自我設定’可正常處理軟體重置訊號。 ^ Φ 本實施例係藉由韌體10發送一判斷訊號CHK至週邊裝置20，以判斷週 邊裝置2〇是否完成開機自我設定，若週邊裝置2〇之回覆訊號RLY為異常 運作訊號’ S示週邊裝置20尚未完成開機自我設定’無法回應判斷訊號哪 對應之事件；若週邊裝置2G之回覆訊號RLY為正常運作訊號，表示邊裝 置20已完成開機自我設定，可執行判斷訊號CHK所對應之事件。韌體 即可於回覆§fl號RLY為正常運作§fi號後’發送軟體重置訊號至填邊裝置2〇， 以重新啟動此週邊裝置20。 接著請參照第二圖，係為本發明之一較佳實施例之流程圖。於步驟 S11 ’初體10兔送判辦訊號CHK至週邊裝置20，使週邊震置2〇執行判斷气 號CHK對應之事件，並輸出回覆訊號RLY。其中此判斷訊號可為一輸入 8 200807245 例糊細™。此f獅__存取週 二已開機自::二之：寫入，值至暫存器22 ’若週邊裝 可窝6 70 、丨靭體10可正常存取暫存器22，此設定值即 制訊σ卢益、=位址’ Γ週邊裝置20尚未開機自我設定完畢，此資料存取控 。仃’則減10即無法存取暫存器22，設定值亦無法寫入。 回萝綱丨t步驟⑽，物體1G判斷週邊裝置2G是否已進人間置狀態，如 入=置柄邊裝置20之正常運作訊號，則表示週邊裝置20係已進 =置狀^此週邊裝置2Q可正觀回覆訊號RLY;如否，則週邊裝 ^回㈣號[係異常運作訊號’絲週邊裝置2G尚未進人閒置狀 可料存取控制訊號之例，^週邊裝置2G已進人閒置狀態， 窝二:#存益22之内容，則回讀暫存器22中該指定位址之值必為 π晉^1 ’回覆訊號—即為正常運作訊號，表示週邊裝置20已進入 ^舌腦系統可重新啟動週邊裝置2〇，即接續進行步驟如以發送 ^重置爾。若週邊裝置2Q尚未完成自我設定々體W無法存取暫存 ^即為^暫存器22侧定位址之值不為寫入之設定值，回覆訊號 L ttr作訊號，此時則回到步驟su，使_再發送判斷訊號 CHK到週边衣置20，直到回覆訊號RLY為正常運作訊號為止。 承上述，由於週邊裝置20於電腦系統自休眠狀態喚醒後未必可立刻啟 動’且週4置20啟動後’無法立即完成開機自我設定。於此情況下 體10在步驟S12中判斷回覆訊號RLY為異常運作訊號，而回到步_繼 續發送判_虎CHK至週邊裝置20。若週邊裝置2〇 一直未能輸出正常運作 訊號’滅10會持續回到步驟S11與步驟S12，發送判斷訊號弧至週邊 裝置20，再判斷回覆訊號RLY為正常運作訊號與否，直到確認週邊裝置= 之回覆訊號RLY為週邊裝置20之正常運作訊號為止，方可進: S13。 最後於步驟S13，韌體10發送軟體重置訊號，對週邊裝置2〇進行重新 啟動，由電腦系統執行重新啟動週邊裝置2〇之程式碼，使週邊裝置邡之 9 200807245 傳輸模式可回復至週邊裝置進入休眠狀態前之傳輸模式，而在電腦系統 對相對於週邊裝置20之主控制單元設定系統參數完成後，週邊裝置2〇之 傳輸模式即可符合其主控制單元重新設定後之系統參數，不致使電腦系統 此外，於步，驟S13之後，更可包含一步，驟S14，係設定對應週邊裝置 2〇 Γ主ί制單元，即依據週邊裝置20之規格，以設定對應週邊裝置20之 主控制早το的系統參數，使主控鮮元與週邊裝置2()之配合可麵穩定而 不產生錯誤，此步驟為本發明之應用方式的其中之—用途 = 他應用方式_途上。 ％作於其The peripheral device 20 of the Attachment/Advanced Technology Attachment Packet Interface - ATA/deletion-7) is restarted, so that the transmission mode of the peripheral device 20 of the advanced technology accessory/advanced technology accessory packet interface-7 is corresponding to one of the main control units. (The system parameters of the host controller 'not shown) match. When the computer system is in the sleep state of S3, only the random access memory (not shown) maintains the power supply, and the remaining components and peripheral devices 20 have no power supply. Therefore, if the computer system resumes from the S3 sleep state, the components and peripheral devices must be restarted. As mentioned above, the device 20 needs to perform the boot self-setting first, and the software reset signal can be processed normally after the completion. Similarly, when the peripheral device 20 is self-set, the rider processes any command sent by the computer line. . It can be seen that if the computer system wakes up from the sleep state, it first tests whether the peripheral device 2 has been turned on and self-setting is completed, and the command of the computer system can be executed, and it can be known whether the peripheral device has entered the idle state. # Peripheral device 2G cannot rotate the reply signal indicating normal operation, that is, if the peripheral device 20 has not been turned on and self-setting, the software reset signal is not sent. If the peripheral device 20 outputs a reply signal indicating normal operation, it means that the peripheral device 2 has completed the power-on self-setting, and the software reset signal can be processed normally. ^ Φ In this embodiment, the firmware 10 sends a determination signal CHK to the peripheral device 20 to determine whether the peripheral device 2 完成 has completed the boot self-setting, and if the peripheral device 2 〇 the reply signal RLY is an abnormal operation signal The device 20 has not completed the power-on self-setting "cannot respond to the event of the corresponding signal; if the reply signal RLY of the peripheral device 2G is a normal operation signal, indicating that the edge device 20 has completed the power-on self-setting, the event corresponding to the determination signal CHK can be executed. The firmware can then send the software reset signal to the edge-filling device 2 after replying the §fl number RLY to the normal operation §fi number to restart the peripheral device 20. Next, please refer to the second figure, which is a flow chart of a preferred embodiment of the present invention. In step S11', the first body 10 sends a signal CHK to the peripheral device 20, and the surrounding sensor is set to perform an event corresponding to the judgment gas number CHK, and outputs a reply signal RLY. The judgment signal can be an input 8 200807245 Example. This f __ access has been powered on from Tuesday:: two: write, value to the scratchpad 22 'if the peripheral can be installed 6 70, 丨 firmware 10 can access the register 22 normally, this setting The value is the control signal σ Lu Yi, = address ' Γ peripheral device 20 has not been turned on self-setting, this data access control. If you subtract 10, you will not be able to access the scratchpad 22, and the set value will not be written. In step (10), the object 1G determines whether the peripheral device 2G has entered the inter-personal state. If the normal operation signal of the input device 20 is in the vicinity of the handle device 20, it indicates that the peripheral device 20 has been placed in the vicinity of the device. Can reply to the signal RLY; if not, then the surrounding installation (4) [is an abnormal operation signal] 2G wire peripheral device has not entered the idle access control signal, ^ peripheral device 2G has been idle , nest 2: #存益22, the value of the specified address in the readback register 22 must be π Jin ^ 1 'recovery signal — that is, the normal operation signal, indicating that the peripheral device 20 has entered the tongue The system can restart the peripheral device 2, that is, continue to perform steps such as sending a reset. If the peripheral device 2Q has not completed the self-setting, the body W cannot access the temporary memory, that is, the value of the address of the register 22 is not the written setting value, and the reply signal L ttr is used as the signal, and then the step returns to the step. Su, so that _ re-sends the judgment signal CHK to the surrounding clothing 20 until the reply signal RLY is a normal operation signal. In view of the above, since the peripheral device 20 may not be immediately activated after the computer system wakes up from the sleep state and the device is activated after the start of the week 4, the boot self-setting cannot be completed immediately. In this case, the body 10 determines in step S12 that the reply signal RLY is an abnormal operation signal, and returns to the step_continue to send the judgment CHK to the peripheral device 20. If the peripheral device 2 〇 has not been able to output the normal operation signal 'off 10' will continue to return to step S11 and step S12, send a judgment signal arc to the peripheral device 20, and then determine whether the reply signal RLY is a normal operation signal or not until the surrounding area is confirmed. The reply signal RLY of the device = is the normal operation signal of the peripheral device 20 before proceeding to: S13. Finally, in step S13, the firmware 10 sends a software reset signal to restart the peripheral device 2, and the computer system executes the program code for restarting the peripheral device 2, so that the peripheral device can be restored to the surrounding state. The transmission mode before the device enters the sleep state, and after the computer system sets the system parameters with respect to the main control unit of the peripheral device 20, the transmission mode of the peripheral device 2 can meet the system parameters after the main control unit is reset. In addition, in addition to the computer system, after step S13, a step may be further included, and step S14 is set to correspond to the peripheral device 2, that is, according to the specifications of the peripheral device 20, to set the main device corresponding to the peripheral device 20. Control the system parameters of the early το, so that the cooperation between the master fresh element and the peripheral device 2() can be stabilized without error, and this step is one of the application modes of the invention - use = his application mode _ way. % made in it
人Γ二相圖為本發明之又-較佳實施例之方塊圖與流程圖，第三 圖係㈣一基本輪入輸出系統3〇與一週邊裝置4〇 — 狀態嗓略基轉，_3G發送―_取訊魅^自s休眠 42之—位址。接著基本輸入_統3:=:: =置仙已開機自我奴完成，基本輸人輸出 號；如否，即週邊裝置40尚未 =运車人體重置訊 30 , 5 我叹疋完成，可接受基本輸人輪出純3q之舊 :〇開機自 始發送軟體重置訊號。 ’、、 ° 土本輪入輸出系統30 本貫施例之方法首先於步驟s 取訊號至週邊裝㈣以寫入—特定值至發送軸 位址之值，因此嶋衝㉛物“方法需回讀言 :凡之位址。於步驟S22基本輸人輸出系統3G回私=至存放裝】 純著於步_，基本輸人軸統3Q確認回讀之中該位… ^回頃之值非寫人之特定值，卿寫人失敗，週邊 ^入之特定值 我設定而未進人·狀態，所叫紐送軟 7未完成開機_ 礼現，則回到步驟S21 200807245 ^ 再次發送資料存取訊號；甚河μ 進入閒置狀態，可接受美本值為寫入之特定值，表示週邊裝已 — 細24。卿細之猶誠，職行下一 40。 輸入知出系統30發送軟體重置訊號至週邊裝置 完成傳裝置位™，表示週邊細已 設定為_，基本矜入㈣貢料存取輯之事件，因此裝置位元成功 畴之值不置訊號。若週邊裝置㈣ 寫入至暫存器42，所以回傳、尚未開機完成自我設定’無法將Olh • 存取訊__ 統30需 取汛號之事件，亦即自靳存 、置 了正㊆處理貧料存 本輪入齡純位元特寫人之設定值，則基 控制週邊裝置40。 韻重置喊’使電腦系統於喚醒後可正常 42中任何可存取位元之入週邊裝置4〇之暫存器 球定_與回讀此位址之值是否為二特定值 自我投定。此外，基本j =衣置4〇已 :存益42中可讀取之位址之值，確認其值是=取週4置40之 有效值’即確認暫存器42中可讀取之位 二S遠位址之位元定義之 定義位元值，以_週邊裝置4〇是 ^效定義位元值或為無效 綸έ士品上人L ， _置狀恶。 、.心、、口而m，相較於習知技術，本發 ^因其規格不同而需作任何修正，如偵測於任何週邊褒置, &不―’需經測試始可得到較佳之設定 、以配合週邊裝置之規 體重置訊號之__，如獅_短，^設定不m致發送軟 &，即發送軟體重置訊號。或麵測時間_=衣置執行m自我設定 輔多餘之時間等待。透過發送判斷常，軟體重置訊 置之狀怨，亚於週邊裝置職 乂方式，即可得知週邊裝 相，立即發送軟體重置訊號， 200807245 本發明之方 不需耗費多餘時間以確保發送之時機無誤。 法不僅 正球性高且簡便，亦不受限於週邊裝置之規格，^ 態喚醒後，料喊原作㈣統狀態之目的。、戦腦系統自休眠狀 惟以上所述者’僅為本發明一較佳 實施之範m，故舉凡依本㈣申已，並非用來限定本發明 m 料μ明專利_所述之形狀、構造、特徵及精 神所為之均等變化與修飾，均應包括於本發明之巾請專利範圍内。 【圖式簡單說明】The two-phase diagram is a block diagram and a flow chart of a further preferred embodiment of the present invention, and the third diagram is a fourth wheeled-in output system 3〇 and a peripheral device 4〇-state 嗓 基 ,, _3G transmission ―_Communication charm ^ from s sleep 42 - address. Then the basic input _ system 3: =:: = set the fairy has been turned on self-slave completion, the basic input output number; if not, that is, the peripheral device 40 has not yet = vehicle body reset signal 30, 5 I sigh completed, acceptable The basic input turns out the pure 3q old: 〇 boot from the beginning to send the software reset signal. ',, ° The present in-wheel output system 30 The method of the first embodiment first takes the signal to the peripheral assembly (4) in step s to write - the value of the specific value to the address of the transmission axis, so the buffer 31 "method needs to be returned Read the words: Where is the address. In step S22, the basic input output system 3G whistle = to the storage device. Purely in step _, the basic input axis 3Q confirms the reading in the bit... ^Return value is not Write a specific value, the writer writes a failure, the specific value of the surrounding ^ I set but did not enter the state, the name is sent to the soft 7 did not complete the boot _ polite, then return to step S21 200807245 ^ send data again Take the signal; if the river enters the idle state, it can accept the specific value of the US value written, indicating that the surrounding equipment has been - fine 24. The fineness of the instinct, the next line of the professional 40. Enter the knowledge system 30 to send soft weight The signal is sent to the peripheral device to complete the transmission device TM, indicating that the peripheral fine has been set to _, and the basic input (4) tribute access event, so the value of the device bit success domain is not set. If the peripheral device (4) is written to the temporary Saver 42, so return, not yet booted to complete self-setting 'cannot be Olh • Access to the __ system 30 needs to take the nickname event, that is, the self-storing, set the positive seven-storage material to store the set-up of the pure-aged close-up person, then control the peripheral device 40. The reset caller 'make the computer system to wake up any of the accessible bits of the peripheral device 4 to the peripheral device 4 and to read back whether the value of the address is a second specific value self-deployment. In addition, the basic j = clothing 4 〇 has: the value of the address that can be read in the benefit 42, confirm that the value is = take the RMS value of the week 4 set 40 'that is to confirm the readable bit in the register 42 The definition of the bit value of the bit definition of the second S far address is to define the bit value of the _ peripheral device 4 or the invalid L. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ And m, compared to the prior art, the hair is required to make any corrections due to its different specifications, such as detecting any peripheral devices, & not - need to be tested to get better settings to match the surrounding The device resets the signal __, such as lion_short, ^ is not set to send soft &, that is, send software reset signal. Or face test time _= clothes set execution m self-set Waiting for the extra time to wait. Through the judgment of sending, the software resets the complaint of the device, and the peripheral device is used to know the surrounding installation, and immediately sends the software reset signal. 200807245 The invention does not need to be It takes extra time to ensure that the timing of the transmission is correct. The method is not only true and simple, but also not limited to the specifications of the peripheral devices. After the wake-up of the state, it is expected to call the original (4) system state. The camphor system is self-sleeping. However, the above description is only a preferred embodiment of the present invention, and therefore, it is not intended to limit the shape, structure, characteristics, and spirit of the present invention. Equivalent variations and modifications are to be included in the scope of the patent application of the present invention. [Simple description of the map]
第圖係本發明之一較佳實施例之方塊圖； f二圖係本發明之-較佳實施例之流程圖； ^一圖係本n明之又—較佳實施例之方塊圖；以及 第四圖係本發明之又—較隹實施例之流程圖。 【主要元件符號說明】 10 韌體 20 週邊裝置 22 暫存器 30 基本輸入輪出系 40 週邊裝置 42 暫存器 12Figure 2 is a block diagram of a preferred embodiment of the present invention; Figure 2 is a flow chart of a preferred embodiment of the present invention; ^ Figure 1 is a block diagram of a preferred embodiment; and The four figures are a further flow chart of the present invention. [Main component symbol description] 10 Firmware 20 Peripheral device 22 Register 30 Basic input wheel system 40 Peripheral device 42 Register 12