TW200739819A - Semiconductor device, and method for manufacturing the same - Google Patents
Semiconductor device, and method for manufacturing the sameInfo
- Publication number
- TW200739819A TW200739819A TW095144231A TW95144231A TW200739819A TW 200739819 A TW200739819 A TW 200739819A TW 095144231 A TW095144231 A TW 095144231A TW 95144231 A TW95144231 A TW 95144231A TW 200739819 A TW200739819 A TW 200739819A
- Authority
- TW
- Taiwan
- Prior art keywords
- type semiconductor
- semiconductor device
- gate electrode
- semiconductor layer
- gate
- Prior art date
Links
Classifications
-
- H10P10/00—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
- H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
Landscapes
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006063290A JP2007242894A (ja) | 2006-03-08 | 2006-03-08 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200739819A true TW200739819A (en) | 2007-10-16 |
| TWI321832B TWI321832B (en) | 2010-03-11 |
Family
ID=38478049
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095144231A TWI321832B (en) | 2006-03-08 | 2006-11-29 | Semiconductor device, and method for manufacturing the same |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7416967B2 (zh) |
| JP (1) | JP2007242894A (zh) |
| KR (1) | KR100870593B1 (zh) |
| CN (1) | CN100541818C (zh) |
| TW (1) | TWI321832B (zh) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4920310B2 (ja) * | 2006-05-30 | 2012-04-18 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US20080164529A1 (en) * | 2007-01-08 | 2008-07-10 | United Microelectronics Corp. | Semiconductor device and manufacturing method thereof |
| JP4939960B2 (ja) | 2007-02-05 | 2012-05-30 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US7416949B1 (en) * | 2007-02-14 | 2008-08-26 | Texas Instruments Incorporated | Fabrication of transistors with a fully silicided gate electrode and channel strain |
| JP5086665B2 (ja) * | 2007-03-02 | 2012-11-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US7585738B2 (en) * | 2007-04-27 | 2009-09-08 | Texas Instruments Incorporated | Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device |
| JP2009004444A (ja) * | 2007-06-19 | 2009-01-08 | Panasonic Corp | 半導体装置及びその製造方法 |
| JP5349903B2 (ja) | 2008-02-28 | 2013-11-20 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| US8617946B2 (en) | 2009-11-11 | 2013-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuits including metal gates and fabrication methods thereof |
| CN102315269B (zh) * | 2010-07-01 | 2013-12-25 | 中国科学院微电子研究所 | 一种半导体器件及其形成方法 |
| CN102543705B (zh) * | 2011-07-12 | 2014-05-28 | 上海华力微电子有限公司 | 用于高、低压器件的多晶硅栅电极集成工艺 |
| CN102543706B (zh) * | 2011-07-22 | 2014-06-04 | 上海华力微电子有限公司 | 一种不同多晶硅栅电极厚度的集成工艺 |
| KR101889469B1 (ko) * | 2011-10-31 | 2018-08-21 | 에스케이하이닉스 주식회사 | 고유전층 및 금속게이트를 갖는 반도체장치, cmos 회로 및 그 제조 방법 |
| CN103515318B (zh) * | 2012-06-20 | 2016-03-02 | 中芯国际集成电路制造(上海)有限公司 | Cmos全硅化物金属栅制备方法 |
| ITMI20130060A1 (it) * | 2013-01-17 | 2014-07-18 | St Microelectronics Srl | Dispositivo a semiconduttore a struttura impilata. |
| JP2015144248A (ja) * | 2013-12-25 | 2015-08-06 | キヤノン株式会社 | 半導体装置、及びその製造方法 |
| US9378968B2 (en) * | 2014-09-02 | 2016-06-28 | United Microelectronics Corporation | Method for planarizing semiconductor device |
| US9570572B2 (en) * | 2014-10-24 | 2017-02-14 | Globalfoundries Inc. | Multiple layer interface formation for semiconductor structure |
| CN105099374B (zh) * | 2015-07-01 | 2017-12-05 | 东南大学 | 氮化镓基低漏电流悬臂梁开关差分放大器 |
| CN105162420B (zh) * | 2015-07-01 | 2017-11-28 | 东南大学 | 砷化镓基低漏电流双悬臂梁开关双栅倍频器 |
| CN105024649B (zh) * | 2015-07-01 | 2017-12-19 | 东南大学 | 硅基低漏电流悬臂梁栅金属氧化物场效应晶体管或非门 |
| US20170148726A1 (en) * | 2015-11-03 | 2017-05-25 | Applied Materials, Inc. | Semiconductor processing method and semiconductor device |
| KR102338487B1 (ko) * | 2016-05-10 | 2021-12-10 | 에스케이하이닉스 주식회사 | 반도체 소자 및 이의 제조 방법 |
| US10242988B2 (en) * | 2017-08-23 | 2019-03-26 | Nxp Usa, Inc. | Antifuses integrated on semiconductor-on-insulator (SOI) substrates |
| CN109545749A (zh) * | 2017-09-22 | 2019-03-29 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| US11133226B2 (en) * | 2018-10-22 | 2021-09-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | FUSI gated device formation |
| CN113644112B (zh) * | 2020-05-11 | 2022-07-15 | 北京华碳元芯电子科技有限责任公司 | 晶体管及制作方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3483484B2 (ja) * | 1998-12-28 | 2004-01-06 | 富士通ディスプレイテクノロジーズ株式会社 | 半導体装置、画像表示装置、半導体装置の製造方法、及び画像表示装置の製造方法 |
| US6391750B1 (en) * | 1999-08-18 | 2002-05-21 | Advanced Micro Devices, Inc. | Method of selectively controlling contact resistance by controlling impurity concentration and silicide thickness |
| GB2390224B (en) * | 2000-12-06 | 2004-12-08 | Advanced Micro Devices Inc | Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing |
| US6794234B2 (en) * | 2002-01-30 | 2004-09-21 | The Regents Of The University Of California | Dual work function CMOS gate technology based on metal interdiffusion |
| KR100870176B1 (ko) * | 2003-06-27 | 2008-11-25 | 삼성전자주식회사 | 니켈 합금 샐리사이드 공정, 이를 사용하여 반도체소자를제조하는 방법, 그에 의해 형성된 니켈 합금 실리사이드막및 이를 사용하여 제조된 반도체소자 |
| JP4368180B2 (ja) | 2003-10-21 | 2009-11-18 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JP3879003B2 (ja) * | 2004-02-26 | 2007-02-07 | 国立大学法人名古屋大学 | シリサイド膜の作製方法 |
| KR100629267B1 (ko) * | 2004-08-09 | 2006-09-29 | 삼성전자주식회사 | 듀얼-게이트 구조를 갖는 집적회로 소자 및 그 제조 방법 |
| JP2006060046A (ja) * | 2004-08-20 | 2006-03-02 | Toshiba Corp | 半導体装置 |
| US7365410B2 (en) * | 2004-10-29 | 2008-04-29 | Freescale, Semiconductor, Inc. | Semiconductor structure having a metallic buffer layer and method for forming |
| JP4181537B2 (ja) * | 2004-11-12 | 2008-11-19 | 株式会社東芝 | 半導体装置およびその製造方法 |
-
2006
- 2006-03-08 JP JP2006063290A patent/JP2007242894A/ja not_active Abandoned
- 2006-09-26 US US11/526,637 patent/US7416967B2/en not_active Expired - Fee Related
- 2006-11-29 TW TW095144231A patent/TWI321832B/zh active
-
2007
- 2007-03-02 CN CNB2007100844768A patent/CN100541818C/zh not_active Expired - Fee Related
- 2007-03-08 KR KR1020070023136A patent/KR100870593B1/ko not_active Expired - Fee Related
-
2008
- 2008-07-24 US US12/219,571 patent/US20090032884A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20070210351A1 (en) | 2007-09-13 |
| CN100541818C (zh) | 2009-09-16 |
| US7416967B2 (en) | 2008-08-26 |
| KR20070092175A (ko) | 2007-09-12 |
| TWI321832B (en) | 2010-03-11 |
| CN101034717A (zh) | 2007-09-12 |
| US20090032884A1 (en) | 2009-02-05 |
| JP2007242894A (ja) | 2007-09-20 |
| KR100870593B1 (ko) | 2008-11-25 |
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