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TW200723816A - Methods and apparatus for clock synchronization and data recovery in a receiver - Google Patents

Methods and apparatus for clock synchronization and data recovery in a receiver

Info

Publication number
TW200723816A
TW200723816A TW095127343A TW95127343A TW200723816A TW 200723816 A TW200723816 A TW 200723816A TW 095127343 A TW095127343 A TW 095127343A TW 95127343 A TW95127343 A TW 95127343A TW 200723816 A TW200723816 A TW 200723816A
Authority
TW
Taiwan
Prior art keywords
clock
sampling point
data
phase position
phase
Prior art date
Application number
TW095127343A
Other languages
English (en)
Inventor
Azita Emami-Neyestanak
Mounir Meghelli
Benjamin D Parker
Sergey V Rylov
Alexander V Rylyakov
Jose A Tierno
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200723816A publication Critical patent/TW200723816A/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
TW095127343A 2005-07-29 2006-07-26 Methods and apparatus for clock synchronization and data recovery in a receiver TW200723816A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/193,868 US7602869B2 (en) 2005-07-29 2005-07-29 Methods and apparatus for clock synchronization and data recovery in a receiver

Publications (1)

Publication Number Publication Date
TW200723816A true TW200723816A (en) 2007-06-16

Family

ID=37674575

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095127343A TW200723816A (en) 2005-07-29 2006-07-26 Methods and apparatus for clock synchronization and data recovery in a receiver

Country Status (3)

Country Link
US (1) US7602869B2 (zh)
CN (1) CN100571118C (zh)
TW (1) TW200723816A (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8693604B2 (en) 2007-12-04 2014-04-08 Fujitsu Limited Receiving apparatus and receiving method
TWI596487B (zh) * 2012-06-13 2017-08-21 Ａｒｍ股份有限公司 具有元件以增加診斷資料路徑上維持時間之序列閂鎖裝置與方法

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7969819B2 (en) * 2006-05-09 2011-06-28 Schlumberger Technology Corporation Method for taking time-synchronized seismic measurements
US7693088B2 (en) * 2007-03-14 2010-04-06 Agere Systems Inc. Method and apparatus for data rate detection using a data eye monitor
WO2009141680A1 (en) * 2008-05-19 2009-11-26 Freescale Semiconductor, Inc. Method for sampling data and apparatus therefor
KR20100045186A (ko) * 2008-10-23 2010-05-03 삼성전자주식회사 광대역의 지연고정루프회로
US8619755B2 (en) * 2010-09-10 2013-12-31 Broadcom Corporation Systems and methods for providing a dual-master mode in a synchronous ethernet environment
US8552783B2 (en) 2011-06-10 2013-10-08 International Business Machines Corporation Programmable delay generator and cascaded interpolator
US8774228B2 (en) * 2011-06-10 2014-07-08 International Business Machines Corporation Timing recovery method and apparatus for an input/output bus with link redundancy
CN102317885B (zh) 2011-07-26 2014-05-07 华为技术有限公司 计算机系统及其配置时钟的方法
CN103516471B (zh) * 2012-06-26 2017-11-03 中兴通讯股份有限公司 无误码数据接收方法及装置
US8903028B2 (en) * 2012-09-20 2014-12-02 Novelsat Ltd. Timing recovery for low roll-off factor signals
US8744029B2 (en) * 2012-09-25 2014-06-03 Avago Technologies General Ip (Singapore) Pte. Ltd. Method and apparatus for quantifying characteristics of a received serial data stream
CN103152155A (zh) * 2012-10-22 2013-06-12 杭州开鼎科技有限公司 一种快速时钟数据恢复的方法
US9160518B1 (en) * 2014-09-30 2015-10-13 Realtek Semiconductor Corporation Half-rate clock-data recovery circuit and method thereof
US9552456B2 (en) 2015-05-29 2017-01-24 Altera Corporation Methods and apparatus for probing signals from a circuit after register retiming
US9356775B1 (en) * 2015-07-09 2016-05-31 Xilinx, Inc. Clock data recovery (CDR) phase walk scheme in a phase-interpolater-based transceiver system
US9922248B2 (en) * 2015-09-25 2018-03-20 Intel Corporation Asynchronous on-die eye scope
US10162918B1 (en) 2016-04-27 2018-12-25 Altera Corporation Integrated circuit retiming with selective modeling of flip-flop secondary signals
US10177897B2 (en) 2016-10-07 2019-01-08 Analog Devices, Inc. Method and system for synchronizing and interleaving separate sampler groups
CN110224786B (zh) 2018-03-01 2022-05-13 京东方科技集团股份有限公司 数据传输方法、装置、系统及显示装置
KR102905474B1 (ko) * 2020-01-06 2026-01-02 삼성전자주식회사 전자 장치 및 전자 장치의 동작 방법
CN115549834A (zh) * 2021-06-29 2022-12-30 中兴通讯股份有限公司 时钟同步方法、装置、系统、电子设备及可读介质
CN117667815B (zh) * 2023-12-01 2024-10-18 广东高云半导体科技股份有限公司 一种抗扭斜处理的电路、方法、计算机存储介质及终端
CN117783836B (zh) * 2024-02-26 2024-06-11 成都电科星拓科技有限公司 Prbs产生和自检测系统、prbs自检测方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001095552A2 (en) * 2000-06-02 2001-12-13 Connectcom Microsystems, Inc. High frequency network receiver
JP3573734B2 (ja) * 2001-03-19 2004-10-06 Ｎｅｃエレクトロニクス株式会社 オーバーサンプリングクロックリカバリ回路
US7221723B2 (en) * 2001-11-27 2007-05-22 Agilent Technologies, Inc. Multi-phase sampling
US7092471B2 (en) * 2002-05-22 2006-08-15 Lucent Technologies Inc. Digital phase synchronization circuit
TWI298223B (en) * 2002-11-04 2008-06-21 Mstar Semiconductor Inc Data recovery circuit, phase detection circuit and method for detecting and correcting phase conditions
US7092472B2 (en) * 2003-09-16 2006-08-15 Rambus Inc. Data-level clock recovery
US7397848B2 (en) * 2003-04-09 2008-07-08 Rambus Inc. Partial response receiver
US7627029B2 (en) * 2003-05-20 2009-12-01 Rambus Inc. Margin test methods and circuits
US7792232B2 (en) * 2005-06-30 2010-09-07 Intel Corporation Method and system for link jitter compensation including a fast data recovery circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8693604B2 (en) 2007-12-04 2014-04-08 Fujitsu Limited Receiving apparatus and receiving method
TWI596487B (zh) * 2012-06-13 2017-08-21 Ａｒｍ股份有限公司 具有元件以增加診斷資料路徑上維持時間之序列閂鎖裝置與方法

Also Published As

Publication number Publication date
US20070025483A1 (en) 2007-02-01
US7602869B2 (en) 2009-10-13
CN1905435A (zh) 2007-01-31
CN100571118C (zh) 2009-12-16

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