[go: up one dir, main page]

TW200729816A - Dynamic determination of signal quality in a digital system - Google Patents

Dynamic determination of signal quality in a digital system

Info

Publication number
TW200729816A
TW200729816A TW095144798A TW95144798A TW200729816A TW 200729816 A TW200729816 A TW 200729816A TW 095144798 A TW095144798 A TW 095144798A TW 95144798 A TW95144798 A TW 95144798A TW 200729816 A TW200729816 A TW 200729816A
Authority
TW
Taiwan
Prior art keywords
test
path
normal
input
buffer
Prior art date
Application number
TW095144798A
Other languages
English (en)
Inventor
Aldereguia Alfredo
Marcus Alan Baker
Justin Potok Bandholz
Jeffrey Buchanan Williams
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200729816A publication Critical patent/TW200729816A/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
TW095144798A 2005-12-19 2006-12-01 Dynamic determination of signal quality in a digital system TW200729816A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/305,932 US7523365B2 (en) 2005-12-19 2005-12-19 Dynamic determination of signal quality in a digital system

Publications (1)

Publication Number Publication Date
TW200729816A true TW200729816A (en) 2007-08-01

Family

ID=38175195

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095144798A TW200729816A (en) 2005-12-19 2006-12-01 Dynamic determination of signal quality in a digital system

Country Status (4)

Country Link
US (1) US7523365B2 (zh)
JP (1) JP5398113B2 (zh)
CN (1) CN1987805B (zh)
TW (1) TW200729816A (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7747558B2 (en) * 2007-06-07 2010-06-29 Motorola, Inc. Method and apparatus to bind media with metadata using standard metadata headers
US9222971B2 (en) * 2013-10-30 2015-12-29 Freescale Semiconductor, Inc. Functional path failure monitor
US10541690B2 (en) 2016-02-29 2020-01-21 Samsung Electronics Co., Ltd. Method and device to align phases of clock signals
US10446255B2 (en) * 2016-06-13 2019-10-15 International Business Machines Corporation Reference voltage calibration in memory during runtime
US10048316B1 (en) * 2017-04-20 2018-08-14 Qualcomm Incorporated Estimating timing slack with an endpoint criticality sensor circuit

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0105513B1 (en) 1982-10-04 1990-01-03 Nec Corporation Method of measuring quality of a signal received by a receiver of a two-dimensional linear modulation data communication system
JPH01163840A (ja) * 1987-12-21 1989-06-28 Nec Corp 遅延時間チエック方式
US5258660A (en) 1990-01-16 1993-11-02 Cray Research, Inc. Skew-compensated clock distribution system
US5557616A (en) * 1992-04-02 1996-09-17 Applied Digital Access, Inc. Frame synchronization in a performance monitoring and test system
FI95978C (fi) 1994-03-01 1996-04-10 Nokia Telecommunications Oy Hierarkkinen synkronointimenetelmä
JP2760284B2 (ja) 1994-06-27 1998-05-28 日本電気株式会社 半導体集積回路装置
US5799049A (en) 1996-04-02 1998-08-25 Motorola, Inc. Phase-independent clock circuit and method
DE19653261A1 (de) 1996-12-20 1998-06-25 Alsthom Cge Alcatel Synchrones digitales Nachrichtenübertragungssystem, Steuerungseinrichtung, Netzelement und zentraler Taktgenerator
US6108794A (en) * 1998-02-24 2000-08-22 Agilent Technologies Signal comparison system and method for improving data analysis by determining transitions of a data signal with respect to a clock signal
US6037809A (en) 1998-06-02 2000-03-14 General Electric Company Apparatus and method for a high frequency clocked comparator and apparatus for multi-phase programmable clock generator
JP3460118B2 (ja) 1998-08-26 2003-10-27 富士通株式会社 同期網システムのクロック管理方法及び伝送装置
DE19850567C2 (de) 1998-11-02 2001-02-15 Wandel & Goltermann Man Holdin Verwendung einer Schaltungsanordnung und Vorrichtung zur Messung der Signalgüte eines digitalen Nachrichtenübertragungssystems
KR100318842B1 (ko) 1998-11-26 2002-04-22 윤종용 디지털위상제어루프에서의주파수검출방법
US6477659B1 (en) 1999-09-03 2002-11-05 Sun Microsystems, Inc. Measuring timing margins in digital systems by varying a programmable clock skew
JP3450274B2 (ja) * 2000-04-26 2003-09-22 エヌイーシーマイクロシステム株式会社 通信制御回路
US6687844B1 (en) 2000-09-28 2004-02-03 Intel Corporation Method for correcting clock duty cycle skew by adjusting a delayed clock signal according to measured differences in time intervals between phases of original clock signal
US6384649B1 (en) 2001-02-22 2002-05-07 International Business Machines Corporation Apparatus and method for clock skew measurement
US6898741B2 (en) * 2002-06-06 2005-05-24 Intel Corporation Arrangements for self-measurement of I/O timing

Also Published As

Publication number Publication date
CN1987805B (zh) 2010-05-26
CN1987805A (zh) 2007-06-27
JP2007171166A (ja) 2007-07-05
US7523365B2 (en) 2009-04-21
JP5398113B2 (ja) 2014-01-29
US20070143644A1 (en) 2007-06-21

Similar Documents

Publication Publication Date Title
TW200801891A (en) Dynamic timing adjustment in a circuit device
DE502008000252D1 (de) Erzeugung dekorrelierter signale
ATE528654T1 (de) Schaltkreise zur verhinderung von spitzenleistungsproblemen während des scan-shift
DE60216803D1 (de) Fifo als übergang von taktregionen
ATE553539T1 (de) Taktmodusbestimmung in einem speichersystem
TR201906713T4 (tr) Audio kod çözücü.
TW200611276A (en) De-coupled memory access system and method
BR112013029850A2 (pt) sistema de áudio e método de operação de um sistema de áudio
NO20100342L (no) Teknikk og system for a behandle et seismisk signal for a bestemme en attributt ved et geologisk lag
ATE470936T1 (de) Digitaler datenpuffer
TW200729816A (en) Dynamic determination of signal quality in a digital system
TW200715711A (en) Dual reference input receiver of semiconductor device and method of receiving input data signal
TW200711277A (en) Method for regulating an output signal circuit therefor
TW200637147A (en) Data latch circuit of semiconductor device
TW200721692A (en) Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by a frequency synthesizer
IL214723A (en) Self-aligning data path converter for multi-clock systems
TW200509585A (en) Signal detecting circuit and method therefor
TW200723296A (en) Data input circuit of semiconductor memory device and data input method thereof
TW200639875A (en) Configuration of memory device
TW200741237A (en) Calibration device, calibration method, test apparatus and test method
TWI256539B (en) Apparatus and method for generating a clock signal
TW200627466A (en) An architecture for reading and writing an external memory
TW200723738A (en) Channel emulating device and channel emulating method
TW200707200A (en) Dynamic source synchronized sampling adjust system, and the related integrated device and sampling method
TW200744048A (en) Interface circuit for data transmission and method thereof