[go: up one dir, main page]

TW200717830A - Package structure - Google Patents

Package structure

Info

Publication number
TW200717830A
TW200717830A TW094136399A TW94136399A TW200717830A TW 200717830 A TW200717830 A TW 200717830A TW 094136399 A TW094136399 A TW 094136399A TW 94136399 A TW94136399 A TW 94136399A TW 200717830 A TW200717830 A TW 200717830A
Authority
TW
Taiwan
Prior art keywords
package structure
substrate
diversion
bumps
die
Prior art date
Application number
TW094136399A
Other languages
Chinese (zh)
Other versions
TWI261367B (en
Inventor
Chun-Yang Lee
Sung-Fei Wang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW94136399A priority Critical patent/TWI261367B/en
Application granted granted Critical
Publication of TWI261367B publication Critical patent/TWI261367B/en
Publication of TW200717830A publication Critical patent/TW200717830A/en

Links

Landscapes

  • Wire Bonding (AREA)

Abstract

A package structure has a substrate, a die mounted on the central region of the substrate, and a plurality of diversion bumps. The diversion bumps are used to diverse the direction of water during the washing process. Thus, the diversion bumps is able to prevent tin residual or solder chippings from retaining under the die.
TW94136399A 2005-10-18 2005-10-18 Package structure TWI261367B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94136399A TWI261367B (en) 2005-10-18 2005-10-18 Package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94136399A TWI261367B (en) 2005-10-18 2005-10-18 Package structure

Publications (2)

Publication Number Publication Date
TWI261367B TWI261367B (en) 2006-09-01
TW200717830A true TW200717830A (en) 2007-05-01

Family

ID=37876165

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94136399A TWI261367B (en) 2005-10-18 2005-10-18 Package structure

Country Status (1)

Country Link
TW (1) TWI261367B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI604537B (en) * 2016-09-30 2017-11-01 南亞科技股份有限公司 Semiconductor package and method of manufacturing same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109276953A (en) * 2017-07-21 2019-01-29 德梅斯特(上海)环保科技有限公司 A dedusting and defogging device and a dedusting and defogging system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI604537B (en) * 2016-09-30 2017-11-01 南亞科技股份有限公司 Semiconductor package and method of manufacturing same

Also Published As

Publication number Publication date
TWI261367B (en) 2006-09-01

Similar Documents

Publication Publication Date Title
WO2011020038A3 (en) Interconnect structure with elements of varying height or different materials that allows a balanced stress to prevent thin die warpage
TW200739854A (en) Substrate structure having solder mask layer and process for making the same
SG155133A1 (en) Semiconductor package and method of making the same
GB2463192A (en) Land grid array (LGA) socket loading mechanism for mobile platforms
TW200742029A (en) Multichip package system
TW200618253A (en) Methods and apparatuses for providing stacked-die devices
WO2011013091A3 (en) Semiconductor device including a stress buffer material formed above a low-k metallization system
TW200614399A (en) Bumping process
TW200644187A (en) Semiconductor device and method for manufacturing semiconductor device
TW200802767A (en) A flip-chip package structure with stiffener
TW200504961A (en) Multi-chip package
WO2010091245A3 (en) Scribe-line through silicon vias
TW200737437A (en) Chip package and package process thereof
ATE412251T1 (en) PRODUCTION PROCESS FOR SEMICONDUCTOR HOUSINGS AND HOUSINGS PRODUCED BY THIS METHOD
TW200737379A (en) Semiconductor device and fabrication process thereof
TW200721356A (en) Workpiece transfer device
TW200717830A (en) Package structure
WO2004075294A3 (en) Flip-chip component packaging process and flip-chip component
TW200707686A (en) Lead-free semiconductor package
WO2005098945A3 (en) Top finger having a groove and semiconductor device having the same
TW200727373A (en) Chip-scale package
TW200733267A (en) Bumping process
TW200603339A (en) Chip structure and method for fabricating the same
WO2011107044A3 (en) Waterproof structure for bonding pad, waterproof bonding pad and method for forming waterproof structure
TW200639950A (en) Method of fabricating wafer level package

Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent