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TW200706085A - Circuit board structure and method for fabricating the same - Google Patents

Circuit board structure and method for fabricating the same

Info

Publication number
TW200706085A
TW200706085A TW094124650A TW94124650A TW200706085A TW 200706085 A TW200706085 A TW 200706085A TW 094124650 A TW094124650 A TW 094124650A TW 94124650 A TW94124650 A TW 94124650A TW 200706085 A TW200706085 A TW 200706085A
Authority
TW
Taiwan
Prior art keywords
heat sink
solder mask
conductive bumps
circuit board
fabricating
Prior art date
Application number
TW094124650A
Other languages
Chinese (zh)
Other versions
TWI279175B (en
Inventor
Shing-Ru Wang
Hsien-Shou Wang
Shih-Ping Hsu
Original Assignee
Phoenix Prec Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Phoenix Prec Technology Corp filed Critical Phoenix Prec Technology Corp
Priority to TW094124650A priority Critical patent/TWI279175B/en
Priority to US11/458,605 priority patent/US20070017815A1/en
Publication of TW200706085A publication Critical patent/TW200706085A/en
Application granted granted Critical
Publication of TWI279175B publication Critical patent/TWI279175B/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • H10W40/228—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H10P72/74—
    • H10W70/05—
    • H10W70/685—
    • H10W72/884—
    • H10W74/00—
    • H10W90/754—

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

A circuit board structure and a method for fabricating the same are proposed. A plurality of conductive bumps and a first solder mask are formed on a carrier board, and the first solder mask is filled in the gaps between the conductive bumps and the conductive bumps are exposed. A first circuit layer and a first heat sink are formed on the first solder mask and the conductive bumps. A second heat sink is formed on the first heat sink, and a dielectric layer is formed on the first circuit layer and the first solder mask except the first and second heat sinks. A second circuit layer is formed on the dielectric layer and is electrically conducted to the first circuit layer. A third heat sink is formed on the second heat sink and a heat sink used for a chip mounting thereon is embedded in the dielectric layer. Therefore, the size of the circuit board is reduced and it is conformed to the size shrunk progress of electronic devices.
TW094124650A 2005-07-21 2005-07-21 Circuit board structure and method for fabricating the same TWI279175B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW094124650A TWI279175B (en) 2005-07-21 2005-07-21 Circuit board structure and method for fabricating the same
US11/458,605 US20070017815A1 (en) 2005-07-21 2006-07-19 Circuit board structure and method for fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094124650A TWI279175B (en) 2005-07-21 2005-07-21 Circuit board structure and method for fabricating the same

Publications (2)

Publication Number Publication Date
TW200706085A true TW200706085A (en) 2007-02-01
TWI279175B TWI279175B (en) 2007-04-11

Family

ID=37678065

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094124650A TWI279175B (en) 2005-07-21 2005-07-21 Circuit board structure and method for fabricating the same

Country Status (2)

Country Link
US (1) US20070017815A1 (en)
TW (1) TWI279175B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI419272B (en) * 2009-12-19 2013-12-11 鈺橋半導體股份有限公司 Semiconductor wafer package with bump/base heat sink and signal bump
CN112492777A (en) * 2019-09-12 2021-03-12 宏启胜精密电子(秦皇岛)有限公司 Circuit board and manufacturing method thereof

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200810043A (en) * 2006-08-04 2008-02-16 Phoenix Prec Technology Corp Circuit board structure with capacitor embedded therein and method for fabricating the same
US8269336B2 (en) * 2008-03-25 2012-09-18 Bridge Semiconductor Corporation Semiconductor chip assembly with post/base heat spreader and signal post
TWI419278B (en) * 2010-10-26 2013-12-11 欣興電子股份有限公司 Package substrate and its preparation method
US20160316573A1 (en) * 2015-04-22 2016-10-27 Dyi-chung Hu Solder mask first process
EP4064337A4 (en) * 2019-12-13 2022-12-07 Huawei Technologies Co., Ltd. ELECTRONIC COMPONENT, PRINTED CIRCUIT BOARD COMPRISING THE SAME AND ELECTRONIC DEVICE
CN111883431B (en) * 2020-06-15 2021-09-21 珠海越亚半导体股份有限公司 Packaging substrate with efficient heat dissipation structure and manufacturing method thereof
CN114071866A (en) * 2020-07-31 2022-02-18 华为技术有限公司 Circuit board assembly, processing method thereof and electronic equipment
EP4124182A4 (en) * 2020-12-16 2023-09-06 Shennan Circuits Co., Ltd. Circuit board and preparation method therefor
CN114828383A (en) * 2021-01-21 2022-07-29 欣兴电子股份有限公司 Circuit board structure and manufacturing method thereof
US12040291B2 (en) 2021-12-20 2024-07-16 Nxp Usa, Inc. Radio frequency packages containing multilevel power substrates and associated fabrication methods

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6156980A (en) * 1998-06-04 2000-12-05 Delco Electronics Corp. Flip chip on circuit board with enhanced heat dissipation and method therefor
SE513786C2 (en) * 1999-03-09 2000-11-06 Ericsson Telefon Ab L M Method for producing circuit boards and device for heat dissipation made according to the method
US6664617B2 (en) * 2000-12-19 2003-12-16 Convergence Technologies, Ltd. Semiconductor package
US20020079572A1 (en) * 2000-12-22 2002-06-27 Khan Reza-Ur Rahman Enhanced die-up ball grid array and method for making the same
US6562656B1 (en) * 2001-06-25 2003-05-13 Thin Film Module, Inc. Cavity down flip chip BGA
US6657296B2 (en) * 2001-09-25 2003-12-02 Siliconware Precision Industries Co., Ltd. Semicondctor package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI419272B (en) * 2009-12-19 2013-12-11 鈺橋半導體股份有限公司 Semiconductor wafer package with bump/base heat sink and signal bump
CN112492777A (en) * 2019-09-12 2021-03-12 宏启胜精密电子(秦皇岛)有限公司 Circuit board and manufacturing method thereof

Also Published As

Publication number Publication date
US20070017815A1 (en) 2007-01-25
TWI279175B (en) 2007-04-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees