TW200636933A - Single electron transistor and method for manufacturing the same - Google Patents

Abstract

The invention relates to a structure of single electron transistor (SET) and the method for fabricating the same. The SET comprises a substrate, a quantum dot which is isolated from outside by ambient oxide, a gate oxide layer, a gate electrode and a drain/source electrode which is conspired to form the tunnel junction with the quantum dot. The fabricating method utilizes spacer technique to build the active silicon wire region on the substrate, and sequentially forms the gate oxide layer, the gate electrode and the protection layer. Then, a mask which interlaces with the active silicon wire region is given for etching above layers until etching into the buried oxide. After that, a geometric configuration of the quantum dot is obtained. Consequently, this projecting feature of the single electron transistor effectively shrinks the quantum dot below 10 nm, and allows the SET to be operated at high (room) temperature. Besides, in the fabricating method, the gate electrode, the gate oxide layer, the drain/source electrode, and the tunnel junction are self-aligned consistently.